https://gcc.gnu.org/bugzilla/show_bug.cgi?id=63615
Bug ID: 63615 Summary: [i686][5 Regression] FAIL: gcc.target/i386/addr-sel-1.c Product: gcc Version: 5.0 Status: UNCONFIRMED Severity: normal Priority: P3 Component: target Assignee: unassigned at gcc dot gnu.org Reporter: izamyatin at gmail dot com Target: i686 There is a new fail for gcc.target/i386/addr-sel-1.c on i686 after r216462 For this test we now have in asm file movl 4(%esp), %eax leal 1(%eax), %edx movsbl a(%edx), %ecx movsbl b(%edx), %eax addl %ecx, %eax ret instead of earlier movl 4(%esp), %eax movsbl a+1(%eax), %ecx movsbl b+1(%eax), %eax addl %ecx, %eax ret Seems the change resticts some opts in postreload. Now in .postreload there are (insn 6 21 8 2 (parallel [ (set (reg:SI 1 dx [orig:83 D.1733 ] [83]) (plus:SI (reg:SI 0 ax [96]) (const_int 1 [0x1]))) (clobber (reg:CC 17 flags)) ]) ../gcc/testsuite/gcc.target/i386/addr-sel-1.c:13 220 {*addsi_1} (nil)) (insn 8 6 10 2 (set (reg:SI 2 cx [orig:93 D.1733 ] [93]) (sign_extend:SI (mem/j:QI (plus:SI (reg:SI 1 dx [orig:83 D.1733 ] [83]) (symbol_ref:SI ("a") <var_decl 0x7f7b4a70fc60 a>)) [0 a S1 A8]))) ../gcc/testsuite/gcc.target/i386/addr-sel-1.c:13 148 {extendqisi2} (nil)) while earlier there were (insn 6 21 8 2 (parallel [ (set (reg:SI 1 dx [orig:83 D.1733 ] [83]) (plus:SI (reg:SI 0 ax [96]) (const_int 1 [0x1]))) (clobber (reg:CC 17 flags)) ]) addr-sel-1-good.c:13 220 {*addsi_1} (nil)) (insn 8 6 10 2 (set (reg:SI 2 cx [orig:93 D.1733 ] [93]) (sign_extend:SI (mem/j:QI (plus:SI (reg:SI 0 ax [96]) (const:SI (plus:SI (symbol_ref:SI ("a") <var_decl 0x7fbf3c296c60 a>) (const_int 1 [0x1])))) [0 a S1 A8]))) addr-sel-1-good.c:13 148 {extendqisi2} (nil)) so insn 6 is not needed