[Bug target/64115] [4.9/5 Regression] ICE: : in rs6000_delegitimize_address, at config/rs6000/rs6000.c:7051
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=64115 --- Comment #6 from Ulrich Weigand uweigand at gcc dot gnu.org --- Author: uweigand Date: Tue Dec 2 14:27:46 2014 New Revision: 218273 URL: https://gcc.gnu.org/viewcvs?rev=218273root=gccview=rev Log: PR target/64115 * config/rs6000/rs6000.c (rs6000_delegitimize_address): Remove invalid UNSPEC_TOCREL sanity check under ENABLE_CHECKING. Modified: trunk/gcc/ChangeLog trunk/gcc/config/rs6000/rs6000.c
[Bug target/64115] [4.9/5 Regression] ICE: : in rs6000_delegitimize_address, at config/rs6000/rs6000.c:7051
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=64115 --- Comment #7 from Ulrich Weigand uweigand at gcc dot gnu.org --- Author: uweigand Date: Tue Dec 2 14:30:47 2014 New Revision: 218274 URL: https://gcc.gnu.org/viewcvs?rev=218274root=gccview=rev Log: PR target/64115 * config/rs6000/rs6000.c (rs6000_delegitimize_address): Remove invalid UNSPEC_TOCREL sanity check under ENABLE_CHECKING. Modified: branches/gcc-4_9-branch/gcc/ChangeLog branches/gcc-4_9-branch/gcc/config/rs6000/rs6000.c
[Bug target/64115] [4.9/5 Regression] ICE: : in rs6000_delegitimize_address, at config/rs6000/rs6000.c:7051
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=64115 --- Comment #8 from Ulrich Weigand uweigand at gcc dot gnu.org --- Author: uweigand Date: Tue Dec 2 14:33:00 2014 New Revision: 218275 URL: https://gcc.gnu.org/viewcvs?rev=218275root=gccview=rev Log: PR target/64115 * config/rs6000/rs6000.c (rs6000_delegitimize_address): Remove invalid UNSPEC_TOCREL sanity check under ENABLE_CHECKING. Modified: branches/gcc-4_8-branch/gcc/ChangeLog branches/gcc-4_8-branch/gcc/config/rs6000/rs6000.c
[Bug target/64115] [4.9/5 Regression] ICE: : in rs6000_delegitimize_address, at config/rs6000/rs6000.c:7051
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=64115 Ulrich Weigand uweigand at gcc dot gnu.org changed: What|Removed |Added Status|ASSIGNED|RESOLVED Resolution|--- |FIXED --- Comment #9 from Ulrich Weigand uweigand at gcc dot gnu.org --- Fixed everywhere.
[Bug target/64115] [4.9/5 Regression] ICE: : in rs6000_delegitimize_address, at config/rs6000/rs6000.c:7051
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=64115 Richard Biener rguenth at gcc dot gnu.org changed: What|Removed |Added Priority|P3 |P2 Target Milestone|--- |4.9.3
[Bug target/64115] [4.9/5 Regression] ICE: : in rs6000_delegitimize_address, at config/rs6000/rs6000.c:7051
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=64115 Ulrich Weigand uweigand at gcc dot gnu.org changed: What|Removed |Added Status|UNCONFIRMED |ASSIGNED Last reconfirmed||2014-12-01 Assignee|unassigned at gcc dot gnu.org |uweigand at gcc dot gnu.org Ever confirmed|0 |1 --- Comment #2 from Ulrich Weigand uweigand at gcc dot gnu.org --- Confirmed.
[Bug target/64115] [4.9/5 Regression] ICE: : in rs6000_delegitimize_address, at config/rs6000/rs6000.c:7051
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=64115
Ulrich Weigand uweigand at gcc dot gnu.org changed:
What|Removed |Added
CC||dje.gcc at gmail dot com
--- Comment #3 from Ulrich Weigand uweigand at gcc dot gnu.org ---
The ICE is triggered by checking code in rs6000_delegitimize_address:
if (GET_CODE (y) == UNSPEC
XINT (y, 1) == UNSPEC_TOCREL)
{
#ifdef ENABLE_CHECKING
if (REG_P (XVECEXP (y, 0, 1))
REGNO (XVECEXP (y, 0, 1)) == TOC_REGISTER)
{
/* All good. */
}
else if (GET_CODE (XVECEXP (y, 0, 1)) == DEBUG_EXPR)
{
/* Weirdness alert. df_note_compute can replace r2 with a
debug_expr when this unspec is in a debug_insn.
Seen in gcc.dg/pr51957-1.c */
}
else
{
debug_rtx (orig_x);
abort ();
}
#endif
which attempts to ensure that the second argument of UNSPEC_TOCREL is the TOC
register. However, this check seems fragile; in debug code, we can get RTX
simplifications that replace the TOC register by some equivalent expression.
The code already recognizes one such case; this bug shows another case, where
the TOC register is replaced by a MEM RTX for the TOC save slot holding the TOC
value. [ This case is probably made more likely by the change in my ELFv2 ABI
preparation patch, which has the effect of making TOC moves into the save slot
more explicit at the RTL level, allowing var-tracking code to detect that
equivalence. ]
One could try to make this check in rs6000_delegitimize_address more generic by
allowing some (or all) MEM RTXes. However, I'm wonding what exactly that check
is supposed to achieve in the first place; for the purposes of this routine,
the second argument of UNSPEC_TOCREL is really irrelevant.
David, would you be OK with simply removing the check (everything enclosed with
ENABLE_CHECKING in the above code)?
[Bug target/64115] [4.9/5 Regression] ICE: : in rs6000_delegitimize_address, at config/rs6000/rs6000.c:7051
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=64115 David Edelsohn dje at gcc dot gnu.org changed: What|Removed |Added CC||amodra at gcc dot gnu.org, ||dje at gcc dot gnu.org --- Comment #4 from David Edelsohn dje at gcc dot gnu.org --- This was part of a large patch by Alan and probably added by him while he was debugging. I would like his recommendations about the fate of the checking code.
[Bug target/64115] [4.9/5 Regression] ICE: : in rs6000_delegitimize_address, at config/rs6000/rs6000.c:7051
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=64115 Alan Modra amodra at gmail dot com changed: What|Removed |Added CC||amodra at gmail dot com --- Comment #5 from Alan Modra amodra at gmail dot com --- I'm happy to have it removed.
[Bug target/64115] [4.9/5 Regression] ICE: : in rs6000_delegitimize_address, at config/rs6000/rs6000.c:7051
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=64115 Markus Trippelsdorf trippels at gcc dot gnu.org changed: What|Removed |Added CC||uweigand at gcc dot gnu.org Summary|[5 Regression] ICE: : in|[4.9/5 Regression] ICE: : |rs6000_delegitimize_address |in |, at|rs6000_delegitimize_address |config/rs6000/rs6000.c:7051 |, at ||config/rs6000/rs6000.c:7051 --- Comment #1 from Markus Trippelsdorf trippels at gcc dot gnu.org --- Started with r204803.
