[Bug target/69135] New: [5/6][ARM] instruction cannot be conditional -- `vcvtpne.s32.f32 s0,s0'

[cctsai57 at gmail dot com]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=69135

            Bug ID: 69135
           Summary: [5/6][ARM] instruction cannot be conditional --
                    `vcvtpne.s32.f32 s0,s0'
           Product: gcc
           Version: 5.2.1
            Status: UNCONFIRMED
          Severity: normal
          Priority: P3
         Component: target
          Assignee: unassigned at gcc dot gnu.org
          Reporter: cctsai57 at gmail dot com
  Target Milestone: ---

ARMv8 'vcvtp', 'vcvtm' and 'vcvta' do not support conditional execution, but
gcc-5/6 for ARMv8 target generate them with conditional execution.  See
the following steps:

~~~~~~~~~~ BEGIN ~~~~~~~~~~
$ cat test.c
int global;

void
lceil_float (float x, int b)
{
  if (b) global = __builtin_lceilf (x);
}

void
lceil_double (double x, int b)
{
  if (b) global = __builtin_lceil (x);
}

void
lfloor_float (float x, int b)
{
  if (b) global =  __builtin_lfloorf (x);
}

void
lfloor_double (double x, int b)
{
  if (b) global = __builtin_lfloor (x);
}

void
lround_float (float x, int b)
{
  if (b) global = __builtin_lroundf (x);
}

void
lround_double (double x, int b)
{
  if (b) global = __builtin_lround (x);
}

$ arm-linux-gnu-gcc -march=armv8-a -mfpu=fp-armv8 -O2 -ffast-math -c test.c
/tmp/ccw74V3i.s: Assembler messages:
/tmp/ccw74V3i.s:23: Error: instruction cannot be conditional --
`vcvtpne.s32.f32 s0,s0'
/tmp/ccw74V3i.s:37: Error: instruction cannot be conditional --
`vcvtpne.s32.f64 s0,d0'
/tmp/ccw74V3i.s:51: Error: instruction cannot be conditional --
`vcvtmne.s32.f32 s0,s0'
/tmp/ccw74V3i.s:65: Error: instruction cannot be conditional --
`vcvtmne.s32.f64 s0,d0'
/tmp/ccw74V3i.s:79: Error: instruction cannot be conditional --
`vcvtane.s32.f32 s0,s0'
/tmp/ccw74V3i.s:93: Error: instruction cannot be conditional --
`vcvtane.s32.f64 s0,d0'
~~~~~~~~~~ END ~~~~~~~~~~

I think this bug is from gcc/config/arm/vfp.md:(define_insn
"l<vrint_pattern><su_optab><mode>si2"...).  I use the following patch to fix
it:

diff --git a/gcc/config/arm/vfp.md b/gcc/config/arm/vfp.md
index c297ed9..f73862e 100644
--- a/gcc/config/arm/vfp.md
+++ b/gcc/config/arm/vfp.md
@@ -1338,6 +1338,8 @@
   "TARGET_HARD_FLOAT && TARGET_FPU_ARMV8 <vfp_double_cond>"
   "vcvt<vrint_variant>%?.<su>32.<V_if_elem>\\t%0, %<V_reg>1"
   [(set_attr "predicable" "no")
+   (set_attr "predicable_short_it" "no")
+   (set_attr "conds" "unconditional")
    (set_attr "type" "f_cvtf2i")]
 )