[Bug target/94530] [9/10 Regression] ICE: SIGSEGV in rhs_regno (rtl.h:1924) with -Os -mcpu=falkor -mpc-relative-literal-loads -mcmodel=large

[cvs-commit at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=94530

--- Comment #9 from CVS Commits  ---
The releases/gcc-9 branch has been updated by Andrea Corallo
:

https://gcc.gnu.org/g:5e022e3b3f7b2109f47fefffd6368fe3d378bdaa

commit r9-8515-g5e022e3b3f7b2109f47fefffd6368fe3d378bdaa
Author: Andrea Corallo 
Date:   Thu Apr 16 09:55:51 2020 +0200

aarch64: backport fix for PR target/94530

gcc/ChangeLog

2020-04-16  Andrea Corallo  

Backport from mainline.
2020-04-15  Andrea Corallo  

Backport from mainline.
2020-04-09  Andrea Corallo  

PR target/94530
* gcc.target/aarch64/pr94530.c: New test.

[Bug target/94530] [9/10 Regression] ICE: SIGSEGV in rhs_regno (rtl.h:1924) with -Os -mcpu=falkor -mpc-relative-literal-loads -mcmodel=large

[law at redhat dot com]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=94530

Jeffrey A. Law  changed:

   What|Removed |Added

 CC||law at redhat dot com
 Status|NEW |RESOLVED
 Resolution|--- |FIXED

--- Comment #8 from Jeffrey A. Law  ---
per c#7.

Re: [Bug target/94530] [9/10 Regression] ICE: SIGSEGV in rhs_regno (rtl.h:1924) with -Os -mcpu=falkor -mpc-relative-literal-loads -mcmodel=large

[Andrea Corallo]

Hi,

should be fixed now by 8a4436d89bfa:

"aarch64: Fix valid_src_p for use of uninitialized value".

Thanks

  Andrea

[Bug target/94530] [9/10 Regression] ICE: SIGSEGV in rhs_regno (rtl.h:1924) with -Os -mcpu=falkor -mpc-relative-literal-loads -mcmodel=large

[andrea.corallo at arm dot com]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=94530

--- Comment #7 from Andrea Corallo  ---
Hi,

should be fixed now by 8a4436d89bfa:

"aarch64: Fix valid_src_p for use of uninitialized value".

Thanks

  Andrea

[Bug target/94530] [9/10 Regression] ICE: SIGSEGV in rhs_regno (rtl.h:1924) with -Os -mcpu=falkor -mpc-relative-literal-loads -mcmodel=large

[akrl at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=94530

--- Comment #6 from akrl at gcc dot gnu.org ---
Hi,

yeah I noticed that too while testing the backport.
This should solve the issue. 

https://gcc.gnu.org/pipermail/gcc-patches/2020-April/543816.html 

Thanks
  Andrea

[Bug target/94530] [9/10 Regression] ICE: SIGSEGV in rhs_regno (rtl.h:1924) with -Os -mcpu=falkor -mpc-relative-literal-loads -mcmodel=large

[zsojka at seznam dot cz]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=94530

--- Comment #5 from Zdenek Sojka  ---
(In reply to CVS Commits from comment #4)
> The master branch has been updated by Andrea Corallo :
> 
> https://gcc.gnu.org/g:af19e4d0e23e5f61fc15e44a58bfa3b047854b1e
> 
> commit r10-7651-gaf19e4d0e23e5f61fc15e44a58bfa3b047854b1e
> Author: Andrea Corallo 
> Date:   Wed Apr 8 13:38:28 2020 +0100
> 
> PR target/94530
> 
> gcc/ChangeLog
> 
> 2020-04-09  Andrea Corallo  
> 
> PR target/94530
> * config/aarch64/falkor-tag-collision-avoidance.c
> (valid_src_p): Fix missing rtx type check.
> 
> gcc/testsuite/ChangeLog
> 
> 2020-04-09  Andrea Corallo  
> 
> * gcc.target/aarch64/pr94530.c: New test.

Thank you for checking this; I am still observing the issue with r10-7691:

$ aarch64-unknown-linux-gnu-gcc -Os -mcpu=falkor -mpc-relative-literal-loads
-mcmodel=large testcase.c -wrapper valgrind,-q
==24849== Use of uninitialised value of size 8
==24849==at 0x14BACFD: valid_src_p (falkor-tag-collision-avoidance.c:541)
==24849==by 0x14BACFD: get_load_info(rtx_insn*, loop*, rtx_def**,
rtx_def**, rtx_def**, bool*, bool*) (falkor-tag-collision-avoidance.c:644)
==24849==by 0x14BC0E5: record_loads (falkor-tag-collision-avoidance.c:774)
==24849==by 0x14BC0E5: execute_tag_collision_avoidance()
(falkor-tag-collision-avoidance.c:827)
==24849==by 0x14BCD18: pass_tag_collision_avoidance::execute(function*)
(falkor-tag-collision-avoidance.c:874)
==24849==by 0xFD438E: execute_one_pass(opt_pass*) (passes.c:2502)
==24849==by 0xFD4B3F: execute_pass_list_1(opt_pass*) (passes.c:2590)
==24849==by 0xFD4B51: execute_pass_list_1(opt_pass*) (passes.c:2591)
==24849==by 0xFD4B51: execute_pass_list_1(opt_pass*) (passes.c:2591)
==24849==by 0xFD4B78: execute_pass_list(function*, opt_pass*)
(passes.c:2601)
==24849==by 0xC2EB6B: cgraph_node::expand() (cgraphunit.c:2299)
==24849==by 0xC2FC0F: expand_all_functions (cgraphunit.c:2470)
==24849==by 0xC2FC0F: symbol_table::compile() [clone .part.0]
(cgraphunit.c:2820)
==24849==by 0xC3237C: compile (cgraphunit.c:2733)
==24849==by 0xC3237C: symbol_table::finalize_compilation_unit()
(cgraphunit.c:3000)
==24849==by 0x10D2F9A: compile_file() (toplev.c:483)
==24849== 
==24849== Invalid read of size 2
==24849==at 0x14BACFD: valid_src_p (falkor-tag-collision-avoidance.c:541)
==24849==by 0x14BACFD: get_load_info(rtx_insn*, loop*, rtx_def**,
rtx_def**, rtx_def**, bool*, bool*) (falkor-tag-collision-avoidance.c:644)
==24849==by 0x14BC0E5: record_loads (falkor-tag-collision-avoidance.c:774)
==24849==by 0x14BC0E5: execute_tag_collision_avoidance()
(falkor-tag-collision-avoidance.c:827)
==24849==by 0x14BCD18: pass_tag_collision_avoidance::execute(function*)
(falkor-tag-collision-avoidance.c:874)
==24849==by 0xFD438E: execute_one_pass(opt_pass*) (passes.c:2502)
==24849==by 0xFD4B3F: execute_pass_list_1(opt_pass*) (passes.c:2590)
==24849==by 0xFD4B51: execute_pass_list_1(opt_pass*) (passes.c:2591)
==24849==by 0xFD4B51: execute_pass_list_1(opt_pass*) (passes.c:2591)
==24849==by 0xFD4B78: execute_pass_list(function*, opt_pass*)
(passes.c:2601)
==24849==by 0xC2EB6B: cgraph_node::expand() (cgraphunit.c:2299)
==24849==by 0xC2FC0F: expand_all_functions (cgraphunit.c:2470)
==24849==by 0xC2FC0F: symbol_table::compile() [clone .part.0]
(cgraphunit.c:2820)
==24849==by 0xC3237C: compile (cgraphunit.c:2733)
==24849==by 0xC3237C: symbol_table::finalize_compilation_unit()
(cgraphunit.c:3000)
==24849==by 0x10D2F9A: compile_file() (toplev.c:483)
==24849==  Address 0x1 is not stack'd, malloc'd or (recently) free'd
==24849== 
during RTL pass: tag_collision_avoidance
testcase.c: In function 'foo':
testcase.c:6:1: internal compiler error: Segmentation fault
6 | }
  | ^
Please submit a full bug report,
with preprocessed source if appropriate.
See  for instructions.


Note I am using gcc with RTL checking enabled; this might also explain why you
weren't seeing the crash on the 9-branch.

[Bug target/94530] [9/10 Regression] ICE: SIGSEGV in rhs_regno (rtl.h:1924) with -Os -mcpu=falkor -mpc-relative-literal-loads -mcmodel=large

[cvs-commit at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=94530

--- Comment #4 from CVS Commits  ---
The master branch has been updated by Andrea Corallo :

https://gcc.gnu.org/g:af19e4d0e23e5f61fc15e44a58bfa3b047854b1e

commit r10-7651-gaf19e4d0e23e5f61fc15e44a58bfa3b047854b1e
Author: Andrea Corallo 
Date:   Wed Apr 8 13:38:28 2020 +0100

PR target/94530

gcc/ChangeLog

2020-04-09  Andrea Corallo  

PR target/94530
* config/aarch64/falkor-tag-collision-avoidance.c
(valid_src_p): Fix missing rtx type check.

gcc/testsuite/ChangeLog

2020-04-09  Andrea Corallo  

* gcc.target/aarch64/pr94530.c: New test.

[Bug target/94530] [9/10 Regression] ICE: SIGSEGV in rhs_regno (rtl.h:1924) with -Os -mcpu=falkor -mpc-relative-literal-loads -mcmodel=large

[jakub at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=94530

Jakub Jelinek  changed:

   What|Removed |Added

 CC||jakub at gcc dot gnu.org

--- Comment #3 from Jakub Jelinek  ---
(In reply to Andrea Corallo from comment #2)
> And I'm going to investigate also why I can't assign the but to my self...

You need to use your @gcc.gnu.org account for that.

[Bug target/94530] [9/10 Regression] ICE: SIGSEGV in rhs_regno (rtl.h:1924) with -Os -mcpu=falkor -mpc-relative-literal-loads -mcmodel=large

[andrea.corallo at arm dot com]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=94530

Andrea Corallo  changed:

   What|Removed |Added

 CC||andrea.corallo at arm dot com

--- Comment #2 from Andrea Corallo  ---
I'm going to fix it.

And I'm going to investigate also why I can't assign the but to my self...

[Bug target/94530] [9/10 Regression] ICE: SIGSEGV in rhs_regno (rtl.h:1924) with -Os -mcpu=falkor -mpc-relative-literal-loads -mcmodel=large

[rguenth at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=94530

Richard Biener  changed:

   What|Removed |Added

   Target Milestone|--- |9.4
   Priority|P3  |P2

[Bug target/94530] [9/10 Regression] ICE: SIGSEGV in rhs_regno (rtl.h:1924) with -Os -mcpu=falkor -mpc-relative-literal-loads -mcmodel=large

[ktkachov at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=94530

ktkachov at gcc dot gnu.org changed:

   What|Removed |Added

   Last reconfirmed||2020-04-08
 CC||ktkachov at gcc dot gnu.org
 Ever confirmed|0   |1
 Status|UNCONFIRMED |NEW

--- Comment #1 from ktkachov at gcc dot gnu.org ---
Confirmed.
In the code
538   if (!aarch64_classify_address (, XEXP (x, 0), mode, true))
539 return false;
540
541   unsigned regno = REGNO (addr.base);
542   if (global_regs[regno] || fixed_regs[regno])
543 return false;

addr.base is not guaranteed to be a register. In this instance it's:
(mem/u/c:DI (symbol_ref/u:DI ("*.LC1") [flags 0x2]) [0  S8 A64])