https://gcc.gnu.org/bugzilla/show_bug.cgi?id=95459
Bug ID: 95459 Summary: aarch64: ICE in in aarch64_short_vector_p, at config/aarch64/aarch64.c:16803 Product: gcc Version: 11.0 Status: UNCONFIRMED Severity: normal Priority: P3 Component: target Assignee: unassigned at gcc dot gnu.org Reporter: felix.yang at huawei dot com Target Milestone: --- Target: aarch64 Another sve-related ICE issue triggered under option -mgeneral-regs-only. Reduced test case: #include <arm_sve.h> svint8x2_t callee_s8 (svint8_t x0, svint8_t x1) { return svcreate2 (x0, x1); } $aarch64-linux-gnu-gcc -O2 -S -mgeneral-regs-only -march=armv8.2-a+sve bar.c bar.c: In function ‘callee_s8’: bar.c:6:10: error: ACLE function ‘svcreate2_s8’ is incompatible with the use of ‘-mgeneral-regs-only’ 6 | return svcreate2 (x0, x1); | ^~~~~~~~~ bar.c:4:1: internal compiler error: in aarch64_short_vector_p, at config/aarch64/aarch64.c:16803 4 | callee_s8 (svint8_t x0, svint8_t x1) | ^~~~~~~~~ 0x17d5887 aarch64_short_vector_p ../../gcc-git/gcc/config/aarch64/aarch64.c:16803 0x17d5993 aarch64_composite_type_p ../../gcc-git/gcc/config/aarch64/aarch64.c:16838 0x17d5aab aarch64_vfp_is_call_or_return_candidate ../../gcc-git/gcc/config/aarch64/aarch64.c:16877 0x17b4a07 aarch64_init_cumulative_args(CUMULATIVE_ARGS*, tree_node const*, rtx_def*, tree_node const*, unsigned int, bool) ../../gcc-git/gcc/config/aarch64/aarch64.c:5988 0xdbf60f assign_parms_initialize_all ../../gcc-git/gcc/function.c:2298 0xdc5b8b gimplify_parameters(gimple**) ../../gcc-git/gcc/function.c:3863 0xe86a8b gimplify_body(tree_node*, bool) ../../gcc-git/gcc/gimplify.c:14776 0xe872cf gimplify_function_tree(tree_node*) ../../gcc-git/gcc/gimplify.c:14934 0xbe4a4b cgraph_node::analyze() ../../gcc-git/gcc/cgraphunit.c:671 0xbe70ef analyze_functions ../../gcc-git/gcc/cgraphunit.c:1231 0xbecba3 symbol_table::finalize_compilation_unit() ../../gcc-git/gcc/cgraphunit.c:2975 Here, input param 'type' for aarch64_short_vector_p() looks like: <record_type 0xffffb236a5e8 svint8x2_t VNx32QI size <poly_int_cst 0xffffb2315c20 type <integer_type 0xffffb22300a8 bitsizetype public unsigned TI size <integer_cst 0xffffb221fde0 constant 128> unit-size <integer_cst 0xffffb221fdf8 constant 16> align:128 warn_if_not_align:0 symtab:0 alias-set -1 canonical-type 0xffffb22300a8 precision:128 min <integer_cst 0xffffb221fe10 0> max <integer_cst 0xffffb2229690 0xffffffffffffffffffffffffffffffff>> constant elt0: <integer_cst 0xffffb2234108 constant 256> elt1: <integer_cst 0xffffb2234108 256>> ... aarch64_short_vector_p() calls aarch64_sve_mode_p() and aarch64_sve_mode_p() depends on TARGET_SVE which is false under option -mgeneral-regs-only. As a result, aarch64_sve_mode_p() returns false and this triggers the ICE. I think we are simply checking whether a type (and a mode) is a 64/128-bit short vector or not, TARGET_SVE should not make a difference here. Proposed patch is trivial: diff --git a/gcc/config/aarch64/aarch64.c b/gcc/config/aarch64/aarch64.c index 7feff77adf6..4f00a8c2063 100644 --- a/gcc/config/aarch64/aarch64.c +++ b/gcc/config/aarch64/aarch64.c @@ -16800,7 +16800,7 @@ aarch64_short_vector_p (const_tree type, { /* Rely only on the type, not the mode, when processing SVE types. */ if (type && aarch64_some_values_include_pst_objects_p (type)) - gcc_assert (aarch64_sve_mode_p (mode)); + gcc_assert (TARGET_SVE ? aarch64_sve_mode_p (mode) : true); else size = GET_MODE_SIZE (mode); } With this fix, we have: $aarch64-linux-gnu-gcc -O2 -S -mgeneral-regs-only -march=armv8.2-a+sve bar.c bar.c: In function ‘callee_s8’: bar.c:6:10: error: ACLE function ‘svcreate2_s8’ is incompatible with the use of ‘-mgeneral-regs-only’ 6 | return svcreate2 (x0, x1); | ^~~~~~~~~ bar.c:4:1: fatal error: ‘callee_s8’ requires the SVE ISA extension 4 | callee_s8 (svint8_t x0, svint8_t x1) | ^~~~~~~~~ compilation terminated.