[Bug target/97528] [9/10 Regression] ICE in decompose_automod_address, at rtlanal.c:6298 (arm-linux-gnueabihf)

2021-02-03 Thread jakub at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=97528

Jakub Jelinek  changed:

   What|Removed |Added

 Status|ASSIGNED|RESOLVED
 Resolution|--- |FIXED

--- Comment #13 from Jakub Jelinek  ---
Sure, thanks.

[Bug target/97528] [9/10 Regression] ICE in decompose_automod_address, at rtlanal.c:6298 (arm-linux-gnueabihf)

2021-02-03 Thread avieira at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=97528

--- Comment #12 from avieira at gcc dot gnu.org ---
@jakub: backported to gcc-8 and gcc-9. OK to close this?

[Bug target/97528] [9/10 Regression] ICE in decompose_automod_address, at rtlanal.c:6298 (arm-linux-gnueabihf)

2021-02-03 Thread cvs-commit at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=97528

--- Comment #11 from CVS Commits  ---
The releases/gcc-8 branch has been updated by Andre Simoes Dias Vieira
:

https://gcc.gnu.org/g:3a3460f9b79310f40265a902fb394505b947ddd1

commit r8-10751-g3a3460f9b79310f40265a902fb394505b947ddd1
Author: Jakub Jelinek 
Date:   Fri Nov 20 12:26:58 2020 +0100

arm: Fix up neon_vector_mem_operand [PR97528]

The documentation for POST_MODIFY says:
   Currently, the compiler can only handle second operands of the
   form (plus (reg) (reg)) and (plus (reg) (const_int)), where
   the first operand of the PLUS has to be the same register as
   the first operand of the *_MODIFY.
The following testcase ICEs, because combine just attempts to simplify
things and ends up with
(post_modify (reg1) (plus (mult (reg2) (const_int 4)) (reg1))
but the target predicates accept it, because they only verify
that POST_MODIFY's second operand is PLUS and the second operand
of the PLUS is a REG.

The following patch fixes this by performing further verification that
the POST_MODIFY is in the form it should be.

2020-11-20  Jakub Jelinek  

PR target/97528
* config/arm/arm.c (neon_vector_mem_operand): For POST_MODIFY,
require
first POST_MODIFY operand is a REG and is equal to the first
operand
of PLUS.

* gcc.target/arm/pr97528.c: New test.

(cherry picked from commit 410b8f6f41920dad200cd709f9f3de8b840a995c)

[Bug target/97528] [9/10 Regression] ICE in decompose_automod_address, at rtlanal.c:6298 (arm-linux-gnueabihf)

2021-02-03 Thread cvs-commit at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=97528

--- Comment #10 from CVS Commits  ---
The releases/gcc-9 branch has been updated by Andre Simoes Dias Vieira
:

https://gcc.gnu.org/g:320d8676c770124a4baffab2d9e82224c74964ed

commit r9-9219-g320d8676c770124a4baffab2d9e82224c74964ed
Author: Jakub Jelinek 
Date:   Fri Nov 20 12:26:58 2020 +0100

arm: Fix up neon_vector_mem_operand [PR97528]

The documentation for POST_MODIFY says:
   Currently, the compiler can only handle second operands of the
   form (plus (reg) (reg)) and (plus (reg) (const_int)), where
   the first operand of the PLUS has to be the same register as
   the first operand of the *_MODIFY.
The following testcase ICEs, because combine just attempts to simplify
things and ends up with
(post_modify (reg1) (plus (mult (reg2) (const_int 4)) (reg1))
but the target predicates accept it, because they only verify
that POST_MODIFY's second operand is PLUS and the second operand
of the PLUS is a REG.

The following patch fixes this by performing further verification that
the POST_MODIFY is in the form it should be.

2020-11-20  Jakub Jelinek  

PR target/97528
* config/arm/arm.c (neon_vector_mem_operand): For POST_MODIFY,
require
first POST_MODIFY operand is a REG and is equal to the first
operand
of PLUS.

* gcc.target/arm/pr97528.c: New test.

(cherry picked from commit 410b8f6f41920dad200cd709f9f3de8b840a995c)

[Bug target/97528] [9/10 Regression] ICE in decompose_automod_address, at rtlanal.c:6298 (arm-linux-gnueabihf)

2021-02-01 Thread jakub at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=97528

--- Comment #9 from Jakub Jelinek  ---
I'm backporting stuff to older branches in batches and don't plan to do it for
9 or 8 in the near future.  If anyone beats me with the backports, I certainly
won't mind.

[Bug target/97528] [9/10 Regression] ICE in decompose_automod_address, at rtlanal.c:6298 (arm-linux-gnueabihf)

2021-02-01 Thread ktkachov at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=97528

--- Comment #8 from ktkachov at gcc dot gnu.org ---
If the patch tests cleanly we should apply it to GCC 9 and 8 too (if
applicable)

[Bug target/97528] [9/10 Regression] ICE in decompose_automod_address, at rtlanal.c:6298 (arm-linux-gnueabihf)

2021-02-01 Thread avieira at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=97528

avieira at gcc dot gnu.org changed:

   What|Removed |Added

 CC||avieira at gcc dot gnu.org

--- Comment #7 from avieira at gcc dot gnu.org ---
Hi,

I am seeing this same fault cause a wrong-code gen on gcc-9 with the code
below:


void foo(uint16_t *dest, uint16x8_t a, unsigned long long stride)
{
   int i = 3;
   stride >>= 1;
   do {
 vst1_u16(dest, vget_low_u16(a));
 dest += stride;
 i = i - 1;
   } while (i != 0);
}

leading to:
foo:
vst1.16 {d0}, [r0], r0
vst1.16 {d0}, [r0], r0
vst1.16 {d0}, [r0]
bx  lr

which is obviously wrong. Can we backport this to gcc-9?

[Bug target/97528] [9/10 Regression] ICE in decompose_automod_address, at rtlanal.c:6298 (arm-linux-gnueabihf)

2020-11-25 Thread cvs-commit at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=97528

--- Comment #6 from CVS Commits  ---
The releases/gcc-10 branch has been updated by Jakub Jelinek
:

https://gcc.gnu.org/g:05a3ab76e03ec6cff0bafb8495387b3a186785cc

commit r10-9077-g05a3ab76e03ec6cff0bafb8495387b3a186785cc
Author: Jakub Jelinek 
Date:   Fri Nov 20 12:26:58 2020 +0100

arm: Fix up neon_vector_mem_operand [PR97528]

The documentation for POST_MODIFY says:
   Currently, the compiler can only handle second operands of the
   form (plus (reg) (reg)) and (plus (reg) (const_int)), where
   the first operand of the PLUS has to be the same register as
   the first operand of the *_MODIFY.
The following testcase ICEs, because combine just attempts to simplify
things and ends up with
(post_modify (reg1) (plus (mult (reg2) (const_int 4)) (reg1))
but the target predicates accept it, because they only verify
that POST_MODIFY's second operand is PLUS and the second operand
of the PLUS is a REG.

The following patch fixes this by performing further verification that
the POST_MODIFY is in the form it should be.

2020-11-20  Jakub Jelinek  

PR target/97528
* config/arm/arm.c (neon_vector_mem_operand): For POST_MODIFY,
require
first POST_MODIFY operand is a REG and is equal to the first
operand
of PLUS.

* gcc.target/arm/pr97528.c: New test.

(cherry picked from commit 410b8f6f41920dad200cd709f9f3de8b840a995c)

[Bug target/97528] [9/10 Regression] ICE in decompose_automod_address, at rtlanal.c:6298 (arm-linux-gnueabihf)

2020-11-20 Thread jakub at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=97528

Jakub Jelinek  changed:

   What|Removed |Added

Summary|[9/10/11 Regression] ICE in |[9/10 Regression] ICE in
   |decompose_automod_address,  |decompose_automod_address,
   |at rtlanal.c:6298   |at rtlanal.c:6298
   |(arm-linux-gnueabihf)   |(arm-linux-gnueabihf)

--- Comment #5 from Jakub Jelinek  ---
Fixed on the trunk so far.