[Bug middle-end/57503] [4.7/4.8 Regression] Expand uses wrong multiply routine

[gjl at gcc dot gnu.org]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=57503

--- Comment #6 from Georg-Johann Lay  ---
Created attachment 30252
  --> http://gcc.gnu.org/bugzilla/attachment.cgi?id=30252&action=edit
.165r.expand: dump file with -Os -mmcu=atmega168 -fno-expensive-optimizations

The tree-ssa part for widening_mul can be disabled by
-fno-expensive-optimizations, but the code is still wrong.  Cf. the attached
.expand dump of

long
func1 (unsigned char a, unsigned char b, int c)
{
unsigned ab = a * b;
return (long) ab * c;
}

ab is computed in insn 10 with zero-extended inputs:

(insn 8 5 9 2 (set (reg:HI 53 [ D.1447 ])
(zero_extend:HI (reg/v:QI 49 [ a ]))) cecky.c:4 -1
 (nil))
(insn 9 8 10 2 (set (reg:HI 54 [ D.1447 ])
(zero_extend:HI (reg/v:QI 50 [ b ]))) cecky.c:4 -1
 (nil))
(insn 10 9 11 2 (set (reg:HI 55 [ D.1447 ])
(mult:HI (reg:HI 53 [ D.1447 ])
(reg:HI 54 [ D.1447 ]))) cecky.c:4 -1

This is correct, but then in insn 11 ab gets sign-extended even though it is
unsigned:

(insn 11 10 12 2 (set (reg:SI 56 [ D.1448 ])
(sign_extend:SI (reg:HI 55 [ D.1447 ]))) cecky.c:5 -1
 (nil))

Insn combine combines this wrong extension into a widening multiplication.

[Bug target/57516] New: [avr] Incorrect fixed-point rounding result in the overflow case

[gjl at gcc dot gnu.org]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=57516

Bug ID: 57516
   Summary: [avr] Incorrect fixed-point rounding result in the
overflow case
   Product: gcc
   Version: 4.8.0
Status: UNCONFIRMED
  Keywords: wrong-code
  Severity: normal
  Priority: P3
 Component: target
  Assignee: unassigned at gcc dot gnu.org
  Reporter: gjl at gcc dot gnu.org
CC: eric.weddington at atmel dot com
Target: avr

ISO/IEC TR 18037 writes on the roundfx rounding functions:

2.1.7.2 The fixed-point rounding functions

[...] The rounding applied is to-nearest, with unspecified rounding direction
in the halfway case. Fractional bits beyond the rounding point are set to zero
in the result. If the exact result value cannot be represented, the saturated
result value is returned.

Currently, bits beyond the rounding point are always cleared, no matter whether
or not the intermediate result is representable or not.

[Bug target/57516] [avr] Incorrect fixed-point rounding result in the overflow case

[gjl at gcc dot gnu.org]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=57516

Georg-Johann Lay  changed:

   What|Removed |Added

   Priority|P3  |P5
 Status|UNCONFIRMED |NEW
   Last reconfirmed||2013-06-03
   Target Milestone|--- |4.8.2
 Ever confirmed|0   |1

[Bug other/57525] New: cc1.exe: fatal error: help-dummy: No such file or directory

[gjl at gcc dot gnu.org]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=57525

Bug ID: 57525
   Summary: cc1.exe: fatal error: help-dummy: No such file or
directory
   Product: gcc
   Version: 4.7.2
Status: UNCONFIRMED
  Severity: minor
  Priority: P3
 Component: other
  Assignee: unassigned at gcc dot gnu.org
  Reporter: gjl at gcc dot gnu.org
  Host: i386-mingw32
Target: avr
 Build: i686-linux-gnu

$ echo > trivial.c
$ avr-gcc trivial.c -save-temps --help=optimizers
cc1.exe: fatal error: help-dummy: No such file or directory

This fatal error also occurs with other versions of GCC.  Trigger is
-save-temps together with --help=

== configure ==

Configured with: ../../gcc.gnu.org/gcc-4_7-branch/configure --target=avr
--prefix=/local/gnu/install/gcc-4.7-mingw32 --host=i386-mingw32
--build=i686-linux-gnu --enable-languages=c,c++ --disable-nls --disable-shared
--with-dwarf2 --with-avrlibc=yes
Thread model: single
gcc version 4.7.2 (GCC)

[Bug other/57482] [4.7.3][AVR] --help=optimizers reports a wrong list

[gjl at gcc dot gnu.org]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=57482

Georg-Johann Lay  changed:

   What|Removed |Added

 Target|AVR ATmega128   |avr
 Status|UNCONFIRMED |NEW
   Last reconfirmed||2013-06-04
 CC||gjl at gcc dot gnu.org
  Component|c   |other
 Ever confirmed|0   |1
  Build|4.7.3   |

--- Comment #2 from Georg-Johann Lay  ---
I can confirm this with 4.7.2 and the following source file

== foo.c ==

typedef enum { A, B } ab_t;

int a[sizeof (ab_t) == 2 ? 1 : -1];

== compile ==

$ avr-gcc foo.c

$ avr-gcc foo.c -Q --help=optimizers | grep short.enum
  -fshort-enums   [enabled]

== issues ==

1) foo.c compiles fine, thus enums are 2 byte per default.
   This shows the output of --help=optimizers is not correct.

2) -f[no-]short-enums is not an optimization option;
   it's an option affecting the ABI.  Better / worse code
   is just a side effect of respective ABI change.

3) The backend does not implement TARGET_DEFAULT_SHORT_ENUMS
   thus the default shall be like with  -fno-short-enums, cf.
   target.def defines the hook default to hook_bool_void_false.

[Bug target/57506] [avr] Some devices are present twice in avr-mcus.def

[gjl at gcc dot gnu.org]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=57506

--- Comment #1 from Georg-Johann Lay  ---
Created attachment 30258
  --> http://gcc.gnu.org/bugzilla/attachment.cgi?id=30258&action=edit
Patch against avr-mcus.def

Notice that some sources depend on the patch, e.g. documentation.

Rerun "make avr-mcus" after applying this patch.

[Bug other/56442] Could not identify that register is clobbered already

[gjl at gcc dot gnu.org]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=56442

Georg-Johann Lay  changed:

   What|Removed |Added

 CC||eric.weddington at atmel dot 
com
   Target Milestone|--- |4.7.4

[Bug target/57516] [avr] Incorrect fixed-point rounding result in the overflow case

[gjl at gcc dot gnu.org]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=57516

--- Comment #1 from Georg-Johann Lay  ---
Created attachment 30282
  --> http://gcc.gnu.org/bugzilla/attachment.cgi?id=30282&action=edit
lib1funcs-fixed.S.diff: libgcc part of the patch

[Bug c++/57390] Fixed point types on AVR are not available in C++ mode

[gjl at gcc dot gnu.org]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=57390

Georg-Johann Lay  changed:

   What|Removed |Added

 Target||avr
   Priority|P3  |P5
 Status|UNCONFIRMED |NEW
   Last reconfirmed||2013-06-10
 CC||gjl at gcc dot gnu.org
 Ever confirmed|0   |1

--- Comment #3 from Georg-Johann Lay  ---
It's not about "enabling", it's about extending the C++ language and front end
in GCC and maintaining such extension.

[Bug target/57501] [avr] generated collect2 crttn24a.o missing path with -mmcu=attiny24a

[gjl at gcc dot gnu.org]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=57501

Georg-Johann Lay  changed:

   What|Removed |Added

 Target|attiny24a   |avr
 Status|UNCONFIRMED |RESOLVED
 CC||gjl at gcc dot gnu.org
   Host|Linux 3.9.2-1-ARCH x86_64   |x86_64-linux-gnu
 Resolution|--- |INVALID

--- Comment #1 from Georg-Johann Lay  ---
This looks like an artifact of missing feature AVR-LibC #35407, cf.
http://savannah.nongnu.org/bugs/?35407

In your installation there must be a directory avr/lib/avr25/tiny-stack and
therein -- amongst others -- the object file crttn24a.

[Bug target/56987] gcc/config/avr/avr.opt:80: "change" -> "changed"?

[gjl at gcc dot gnu.org]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=56987

Georg-Johann Lay  changed:

   What|Removed |Added

 Target||avr
   Priority|P3  |P5
 Status|UNCONFIRMED |ASSIGNED
   Keywords||documentation
   Last reconfirmed||2013-06-10
  Component|translation |target
 CC||gjl at gcc dot gnu.org
   Assignee|unassigned at gcc dot gnu.org  |gjl at gcc dot gnu.org
 Ever confirmed|0   |1
   Severity|normal  |trivial

[Bug target/50807] [avr] Constructor writing to RAM for variable in Flash

[gjl at gcc dot gnu.org]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=50807

Georg-Johann Lay  changed:

   What|Removed |Added

 Status|WAITING |NEW

--- Comment #5 from Georg-Johann Lay  ---
(In reply to Jakub Jelinek from comment #4)
> Is this reproduceable with 4.7.3, 4.8.0 or the trunk?

With the test case from above and 4.8.0, no code is generated at all.

With an extended test case as follows, the constructor still writes to RAM in
insn 6:

const char __attribute__((progmem)) var = "Hallo"[0];

const char *foo (void)
{
return &var;
}

_GLOBAL__sub_I__Z3foov:
ldi r24,lo8(72) ;  5movqi_insn/2[length = 1]
sts _ZL3var,r24 ;  6movqi_insn/3[length = 2]
ret ;  13return[length = 1]

And there is a warning from the back end:

foo.c: In function 'const char* foo()':
foo.c:1:37: warning: uninitialized variable 'var' put into program memory area
[-Wuninitialized]
 const char __attribute__((progmem)) var = "Hallo"[0];

[Bug c++/43745] [avr] g++ puts VTABLES in SRAM

[gjl at gcc dot gnu.org]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=43745

Georg-Johann Lay  changed:

   What|Removed |Added

  Component|target  |c++

--- Comment #8 from Georg-Johann Lay  ---
This needs extensions in the C++ front => Component = c++

[Bug lto/50293] -flto fails if GCC is installed in directory with space in path name

[gjl at gcc dot gnu.org]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=50293

Georg-Johann Lay  changed:

   What|Removed |Added

   Target Milestone|--- |4.7.3

[Bug other/57597] New: ICE: in get_section, at varasm.c:312: Segmentation fault

[gjl at gcc dot gnu.org]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=57597

Bug ID: 57597
   Summary: ICE: in get_section, at varasm.c:312: Segmentation
fault
   Product: gcc
   Version: 4.8.0
Status: UNCONFIRMED
  Keywords: ice-on-valid-code
  Severity: normal
  Priority: P3
 Component: other
  Assignee: unassigned at gcc dot gnu.org
  Reporter: gjl at gcc dot gnu.org
  Host: i386-mingw32
Target: avr
 Build: i686-linux-gnu

Created attachment 30299
  --> http://gcc.gnu.org/bugzilla/attachment.cgi?id=30299&action=edit
foo.c: C test case

Compile the test case with

avr-gcc -mmcu=atmega168 -S foo.c -fmerge-all-constants -O
foo.c:12:1: internal compiler error: in get_section, at varasm.c:312
 }
 ^
foo.c:12:1: internal compiler error: Segmentation fault

This might be related to PR50739

== configure ==

Configured with:
../../gcc.gnu.org/trunk/configure --target=avr
--prefix=/local/gnu/install/gcc-4.8-mingw32 --host=i386-mingw32
--build=i686-linux-gnu --enable-languages=c,c++ --disable-nls --disable-shared
--with-dwarf2
Thread model: single
gcc version 4.8.0 20130306 (experimental) (GCC)

[Bug other/57597] ICE: in get_section, at varasm.c:312: Segmentation fault with -fmerge-all-constants

[gjl at gcc dot gnu.org]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=57597

Georg-Johann Lay  changed:

   What|Removed |Added

 Status|UNCONFIRMED |NEW
   Last reconfirmed||2013-06-12
 CC||gjl at gcc dot gnu.org
Summary|ICE: in get_section, at |ICE: in get_section, at
   |varasm.c:312: Segmentation  |varasm.c:312: Segmentation
   |fault   |fault with
   ||-fmerge-all-constants
 Ever confirmed|0   |1

[Bug target/57631] [patch] spurious warning for avr interrupts with asm labels

[gjl at gcc dot gnu.org]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=57631

Georg-Johann Lay  changed:

   What|Removed |Added

 Target||avr
   Priority|P3  |P5
 Status|UNCONFIRMED |WAITING
   Last reconfirmed||2013-06-21
 CC||gjl at gcc dot gnu.org
 Ever confirmed|0   |1
   Severity|normal  |enhancement

--- Comment #3 from Georg-Johann Lay  ---
Would you explain what you are trying to achieve?

You can name the function __vectorFOO or __vector_my_ISR_function or whatever
without raising a warning.

[Bug target/57631] [patch] spurious warning for avr interrupts with asm labels

[gjl at gcc dot gnu.org]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=57631

--- Comment #5 from Georg-Johann Lay  ---
(In reply to pebbles from comment #4)
> (In reply to Georg-Johann Lay from comment #3)
>> Would you explain what you are trying to achieve?
> 
> For one thing, I'm coding in C++, so the handlers may be mangled to the
> wrong symbols unless I tell the compiler what to name them.  The warning is
> misleading at least in this case.

The ISR macro is defined by AVR-LibC. It adds extern "C" to ISR if compiled for
C++.  Thus, the handlers are not mangled and names like __vector_ are used
even if compiled for C++.

Moreover, you should not use __vector_ firectly, use the support macros
from avr/io.h and avr/interrupt.h.  They work for C++.  If not, please file a
bug report against AVR-LibC.

> In C++ it's conventional to place symbols inside namespaces or classes over
> prefixing them with underscores.  I'm writing a library and would like users
> to be able to define the handlers with names and scopes that match the style
> conventions of the project.

Don't use __vector_ directly; use defines from AVR-LibC like INT0_vect
etc.  Cf. the AVR-LibC documentation.

>> You can name the function __vectorFOO or __vector_my_ISR_function or
>> whatever without raising a warning.
> 
> But that requires reading the source of GCC, which I have begun doing but is
> usually not a prerequisite for coding.  The warning should tell me that
> straight out.

You should read the documentation of AVR-LibC, of course.  You can add
documentation parts to the GCC documentation if you find it helpful.  However,
users typically read the AVR-LibC manual because ISR and the vector names are
supplyied by AVR-LibC's av/io.h and avr/interrupt.h.

[Bug target/57631] [patch] spurious warning for avr interrupts with asm labels

[gjl at gcc dot gnu.org]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=57631

Georg-Johann Lay  changed:

   What|Removed |Added

 Status|WAITING |ASSIGNED
   Assignee|unassigned at gcc dot gnu.org  |pebbles at riseup dot 
net

--- Comment #7 from Georg-Johann Lay  ---
(In reply to pebbles from comment #6)

> This seems like a very small patch that makes GCC more extendable and
> accurate.  I am not too attached to these things changing, although I am
> curious what the reason is for not considering the patch.

You can propose and explain your change in the gcc-patches@ mailing list, of
course.  That is the right place to get changes into the compiler.

[Bug target/57631] [patch] spurious warning for avr interrupts with asm labels

[gjl at gcc dot gnu.org]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=57631

--- Comment #10 from Georg-Johann Lay  ---
I can have a look at it, but it might take a month or so until I get back to
this issue.

If I understand correctly, bottom line of what you need is that avr-gcc does
not warn for ISR names that are not of the form __vector*

Maybe a new command line option -W[no-]isr-name or similar is more general? 
The default of the option would be 'on' per default.

[Bug target/57844] avr-unknown-elf libstdc++v3 build causes internal compiler error: in extract_insn, at recog.c:2150

[gjl at gcc dot gnu.org]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=57844

Georg-Johann Lay  changed:

   What|Removed |Added

   Priority|P3  |P4
 Status|UNCONFIRMED |NEW
   Last reconfirmed||2013-07-08
 CC||gjl at gcc dot gnu.org
   Assignee|unassigned at gcc dot gnu.org  |gjl at gcc dot gnu.org
   Target Milestone|--- |4.8.2
 Ever confirmed|0   |1

--- Comment #1 from Georg-Johann Lay  ---
Here is a smaller test case:

void g (char*);

void f (void)
{
char b[128];
g (b);
}

Compile with 

$ avr-gcc foo.c -c -msp8

foo.c: In function 'f':
foo.c:7:1: error: unrecognizable insn:
 }
 ^
(insn/f 16 15 17 (set (reg:QI 28 r28)
(plus:QI (reg:QI 28 r28)
(const_int 128 [0x80]))) foo.c:5 -1
 (expr_list:REG_CFA_ADJUST_CFA (set (reg/f:HI 28 r28)
(plus:HI (reg/f:HI 28 r28)
(const_int -128 [0xff80])))
(nil)))
foo.c:7:1: internal compiler error: in insn_default_length, at
config/avr/avr.md:448

foo.c:7:1: internal compiler error: Segmentation fault

Problem is that 128 is not QI, should be -128.


--enable-libstdcxx vs. building libstdc++v3 is a different issue.

[Bug target/56987] gcc/config/avr/avr.opt:80: "change" -> "changed"?

[gjl at gcc dot gnu.org]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=56987

Georg-Johann Lay  changed:

   What|Removed |Added

 Status|ASSIGNED|RESOLVED
 Resolution|--- |FIXED

--- Comment #1 from Georg-Johann Lay  ---
Fixed in r200869 (trunk), r200868 (4.8.2)

[Bug target/57506] [avr] Some devices are present twice in avr-mcus.def

[gjl at gcc dot gnu.org]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=57506

Georg-Johann Lay  changed:

   What|Removed |Added

 Status|NEW |RESOLVED
 Resolution|--- |FIXED

--- Comment #2 from Georg-Johann Lay  ---
Fixed by 200870 (trunk), 200871 (4.8.2).

[Bug target/57506] [avr] Some devices are present twice in avr-mcus.def

[gjl at gcc dot gnu.org]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=57506

--- Comment #3 from Georg-Johann Lay  ---
Fixed by r200870 (trunk), r200871 (4.8.2).

[Bug target/57844] ICE: unrecognizable addqi3 insn with -msp8 and frame size of 128 bytes

[gjl at gcc dot gnu.org]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=57844

Georg-Johann Lay  changed:

   What|Removed |Added

 Status|NEW |RESOLVED
  Known to work||4.7.4
 Resolution|--- |FIXED
  Known to fail|4.7.2   |4.7.3

--- Comment #2 from Georg-Johann Lay  ---
Fixed by r200872 (trunk), r200873 (4.8.2), r200874 (4.7.4).

[Bug target/57631] [patch] spurious warning for avr interrupts with asm labels

[gjl at gcc dot gnu.org]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=57631

Georg-Johann Lay  changed:

   What|Removed |Added

 Status|NEW |RESOLVED
  Known to work||4.7.4
 Resolution|--- |FIXED
   Target Milestone|--- |4.8.2
  Known to fail||4.7.3

--- Comment #13 from Georg-Johann Lay  ---
Fixed in r200901 (trunk), r200902 (4.8.2) , r200903 (4.7.4).

[Bug target/57909] [ARM] ICE with internal memcpy and -mno-unaligned-access

[gjl at gcc dot gnu.org]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=57909

--- Comment #5 from Georg-Johann Lay  ---
You can write r201005 and bugzilla will link it for you :-)

[Bug target/57516] [avr] Incorrect fixed-point rounding result in the overflow case

[gjl at gcc dot gnu.org]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=57516

Georg-Johann Lay  changed:

   What|Removed |Added

 Status|NEW |RESOLVED
 Resolution|--- |FIXED

--- Comment #2 from Georg-Johann Lay  ---
Fixed in trunk (r201051) and 4.8 (r201052).

[Bug other/58082] avr-gcc vector table relocation truncation error with -mrelax option

[gjl at gcc dot gnu.org]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=58082

Georg-Johann Lay  changed:

   What|Removed |Added

 Target||avr
 Status|UNCONFIRMED |RESOLVED
 CC||gjl at gcc dot gnu.org
 Resolution|--- |INVALID
   Severity|major   |normal

--- Comment #1 from Georg-Johann Lay  ---
Relaxation is a matter of Binutils.  The compiler driver just passes -mrelax
through to Binutils.  Please report the issue to the Binutils bug tracker
together with a valid test case, command options and Binutils version.  Thanks.

[Bug target/57931] There are superfluous movw instructions in generated ASM code with GCC-AVR (WinAVR)

[gjl at gcc dot gnu.org]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=57931

Georg-Johann Lay  changed:

   What|Removed |Added

   Keywords||missed-optimization
 Target||avr
 Status|UNCONFIRMED |RESOLVED
 CC||gjl at gcc dot gnu.org
 Resolution|--- |WORKSFORME
  Build|avr |

--- Comment #1 from Georg-Johann Lay  ---
Newest "WinAVR" is avr-gcc 4.3.3 and thus is pretty much outdated.

I cannot confirm this with 4.8 where the generated code (after adding #include
 to the source) reads:

$ avr-gcc foo.c -mmcu=attiny85 -Os -std=gnu99 -S

median:
/* prologue: function */
/* frame size = 0 */
/* stack size = 0 */
.L__stack_usage = 0
cp r24,r22
cpc r25,r23
brge .L2
cp r24,r20
cpc r25,r21
brge .L3
movw r24,r22
rjmp .L10
.L2:
cp r22,r20
cpc r23,r21
brge .L7
.L10:
cp r20,r24
cpc r21,r25
brge .L3
movw r24,r20
ret
.L7:
movw r24,r22
.L3:
ret

[Bug target/58375] internal compiler error: in push_reload, at reload.c:1360

[gjl at gcc dot gnu.org]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=58375

Georg-Johann Lay  changed:

   What|Removed |Added

   Keywords||ice-on-valid-code
 Target|AVR/ATmega2561  |avr
 Status|UNCONFIRMED |WAITING
   Last reconfirmed||2013-09-10
 CC||gjl at gcc dot gnu.org
 Ever confirmed|0   |1

--- Comment #2 from Georg-Johann Lay  ---
(In reply to Peter Stegemann from comment #0)
> The culprit

Would you please add a minimal test case / preprocessed file and avoid zip
files as explained in the bug reporting hints.  Thanks.

http://gcc.gnu.org/bugs/#need
http://gcc.gnu.org/bugs/#detailed

[Bug target/58375] internal compiler error: in push_reload, at reload.c:1360

[gjl at gcc dot gnu.org]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=58375

--- Comment #3 from Georg-Johann Lay  ---
Created attachment 30792
  --> http://gcc.gnu.org/bugzilla/attachment.cgi?id=30792&action=edit
Channel.cpp C++ source

Confirmed with this source, looks like a register allocator issue.

$ avr-g++ Channel.cpp -mmcu=atmega2561 -Os  -c -v

Target: avr
Configured with: ../../gcc.gnu.org/trunk/configure --target=avr
--prefix=/local/gnu/install/gcc-4.8-mingw32 --host=i386-mingw32
--build=i686-linux-gnu --enable-languages=c,c++ --disable-nls --disable-shared
--with-dwarf2
Thread model: single
gcc version 4.8.0 20130306 (experimental) (GCC) 

GNU C++ (GCC) version 4.8.0 20130306 (experimental) (avr)
compiled by GNU C version 3.4.5 (mingw-vista special r2), GMP version
4.3.2, MPFR version 2.4.2, MPC version 0.8.2

Channel.cpp: In member function 'virtual void Screen_Setup_Channel::display()':
Channel.cpp:101:1: internal compiler error: in push_reload, at reload.c:1360
 }
 ^

Channel.cpp:101:1: internal compiler error: Segmentation fault

[Bug other/58375] [4.8 Regression] internal compiler error: in push_reload, at reload.c:1360

[gjl at gcc dot gnu.org]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=58375

Georg-Johann Lay  changed:

   What|Removed |Added

   Keywords||ra
 Status|WAITING |NEW
  Component|target  |other
  Known to work||4.7.2
   Host|MacOS 10.8 (Darwin  |
   |linus.fritz.box 12.4.0  |
   |Darwin Kernel Version   |
   |12.4.0: Wed May  1 17:57:12 |
   |PDT 2013;   |
   |root:xnu-2050.24.15~1/RELEA |
   |SE_X86_64 x86_64)   |
 Blocks||56183
Summary|internal compiler error: in |[4.8 Regression] internal
   |push_reload, at |compiler error: in
   |reload.c:1360   |push_reload, at
   ||reload.c:1360

[Bug tree-optimization/58391] avr-gcc: Certain functions with computed goto could be inlined

[gjl at gcc dot gnu.org]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=58391

Georg-Johann Lay  changed:

   What|Removed |Added

   Keywords|wrong-code  |
 Status|UNCONFIRMED |RESOLVED
 CC||gjl at gcc dot gnu.org
  Component|target  |tree-optimization
 Resolution|--- |INVALID

--- Comment #1 from Georg-Johann Lay  ---
This is not a bug, it's a feature.  For reasoning see tree-inline.c:

http://gcc.gnu.org/viewcvs/gcc/branches/gcc-4_7-branch/gcc/tree-inline.c?view=markup#l3170

[Bug target/58390] avr-gcc produces unusable code when label address is placed in register

[gjl at gcc dot gnu.org]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=58390

Georg-Johann Lay  changed:

   What|Removed |Added

 Status|UNCONFIRMED |RESOLVED
 CC||gjl at gcc dot gnu.org
 Resolution|--- |INVALID

--- Comment #1 from Georg-Johann Lay  ---
(In reply to semicontinuity from comment #0)
> Trying to speed up the following code, I've placed 'address' variable to the
> r2:r3 (and added -ffixed-r2 -ffixed-r3):
> 
> // -
> //void* address; // placed in memory (OK)
> //register void* address asm("r30"); // placed in r30:r31 (OK)
> register void* address asm("r2");  // placed in r2:r3 or any other register
> (NOT OK)
> 
> void test(void) {
> char flag = 1;
> 
> goto *address; // address is computed properly beforehand
> 
> for(;;) {
> 
> asm volatile("nop\t\n");
> 
> 
> flag = 0;
> L1: (void)&&L1;
> if (flag==0) { address = &&L1; return; }
> 
> asm volatile("nop\t\n");
> 
> flag = 0;
> L2: (void)&&L2;
> if (flag==0) { address = &&L2; return; }
> 
> }
> }
> 
> 
> int main(void) {
> 
> for(;;) {
> test();
> }
> 
> return 0;
> }
> // -
> 
> If 'address' variable is placed in memory or in r30:r31, the generated code
> is OK:
> // -
> 003c :
> register void* address asm("r30");
> 
> void test(void) {
>   3c: 09 94   ijmp
> 
> goto *address; // address is computed properly
> 
> for(;;) {
> 
> asm volatile("nop\t\n");
>   3e: 00 00   nop
> // -
> 
> ijmp is generated for computed goto, address is already in r30:r31 for ijmp.
> 
> 
> If 'address' variable is placed in memory or in r2:r3, the generated code is
> NOT OK:
> 
> // -
> 003c :
> register void* address asm("r2");
> 
> void test(void) {
>   3c: 2f 92   pushr2
>   3e: 3f 92   pushr3
>   40: 08 95   ret
> 
> goto *address; // address is computed properly
> 
> for(;;) {
> 
> asm volatile("nop\t\n");
>   42: 00 00   nop
> // -
> 
> No ijmp is generated. Instead, push r2, push r3 and ret. No pops are
> generated.

This PUSH/PUSH/RET sequence is in order because is acts exactly like an IJMP
for targets with 16-bit PC.  This is the case for ATmega8535 as of
-mmcu=atmega8535.

FYI, reserving r30/r31 (Z-reg) might break code because there are situations
where the compiler cannot generate code without using Z, e.g. when reading from
flash by means of LPM. Or indirect addressing when a frame pointer is needed
and Y cannot be used for addressing.

[Bug target/58405] Unoptimal code generated for computed goto

[gjl at gcc dot gnu.org]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=58405

Georg-Johann Lay  changed:

   What|Removed |Added

 CC||gjl at gcc dot gnu.org

--- Comment #1 from Georg-Johann Lay  ---
Created attachment 30822
  --> http://gcc.gnu.org/bugzilla/attachment.cgi?id=30822&action=edit
Generated Assembly

I cannot reproduce this, see the attached assembly code generated with the same
4.7.2 build, same applies to 4.8.

[Bug target/58405] Unoptimal code generated for computed goto

[gjl at gcc dot gnu.org]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=58405

Georg-Johann Lay  changed:

   What|Removed |Added

 Status|UNCONFIRMED |WAITING
   Last reconfirmed||2013-09-14
 Ever confirmed|0   |1

[Bug target/58405] Unoptimal code generated for computed goto

[gjl at gcc dot gnu.org]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=58405

Georg-Johann Lay  changed:

   What|Removed |Added

 Status|WAITING |RESOLVED
 Resolution|--- |WORKSFORME

--- Comment #3 from Georg-Johann Lay  ---
(In reply to semicontinuity from comment #2)
> Now I cannot reproduce that as well..
> It seems that I've compiled it with -ffixed-r30 -ffixed-r31 (different from
> original intention) - in this case it produces this kind of assembly .

I can reproduce it with -ffixed-r30 -ffixed-r31.  But as I already wrote above,
without Z (R30/R31) you cannot no more write sensible programs -- except
completely trivial ones. I don't think it makes sense to put effort into
optimizing useless programs or for programs that very likely will break by
occupying Z.

> Still, the code could be more optimal, without rjmp, push/pop - just with
> ijmp replaced by 2 pushes + ret.

Without -ffixed*, the code /does/ use IJMP.  If you take away Z, it's not
possible to use IJMP, of course.

[Bug debug/49864] ICE: in maybe_record_trace_start, at dwarf2cfi.c:2439

[gjl at gcc dot gnu.org]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=49864

--- Comment #7 from Georg-Johann Lay  2011-08-24 
12:36:57 UTC ---
Created attachment 25087
  --> http://gcc.gnu.org/bugzilla/attachment.cgi?id=25087
assert-i.c

Set to REOPENED: This bug is still not dead; I see it with r178035 from trunk
for the attached, precompiled file from avr-libc.

There are similar PRs PR49994, PR49879 which all are fixed. I chose to reopen
this one because it occurs for the same target and similar message.

== Command line ==

avr-gcc assert-i.c -S -Os -g -v

Using built-in specs.
COLLECT_GCC=avr-gcc
COLLECT_LTO_WRAPPER=/local/gnu/install/gcc-4.7/libexec/gcc/avr/4.7.0/lto-wrapper
Target: avr
Configured with: ../../gcc.gnu.org/trunk/configure --target=avr
--prefix=/local/gnu/install/gcc-4.7 --disable-nls --disable-shared
--enable-languages=c,c++ --with-dwarf2 --disable-lto
Thread model: single
gcc version 4.7.0 20110824 (experimental) (GCC)
COLLECT_GCC_OPTIONS='-S' '-Os' '-g' '-v'
 /local/gnu/install/gcc-4.7/libexec/gcc/avr/4.7.0/cc1 -quiet -v assert-i.c
-quiet -dumpbase assert-i.c -auxbase assert-i -g -Os -version -o assert-i.s
GNU C (GCC) version 4.7.0 20110824 (experimental) (avr)
compiled by GNU C version 4.3.2 [gcc-4_3-branch revision 141291], GMP
version 5.0.1, MPFR version 3.0.0-p8, MPC version 0.8.2
...
assert-i.c: In function '__assert':
assert-i.c:36:1: internal compiler error: in maybe_record_trace_start, at
dwarf2cfi.c:2234
Please submit a full bug report,
with preprocessed source if appropriate.
See  for instructions.

[Bug debug/49864] ICE: in maybe_record_trace_start, at dwarf2cfi.c:2439

[gjl at gcc dot gnu.org]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=49864

Georg-Johann Lay  changed:

   What|Removed |Added

 Status|RESOLVED|REOPENED
 Resolution|FIXED   |

--- Comment #8 from Georg-Johann Lay  2011-08-24 
12:50:47 UTC ---
Reopened, changing status from attachement dialog seems to ignore it...

[Bug debug/49864] ICE: in maybe_record_trace_start, at dwarf2cfi.c:2439

[gjl at gcc dot gnu.org]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=49864

Georg-Johann Lay  changed:

   What|Removed |Added

 Status|REOPENED|RESOLVED
 Resolution||FIXED

--- Comment #11 from Georg-Johann Lay  2011-08-26 
11:09:24 UTC ---
Thanks Richard. It works again.

[Bug target/50223] AVRGCC - dont clear r26 and r27.....its a (small) waste of CPU cycles.

[gjl at gcc dot gnu.org]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=50223

Georg-Johann Lay  changed:

   What|Removed |Added

   Keywords||missed-optimization
 CC||gjl at gcc dot gnu.org

--- Comment #1 from Georg-Johann Lay  2011-08-31 
20:23:25 UTC ---
This is just a missed optimization. Thus, you won't see a fix before gcc 4.7.

For gcc 4.7, notice that there are optimized versions of builtins that perform
your arithmetic like

__builtin_clz/clzl/clzll (count leading zeros)
__builtin_ctz/ctzl/ctzll (count trailing zeros)
__builtin_ffs/ffsl/ffsll (find first (lowest) set bit)
...

[Bug target/50256] AVR GCC - several unnecessary register moves

[gjl at gcc dot gnu.org]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=50256

Georg-Johann Lay  changed:

   What|Removed |Added

 Target|atmel avr   |avr
 CC||gjl at gcc dot gnu.org

--- Comment #3 from Georg-Johann Lay  2011-09-03 
12:34:49 UTC ---
Supported versions of GCC are 4.4 upward at the moment. 

Your C-code does not show a call to MulU3U3S3 and the constants 167772 resp.
10 occur nowhere. Please follow http://gcc.gnu.org/bugs/#need when
reporting bugs. Thanks.

Notice that early clobber forces moves. Moreover, some value is passed in r20
but you clobber that register so that register must be freed i.e. that forces a
move, too. Maybe you want your function static inline. Also notice that if you
have MUL, you always have MOVW. You don't need to save/restore __tmp_reg__. You
don't need to save __zero_reg__. It is sufficient to CLR __zero_reg__ after you
are done.

Last not least, you arithmetic apprears to be wrong because you add at most 3
bytes and lose the carries above.

[Bug target/50289] New: [avr]: call-prologues saveing/restoring global register variables

[gjl at gcc dot gnu.org]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=50289

 Bug #: 50289
   Summary: [avr]: call-prologues saveing/restoring global
register variables
Classification: Unclassified
   Product: gcc
   Version: 4.6.1
Status: UNCONFIRMED
  Keywords: wrong-code
  Severity: normal
  Priority: P3
 Component: target
AssignedTo: unassig...@gcc.gnu.org
ReportedBy: g...@gcc.gnu.org
CC: eric.wedding...@atmel.com
Target: avr


void bar (long long, long long, void*);

register char x asm ("7");

void foo (char a)
{
asm volatile ("":::"6");
bar (0, 0, &a);
}


This small program, compiles with
   avr-gcc-4.6.1 -mcall-prologues -S -Os -mmcu=atmega8 
to

foo:
ldi r26,lo8(1)
ldi r27,hi8(1)
ldi r30,lo8(gs(1f))
ldi r31,hi8(gs(1f))
jmp __prologue_saves__+((18 - 13) * 2)
1:

This means that __prologue_saves__ from libgcc saves R7 (i.e. R6..R17 and Y)
even though R7 is a global register variable and must not saved/restored by
function prologue/epilogue.

The function to fix is avr.c:sequent_regs_live()

[Bug target/50289] [avr]: call-prologues saving/restoring global register variables

[gjl at gcc dot gnu.org]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=50289

Georg-Johann Lay  changed:

   What|Removed |Added

   Priority|P3  |P4
 Status|UNCONFIRMED |NEW
   Last reconfirmed||2011-09-04
   Target Milestone|--- |4.6.2
 Ever Confirmed|0   |1

[Bug target/50256] AVR GCC - several unnecessary register moves

[gjl at gcc dot gnu.org]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=50256

--- Comment #6 from Georg-Johann Lay  2011-09-04 
22:19:53 UTC ---
You don't need R20: Simply use %D0 which is cleared, anyway. As %0 is early
clobber, it's not an input and you can clear is at the beginning.

You don't need to clear R4/R5 (similar R6/R7): Just rearrange multiplications
and use (note R6 is (implicitely) 0 at that time)
   mul %A1,%C2
   movw r4,r0
instead of
   mul %A1,%C2
   add r4,r0
   adc r5,r1

You don't need to move to answer by hand; just use %A0 instead of R5 etc. and
you save moves and register footprint (notice that this interferes with
previous hint because you change registers even/odd; it's up to you to work it
out and find smartest way of your assembler).

Finally, you could let the compiler allocate temporary registers for you, i.e.
a 16-bit instead of R2/R3 etc. The compiler knows better which registers are
best and will try to use call-clobbered registers instead of expensive
call-used ones.

All in all, you will get a much greater performance gain by tweaking you code
than the compiler could ever do by saving some poor register moves ;-)

[Bug tree-optimization/48571] [4.5/4.6 Regression] Missed data-dependence for (bogus?) reconstructed array-refs

[gjl at gcc dot gnu.org]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=48571

Georg-Johann Lay  changed:

   What|Removed |Added

 CC||gjl at gcc dot gnu.org

--- Comment #7 from Georg-Johann Lay  2011-09-05 
11:43:00 UTC ---
(In reply to comment #5)

> * gcc.c-torture/execute/pr48571-1.c: New testcase.

This new test case fails execution for all optimization levels on AVR; appears
the test case misses

/* { dg-require-effective-target int32plus } */

or similar.

[Bug target/50289] [avr]: call-prologues saving/restoring global register variables

[gjl at gcc dot gnu.org]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=50289

--- Comment #1 from Georg-Johann Lay  2011-09-05 
12:20:18 UTC ---
Author: gjl
Date: Mon Sep  5 12:20:03 2011
New Revision: 178528

URL: http://gcc.gnu.org/viewcvs?root=gcc&view=rev&rev=178528
Log:
PR target/50289
* config/avr/avr.c (sequent_regs_live): Don't recognize sequences
that contain global register variable.


Modified:
trunk/gcc/ChangeLog
trunk/gcc/config/avr/avr.c

[Bug target/50289] [avr]: call-prologues saving/restoring global register variables

[gjl at gcc dot gnu.org]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=50289

--- Comment #2 from Georg-Johann Lay  2011-09-05 
12:24:17 UTC ---
Author: gjl
Date: Mon Sep  5 12:24:06 2011
New Revision: 178529

URL: http://gcc.gnu.org/viewcvs?root=gcc&view=rev&rev=178529
Log:
PR target/50289
Backport from mainline r178528
* config/avr/avr.c (sequent_regs_live): Don't recognize sequences
that contain global register variable.


Modified:
branches/gcc-4_6-branch/gcc/ChangeLog
branches/gcc-4_6-branch/gcc/config/avr/avr.c

[Bug target/50289] [avr]: call-prologues saving/restoring global register variables

[gjl at gcc dot gnu.org]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=50289

Georg-Johann Lay  changed:

   What|Removed |Added

 Status|NEW |RESOLVED
 Resolution||FIXED
 AssignedTo|unassigned at gcc dot   |gjl at gcc dot gnu.org
   |gnu.org |

--- Comment #3 from Georg-Johann Lay  2011-09-05 
12:26:35 UTC ---
Fixed for the 4.6.2 Milestone.

[Bug tree-optimization/50322] New: [avr]: fail: gcc.dg/tree-ssa/ivopts-lt.c

[gjl at gcc dot gnu.org]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=50322

 Bug #: 50322
   Summary: [avr]: fail: gcc.dg/tree-ssa/ivopts-lt.c
Classification: Unclassified
   Product: gcc
   Version: 4.7.0
Status: UNCONFIRMED
  Keywords: missed-optimization
  Severity: normal
  Priority: P3
 Component: tree-optimization
AssignedTo: unassig...@gcc.gnu.org
ReportedBy: g...@gcc.gnu.org
CC: t...@codesourcery.com
Target: avr


Testcase gcc.dg/tree-ssa/ivopts-lt.c fils for target avr:

PASS: gcc.dg/tree-ssa/ivopts-lt.c (test for excess errors)
FAIL: gcc.dg/tree-ssa/ivopts-lt.c scan-tree-dump-times ivopts "PHI" 1
PASS: gcc.dg/tree-ssa/ivopts-lt.c scan-tree-dump-times ivopts "PHI 

[Bug tree-optimization/50322] [avr]: fail: gcc.dg/tree-ssa/ivopts-lt.c

[gjl at gcc dot gnu.org]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=50322

--- Comment #1 from Georg-Johann Lay  2011-09-07 
15:50:56 UTC ---
Created attachment 25224
  --> http://gcc.gnu.org/bugzilla/attachment.cgi?id=25224
ivopts-lt.c.118t.ivopts

as generated with 

avr-gcc gcc.dg/tree-ssa/ivopts-lt.c -O2 -fdump-tree-ivopts -S -v

[Bug tree-optimization/50322] [avr]: fail: gcc.dg/tree-ssa/ivopts-lt.c

[gjl at gcc dot gnu.org]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=50322

--- Comment #2 from Georg-Johann Lay  2011-09-07 
16:09:18 UTC ---
Author: gjl
Date: Wed Sep  7 16:09:12 2011
New Revision: 178646

URL: http://gcc.gnu.org/viewcvs?root=gcc&view=rev&rev=178646
Log:
PR tree-optimization/50322
* gcc.dg/tree-ssa/ivopts-lt.c: Add xfails for avr.


Modified:
trunk/gcc/testsuite/ChangeLog
trunk/gcc/testsuite/gcc.dg/tree-ssa/ivopts-lt.c

[Bug tree-optimization/48571] [4.5/4.6 Regression] Missed data-dependence for (bogus?) reconstructed array-refs

[gjl at gcc dot gnu.org]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=48571

--- Comment #8 from Georg-Johann Lay  2011-09-07 
17:31:08 UTC ---
Author: gjl
Date: Wed Sep  7 17:31:01 2011
New Revision: 178655

URL: http://gcc.gnu.org/viewcvs?root=gcc&view=rev&rev=178655
Log:
PR middle-end/48571
* gcc.c-torture/execute/pr48571-1.c (bar): Use offsets sizeof(int)
instead of 4.


Modified:
trunk/gcc/testsuite/ChangeLog
trunk/gcc/testsuite/gcc.c-torture/execute/pr48571-1.c

[Bug target/49030] ICE in get_arm_condition_code, at config/arm/arm.c:17180

[gjl at gcc dot gnu.org]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=49030

--- Comment #11 from Georg-Johann Lay  2011-09-09 
17:00:33 UTC ---
Author: gjl
Date: Fri Sep  9 17:00:26 2011
New Revision: 178736

URL: http://gcc.gnu.org/viewcvs?root=gcc&view=rev&rev=178736
Log:
PR target/49030
* gcc.dg/torture/pr49030.c: Run only if target int32plus.


Modified:
trunk/gcc/testsuite/ChangeLog
trunk/gcc/testsuite/gcc.dg/torture/pr49030.c

[Bug target/49687] [4.6 Regression][avr] Missed optimization for widening MUL

[gjl at gcc dot gnu.org]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=49687

Georg-Johann Lay  changed:

   What|Removed |Added

 Status|NEW |RESOLVED
 Resolution||FIXED

--- Comment #10 from Georg-Johann Lay  2011-09-09 
17:57:34 UTC ---
Closed for the 4.7.0 Milestone.

[Bug target/50358] New: AVR: Implement [u]maddqihi4 [u]msubqihi4 patterns on the enhanced core

[gjl at gcc dot gnu.org]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=50358

 Bug #: 50358
   Summary: AVR: Implement [u]maddqihi4 [u]msubqihi4 patterns on
the enhanced core
Classification: Unclassified
   Product: gcc
   Version: 4.6.1
Status: UNCONFIRMED
  Keywords: missed-optimization
  Severity: enhancement
  Priority: P3
 Component: target
AssignedTo: unassig...@gcc.gnu.org
ReportedBy: g...@gcc.gnu.org
CC: eric.wedding...@atmel.com
Target: avr


avr-gcc 4.6.1 -Os -mmcu=atmega8 translates the following test function

int madd_x (int i, char a, char b)
{
return i + a*b;
}

to

muls r22,r20 ;  10mulqihi3
movw r20,r0
clr r1
add r20,r24 ;  11*addhi3/1
adc r21,r25
movw r24,r20 ;  31*movhi/1

where it could be

muls r22,r20 ;  *maddqihi4/1
add r24,r0
adc r25,r1
clr r1

instead i.e. the addition can be done in place and the product need not to be
moved out of R0, reducing code size and register pressure and increasing speed.

[Bug target/50358] AVR: Implement [u]maddqihi4 [u]msubqihi4 patterns on the enhanced core

[gjl at gcc dot gnu.org]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=50358

Georg-Johann Lay  changed:

   What|Removed |Added

   Target Milestone|--- |4.7.0

[Bug target/50358] AVR: Implement [u]maddqihi4 [u]msubqihi4 patterns on the enhanced core

[gjl at gcc dot gnu.org]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=50358

Georg-Johann Lay  changed:

   What|Removed |Added

 Status|UNCONFIRMED |ASSIGNED
   Last reconfirmed||2011-09-11
 AssignedTo|unassigned at gcc dot   |gjl at gcc dot gnu.org
   |gnu.org |
 Ever Confirmed|0   |1

--- Comment #1 from Georg-Johann Lay  2011-09-11 
17:46:14 UTC ---
Created attachment 25241
  --> http://gcc.gnu.org/bugzilla/attachment.cgi?id=25241
madd.c

Just some test cases.

[Bug target/50358] AVR: Implement [u]maddqihi4 [u]msubqihi4 patterns on the enhanced core

[gjl at gcc dot gnu.org]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=50358

Georg-Johann Lay  changed:

   What|Removed |Added

   Priority|P3  |P4

[Bug target/41076] [avr] pessimal code for logical OR of 8-bit fields

[gjl at gcc dot gnu.org]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=41076

Georg-Johann Lay  changed:

   What|Removed |Added

 Status|UNCONFIRMED |ASSIGNED
   Last reconfirmed||2011-09-11
 AssignedTo|unassigned at gcc dot   |gjl at gcc dot gnu.org
   |gnu.org |
 Ever Confirmed|0   |1

--- Comment #3 from Georg-Johann Lay  2011-09-11 
20:59:28 UTC ---
Created attachment 25242
  --> http://gcc.gnu.org/bugzilla/attachment.cgi?id=25242
Some test cases

[Bug target/41076] [avr] pessimal code for logical OR of 8-bit fields

[gjl at gcc dot gnu.org]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=41076

Georg-Johann Lay  changed:

   What|Removed |Added

 Target|avr-elf |avr
   Priority|P3  |P4
Version|unknown |4.6.1
   Target Milestone|--- |4.7.0
   Severity|normal  |enhancement

[Bug target/43746] -fmerge-constants and -fmerge-all-constants don't work at AVR target

[gjl at gcc dot gnu.org]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=43746

--- Comment #7 from Georg-Johann Lay  2011-09-12 
10:06:52 UTC ---
Author: gjl
Date: Mon Sep 12 10:06:46 2011
New Revision: 178779

URL: http://gcc.gnu.org/viewcvs?root=gcc&view=rev&rev=178779
Log:
gcc/
PR target/43746
* config/avr/avr.c (AVR_SECTION_PROGMEM): New Define.
(progmem_section): New Variable.
(avr_asm_init_sections): Initialize it.
(TARGET_ASM_SELECT_SECTION): Define to...
(avr_asm_select_section): ... this new Function.
(avr_replace_prefix): New Function.
(avr_asm_function_rodata_section): Use it.
(avr_insert_attributes): Don't add section attribute for PROGMEM.
(avr_section_type_flags): Use avr_progmem_p instead of section
name to detect if object is in PROGMEM.
(avr_asm_named_section): Set section name prefix for objects in
PROGMEM.

testsuite/
PR target/43746
* testsuite/gcc.target/avr/torture/avr-torture.exp
(AVR_TORTURE_OPTIONS): Add test cases "-O2 -fdata-sections" and
"-O2 -fmerge-all-constants".


Modified:
trunk/gcc/ChangeLog
trunk/gcc/config/avr/avr.c
trunk/gcc/testsuite/ChangeLog
trunk/gcc/testsuite/gcc.target/avr/torture/avr-torture.exp

[Bug target/43746] -fmerge-constants and -fmerge-all-constants don't work at AVR target

[gjl at gcc dot gnu.org]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=43746

Georg-Johann Lay  changed:

   What|Removed |Added

 Status|NEW |RESOLVED
 Resolution||FIXED

--- Comment #8 from Georg-Johann Lay  2011-09-12 
10:16:25 UTC ---
Closed as fixed for 4.7 Milestone.

Initially I intended to add a -fprogmem-sections command line option that works
similar but independent to -fdata-section.  That way data sections could be
used and strings in progmem merged.  However, I did not find a straight forward
way without cluttering avr BE with lots of code from varasm.c.  Thus, for now,
there is no -fprogmem-sections, i.e. progmem-sections are in sync with
data-sections and you have to decide wether you prefer string merging or fine
grained sections.

[Bug target/50358] AVR: Implement [u]maddqihi4 [u]msubqihi4 patterns on the enhanced core

[gjl at gcc dot gnu.org]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=50358

Georg-Johann Lay  changed:

   What|Removed |Added

  Attachment #25241|0   |1
is obsolete||

--- Comment #2 from Georg-Johann Lay  2011-09-12 
19:16:00 UTC ---
Created attachment 25251
  --> http://gcc.gnu.org/bugzilla/attachment.cgi?id=25251
madd.c

[Bug target/50358] AVR: Implement [u]maddqihi4 [u]msubqihi4 patterns on the enhanced core

[gjl at gcc dot gnu.org]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=50358

--- Comment #3 from Georg-Johann Lay  2011-09-13 
09:23:40 UTC ---
Author: gjl
Date: Tue Sep 13 09:23:36 2011
New Revision: 178806

URL: http://gcc.gnu.org/viewcvs?root=gcc&view=rev&rev=178806
Log:

PR target/50358
* config/avr/predicates.md (const_1_to_6_operand): New predicate.
* config/avr/avr.md: (extend_s): New code attribute.
(mul_r_d): New code attribute.
(*maddqihi4, *umaddqihi4): New insns.
(*msubqihi4, *umsubqihi4): New insns.
(*usmaddqihi4, *sumaddqihi4): New insns.
(*usmsubqihi4, *susubdqihi4): New insns.
(*umaddqihi4.uconst, *maddqihi4.sconst): New insn-and-splits.
(*umsubqihi4.uconst, *msubqihi4.sconst): New insn-and-splits.
(*umsubqihi4.uconst.ashift): New insn-and-split.
(*msubqihi4.sconst.ashift): New insn-and-split.
(*sumaddqihi4.uconst): New insn-and-split.
(*sumsubqihi4.uconst): New insn-and-split.
* config/avr/avr.c (avr_rtx_costs): Report costs of above in case
PLUS:HI and MINUS:HI.


Modified:
trunk/gcc/ChangeLog
trunk/gcc/config/avr/avr.c
trunk/gcc/config/avr/avr.md
trunk/gcc/config/avr/predicates.md

[Bug target/50358] AVR: Implement [u]maddqihi4 [u]msubqihi4 patterns on the enhanced core

[gjl at gcc dot gnu.org]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=50358

--- Comment #4 from Georg-Johann Lay  2011-09-16 
18:27:16 UTC ---
Author: gjl
Date: Fri Sep 16 18:27:10 2011
New Revision: 178912

URL: http://gcc.gnu.org/viewcvs?root=gcc&view=rev&rev=178912
Log:
PR target/50358
* config/avr/avr.md (*ashiftqihi2.signx.1): New insn.
(*maddqi4, *maddqi4.const): New insns.
(*msubqi4, *msubqi4.const): New insns.
* config/avr/avr.c (avr_rtx_costs): Record costs of above in cases
PLUS:QI and MINUS:QI.  Increase costs of multiply-add/-sub for
HImode by 1 in the case of multiplying with a CONST_INT.
Record cost of *ashiftqihi2.signx.1 in case ASHIFT:QI.


Modified:
trunk/gcc/ChangeLog
trunk/gcc/config/avr/avr.c
trunk/gcc/config/avr/avr.md

[Bug target/50358] AVR: Implement [u]maddqihi4 [u]msubqihi4 patterns on the enhanced core

[gjl at gcc dot gnu.org]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=50358

Georg-Johann Lay  changed:

   What|Removed |Added

 Status|ASSIGNED|RESOLVED
 Resolution||FIXED

--- Comment #5 from Georg-Johann Lay  2011-09-16 
18:33:59 UTC ---
Resolved for 4.7.0 milestone.

[Bug target/50223] AVRGCC - dont clear r26 and r27.....its a (small) waste of CPU cycles.

[gjl at gcc dot gnu.org]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=50223

Georg-Johann Lay  changed:

   What|Removed |Added

 Status|UNCONFIRMED |RESOLVED
  Known to work||4.6.1
 Resolution||WORKSFORME

--- Comment #2 from Georg-Johann Lay  2011-09-17 
18:35:52 UTC ---
Following test program

extern uint8_t leadingZeros[];

#define pgm_read(a,b) asm ("lpm %0,%a1" : "=r" (a) : "z" ((uint16_t)(b)))

uint8_t ldgZeroCntNormU32 (uint32_t* x)
{
  uint8_t zCount = 0;
  uint8_t shft;
  uint32_t quad = *x;

  while (!(uint8_t)(quad >> 24))
  {
zCount += 8;
quad <<=8;
  }
  pgm_read (shft, &leadingZeros[(uint8_t)(quad >> 24)]);
  *x = quad << shft;
  return zCount + shft;
}

yields with avr-gcc-4.6.1 -Os -mmcu=atmega8 -S following result:

ldgZeroCntNormU32:
movw r26,r24
ld r20,X+
ld r21,X+
ld r22,X+
ld r23,X
sbiw r26,3
ldi r24,lo8(0)
rjmp .L2
.L3:
subi r24,lo8(-(8))
mov r23,r22
mov r22,r21
mov r21,r20
clr r20
.L2:
mov r30,r23
tst r23
breq .L3
ldi r31,lo8(0)
subi r30,lo8(-(leadingZeros))
sbci r31,hi8(-(leadingZeros))
/* #APP */
 ;  20 "foo.c" 1
lpm r30,Z
 ;  0 "" 2
/* #NOAPP */
mov r0,r30
rjmp 2f
1:lsl r20
rol r21
rol r22
rol r23
2:dec r0
brpl 1b
st X+,r20
st X+,r21
st X+,r22
st X,r23
sbiw r26,3
add r24,r30
ret

So there is no CLR for the while (!(uint8_t)(quad >> 24))

Closed as works for me.

[Bug target/33049] [avr] bit extraction non optimal, inversing logic solves problem

[gjl at gcc dot gnu.org]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=33049

--- Comment #20 from Georg-Johann Lay  2011-09-18 
12:22:58 UTC ---
See also http://lists.gnu.org/archive/html/avr-gcc-list/2008-12/msg9.html

[Bug target/50446] New: [avr] Implement rotate patterns with offset 1

[gjl at gcc dot gnu.org]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=50446

 Bug #: 50446
   Summary: [avr] Implement rotate patterns with offset 1
Classification: Unclassified
   Product: gcc
   Version: 4.6.1
Status: UNCONFIRMED
  Keywords: missed-optimization
  Severity: enhancement
  Priority: P3
 Component: target
AssignedTo: unassig...@gcc.gnu.org
ReportedBy: g...@gcc.gnu.org
CC: eric.wedding...@atmel.com
Target: avr


GCC tries rotate patterns, e.g. I see combiner try to match against rotate.
Rotate by one is easy to implement on AVR, so add these patterns/insns.

[Bug target/50446] [avr] Implement rotate patterns with offset 1

[gjl at gcc dot gnu.org]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=50446

Georg-Johann Lay  changed:

   What|Removed |Added

   Priority|P3  |P4
 Status|UNCONFIRMED |NEW
   Last reconfirmed||2011-09-18
   Target Milestone|--- |4.7.0
 Ever Confirmed|0   |1
  Known to fail||4.6.1

[Bug target/50446] [avr] Implement rotate patterns with offset 1

[gjl at gcc dot gnu.org]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=50446

--- Comment #1 from Georg-Johann Lay  2011-09-18 
12:36:59 UTC ---
Created attachment 25310
  --> http://gcc.gnu.org/bugzilla/attachment.cgi?id=25310
rotate.c

Some test cases

[Bug target/50447] New: [avr] Better support of AND, OR, XOR and PLUS with constant integers for 16- and 32-bit values

[gjl at gcc dot gnu.org]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=50447

 Bug #: 50447
   Summary: [avr] Better support of AND, OR, XOR and PLUS with
constant integers for 16- and 32-bit values
Classification: Unclassified
   Product: gcc
   Version: 4.6.1
Status: UNCONFIRMED
  Severity: normal
  Priority: P3
 Component: target
AssignedTo: unassig...@gcc.gnu.org
ReportedBy: g...@gcc.gnu.org
Target: avr


The current implementation sometimes leads to poor code for several reasons:

o Insn "*iorsi3_clobber" is hidden behind "iorsi3" and thus will never
  be used.

o There are no such insn for AND, XOR, PLUS so that the constant gets 
  reloaded to a same-width register where a QI was sufficient.

o If a clobber is needed, the value in the clobber reg is not reused.

o Work out if a clobber is actually needed.

[Bug target/50447] [avr] Better support of AND, OR, XOR and PLUS with constant integers for 16- and 32-bit values

[gjl at gcc dot gnu.org]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=50447

Georg-Johann Lay  changed:

   What|Removed |Added

 Status|UNCONFIRMED |NEW
   Keywords||missed-optimization
   Last reconfirmed||2011-09-18
 CC||eric.weddington at atmel
   ||dot com
 Ever Confirmed|0   |1
   Target Milestone|--- |4.7.0
  Known to fail||4.6.1
   Severity|normal  |enhancement

[Bug target/50448] New: [avr] Missed optimization accessing struct component with known, absolute address.

[gjl at gcc dot gnu.org]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=50448

 Bug #: 50448
   Summary: [avr] Missed optimization accessing struct component
with known, absolute address.
Classification: Unclassified
   Product: gcc
   Version: 4.6.1
Status: UNCONFIRMED
  Keywords: missed-optimization
  Severity: normal
  Priority: P3
 Component: target
AssignedTo: unassig...@gcc.gnu.org
ReportedBy: g...@gcc.gnu.org
CC: eric.wedding...@atmel.com
Target: avr


typedef struct
{
unsigned char a,b,c,d;
} SPI_t;

#define SPIE (*(SPI_t volatile*) 0x0AC0)

void foo (void)
{
SPIE.d = 0xAA;
while (!(SPIE.c & 0x80));

SPIE.d = 0xBB;
while (!(SPIE.c & 0x80));
}

avr-gcc-4.6.1 -Os -S -fdump-tree-optimized -fdump-rtl-expand 
compiles that code to

foo:
ldi r24,lo8(-86)
ldi r30,lo8(2752)
ldi r31,hi8(2752)
std Z+3,r24
.L2:
lds r24,2754
sbrs r24,7
rjmp .L2
ldi r24,lo8(-69)
ldi r30,lo8(2752)
ldi r31,hi8(2752)
std Z+3,r24
.L3:
lds r24,2754
sbrs r24,7
rjmp .L3
ret

Instead of loading the address 2752 two times, it's sufficient to load it once
or to do a direct access to 2755 and avoid loading the constant altogether.

The load appeard first in .expand; .optimized looks fine:

foo ()
{
  signed char D.1932;
  volatile unsigned char D.1931;
  signed char D.1930;
  volatile unsigned char D.1929;

:
  MEM[(volatile struct SPI_t *)2752B].d ={v} 170;

:
  D.1929_3 ={v} MEM[(volatile struct SPI_t *)2752B].c;
  D.1930_4 = (signed char) D.1929_3;
  if (D.1930_4 >= 0)
goto ;
  else
goto ;

:
  MEM[(volatile struct SPI_t *)2752B].d ={v} 187;

:
  D.1931_7 ={v} MEM[(volatile struct SPI_t *)2752B].c;
  D.1932_8 = (signed char) D.1931_7;
  if (D.1932_8 >= 0)
goto ;
  else
goto ;

:
  return;
}

[Bug target/50448] [avr] Missed optimization accessing struct component with known, absolute address.

[gjl at gcc dot gnu.org]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=50448

Georg-Johann Lay  changed:

   What|Removed |Added

 Status|UNCONFIRMED |NEW
   Last reconfirmed||2011-09-18
   Target Milestone|--- |4.7.0
 Ever Confirmed|0   |1
  Known to fail||4.3.3, 4.5.2, 4.6.1

[Bug target/50449] New: [avr] Loading some 32 constants not optimal

[gjl at gcc dot gnu.org]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=50449

 Bug #: 50449
   Summary: [avr] Loading some 32 constants not optimal
Classification: Unclassified
   Product: gcc
   Version: 4.7.0
Status: UNCONFIRMED
  Keywords: missed-optimization
  Severity: minor
  Priority: P3
 Component: target
AssignedTo: unassig...@gcc.gnu.org
ReportedBy: g...@gcc.gnu.org
Target: avr


The following code

register long long X1 asm ("16");
register long X2 asm ("24");
register int X3 asm ("30");

void foo (void)
{
register long r asm ("12") = 1 << 2;
asm volatile (" "::"r"(r));
}

compiled with
avr-gcc-4.6.1 -S -Os -dp -mmcu=atmegs8
loads the cpmstant as

clr r12 ;  5*movsi/6[length = 5]
clr r13
movw r14,r12
set
bld r12,2

whereas 4.7.0 will print something like

set
clr r12
bld r12,2
clr r13
clr r14
clr r15

i.e. it uses one instruction more because of the changes to output_movsisf in
http://gcc.gnu.org/viewcvs?view=revision&revision=175956 .

[Bug target/50449] [avr] Loading some 32 constants not optimal

[gjl at gcc dot gnu.org]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=50449

Georg-Johann Lay  changed:

   What|Removed |Added

   Priority|P3  |P4
 Status|UNCONFIRMED |ASSIGNED
   Last reconfirmed||2011-09-18
 CC||eric.weddington at atmel
   ||dot com
  Known to work||4.6.1
 AssignedTo|unassigned at gcc dot   |gjl at gcc dot gnu.org
   |gnu.org |
   Target Milestone|--- |4.7.0
 Ever Confirmed|0   |1

[Bug target/50465] New: [avr] Use insn attribute to depict if and how instruction lengths have to be adjusted

[gjl at gcc dot gnu.org]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=50465

 Bug #: 50465
   Summary: [avr] Use insn attribute to depict if and how
instruction lengths have to be adjusted
Classification: Unclassified
   Product: gcc
   Version: 4.7.0
Status: UNCONFIRMED
  Severity: enhancement
  Priority: P3
 Component: target
AssignedTo: g...@gcc.gnu.org
ReportedBy: g...@gcc.gnu.org
Target: avr


At current, avr.c:adjust_insn_length() uses bunch of C-code to find out if and
how instruction lengths have to be adjusted.

This can be done in a more legible way by means of a new insn attribute.

[Bug target/50465] [avr] Use insn attribute to depict if and how instruction lengths have to be adjusted

[gjl at gcc dot gnu.org]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=50465

Georg-Johann Lay  changed:

   What|Removed |Added

   Priority|P3  |P4
 Status|UNCONFIRMED |ASSIGNED
   Last reconfirmed||2011-09-20
 CC||eric.weddington at atmel
   ||dot com
   Target Milestone|--- |4.7.0
 Ever Confirmed|0   |1

[Bug target/50449] [avr] Loading some 32 constants not optimal

[gjl at gcc dot gnu.org]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=50449

--- Comment #1 from Georg-Johann Lay  2011-09-21 
08:22:08 UTC ---
Author: gjl
Date: Wed Sep 21 08:21:57 2011
New Revision: 179037

URL: http://gcc.gnu.org/viewcvs?root=gcc&view=rev&rev=179037
Log:
PR target/50449
PR target/50465
* config/avr/avr.md (adjust_len): New insn attribute.
(*reload_insi, *reload_insf): Use it.
(*movsi, *movsf): Use new interface of output_movsisf.
* config/avr/avr-protos.h (output_movsisf): Change prototype.
* config/avr/avr.c (output_movsisf): Ditto.
(adjust_insn_length): Use insn attribute "adjust_len" to adjust
lengths of insns *reload_insi, *reload_insf.
(output_reload_insisf_1): New static function.
(output_reload_insisf): Use it.


Modified:
trunk/gcc/ChangeLog
trunk/gcc/config/avr/avr-protos.h
trunk/gcc/config/avr/avr.c
trunk/gcc/config/avr/avr.md

[Bug target/50465] [avr] Use insn attribute to depict if and how instruction lengths have to be adjusted

[gjl at gcc dot gnu.org]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=50465

--- Comment #1 from Georg-Johann Lay  2011-09-21 
08:22:10 UTC ---
Author: gjl
Date: Wed Sep 21 08:21:57 2011
New Revision: 179037

URL: http://gcc.gnu.org/viewcvs?root=gcc&view=rev&rev=179037
Log:
PR target/50449
PR target/50465
* config/avr/avr.md (adjust_len): New insn attribute.
(*reload_insi, *reload_insf): Use it.
(*movsi, *movsf): Use new interface of output_movsisf.
* config/avr/avr-protos.h (output_movsisf): Change prototype.
* config/avr/avr.c (output_movsisf): Ditto.
(adjust_insn_length): Use insn attribute "adjust_len" to adjust
lengths of insns *reload_insi, *reload_insf.
(output_reload_insisf_1): New static function.
(output_reload_insisf): Use it.


Modified:
trunk/gcc/ChangeLog
trunk/gcc/config/avr/avr-protos.h
trunk/gcc/config/avr/avr.c
trunk/gcc/config/avr/avr.md

[Bug target/45099] [avr] Warning could be issued for use of register variables that will fail.

[gjl at gcc dot gnu.org]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=45099

--- Comment #3 from Georg-Johann Lay  2011-09-21 
09:40:17 UTC ---
Author: gjl
Date: Wed Sep 21 09:40:13 2011
New Revision: 179040

URL: http://gcc.gnu.org/viewcvs?root=gcc&view=rev&rev=179040
Log:
PR target/45099
* config/avr/avr.c (avr_function_arg_advance): Change error to
warning if a fixed register is needed as function argument.


Modified:
trunk/gcc/ChangeLog
trunk/gcc/config/avr/avr.c

[Bug target/50449] [avr] Loading some 32 constants not optimal

[gjl at gcc dot gnu.org]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=50449

Georg-Johann Lay  changed:

   What|Removed |Added

 Status|ASSIGNED|RESOLVED
 Resolution||FIXED

--- Comment #2 from Georg-Johann Lay  2011-09-21 
13:56:04 UTC ---
Fixed now.

[Bug target/35860] [4.4/4.5/4.6/4.7 Regression] [avr] code bloat caused by -fsplit-wide-types

[gjl at gcc dot gnu.org]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=35860

Georg-Johann Lay  changed:

   What|Removed |Added

 CC||gjl at gcc dot gnu.org
 Depends on||50447

--- Comment #14 from Georg-Johann Lay  2011-09-21 
14:25:09 UTC ---
The bloat is partly caused by PR50447 because the a |= 1 leads to reload of the
constant 1 into an SI register.  For that constant no reloading is needed. 
However, insn *iorsi3_clobber is hidden behind iorsi3 so that a reload happens
and causes a part of the observed code bloat.  Moreover, operations like AND,
IOR, XOR are implemented in a suboptimal way.

The other part of the code bloat is simply because of -f[no-]split-wide-types;
there will always be cases where splitting wide types leads to bloated (or sort
of) code because there might be SUBREGs all over the place.  Not all insns can
be split, e.g. addition, subtraction, comparison, etc. so that there will be
mixture of split and non-split insns.

[Bug target/50465] [avr] Use insn attribute to depict if and how instruction lengths have to be adjusted

[gjl at gcc dot gnu.org]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=50465

--- Comment #2 from Georg-Johann Lay  2011-09-22 
09:55:20 UTC ---
Author: gjl
Date: Thu Sep 22 09:55:13 2011
New Revision: 179081

URL: http://gcc.gnu.org/viewcvs?root=gcc&view=rev&rev=179081
Log:
PR target/50447
PR target/50465
* config/avr/avr-protos.h (avr_out_bitop): New prototype.
(avr_popcount_each_byte): New prototype.
* config/avr/avr.c (avr_popcount): New static function.
(avr_popcount_each_byte): New function.
(avr_out_bitop): New function.
(adjust_insn_length): ADJUST_LEN_OUT_BITOP dispatches to
avr_out_bitop.  Cleanup code.
* config/avr/constraints.md (Ca2, Co2, Cx2): New constraints.
(Ca4, Co4, Cx4): New constraints.
* config/avr/avr.md (adjust_len): Add "out_bitop" insn attribute
alternative.
(andhi3, iorhi3, xorhi3): Rewrite insns using avr_out_bitop.
(andsi3, iorsi3, xorsi3): Ditto.
(*iorhi3_clobber, *iorsi3_clobber): Remove insns.


Modified:
trunk/gcc/ChangeLog
trunk/gcc/config/avr/avr-protos.h
trunk/gcc/config/avr/avr.c
trunk/gcc/config/avr/avr.md
trunk/gcc/config/avr/constraints.md

[Bug target/50447] [avr] Better support of AND, OR, XOR and PLUS with constant integers for 16- and 32-bit values

[gjl at gcc dot gnu.org]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=50447

--- Comment #1 from Georg-Johann Lay  2011-09-22 
09:55:21 UTC ---
Author: gjl
Date: Thu Sep 22 09:55:13 2011
New Revision: 179081

URL: http://gcc.gnu.org/viewcvs?root=gcc&view=rev&rev=179081
Log:
PR target/50447
PR target/50465
* config/avr/avr-protos.h (avr_out_bitop): New prototype.
(avr_popcount_each_byte): New prototype.
* config/avr/avr.c (avr_popcount): New static function.
(avr_popcount_each_byte): New function.
(avr_out_bitop): New function.
(adjust_insn_length): ADJUST_LEN_OUT_BITOP dispatches to
avr_out_bitop.  Cleanup code.
* config/avr/constraints.md (Ca2, Co2, Cx2): New constraints.
(Ca4, Co4, Cx4): New constraints.
* config/avr/avr.md (adjust_len): Add "out_bitop" insn attribute
alternative.
(andhi3, iorhi3, xorhi3): Rewrite insns using avr_out_bitop.
(andsi3, iorsi3, xorsi3): Ditto.
(*iorhi3_clobber, *iorsi3_clobber): Remove insns.


Modified:
trunk/gcc/ChangeLog
trunk/gcc/config/avr/avr-protos.h
trunk/gcc/config/avr/avr.c
trunk/gcc/config/avr/avr.md
trunk/gcc/config/avr/constraints.md

[Bug middle-end/35860] [4.4/4.5/4.6/4.7 Regression] [avr] code bloat caused by -fsplit-wide-types

[gjl at gcc dot gnu.org]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=35860

Georg-Johann Lay  changed:

   What|Removed |Added

   Keywords||ra
 Status|NEW |WAITING
  Component|target  |middle-end
   Host|mingw   |
   Target Milestone|4.4.7   |4.7.0

--- Comment #15 from Georg-Johann Lay  2011-09-22 
10:24:45 UTC ---
With 4.7 trunk r179081 and the code from comment #0 avr-gcc -mmcu=avr4 -Os -S
-dp 

The output with -fno-split-wide-types is 36 bytes

udivr32_7:
/* stack size = 0 */
ldi r30,lo8(32) ;  10*movqi/2[length = 1]
ldi r21,lo8(0) ;  11*movqi/1[length = 1]
.L4:
lsl r21 ;  15*ashlqi3/3[length = 1]
sbrc r25,7 ;  58*sbrx_and_branchsi[length = 2]
subi r21,lo8(-(1)) ;  19addqi3/2[length = 1]
.L2:
lsl r22 ;  57*ashlsi3_const/2[length = 4]
rol r23
rol r24
rol r25
cp r21,r20 ;  23*cmpqi/2[length = 1]
brlo .L3 ;  24branch[length = 1]
sub r21,r20 ;  26subqi3/1[length = 1]
ori r22,1 ;  27iorsi3/2[length = 1]
.L3:
subi r30,lo8(-(-1)) ;  30addqi3/2[length = 1]
brne .L4 ;  33branch[length = 1]
movw r30,r18 ;  52*movhi/1[length = 1]
st Z,r21 ;  35*movqi/3[length = 1]
/* epilogue start */
ret ;  55return[length = 1]


The output with -fsplit-wide-types is 62 bytes

udivr32_7:
push r12 ;  61pushqi1/1[length = 1]
push r13 ;  62pushqi1/1[length = 1]
push r14 ;  63pushqi1/1[length = 1]
push r15 ;  64pushqi1/1[length = 1]
/* stack size = 4 */
movw r12,r22 ;  6*movsi/1[length = 2]
movw r14,r24
ldi r25,lo8(32) ;  10*movqi/2[length = 1]
ldi r24,lo8(0) ;  11*movqi/1[length = 1]
.L4:
lsl r24 ;  15*ashlqi3/3[length = 1]
sbrc r15,7 ;  76*sbrx_and_branchsi[length = 2]
subi r24,lo8(-(1)) ;  19addqi3/2[length = 1]
.L2:
lsl r12 ;  75*ashlsi3_const/2[length = 4]
rol r13
rol r14
rol r15
cp r24,r20 ;  23*cmpqi/2[length = 1]
brlo .L3 ;  24branch[length = 1]
sub r24,r20 ;  26subqi3/1[length = 1]
set ;  27iorsi3/3[length = 2]
bld r12,0
.L3:
subi r25,lo8(-(-1)) ;  30addqi3/2[length = 1]
brne .L4 ;  33branch[length = 1]
movw r30,r18 ;  60*movhi/1[length = 1]
st Z,r24 ;  35*movqi/3[length = 1]
movw r22,r12 ;  73*movhi/1[length = 1]
movw r24,r14 ;  74*movhi/1[length = 1]
/* epilogue start */
pop r15 ;  67popqi[length = 1]
pop r14 ;  68popqi[length = 1]
pop r13 ;  69popqi[length = 1]
pop r12 ;  70popqi[length = 1]
ret ;  71return_from_epilogue[length = 1]


So there is still code bloat with -fsplit-wide-types.

I don't see how the back-end can improve thas situation and IMO the bloat is
caused by the register allocation which leads to the 13 additional
instructions: all push/pop and moving registers back and forth (and one for
a|=1 in a register that cannot operate with constants in insn 27).

Therefore, I added RA to the keywords, set component to "middle-end" and
changed the status to "waiting" so that someone familiar with the register
allocator can tell if it's a RA flaw or not or give better component/keyword.

[Bug target/50446] [avr] Implement rotate patterns with offset 1

[gjl at gcc dot gnu.org]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=50446

--- Comment #2 from Georg-Johann Lay  2011-09-23 
10:14:26 UTC ---
Author: gjl
Date: Fri Sep 23 10:14:23 2011
New Revision: 179116

URL: http://gcc.gnu.org/viewcvs?root=gcc&view=rev&rev=179116
Log:
PR target/50446
* config/avr/avr.md (rotlqi3): Support all offsets 0..7.
(rotlqi3_4): Turn insn into expander.
(*rotlqi3): New insn.
(rotlhi3, rotlsi3): Support rotate left/right by 1.
(*rotlhi2.1, *rotlhi2.15): New insns.
(*rotlsi2.1, *rotlsi2.31): New insns.
* config/avr/constraints.md (C03, C05, C06, C07): New constraints.


Modified:
trunk/gcc/ChangeLog
trunk/gcc/config/avr/avr.md
trunk/gcc/config/avr/constraints.md

[Bug target/50446] [avr] Implement rotate patterns with offset 1

[gjl at gcc dot gnu.org]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=50446

Georg-Johann Lay  changed:

   What|Removed |Added

 Status|NEW |RESOLVED
 Resolution||FIXED

--- Comment #3 from Georg-Johann Lay  2011-09-23 
10:17:11 UTC ---
Closed for 4.7 milestone.

[Bug target/50447] [avr] Better support of AND, OR, XOR and PLUS with constant integers for 16- and 32-bit values

[gjl at gcc dot gnu.org]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=50447

--- Comment #2 from Georg-Johann Lay  2011-09-23 
17:02:20 UTC ---
Author: gjl
Date: Fri Sep 23 17:02:10 2011
New Revision: 179123

URL: http://gcc.gnu.org/viewcvs?root=gcc&view=rev&rev=179123
Log:
PR target/50447
* config/avr/avr.md: (adjust_len): Add alternative "out_plus".
(addsi3): Rewrite using QI scratch register.  Adjust text
peepholes using plus:SI.
(*addsi3_zero_extend.hi): New insn.
(*subsi3_zero_extend.hi): New insn.
(*subhi3_zero_extend1): Set attribute "cc" to "set_czn".
(*subsi3_zero_extend): Ditto.
(subsi3): Change predicate #2 to register_operand.
* config/avr/avr-protos.h (avr_out_plus): New prototype.
(avr_out_plus_1): New static function.
(avr_out_plus): New function.
(adjust_insn_length): Handle ADJUST_LEN_OUT_PLUS.


Modified:
trunk/gcc/ChangeLog
trunk/gcc/config/avr/avr-protos.h
trunk/gcc/config/avr/avr.c
trunk/gcc/config/avr/avr.md

[Bug target/50447] [avr] Better support of AND, OR, XOR and PLUS with constant integers for 16- and 32-bit values

[gjl at gcc dot gnu.org]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=50447

--- Comment #3 from Georg-Johann Lay  2011-09-23 
17:06:49 UTC ---
Author: gjl
Date: Fri Sep 23 17:06:44 2011
New Revision: 179124

URL: http://gcc.gnu.org/viewcvs?root=gcc&view=rev&rev=179124
Log:
* config/avr/avr.md (adjust_len): Add alternatives "tsthi",
"tstsi", "compare".
(*cmpqi_sign_extend): Use s8_operand.
(*cmphi, *cmpsi): Rewrite using avr_out_compare.
* config/avr/avr-protos.h (compare_diff_p, compare_eq_p): Remove
prototypes.
(out_tsthi, out_tstsi): Remove prototypes.
(avr_out_tsthi, avr_out_tstsi): New prototypes.
* config/avr/avr.c (out_tsthi, out_tstsi): Remove functions.
(avr_asm_len): Negative length now sets *plen to -length.
(compare_sign_p): Return bool instead of int.
(compare_diff_p, compare_eq_p): Ditto and make static.
(avr_out_tsthi): New function.
(avr_out_tstsi): New function.
(avr_out_compare): New function.
(adjust_insn_length): Handle ADJUST_LEN_TSTHI, ADJUST_LEN_TSTSI,
ADJUST_LEN_COMPARE.
PR target/50447


Modified:
trunk/gcc/ChangeLog
trunk/gcc/config/avr/avr-protos.h
trunk/gcc/config/avr/avr.c
trunk/gcc/config/avr/avr.md

[Bug target/50447] [avr] Better support of AND, OR, XOR and PLUS with constant integers for 16- and 32-bit values

[gjl at gcc dot gnu.org]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=50447

Georg-Johann Lay  changed:

   What|Removed |Added

 Status|NEW |RESOLVED
 Resolution||FIXED

--- Comment #4 from Georg-Johann Lay  2011-09-23 
17:11:06 UTC ---
Closed this one as fixed for 4.7 trunk.

[Bug target/50465] [avr] Use insn attribute to depict if and how instruction lengths have to be adjusted

[gjl at gcc dot gnu.org]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=50465

--- Comment #3 from Georg-Johann Lay  2011-09-26 
11:53:55 UTC ---
Author: gjl
Date: Mon Sep 26 11:53:40 2011
New Revision: 179191

URL: http://gcc.gnu.org/viewcvs?root=gcc&view=rev&rev=179191
Log:
PR target/50465
* config/avr/avr-protos.h (output_reload_insisf): Don't pass insn.
* config/avr/avr.md (*reload_insi, *reload_insf): Change call to
output_reload_insisf.
(adjust_len): Set default to "no".
Remove alternative "yes".  Add alternatives: "mov8", "mov16",
"mov32", "ashlqi", "ashrqi", "lshrqi", "ashlhi", "ashrhi",
"lshrhi", "ashlsi, "ashrsi", "lshrsi".
(*movqi, *movhi, *movsi, *ashlqi3, ashlhi3, ashlsi3,
*ashlhi3_const, *ashlsi3_const, ashrqi3, ashrhi3, ashrsi3,
*ashrhi3_const, *ashrsi3_const, *lshrqi3, lshrhi3, *lshrhi3_const,
*lshrsi3_const): Set attribute "adjust_len".
* config/avr/avr.c (output_reload_insisf): Remove parameter "insn".
(output_movsisf): Don't pass insn to output_reload_insisf.
(adjust_insn_length): Handle new alternatives to adjust_len.
Remove handling of ADJUST_LEN_YES.  Clean-up code.


Modified:
trunk/gcc/ChangeLog
trunk/gcc/config/avr/avr-protos.h
trunk/gcc/config/avr/avr.c
trunk/gcc/config/avr/avr.md

[Bug target/50465] [avr] Use insn attribute to depict if and how instruction lengths have to be adjusted

[gjl at gcc dot gnu.org]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=50465

Georg-Johann Lay  changed:

   What|Removed |Added

 Status|ASSIGNED|RESOLVED
 Resolution||FIXED

--- Comment #4 from Georg-Johann Lay  2011-09-26 
12:30:25 UTC ---
Fixed now.

[Bug target/50566] New: [avr]: Add support for better logging similar to -mdeb

[gjl at gcc dot gnu.org]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=50566

 Bug #: 50566
   Summary: [avr]: Add support for better logging similar to -mdeb
Classification: Unclassified
   Product: gcc
   Version: 4.7.0
Status: UNCONFIRMED
  Severity: enhancement
  Priority: P3
 Component: target
AssignedTo: g...@gcc.gnu.org
ReportedBy: g...@gcc.gnu.org
CC: eric.wedding...@atmel.com
Target: avr


-mdeb lets avr-gcc print log information as a file is being compiled but it's
hard to depict from the information

- what function is just being compiled
- what pass gcc is in
- ...

Forover, it would be nice to have a printf-like function to print formatted
output together with trees, RTXes, register classes, rtx codes, etc.

[Bug target/50566] [avr]: Add support for better logging similar to -mdeb

[gjl at gcc dot gnu.org]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=50566

Georg-Johann Lay  changed:

   What|Removed |Added

   Priority|P3  |P5
 Status|UNCONFIRMED |ASSIGNED
   Last reconfirmed||2011-09-29
   Target Milestone|--- |4.7.0
 Ever Confirmed|0   |1

[Bug target/50566] [avr]: Add support for better logging similar to -mdeb

[gjl at gcc dot gnu.org]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=50566

--- Comment #1 from Georg-Johann Lay  2011-09-29 
11:52:04 UTC ---
Author: gjl
Date: Thu Sep 29 11:51:59 2011
New Revision: 179344

URL: http://gcc.gnu.org/viewcvs?root=gcc&view=rev&rev=179344
Log:
PR target/50566
* config.gcc (extra_objs): Add avr-log.o for $target in:
avr-*-rtems*, avr-*-*.
* config/avr/t-avr (avr-log.o): New rule to compile...
* config/avr/avr-log.c: ...this new file.
* config/avr/avr.opt (mlog=): New option.
* config/avr/avr-protos.h (avr_edump, avr_fdump): New macros.
(avr_log_set_caller_e, avr_log_set_caller_f): New prototypes.
(avr_log_set_avr_log): New prototype.
(avr_log_t): New typedef.
(avr_log): New declaration.
* config/avr/avr.c (avr_option_override): Call avr_log_set_avr_log.


Added:
trunk/gcc/config/avr/avr-log.c
Modified:
trunk/gcc/ChangeLog
trunk/gcc/config.gcc
trunk/gcc/config/avr/avr-protos.h
trunk/gcc/config/avr/avr.c
trunk/gcc/config/avr/avr.opt
trunk/gcc/config/avr/t-avr

[Bug middle-end/50448] [4.3/4.5/4.6/4.7 Regression] Missed optimization accessing struct component with integer address

[gjl at gcc dot gnu.org]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=50448

Georg-Johann Lay  changed:

   What|Removed |Added

  Component|target  |middle-end
  Known to work||3.4.6
Summary|[avr] Missed optimization   |[4.3/4.5/4.6/4.7
   |accessing struct component  |Regression] Missed
   |with integer address|optimization accessing
   ||struct component with
   ||integer address
  Known to fail||4.7.0

--- Comment #1 from Georg-Johann Lay  2011-09-29 
15:55:05 UTC ---
As explained in http://gcc.gnu.org/ml/gcc/2011-09/msg00353.html this looks like
a middle-end flaw during tree -> RTL lowering in
explow.c:memory_address_addr_space() where the target cannot do anything about.

Changed component from TARGET to MIDDLE-END.