[gcc r14-9698] compiler: use correct size and comparison in index value overflow check
https://gcc.gnu.org/g:bd8a3eecc4edffad6e5091ae42c1cb1c1730b2ab
commit r14-9698-gbd8a3eecc4edffad6e5091ae42c1cb1c1730b2ab
Author: Ian Lance Taylor
Date: Wed Mar 27 13:37:45 2024 -0700
compiler: use correct size and comparison in index value overflow check
This has apparently been wrong since I introduced the code ten years ago.
Fixes PR go/114500
Reviewed-on: https://go-review.googlesource.com/c/gofrontend/+/574835
Diff:
---
gcc/go/gofrontend/MERGE | 2 +-
gcc/go/gofrontend/expressions.cc | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/gcc/go/gofrontend/MERGE b/gcc/go/gofrontend/MERGE
index de6e21fb3b5..50d430d5034 100644
--- a/gcc/go/gofrontend/MERGE
+++ b/gcc/go/gofrontend/MERGE
@@ -1,4 +1,4 @@
-3f597287b6b858794dabdfe1bf83b386aad18102
+98e92493db2ab7857a5934a950a830fc1f95a4e5
The first line of this file holds the git revision number of the last
merge done from the gofrontend repository.
diff --git a/gcc/go/gofrontend/expressions.cc b/gcc/go/gofrontend/expressions.cc
index 8429e553eac..238d5a56ca2 100644
--- a/gcc/go/gofrontend/expressions.cc
+++ b/gcc/go/gofrontend/expressions.cc
@@ -18790,7 +18790,7 @@ Composite_literal_expression::lower_array(Type* type)
Named_type* ntype = Type::lookup_integer_type("int");
Integer_type* inttype = ntype->integer_type();
- if (sizeof(index) <= static_cast(inttype->bits() * 8)
+ if (sizeof(index) >= static_cast(inttype->bits() / 8)
&& index >> (inttype->bits() - 1) != 0)
{
go_error_at(index_expr->location(), "index value overflow");
[gcc r14-9697] analyzer: fix ICE due to type mismatch when replaying call summary [PR114473]
https://gcc.gnu.org/g:fdd59818e2abf6043f4d45aeb157e95956c71088
commit r14-9697-gfdd59818e2abf6043f4d45aeb157e95956c71088
Author: David Malcolm
Date: Wed Mar 27 18:26:51 2024 -0400
analyzer: fix ICE due to type mismatch when replaying call summary
[PR114473]
gcc/analyzer/ChangeLog:
PR analyzer/114473
* call-summary.cc
(call_summary_replay::convert_svalue_from_summary): Assert that
the types match.
(call_summary_replay::convert_region_from_summary): Likewise.
(call_summary_replay::convert_region_from_summary_1): Add missing
cast for the deref of RK_SYMBOLIC case.
gcc/testsuite/ChangeLog:
PR analyzer/114473
* gcc.dg/analyzer/call-summaries-pr114473.c: New test.
Signed-off-by: David Malcolm
Diff:
---
gcc/analyzer/call-summary.cc | 12 +
.../gcc.dg/analyzer/call-summaries-pr114473.c | 31 ++
2 files changed, 43 insertions(+)
diff --git a/gcc/analyzer/call-summary.cc b/gcc/analyzer/call-summary.cc
index a569bb94cec..c2c9c71f79b 100644
--- a/gcc/analyzer/call-summary.cc
+++ b/gcc/analyzer/call-summary.cc
@@ -235,6 +235,11 @@ call_summary_replay::convert_svalue_from_summary (const
svalue *summary_sval)
const svalue *caller_sval = convert_svalue_from_summary_1 (summary_sval);
+ if (caller_sval)
+if (summary_sval->get_type () && caller_sval->get_type ())
+ gcc_assert (types_compatible_p (summary_sval->get_type (),
+ caller_sval->get_type ()));
+
/* Add to cache. */
add_svalue_mapping (summary_sval, caller_sval);
@@ -552,6 +557,11 @@ call_summary_replay::convert_region_from_summary (const
region *summary_reg)
const region *caller_reg = convert_region_from_summary_1 (summary_reg);
+ if (caller_reg)
+if (summary_reg->get_type () && caller_reg->get_type ())
+ gcc_assert (types_compatible_p (summary_reg->get_type (),
+ caller_reg->get_type ()));
+
/* Add to cache. */
add_region_mapping (summary_reg, caller_reg);
@@ -603,6 +613,8 @@ call_summary_replay::convert_region_from_summary_1 (const
region *summary_reg)
= get_caller_model ()->deref_rvalue (caller_ptr_sval,
NULL_TREE,
get_ctxt ());
+ caller_reg = mgr->get_cast_region (caller_reg,
+ summary_reg->get_type ());
return caller_reg;
}
break;
diff --git a/gcc/testsuite/gcc.dg/analyzer/call-summaries-pr114473.c
b/gcc/testsuite/gcc.dg/analyzer/call-summaries-pr114473.c
new file mode 100644
index 000..4598840f0df
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/analyzer/call-summaries-pr114473.c
@@ -0,0 +1,31 @@
+/* { dg-additional-options "-fanalyzer-call-summaries" } */
+
+int a;
+extern int *q[];
+
+int *
+baz (int *src)
+{
+ while (a)
+{
+ src && a;
+ return src;
+}
+}
+
+void
+bar (int **src)
+{
+ for (unsigned j = 0; j;)
+a = 0;
+ while (a)
+baz (src[0]);
+}
+
+void
+foo (void)
+{
+ bar (q);
+ baz ();
+ bar (q);
+}
[gcc r11-11296] asan: Handle poly-int sizes in ASAN_MARK [PR97696]
https://gcc.gnu.org/g:d98467091bfc23522fefd32f1253e1c9e80331d3
commit r11-11296-gd98467091bfc23522fefd32f1253e1c9e80331d3
Author: Richard Sandiford
Date: Wed Mar 27 19:26:57 2024 +
asan: Handle poly-int sizes in ASAN_MARK [PR97696]
This patch makes the expansion of IFN_ASAN_MARK let through
poly-int-sized objects. The expansion itself was already generic
enough, but the tests for the fast path were too strict.
gcc/
PR sanitizer/97696
* asan.c (asan_expand_mark_ifn): Allow the length to be a poly_int.
gcc/testsuite/
PR sanitizer/97696
* gcc.target/aarch64/sve/pr97696.c: New test.
(cherry picked from commit fca6f6fddb22b8665e840f455a7d0318d4575227)
Diff:
---
gcc/asan.c | 9
gcc/testsuite/gcc.target/aarch64/sve/pr97696.c | 29 ++
2 files changed, 33 insertions(+), 5 deletions(-)
diff --git a/gcc/asan.c b/gcc/asan.c
index ca3020f463c..2aa2be13bf6 100644
--- a/gcc/asan.c
+++ b/gcc/asan.c
@@ -3723,9 +3723,7 @@ asan_expand_mark_ifn (gimple_stmt_iterator *iter)
}
tree len = gimple_call_arg (g, 2);
- gcc_assert (tree_fits_shwi_p (len));
- unsigned HOST_WIDE_INT size_in_bytes = tree_to_shwi (len);
- gcc_assert (size_in_bytes);
+ gcc_assert (poly_int_tree_p (len));
g = gimple_build_assign (make_ssa_name (pointer_sized_int_node),
NOP_EXPR, base);
@@ -3734,9 +3732,10 @@ asan_expand_mark_ifn (gimple_stmt_iterator *iter)
tree base_addr = gimple_assign_lhs (g);
/* Generate direct emission if size_in_bytes is small. */
- if (size_in_bytes
- <= (unsigned)param_use_after_scope_direct_emission_threshold)
+ unsigned threshold = param_use_after_scope_direct_emission_threshold;
+ if (tree_fits_uhwi_p (len) && tree_to_uhwi (len) <= threshold)
{
+ unsigned HOST_WIDE_INT size_in_bytes = tree_to_uhwi (len);
const unsigned HOST_WIDE_INT shadow_size
= shadow_mem_size (size_in_bytes);
const unsigned int shadow_align
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/pr97696.c
b/gcc/testsuite/gcc.target/aarch64/sve/pr97696.c
new file mode 100644
index 000..8b7de18a07d
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/sve/pr97696.c
@@ -0,0 +1,29 @@
+/* { dg-skip-if "" { no_fsanitize_address } } */
+/* { dg-options "-fsanitize=address -fsanitize-address-use-after-scope" } */
+
+#include
+
+__attribute__((noinline, noclone)) int
+foo (char *a)
+{
+ int i, j = 0;
+ asm volatile ("" : "+r" (a) : : "memory");
+ for (i = 0; i < 12; i++)
+j += a[i];
+ return j;
+}
+
+int
+main ()
+{
+ int i, j = 0;
+ for (i = 0; i < 4; i++)
+{
+ char a[12];
+ __SVInt8_t freq;
+ __builtin_bcmp (, a, 10);
+ __builtin_memset (a, 0, sizeof (a));
+ j += foo (a);
+}
+ return j;
+}
[gcc r11-11295] aarch64: Fix vld1/st1_x4 intrinsic definitions
https://gcc.gnu.org/g:daee0409d195d346562e423da783d5d1cf8ea175
commit r11-11295-gdaee0409d195d346562e423da783d5d1cf8ea175
Author: Richard Sandiford
Date: Wed Mar 27 19:26:56 2024 +
aarch64: Fix vld1/st1_x4 intrinsic definitions
The vld1_x4 and vst1_x4 patterns use XI registers for both 64-bit and
128-bit vectors. This has the nice property that each individual
vector is within a separate 16-byte subreg of the XI, which should
reduce the number of memory spills needed. However, it means that the
64-bit vector forms must convert between the native 4x64-bit structure
layout and the padded 4x128-bit XI layout.
The vld4 and vst4 functions did this correctly. But the vld1x4 and
vst1x4 functions used a union between the native and padded layouts,
even though the layouts are different sizes.
This patch makes vld1x4 and vst1x4 use the same approach as vld4
and vst4. It also fixes some uses of variables in the user namespace.
gcc/
* config/aarch64/arm_neon.h (vld1_s8_x4, vld1_s16_x4, vld1_s32_x4):
(vld1_u8_x4, vld1_u16_x4, vld1_u32_x4, vld1_f16_x4, vld1_f32_x4):
(vld1_p8_x4, vld1_p16_x4, vld1_s64_x4, vld1_u64_x4, vld1_p64_x4):
(vld1_f64_x4): Avoid using a union of a 256-bit structure and
512-bit
XImode integer. Instead use the same approach as the vld4
intrinsics.
(vst1_s8_x4, vst1_s16_x4, vst1_s32_x4, vst1_u8_x4, vst1_u16_x4):
(vst1_u32_x4, vst1_f16_x4, vst1_f32_x4, vst1_p8_x4, vst1_p16_x4):
(vst1_s64_x4, vst1_u64_x4, vst1_p64_x4, vst1_f64_x4, vld1_bf16_x4):
(vst1_bf16_x4): Likewise for stores.
(vst1q_s8_x4, vst1q_s16_x4, vst1q_s32_x4, vst1q_u8_x4,
vst1q_u16_x4):
(vst1q_u32_x4, vst1q_f16_x4, vst1q_f32_x4, vst1q_p8_x4,
vst1q_p16_x4):
(vst1q_s64_x4, vst1q_u64_x4, vst1q_p64_x4, vst1q_f64_x4)
(vst1q_bf16_x4): Rename val parameter to __val.
Diff:
---
gcc/config/aarch64/arm_neon.h | 469 ++
1 file changed, 334 insertions(+), 135 deletions(-)
diff --git a/gcc/config/aarch64/arm_neon.h b/gcc/config/aarch64/arm_neon.h
index baa30bd5a9d..8f53f4e1559 100644
--- a/gcc/config/aarch64/arm_neon.h
+++ b/gcc/config/aarch64/arm_neon.h
@@ -16498,10 +16498,14 @@ __extension__ extern __inline int8x8x4_t
__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
vld1_s8_x4 (const int8_t *__a)
{
- union { int8x8x4_t __i; __builtin_aarch64_simd_xi __o; } __au;
- __au.__o
-= __builtin_aarch64_ld1x4v8qi ((const __builtin_aarch64_simd_qi *) __a);
- return __au.__i;
+ int8x8x4_t ret;
+ __builtin_aarch64_simd_xi __o;
+ __o = __builtin_aarch64_ld1x4v8qi ((const __builtin_aarch64_simd_qi *) __a);
+ ret.val[0] = (int8x8_t) __builtin_aarch64_get_dregxiv8qi (__o, 0);
+ ret.val[1] = (int8x8_t) __builtin_aarch64_get_dregxiv8qi (__o, 1);
+ ret.val[2] = (int8x8_t) __builtin_aarch64_get_dregxiv8qi (__o, 2);
+ ret.val[3] = (int8x8_t) __builtin_aarch64_get_dregxiv8qi (__o, 3);
+ return ret;
}
__extension__ extern __inline int8x16x4_t
@@ -16518,10 +16522,14 @@ __extension__ extern __inline int16x4x4_t
__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
vld1_s16_x4 (const int16_t *__a)
{
- union { int16x4x4_t __i; __builtin_aarch64_simd_xi __o; } __au;
- __au.__o
-= __builtin_aarch64_ld1x4v4hi ((const __builtin_aarch64_simd_hi *) __a);
- return __au.__i;
+ int16x4x4_t ret;
+ __builtin_aarch64_simd_xi __o;
+ __o = __builtin_aarch64_ld1x4v4hi ((const __builtin_aarch64_simd_hi *) __a);
+ ret.val[0] = (int16x4_t) __builtin_aarch64_get_dregxiv4hi (__o, 0);
+ ret.val[1] = (int16x4_t) __builtin_aarch64_get_dregxiv4hi (__o, 1);
+ ret.val[2] = (int16x4_t) __builtin_aarch64_get_dregxiv4hi (__o, 2);
+ ret.val[3] = (int16x4_t) __builtin_aarch64_get_dregxiv4hi (__o, 3);
+ return ret;
}
__extension__ extern __inline int16x8x4_t
@@ -16538,10 +16546,14 @@ __extension__ extern __inline int32x2x4_t
__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
vld1_s32_x4 (const int32_t *__a)
{
- union { int32x2x4_t __i; __builtin_aarch64_simd_xi __o; } __au;
- __au.__o
- = __builtin_aarch64_ld1x4v2si ((const __builtin_aarch64_simd_si *) __a);
- return __au.__i;
+ int32x2x4_t ret;
+ __builtin_aarch64_simd_xi __o;
+ __o = __builtin_aarch64_ld1x4v2si ((const __builtin_aarch64_simd_si *) __a);
+ ret.val[0] = (int32x2_t) __builtin_aarch64_get_dregxiv2si (__o, 0);
+ ret.val[1] = (int32x2_t) __builtin_aarch64_get_dregxiv2si (__o, 1);
+ ret.val[2] = (int32x2_t) __builtin_aarch64_get_dregxiv2si (__o, 2);
+ ret.val[3] = (int32x2_t) __builtin_aarch64_get_dregxiv2si (__o, 3);
+ return ret;
}
__extension__ extern __inline int32x4x4_t
@@ -16558,10 +16570,14 @@ __extension__ extern __inline uint8x8x4_t
__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
vld1_u8_x4 (const uint8_t *__a)
{
-
[gcc r14-9696] btf: Fix up btf-datasec-1.c test on x86
https://gcc.gnu.org/g:f89c83aa139521804241d21e006557ac5a421f51
commit r14-9696-gf89c83aa139521804241d21e006557ac5a421f51
Author: Jakub Jelinek
Date: Wed Mar 27 20:22:02 2024 +0100
btf: Fix up btf-datasec-1.c test on x86
> -/* The offset entry for each variable in a DATSEC should be 0 at compile
time. */
> -/* { dg-final { scan-assembler-times "0\[\t \]+\[^\n\]*bts_offset" 7 } }
*/
> +/* The offset entry for each variable in a DATSEC should contain a
label. */
> +/* { dg-final { scan-assembler-times ".4byte\[\t \]\[a-e\]\[\t
\]+\[^\n\]*bts_offset" 5 } } */
4byte is used only on some targets, what exact assembler directive is used
for 4byte unaligned data is heavily target dependent.
2024-03-27 Jakub Jelinek
* gcc.dg/debug/btf/btf-cvr-quals-1.c: Use dg-additional-options
instead of multiple dg-options.
* gcc.dg/debug/btf/btf-datasec-1.c: Likewise. Accept all supported
unaligned 4 byte assembler directives rather than assuming it must
be .4byte.
Diff:
---
gcc/testsuite/gcc.dg/debug/btf/btf-cvr-quals-1.c | 2 +-
gcc/testsuite/gcc.dg/debug/btf/btf-datasec-1.c | 8
2 files changed, 5 insertions(+), 5 deletions(-)
diff --git a/gcc/testsuite/gcc.dg/debug/btf/btf-cvr-quals-1.c
b/gcc/testsuite/gcc.dg/debug/btf/btf-cvr-quals-1.c
index 33e2f649935..b7c99bf475a 100644
--- a/gcc/testsuite/gcc.dg/debug/btf/btf-cvr-quals-1.c
+++ b/gcc/testsuite/gcc.dg/debug/btf/btf-cvr-quals-1.c
@@ -23,7 +23,7 @@
/* { dg-do compile } */
/* { dg-options "-O0 -gbtf -dA" } */
-/* { dg-options "-O0 -gbtf -gdwarf-4 -dA" { target { *-*-darwin* } } } */
+/* { dg-additional-options "-gdwarf-4" { target { *-*-darwin* } } } */
/* { dg-final { scan-assembler-times "ascii \"int.0\"\[\t
\]+\[^\n\]*btf_string" 1 } } */
diff --git a/gcc/testsuite/gcc.dg/debug/btf/btf-datasec-1.c
b/gcc/testsuite/gcc.dg/debug/btf/btf-datasec-1.c
index 8557c38c20d..782216d3cb1 100644
--- a/gcc/testsuite/gcc.dg/debug/btf/btf-datasec-1.c
+++ b/gcc/testsuite/gcc.dg/debug/btf/btf-datasec-1.c
@@ -11,16 +11,16 @@
/* { dg-do compile ) */
/* { dg-options "-O0 -gbtf -dA" } */
-/* { dg-options "-O0 -gbtf -dA -msdata=none" { target { { powerpc*-*-* } &&
ilp32 } } } */
-/* { dg-options "-O0 -gbtf -dA -msmall-data-limit=0" { target { riscv*-*-* } }
} */
-/* { dg-options "-O0 -gbtf -dA -G0" { target { nios2-*-* } } } */
+/* { dg-additional-options "-msdata=none" { target { { powerpc*-*-* } && ilp32
} } } */
+/* { dg-additional-options "-msmall-data-limit=0" { target { riscv*-*-* } } }
*/
+/* { dg-additional-options "-G0" { target { nios2-*-* } } } */
/* Check for two DATASEC entries with vlen 3, and one with vlen 1. */
/* { dg-final { scan-assembler-times "0xf03\[\t \]+\[^\n\]*btt_info" 2 } }
*/
/* { dg-final { scan-assembler-times "0xf01\[\t \]+\[^\n\]*btt_info" 1 } }
*/
/* The offset entry for each variable in a DATSEC should contain a label. */
-/* { dg-final { scan-assembler-times ".4byte\[\t \]\[a-e\]\[\t
\]+\[^\n\]*bts_offset" 5 } } */
+/* { dg-final { scan-assembler-times
"(?:(?:\\.4byte|\\.long|data4\\.ua|\\.ualong|\\.uaword|\\.dword|long|dc\\.l|\\.word)\[\t
\]|\\.vbyte\t4,\[\t \]?)\[a-e\]\[\t \]+\[^\n\]*bts_offset" 5 } } */
/* { dg-final { scan-assembler-times "my_cstruct\[\t \]+\[^\n\]*bts_offset" 1
} } */
/* { dg-final { scan-assembler-times "bigarr\[\t \]+\[^\n\]*bts_offset" 1 } }
*/
[gcc r14-9695] gcc/testsuite/go.test: update issue16016
https://gcc.gnu.org/g:9ff034fcff8ccab6eb82bf2cd36e2d24b2df9b78
commit r14-9695-g9ff034fcff8ccab6eb82bf2cd36e2d24b2df9b78
Author: Ian Lance Taylor
Date: Wed Mar 27 11:44:42 2024 -0700
gcc/testsuite/go.test: update issue16016
This backports https://go.dev/cl/574536 into the GCC testsuite.
Fixes PR go/114453
Diff:
---
gcc/testsuite/go.test/test/fixedbugs/issue16016.go | 18 --
1 file changed, 16 insertions(+), 2 deletions(-)
diff --git a/gcc/testsuite/go.test/test/fixedbugs/issue16016.go
b/gcc/testsuite/go.test/test/fixedbugs/issue16016.go
index e738e1dba0e..b1947f5548d 100644
--- a/gcc/testsuite/go.test/test/fixedbugs/issue16016.go
+++ b/gcc/testsuite/go.test/test/fixedbugs/issue16016.go
@@ -6,7 +6,10 @@
package main
-import "time"
+import (
+ "runtime"
+ "time"
+)
type T struct{}
@@ -24,8 +27,19 @@ type Q interface {
}
func main() {
+ var count = 1
+ if runtime.Compiler == "gccgo" {
+ // On targets without split-stack libgo allocates
+ // a large stack for each goroutine. On 32-bit
+ // systems this test can run out of memory.
+ const intSize = 32 << (^uint(0) >> 63) // 32 or 64
+ if intSize < 64 {
+ count = 100
+ }
+ }
+
var q Q = {{}}
- for i := 0; i < 1; i++ {
+ for i := 0; i < count; i++ {
go func() {
defer q.Foo([]interface{}{"meow"})
time.Sleep(100 * time.Millisecond)
[gcc r14-9694] c-family: Cast __atomic_load_*/__atomic_exchange_* result to _BitInt rather then VCE it [PR114469]
https://gcc.gnu.org/g:4b0443361a82ef89d519c9ae6d4d3bec74376e8f
commit r14-9694-g4b0443361a82ef89d519c9ae6d4d3bec74376e8f
Author: Jakub Jelinek
Date: Wed Mar 27 19:38:06 2024 +0100
c-family: Cast __atomic_load_*/__atomic_exchange_* result to _BitInt rather
then VCE it [PR114469]
As written in the PR, torture/bitint-64.c test fails with -O2 -flto
and the reason is that on _BitInt arches where the padding bits
are undefined, the padding bits in the _Atomic vars are also undefined,
but when __atomic_load or __atomic_exchange on a _BitInt _Atomic variable
with some padding bits is lowered into __atomic_load_{1,2,4,8,16} or
__atomic_exchange_*, the mode precision unsigned result is VIEW_CONVERT_EXPR
converted to _BitInt and because of the VCE nothing actually sign/zero
extends it as needed for later uses - the var is no longer addressable and
expansion assumes such automatic vars are properly extended.
The following patch fixes that by using NOP_EXPR on it (the
VIEW_CONVERT_EXPR after it will then be optimized away during
gimplification, didn't want to repeat it in the code as else result = build1
(VIEW_CONVERT_EXPR, ...); twice.
2024-03-27 Jakub Jelinek
PR tree-optimization/114469
* c-common.cc (resolve_overloaded_builtin): For _BitInt result
on !extended targets convert result to the _BitInt type before
using VIEW_CONVERT_EXPR.
Diff:
---
gcc/c-family/c-common.cc | 14 +-
1 file changed, 13 insertions(+), 1 deletion(-)
diff --git a/gcc/c-family/c-common.cc b/gcc/c-family/c-common.cc
index 48844b17f77..6fa8243b02b 100644
--- a/gcc/c-family/c-common.cc
+++ b/gcc/c-family/c-common.cc
@@ -8461,7 +8461,19 @@ resolve_overloaded_builtin (location_t loc, tree
function,
if (new_return)
{
/* Cast function result from I{1,2,4,8,16} to the required type. */
- result = build1 (VIEW_CONVERT_EXPR, TREE_TYPE (new_return), result);
+ if (TREE_CODE (TREE_TYPE (new_return)) == BITINT_TYPE)
+ {
+ struct bitint_info info;
+ unsigned prec = TYPE_PRECISION (TREE_TYPE (new_return));
+ targetm.c.bitint_type_info (prec, );
+ if (!info.extended)
+ /* For _BitInt which has the padding bits undefined
+convert to the _BitInt type rather than VCE to force
+zero or sign extension. */
+ result = build1 (NOP_EXPR, TREE_TYPE (new_return), result);
+ }
+ result
+ = build1 (VIEW_CONVERT_EXPR, TREE_TYPE (new_return), result);
result = build2 (MODIFY_EXPR, TREE_TYPE (new_return), new_return,
result);
TREE_SIDE_EFFECTS (result) = 1;
[gcc r14-9693] compiler: initialize local variable in lower_method_expression
https://gcc.gnu.org/g:f85d3362cdb4bab611508dd9a38d9015c02ff7ca commit r14-9693-gf85d3362cdb4bab611508dd9a38d9015c02ff7ca Author: Ian Lance Taylor Date: Tue Mar 26 13:00:03 2024 -0700 compiler: initialize local variable in lower_method_expression Fixes PR go/114463 Reviewed-on: https://go-review.googlesource.com/c/gofrontend/+/574476 Diff: --- gcc/go/gofrontend/MERGE | 2 +- gcc/go/gofrontend/expressions.cc | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/gcc/go/gofrontend/MERGE b/gcc/go/gofrontend/MERGE index 73cb095322c..de6e21fb3b5 100644 --- a/gcc/go/gofrontend/MERGE +++ b/gcc/go/gofrontend/MERGE @@ -1,4 +1,4 @@ -e15a14e410b8fc5d28012d5b313cb6c8476c7df9 +3f597287b6b858794dabdfe1bf83b386aad18102 The first line of this file holds the git revision number of the last merge done from the gofrontend repository. diff --git a/gcc/go/gofrontend/expressions.cc b/gcc/go/gofrontend/expressions.cc index 51ff0206129..8429e553eac 100644 --- a/gcc/go/gofrontend/expressions.cc +++ b/gcc/go/gofrontend/expressions.cc @@ -9059,7 +9059,7 @@ Selector_expression::lower_method_expression(Gogo* gogo) Named_type* nt = type->named_type(); Struct_type* st = type->struct_type(); - bool is_ambiguous; + bool is_ambiguous = false; Method* method = NULL; if (nt != NULL) method = nt->method_function(name, _ambiguous);
[gcc r12-10296] asan: Handle poly-int sizes in ASAN_MARK [PR97696]
https://gcc.gnu.org/g:51e1629bc11f0ae4b8050712b26521036ed360aa
commit r12-10296-g51e1629bc11f0ae4b8050712b26521036ed360aa
Author: Richard Sandiford
Date: Wed Mar 27 17:38:09 2024 +
asan: Handle poly-int sizes in ASAN_MARK [PR97696]
This patch makes the expansion of IFN_ASAN_MARK let through
poly-int-sized objects. The expansion itself was already generic
enough, but the tests for the fast path were too strict.
gcc/
PR sanitizer/97696
* asan.cc (asan_expand_mark_ifn): Allow the length to be a poly_int.
gcc/testsuite/
PR sanitizer/97696
* gcc.target/aarch64/sve/pr97696.c: New test.
(cherry picked from commit fca6f6fddb22b8665e840f455a7d0318d4575227)
Diff:
---
gcc/asan.cc| 9
gcc/testsuite/gcc.target/aarch64/sve/pr97696.c | 29 ++
2 files changed, 33 insertions(+), 5 deletions(-)
diff --git a/gcc/asan.cc b/gcc/asan.cc
index 20e5ef9d378..72d1ef28be8 100644
--- a/gcc/asan.cc
+++ b/gcc/asan.cc
@@ -3746,9 +3746,7 @@ asan_expand_mark_ifn (gimple_stmt_iterator *iter)
}
tree len = gimple_call_arg (g, 2);
- gcc_assert (tree_fits_shwi_p (len));
- unsigned HOST_WIDE_INT size_in_bytes = tree_to_shwi (len);
- gcc_assert (size_in_bytes);
+ gcc_assert (poly_int_tree_p (len));
g = gimple_build_assign (make_ssa_name (pointer_sized_int_node),
NOP_EXPR, base);
@@ -3757,9 +3755,10 @@ asan_expand_mark_ifn (gimple_stmt_iterator *iter)
tree base_addr = gimple_assign_lhs (g);
/* Generate direct emission if size_in_bytes is small. */
- if (size_in_bytes
- <= (unsigned)param_use_after_scope_direct_emission_threshold)
+ unsigned threshold = param_use_after_scope_direct_emission_threshold;
+ if (tree_fits_uhwi_p (len) && tree_to_uhwi (len) <= threshold)
{
+ unsigned HOST_WIDE_INT size_in_bytes = tree_to_uhwi (len);
const unsigned HOST_WIDE_INT shadow_size
= shadow_mem_size (size_in_bytes);
const unsigned int shadow_align
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/pr97696.c
b/gcc/testsuite/gcc.target/aarch64/sve/pr97696.c
new file mode 100644
index 000..8b7de18a07d
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/sve/pr97696.c
@@ -0,0 +1,29 @@
+/* { dg-skip-if "" { no_fsanitize_address } } */
+/* { dg-options "-fsanitize=address -fsanitize-address-use-after-scope" } */
+
+#include
+
+__attribute__((noinline, noclone)) int
+foo (char *a)
+{
+ int i, j = 0;
+ asm volatile ("" : "+r" (a) : : "memory");
+ for (i = 0; i < 12; i++)
+j += a[i];
+ return j;
+}
+
+int
+main ()
+{
+ int i, j = 0;
+ for (i = 0; i < 4; i++)
+{
+ char a[12];
+ __SVInt8_t freq;
+ __builtin_bcmp (, a, 10);
+ __builtin_memset (a, 0, sizeof (a));
+ j += foo (a);
+}
+ return j;
+}
[gcc r14-9692] combine: Don't combine if I2 does not change
https://gcc.gnu.org/g:839bc42772ba7af66af3bd16efed4a69511312ae
commit r14-9692-g839bc42772ba7af66af3bd16efed4a69511312ae
Author: Segher Boessenkool
Date: Wed Mar 27 14:09:52 2024 +
combine: Don't combine if I2 does not change
In some cases combine will "combine" an I2 and I3, but end up putting
exactly the same thing back as I2 as was there before. This is never
progress, so we shouldn't do it, it will lead to oscillating behaviour
and the like.
If we want to canonicalise things, that's fine, but this is not the
way to do it.
2024-03-27 Segher Boessenkool
PR rtl-optimization/101523
* combine.cc (try_combine): Don't do a 2-insn combination if
it does not in fact change I2.
Diff:
---
gcc/combine.cc | 11 +++
1 file changed, 11 insertions(+)
diff --git a/gcc/combine.cc b/gcc/combine.cc
index a4479f8d836..745391016d0 100644
--- a/gcc/combine.cc
+++ b/gcc/combine.cc
@@ -4186,6 +4186,17 @@ try_combine (rtx_insn *i3, rtx_insn *i2, rtx_insn *i1,
rtx_insn *i0,
adjust_for_new_dest (i3);
}
+ /* If I2 didn't change, this is not a combination (but a simplification or
+ canonicalisation with context), which should not be done here. Doing
+ it here explodes the algorithm. Don't. */
+ if (rtx_equal_p (newi2pat, PATTERN (i2)))
+{
+ if (dump_file)
+ fprintf (dump_file, "i2 didn't change, not doing this\n");
+ undo_all ();
+ return 0;
+}
+
/* We now know that we can do this combination. Merge the insns and
update the status of registers and LOG_LINKS. */
[gcc r13-8501] asan: Handle poly-int sizes in ASAN_MARK [PR97696]
https://gcc.gnu.org/g:86b80b049167d28a9ef43aebdfbb80ae5deb0888
commit r13-8501-g86b80b049167d28a9ef43aebdfbb80ae5deb0888
Author: Richard Sandiford
Date: Wed Mar 27 15:30:19 2024 +
asan: Handle poly-int sizes in ASAN_MARK [PR97696]
This patch makes the expansion of IFN_ASAN_MARK let through
poly-int-sized objects. The expansion itself was already generic
enough, but the tests for the fast path were too strict.
gcc/
PR sanitizer/97696
* asan.cc (asan_expand_mark_ifn): Allow the length to be a poly_int.
gcc/testsuite/
PR sanitizer/97696
* gcc.target/aarch64/sve/pr97696.c: New test.
(cherry picked from commit fca6f6fddb22b8665e840f455a7d0318d4575227)
Diff:
---
gcc/asan.cc| 9
gcc/testsuite/gcc.target/aarch64/sve/pr97696.c | 29 ++
2 files changed, 33 insertions(+), 5 deletions(-)
diff --git a/gcc/asan.cc b/gcc/asan.cc
index df732c02150..1a443afedc0 100644
--- a/gcc/asan.cc
+++ b/gcc/asan.cc
@@ -3801,9 +3801,7 @@ asan_expand_mark_ifn (gimple_stmt_iterator *iter)
}
tree len = gimple_call_arg (g, 2);
- gcc_assert (tree_fits_shwi_p (len));
- unsigned HOST_WIDE_INT size_in_bytes = tree_to_shwi (len);
- gcc_assert (size_in_bytes);
+ gcc_assert (poly_int_tree_p (len));
g = gimple_build_assign (make_ssa_name (pointer_sized_int_node),
NOP_EXPR, base);
@@ -3812,9 +3810,10 @@ asan_expand_mark_ifn (gimple_stmt_iterator *iter)
tree base_addr = gimple_assign_lhs (g);
/* Generate direct emission if size_in_bytes is small. */
- if (size_in_bytes
- <= (unsigned)param_use_after_scope_direct_emission_threshold)
+ unsigned threshold = param_use_after_scope_direct_emission_threshold;
+ if (tree_fits_uhwi_p (len) && tree_to_uhwi (len) <= threshold)
{
+ unsigned HOST_WIDE_INT size_in_bytes = tree_to_uhwi (len);
const unsigned HOST_WIDE_INT shadow_size
= shadow_mem_size (size_in_bytes);
const unsigned int shadow_align
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/pr97696.c
b/gcc/testsuite/gcc.target/aarch64/sve/pr97696.c
new file mode 100644
index 000..8b7de18a07d
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/sve/pr97696.c
@@ -0,0 +1,29 @@
+/* { dg-skip-if "" { no_fsanitize_address } } */
+/* { dg-options "-fsanitize=address -fsanitize-address-use-after-scope" } */
+
+#include
+
+__attribute__((noinline, noclone)) int
+foo (char *a)
+{
+ int i, j = 0;
+ asm volatile ("" : "+r" (a) : : "memory");
+ for (i = 0; i < 12; i++)
+j += a[i];
+ return j;
+}
+
+int
+main ()
+{
+ int i, j = 0;
+ for (i = 0; i < 4; i++)
+{
+ char a[12];
+ __SVInt8_t freq;
+ __builtin_bcmp (, a, 10);
+ __builtin_memset (a, 0, sizeof (a));
+ j += foo (a);
+}
+ return j;
+}
[gcc r14-9691] docs: Use @var{S} etc. in Spec File invoke.texi documentation
https://gcc.gnu.org/g:db41057a94fe6cd556b3beedc0f5088ea485f950
commit r14-9691-gdb41057a94fe6cd556b3beedc0f5088ea485f950
Author: Jakub Jelinek
Date: Wed Mar 27 15:41:59 2024 +0100
docs: Use @var{S} etc. in Spec File invoke.texi documentation
We got internally a question about the Spec File syntax, misunderstanding
what is the literal syntax and what are the placeholder variables in
the syntax descriptions.
The following patch attempts to use @var{S} etc. instead of just S
to clarify it stands for any option (or start of option etc.) rather
than literal S, say in %{S:X}. At least in HTML documentation it
then uses italics.
2024-03-27 Jakub Jelinek
* doc/invoke.texi (Spec Files): Use @var{S} instead of S,
@var{X} instead of X etc. for other placeholders.
Diff:
---
gcc/doc/invoke.texi | 94 ++---
1 file changed, 47 insertions(+), 47 deletions(-)
diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi
index f6c8d6fc0e1..c584664e168 100644
--- a/gcc/doc/invoke.texi
+++ b/gcc/doc/invoke.texi
@@ -36798,17 +36798,17 @@ Substitute the variable part of a matched option.
See below.
Note that each comma in the substituted string is replaced by
a single space.
-@item %S
-Similar to @samp{%@var{S}
+Similar to @samp{%<@var{S}}, but keep @code{-@var{S}} in the GCC command line.
@item %:@var{function}(@var{args})
Call the named function @var{function}, passing it @var{args}.
@@ -36992,47 +36992,47 @@ otherwise.
@end smallexample
@end table
-@item %@{S@}
-Substitutes the @code{-S} switch, if that switch is given to GCC@.
+@item %@{@var{S}@}
+Substitutes the @code{-@var{S}} switch, if that switch is given to GCC@.
If that switch is not specified, this substitutes nothing. Note that
the leading dash is omitted when specifying this option, and it is
automatically inserted if the substitution is performed. Thus the spec
string @samp{%@{foo@}} matches the command-line option @option{-foo}
and outputs the command-line option @option{-foo}.
-@item %W@{S@}
-Like %@{@code{S}@} but mark last argument supplied within as a file to be
+@item %W@{@var{S}@}
+Like %@{@code{@var{S}}@} but mark last argument supplied within as a file to be
deleted on failure.
-@item %@@@{S@}
-Like %@{@code{S}@} but puts the result into a @code{FILE} and substitutes
+@item %@@@{@var{S}@}
+Like %@{@code{@var{S}}@} but puts the result into a @code{FILE} and substitutes
@code{@@FILE} if an @code{@@file} argument has been supplied.
-@item %@{S*@}
+@item %@{@var{S}*@}
Substitutes all the switches specified to GCC whose names start
-with @code{-S}, but which also take an argument. This is used for
+with @code{-@var{S}}, but which also take an argument. This is used for
switches like @option{-o}, @option{-D}, @option{-I}, etc.
GCC considers @option{-o foo} as being
one switch whose name starts with @samp{o}. %@{o*@} substitutes this
text, including the space. Thus two arguments are generated.
-@item %@{S**@}
-Like %@{@code{S}*@}, but preserve order of @code{S} and @code{T} options
-(the order of @code{S} and @code{T} in the spec is not significant).
+@item %@{@var{S}*&@var{T}*@}
+Like %@{@code{@var{S}}*@}, but preserve order of @code{@var{S}} and
@code{@var{T}} options
+(the order of @code{@var{S}} and @code{@var{T}} in the spec is not
significant).
There can be any number of ampersand-separated variables; for each the
wild card is optional. Useful for CPP as @samp{%@{D***@}}.
-@item %@{S:X@}
-Substitutes @code{X}, if the @option{-S} switch is given to GCC@.
+@item %@{@var{S}:@var{X}@}
+Substitutes @code{@var{X}}, if the @option{-@var{S}} switch is given to GCC@.
-@item %@{!S:X@}
-Substitutes @code{X}, if the @option{-S} switch is @emph{not} given to GCC@.
+@item %@{!@var{S}:@var{X}@}
+Substitutes @code{@var{X}}, if the @option{-@var{S}} switch is @emph{not}
given to GCC@.
-@item %@{S*:X@}
-Substitutes @code{X} if one or more switches whose names start with
-@code{-S} are specified to GCC@. Normally @code{X} is substituted only
+@item %@{@var{S}*:@var{X}@}
+Substitutes @code{@var{X}} if one or more switches whose names start with
+@code{-@var{S}} are specified to GCC@. Normally @code{@var{X}} is substituted
only
once, no matter how many such switches appeared. However, if @code{%*}
-appears somewhere in @code{X}, then @code{X} is substituted once
+appears somewhere in @code{@var{X}}, then @code{@var{X}} is substituted once
for each matching switch, with the @code{%*} replaced by the part of
that switch matching the @code{*}.
@@ -37053,23 +37053,23 @@ when matching an option like @option{-mcu=newchip}
produces:
--script=newchip/memory.ld
@end smallexample
-@item %@{.S:X@}
-Substitutes @code{X}, if processing a file with suffix @code{S}.
+@item %@{.@var{S}:@var{X}@}
+Substitutes @code{@var{X}}, if processing a file with suffix @code{@var{S}}.
-@item %@{!.S:X@}
[gcc r14-9690] libstdc++: Add masked ++/-- implementation for sizeof < 16
https://gcc.gnu.org/g:a6c630c314b099f64d79055964d88b257459cf13
commit r14-9690-ga6c630c314b099f64d79055964d88b257459cf13
Author: Matthias Kretz
Date: Wed Mar 27 13:41:25 2024 +0100
libstdc++: Add masked ++/-- implementation for sizeof < 16
This resolves further failures (-Wreturn-type warnings) and test
failures for where-* tests targeting AVX-512.
Signed-off-by: Matthias Kretz
libstdc++-v3/ChangeLog:
* include/experimental/bits/simd_x86.h (_S_masked_unary):
Cast inputs < 16 bytes to 16 byte vectors before calling the
right subtraction builtin. Before returning, truncate to the
return vector type.
Diff:
---
libstdc++-v3/include/experimental/bits/simd_x86.h | 24 +--
1 file changed, 14 insertions(+), 10 deletions(-)
diff --git a/libstdc++-v3/include/experimental/bits/simd_x86.h
b/libstdc++-v3/include/experimental/bits/simd_x86.h
index 6b414486fee..517c4b4a5be 100644
--- a/libstdc++-v3/include/experimental/bits/simd_x86.h
+++ b/libstdc++-v3/include/experimental/bits/simd_x86.h
@@ -3508,6 +3508,9 @@ template
#ifdef __clang__
return __movm<_Np, _Tp>(__k._M_data) ? __v._M_data - __pm_one :
__v._M_data;
#else // __clang__
+ using _TV = __vector_type_t<_Tp, _Np>;
+ constexpr size_t __bytes = sizeof(__v) < 16 ? 16 : sizeof(__v);
+ constexpr size_t __width = __bytes / sizeof(_Tp);
if constexpr (is_integral_v<_Tp>)
{
constexpr bool __lp64 = sizeof(long) == sizeof(long long);
@@ -3517,11 +3520,11 @@ template
std::conditional_t<__lp64, long long, int>,
std::conditional_t<
std::is_same_v<_Ip, signed char>, char, _Ip>>;
- const auto __value = __vector_bitcast<_Up>(__v._M_data);
+ const auto __value = __intrin_bitcast<__vector_type_t<_Up,
__width>>(__v._M_data);
#define _GLIBCXX_SIMD_MASK_SUB(_Sizeof, _Width, _Instr)
\
- if constexpr (sizeof(_Tp) == _Sizeof && sizeof(__v) == _Width)
\
-return __vector_bitcast<_Tp>(__builtin_ia32_##_Instr##_mask(__value,
\
-__vector_broadcast<_Np>(_Up(__pm_one)), __value, __k._M_data))
+ if constexpr (sizeof(_Tp) == _Sizeof && sizeof(__value) == _Width)
\
+return __intrin_bitcast<_TV>(__builtin_ia32_##_Instr##_mask(__value,
\
+__vector_broadcast<__width>(_Up(__pm_one)), __value, __k._M_data))
_GLIBCXX_SIMD_MASK_SUB(1, 64, psubb512);
_GLIBCXX_SIMD_MASK_SUB(1, 32, psubb256);
_GLIBCXX_SIMD_MASK_SUB(1, 16, psubb128);
@@ -3538,16 +3541,17 @@ template
}
else
{
+ const auto __value = __intrin_bitcast<__vector_type_t<_Tp,
__width>>(__v._M_data);
#define _GLIBCXX_SIMD_MASK_SUB_512(_Sizeof, _Width, _Instr)
\
- if constexpr (sizeof(_Tp) == _Sizeof && sizeof(__v) == _Width)
\
+ if constexpr (sizeof(_Tp) == _Sizeof && sizeof(__value) == _Width)
\
return __builtin_ia32_##_Instr##_mask(
\
-__v._M_data, __vector_broadcast<_Np>(_Tp(__pm_one)), __v._M_data, \
+__value, __vector_broadcast<__width>(_Tp(__pm_one)), __value, \
__k._M_data, _MM_FROUND_CUR_DIRECTION)
#define _GLIBCXX_SIMD_MASK_SUB(_Sizeof, _Width, _Instr)
\
- if constexpr (sizeof(_Tp) == _Sizeof && sizeof(__v) == _Width)
\
-return __builtin_ia32_##_Instr##_mask(
\
-__v._M_data, __vector_broadcast<_Np>(_Tp(__pm_one)), __v._M_data, \
-__k._M_data)
+ if constexpr (sizeof(_Tp) == _Sizeof && sizeof(__value) == _Width)
\
+return __intrin_bitcast<_TV>(__builtin_ia32_##_Instr##_mask(
\
+__value, __vector_broadcast<__width>(_Tp(__pm_one)), __value, \
+__k._M_data))
_GLIBCXX_SIMD_MASK_SUB_512(4, 64, subps512);
_GLIBCXX_SIMD_MASK_SUB(4, 32, subps256);
_GLIBCXX_SIMD_MASK_SUB(4, 16, subps128);
[gcc r14-9689] libstdc++: Fix call signature of builtins from masked ++/--
https://gcc.gnu.org/g:0ac2c0f0687b321ab54de271d788b4e0a287b4e2
commit r14-9689-g0ac2c0f0687b321ab54de271d788b4e0a287b4e2
Author: Matthias Kretz
Date: Wed Mar 27 08:49:43 2024 +0100
libstdc++: Fix call signature of builtins from masked ++/--
This resolves failures in the "expensive" where-* test of check-simd
when targeting AVX-512.
Signed-off-by: Matthias Kretz
libstdc++-v3/ChangeLog:
* include/experimental/bits/simd_x86.h (_S_masked_unary): Call
the 4- and 8-byte variants of __builtin_ia32_subp[ds] without
rounding direction argument.
Diff:
---
libstdc++-v3/include/experimental/bits/simd_x86.h | 12 +---
1 file changed, 9 insertions(+), 3 deletions(-)
diff --git a/libstdc++-v3/include/experimental/bits/simd_x86.h
b/libstdc++-v3/include/experimental/bits/simd_x86.h
index 16b207be2a3..6b414486fee 100644
--- a/libstdc++-v3/include/experimental/bits/simd_x86.h
+++ b/libstdc++-v3/include/experimental/bits/simd_x86.h
@@ -3538,17 +3538,23 @@ template
}
else
{
-#define _GLIBCXX_SIMD_MASK_SUB(_Sizeof, _Width, _Instr)
\
+#define _GLIBCXX_SIMD_MASK_SUB_512(_Sizeof, _Width, _Instr)
\
if constexpr (sizeof(_Tp) == _Sizeof && sizeof(__v) == _Width)
\
return __builtin_ia32_##_Instr##_mask(
\
__v._M_data, __vector_broadcast<_Np>(_Tp(__pm_one)), __v._M_data, \
__k._M_data, _MM_FROUND_CUR_DIRECTION)
- _GLIBCXX_SIMD_MASK_SUB(4, 64, subps512);
+#define _GLIBCXX_SIMD_MASK_SUB(_Sizeof, _Width, _Instr)
\
+ if constexpr (sizeof(_Tp) == _Sizeof && sizeof(__v) == _Width)
\
+return __builtin_ia32_##_Instr##_mask(
\
+__v._M_data, __vector_broadcast<_Np>(_Tp(__pm_one)), __v._M_data, \
+__k._M_data)
+ _GLIBCXX_SIMD_MASK_SUB_512(4, 64, subps512);
_GLIBCXX_SIMD_MASK_SUB(4, 32, subps256);
_GLIBCXX_SIMD_MASK_SUB(4, 16, subps128);
- _GLIBCXX_SIMD_MASK_SUB(8, 64, subpd512);
+ _GLIBCXX_SIMD_MASK_SUB_512(8, 64, subpd512);
_GLIBCXX_SIMD_MASK_SUB(8, 32, subpd256);
_GLIBCXX_SIMD_MASK_SUB(8, 16, subpd128);
+#undef _GLIBCXX_SIMD_MASK_SUB_512
#undef _GLIBCXX_SIMD_MASK_SUB
}
#endif // __clang__
[gcc r14-9688] libstdc++: add ARM SVE support to std::experimental::simd
https://gcc.gnu.org/g:9ac3119fec81fb64d11dee8f853145f937389366
commit r14-9688-g9ac3119fec81fb64d11dee8f853145f937389366
Author: Srinivas Yadav Singanaboina
Date: Sat Mar 16 19:04:35 2024 +
libstdc++: add ARM SVE support to std::experimental::simd
libstdc++-v3/ChangeLog:
* include/Makefile.am: Add simd_sve.h.
* include/Makefile.in: Add simd_sve.h.
* include/experimental/bits/simd.h: Add new SveAbi.
* include/experimental/bits/simd_builtin.h: Use
__no_sve_deduce_t to support existing Neon Abi.
* include/experimental/bits/simd_converter.h: Convert
sequentially when sve is available.
* include/experimental/bits/simd_detail.h: Define sve
specific macro.
* include/experimental/bits/simd_math.h: Fallback frexp
to execute sequntially when sve is available, to handle
fixed_size_simd return type that always uses sve.
* include/experimental/simd: Include bits/simd_sve.h.
* testsuite/experimental/simd/tests/bits/main.h: Enable
testing for sve128, sve256, sve512.
* include/experimental/bits/simd_sve.h: New file.
Signed-off-by: Srinivas Yadav Singanaboina
Diff:
---
libstdc++-v3/include/Makefile.am |1 +
libstdc++-v3/include/Makefile.in |1 +
libstdc++-v3/include/experimental/bits/simd.h | 135 +-
.../include/experimental/bits/simd_builtin.h | 180 +-
.../include/experimental/bits/simd_converter.h | 57 +-
.../include/experimental/bits/simd_detail.h| 12 +-
libstdc++-v3/include/experimental/bits/simd_math.h | 15 +-
libstdc++-v3/include/experimental/bits/simd_sve.h | 1852
libstdc++-v3/include/experimental/simd |3 +
.../testsuite/experimental/simd/tests/bits/main.h |3 +
10 files changed, 2155 insertions(+), 104 deletions(-)
diff --git a/libstdc++-v3/include/Makefile.am b/libstdc++-v3/include/Makefile.am
index cb902de36ae..422a0f4bd0a 100644
--- a/libstdc++-v3/include/Makefile.am
+++ b/libstdc++-v3/include/Makefile.am
@@ -835,6 +835,7 @@ experimental_bits_headers = \
${experimental_bits_srcdir}/simd_neon.h \
${experimental_bits_srcdir}/simd_ppc.h \
${experimental_bits_srcdir}/simd_scalar.h \
+ ${experimental_bits_srcdir}/simd_sve.h \
${experimental_bits_srcdir}/simd_x86.h \
${experimental_bits_srcdir}/simd_x86_conversions.h \
${experimental_bits_srcdir}/string_view.tcc \
diff --git a/libstdc++-v3/include/Makefile.in b/libstdc++-v3/include/Makefile.in
index 9357087acb4..9fd4ab4848c 100644
--- a/libstdc++-v3/include/Makefile.in
+++ b/libstdc++-v3/include/Makefile.in
@@ -1181,6 +1181,7 @@ experimental_bits_headers = \
${experimental_bits_srcdir}/simd_neon.h \
${experimental_bits_srcdir}/simd_ppc.h \
${experimental_bits_srcdir}/simd_scalar.h \
+ ${experimental_bits_srcdir}/simd_sve.h \
${experimental_bits_srcdir}/simd_x86.h \
${experimental_bits_srcdir}/simd_x86_conversions.h \
${experimental_bits_srcdir}/string_view.tcc \
diff --git a/libstdc++-v3/include/experimental/bits/simd.h
b/libstdc++-v3/include/experimental/bits/simd.h
index 974377c6798..03c2e17a326 100644
--- a/libstdc++-v3/include/experimental/bits/simd.h
+++ b/libstdc++-v3/include/experimental/bits/simd.h
@@ -39,12 +39,16 @@
#include
#include
#include
+#include
#if _GLIBCXX_SIMD_X86INTRIN
#include
#elif _GLIBCXX_SIMD_HAVE_NEON
#include
#endif
+#if _GLIBCXX_SIMD_HAVE_SVE
+#include
+#endif
/** @ingroup ts_simd
* @{
@@ -83,6 +87,12 @@ using __m512d [[__gnu__::__vector_size__(64)]] = double;
using __m512i [[__gnu__::__vector_size__(64)]] = long long;
#endif
+#if _GLIBCXX_SIMD_HAVE_SVE
+constexpr inline int __sve_vectorized_size_bytes = __ARM_FEATURE_SVE_BITS / 8;
+#else
+constexpr inline int __sve_vectorized_size_bytes = 0;
+#endif
+
namespace simd_abi {
// simd_abi forward declarations {{{
// implementation details:
@@ -108,6 +118,9 @@ template
template
struct _VecBltnBtmsk;
+template
+ struct _SveAbi;
+
template
using _VecN = _VecBuiltin;
@@ -123,6 +136,9 @@ template
template
using _Neon = _VecBuiltin<_UsedBytes>;
+template
+ using _Sve = _SveAbi<_UsedBytes, __sve_vectorized_size_bytes>;
+
// implementation-defined:
using __sse = _Sse<>;
using __avx = _Avx<>;
@@ -130,6 +146,7 @@ using __avx512 = _Avx512<>;
using __neon = _Neon<>;
using __neon128 = _Neon<16>;
using __neon64 = _Neon<8>;
+using __sve = _Sve<>;
// standard:
template
@@ -250,6 +267,9 @@ constexpr inline bool __support_neon_float =
false;
#endif
+constexpr inline bool __have_sve = _GLIBCXX_SIMD_HAVE_SVE;
+constexpr inline bool __have_sve2 = _GLIBCXX_SIMD_HAVE_SVE2;
+
#ifdef _ARCH_PWR10
constexpr inline bool __have_power10vec = true;
#else
@@ -356,12 +376,14 @@ namespace
[gcc r14-9687] tree-optimization/114057 - handle BB reduction remain defs as LIVE
https://gcc.gnu.org/g:0b02da5b99e89347f5f8bf875ec8318f84adff18
commit r14-9687-g0b02da5b99e89347f5f8bf875ec8318f84adff18
Author: Richard Biener
Date: Wed Mar 27 11:37:16 2024 +0100
tree-optimization/114057 - handle BB reduction remain defs as LIVE
The following makes sure to record the scalars we add to the BB
reduction vectorization result as scalar uses for the purpose of
computing live lanes. This restores vectorization in the
bondfree.c TU of 435.gromacs.
PR tree-optimization/114057
* tree-vect-slp.cc (vect_bb_slp_mark_live_stmts): Mark
BB reduction remain defs as scalar uses.
Diff:
---
gcc/tree-vect-slp.cc | 13 ++---
1 file changed, 10 insertions(+), 3 deletions(-)
diff --git a/gcc/tree-vect-slp.cc b/gcc/tree-vect-slp.cc
index 23f9593191a..f57684ca685 100644
--- a/gcc/tree-vect-slp.cc
+++ b/gcc/tree-vect-slp.cc
@@ -6646,8 +6646,14 @@ vect_bb_slp_mark_live_stmts (bb_vec_info bb_vinfo)
auto_vec worklist;
for (slp_instance instance : bb_vinfo->slp_instances)
-if (!visited.add (SLP_INSTANCE_TREE (instance)))
- worklist.safe_push (SLP_INSTANCE_TREE (instance));
+{
+ if (SLP_INSTANCE_KIND (instance) == slp_inst_kind_bb_reduc)
+ for (tree op : SLP_INSTANCE_REMAIN_DEFS (instance))
+ if (TREE_CODE (op) == SSA_NAME)
+ scalar_use_map.put (op, 1);
+ if (!visited.add (SLP_INSTANCE_TREE (instance)))
+ worklist.safe_push (SLP_INSTANCE_TREE (instance));
+}
do
{
@@ -6665,7 +6671,8 @@ vect_bb_slp_mark_live_stmts (bb_vec_info bb_vinfo)
if (child && !visited.add (child))
worklist.safe_push (child);
}
-} while (!worklist.is_empty ());
+}
+ while (!worklist.is_empty ());
visited.empty ();
[gcc r14-9686] testsuite: Fix up ext-floating{3,12}.C on i686-linux
https://gcc.gnu.org/g:aac30f8416e992c524b86eaa40f35f30fe04b755
commit r14-9686-gaac30f8416e992c524b86eaa40f35f30fe04b755
Author: Jakub Jelinek
Date: Wed Mar 27 12:00:58 2024 +0100
testsuite: Fix up ext-floating{3,12}.C on i686-linux
These tests FAIL for quite a while on i686-linux since July last year,
likely r14-2628 . Since that patch gcc claims _Float16 and __bf16
support even without -msse2 because some functions could be using
target attribute.
Later r14-2691 added -msse2 to add_options_for_float16, but didn't do that
for bfloat16, plus ext-floating{3,12}.C tests need the added dg-add-options,
so that float16 and bfloat16 effective targets match the
__STDCPP_FLOAT16_T__
or __STDCPP_BFLOAT16_T__ macros.
Fixes
-FAIL: g++.dg/cpp23/ext-floating12.C -std=gnu++23 (test for errors, line
144)
-FAIL: g++.dg/cpp23/ext-floating12.C -std=gnu++23 (test for errors, line
146)
-FAIL: g++.dg/cpp23/ext-floating12.C -std=gnu++23 (test for errors, line
148)
-FAIL: g++.dg/cpp23/ext-floating12.C -std=gnu++23 (test for errors, line
150)
-FAIL: g++.dg/cpp23/ext-floating12.C -std=gnu++23 (test for errors, line
152)
-FAIL: g++.dg/cpp23/ext-floating12.C -std=gnu++23 (test for errors, line
154)
-FAIL: g++.dg/cpp23/ext-floating12.C -std=gnu++26 (test for errors, line
144)
-FAIL: g++.dg/cpp23/ext-floating12.C -std=gnu++26 (test for errors, line
146)
-FAIL: g++.dg/cpp23/ext-floating12.C -std=gnu++26 (test for errors, line
148)
-FAIL: g++.dg/cpp23/ext-floating12.C -std=gnu++26 (test for errors, line
150)
-FAIL: g++.dg/cpp23/ext-floating12.C -std=gnu++26 (test for errors, line
152)
-FAIL: g++.dg/cpp23/ext-floating12.C -std=gnu++26 (test for errors, line
154)
-FAIL: g++.dg/cpp23/ext-floating3.C -std=gnu++23 (test for errors, line
107)
-FAIL: g++.dg/cpp23/ext-floating3.C -std=gnu++23 (test for errors, line
114)
-FAIL: g++.dg/cpp23/ext-floating3.C -std=gnu++23 (test for errors, line
126)
-FAIL: g++.dg/cpp23/ext-floating3.C -std=gnu++23 (test for errors, line
79)
-FAIL: g++.dg/cpp23/ext-floating3.C -std=gnu++23 (test for errors, line
86)
-FAIL: g++.dg/cpp23/ext-floating3.C -std=gnu++23 (test for errors, line
98)
-FAIL: g++.dg/cpp23/ext-floating3.C -std=gnu++23 (test for warnings, line
22)
-FAIL: g++.dg/cpp23/ext-floating3.C -std=gnu++23 (test for warnings, line
23)
-FAIL: g++.dg/cpp23/ext-floating3.C -std=gnu++23 (test for warnings, line
24)
-FAIL: g++.dg/cpp23/ext-floating3.C -std=gnu++23 (test for warnings, line
25)
-FAIL: g++.dg/cpp23/ext-floating3.C -std=gnu++26 (test for errors, line
107)
-FAIL: g++.dg/cpp23/ext-floating3.C -std=gnu++26 (test for errors, line
114)
-FAIL: g++.dg/cpp23/ext-floating3.C -std=gnu++26 (test for errors, line
126)
-FAIL: g++.dg/cpp23/ext-floating3.C -std=gnu++26 (test for errors, line
79)
-FAIL: g++.dg/cpp23/ext-floating3.C -std=gnu++26 (test for errors, line
86)
-FAIL: g++.dg/cpp23/ext-floating3.C -std=gnu++26 (test for errors, line
98)
-FAIL: g++.dg/cpp23/ext-floating3.C -std=gnu++26 (test for warnings, line
22)
-FAIL: g++.dg/cpp23/ext-floating3.C -std=gnu++26 (test for warnings, line
23)
-FAIL: g++.dg/cpp23/ext-floating3.C -std=gnu++26 (test for warnings, line
24)
-FAIL: g++.dg/cpp23/ext-floating3.C -std=gnu++26 (test for warnings, line
25)
on the latter and changes nothing on the former.
2024-03-27 Jakub Jelinek
* lib/target-supports.exp (add_options_for_bfloat16): Add -msse2 on
i?86/x86_64.
* g++.dg/cpp23/ext-floating3.C: Add dg-add-options float16.
* g++.dg/cpp23/ext-floating12.C: Add dg-add-options float16 and
bfloat16.
Diff:
---
gcc/testsuite/g++.dg/cpp23/ext-floating12.C | 2 ++
gcc/testsuite/g++.dg/cpp23/ext-floating3.C | 1 +
gcc/testsuite/lib/target-supports.exp | 3 +++
3 files changed, 6 insertions(+)
diff --git a/gcc/testsuite/g++.dg/cpp23/ext-floating12.C
b/gcc/testsuite/g++.dg/cpp23/ext-floating12.C
index 77ee4c70a93..a09c3fc10c4 100644
--- a/gcc/testsuite/g++.dg/cpp23/ext-floating12.C
+++ b/gcc/testsuite/g++.dg/cpp23/ext-floating12.C
@@ -1,6 +1,8 @@
// P1467R9 - Extended floating-point types and standard names.
// { dg-do compile { target { c++23 && { i?86-*-linux* x86_64-*-linux* } } } }
// { dg-options "" }
+// { dg-add-options float16 }
+// { dg-add-options bfloat16 }
#include
#include
diff --git a/gcc/testsuite/g++.dg/cpp23/ext-floating3.C
b/gcc/testsuite/g++.dg/cpp23/ext-floating3.C
index ca9399fccd2..803a057e7ef 100644
--- a/gcc/testsuite/g++.dg/cpp23/ext-floating3.C
+++ b/gcc/testsuite/g++.dg/cpp23/ext-floating3.C
@@ -4,6 +4,7 @@
// And some further tests.
// { dg-do compile { target { c++23 && { i?86-*-linux* x86_64-*-linux* } } } }
// { dg-options "" }
+// { dg-add-options float16 }
#include
[gcc r14-9684] aarch64: Add +lse128 architectural extension command-line flag
https://gcc.gnu.org/g:d9ea5181800fee3c0c21c33a463d8ca90b004ff6
commit r14-9684-gd9ea5181800fee3c0c21c33a463d8ca90b004ff6
Author: Victor Do Nascimento
Date: Tue Mar 5 20:38:26 2024 +
aarch64: Add +lse128 architectural extension command-line flag
Given how, at present, the choice of using LSE128 atomic instructions
by the toolchain is delegated to run-time selection in the form of
Libatomic ifuncs, responsible for querying target support, the
`+lse128' target architecture compile-time flag is absent from GCC.
This, however, contrasts with the Binutils implementation, which gates
LSE128 instructions behind the `+lse128' flag. This can lead to
problems in GCC for certain use-cases. One such example is in the use
of inline assembly, whereby the inability of enabling the feature in
the command-line prevents the compiler from automatically issuing the
necessary LSE128 `.arch' directive.
This patch therefore brings GCC into alignment with LLVM and Binutils
in adding support for the `+lse128' architectural extension flag.
gcc/ChangeLog:
* config/aarch64/aarch64-option-extensions.def: Add LSE128
AARCH64_OPT_EXTENSION, adding it as a dependency for the D128
feature.
* doc/invoke.texi (AArch64 Options): Document +lse128.
gcc/testsuite/ChangeLog:
* gcc.target/aarch64/lse128-flag.c: New.
* gcc.target/aarch64/cpunative/info_23: Likewise.
* gcc.target/aarch64/cpunative/native_cpu_23.c: Likewise.
Diff:
---
gcc/config/aarch64/aarch64-option-extensions.def | 4 +++-
gcc/doc/invoke.texi| 4
gcc/testsuite/gcc.target/aarch64/cpunative/info_23 | 8
gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_23.c | 11 +++
gcc/testsuite/gcc.target/aarch64/lse128-flag.c | 10 ++
5 files changed, 36 insertions(+), 1 deletion(-)
diff --git a/gcc/config/aarch64/aarch64-option-extensions.def
b/gcc/config/aarch64/aarch64-option-extensions.def
index 1a3b91c68cf..ac54b899a06 100644
--- a/gcc/config/aarch64/aarch64-option-extensions.def
+++ b/gcc/config/aarch64/aarch64-option-extensions.def
@@ -275,7 +275,9 @@ AARCH64_OPT_EXTENSION("mops", MOPS, (), (), (), "")
AARCH64_OPT_EXTENSION("cssc", CSSC, (), (), (), "cssc")
-AARCH64_OPT_EXTENSION("d128", D128, (), (), (), "d128")
+AARCH64_OPT_EXTENSION("lse128", LSE128, (LSE), (), (), "lse128")
+
+AARCH64_OPT_EXTENSION("d128", D128, (LSE128), (), (), "d128")
AARCH64_OPT_EXTENSION("the", THE, (), (), (), "the")
diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi
index d09074e13de..f6c8d6fc0e1 100644
--- a/gcc/doc/invoke.texi
+++ b/gcc/doc/invoke.texi
@@ -21578,8 +21578,12 @@ Enable the FEAT_SME_I16I64 extension to SME.
Enable the FEAT_SME_F64F64 extension to SME.
+@item sme2
Enable the Scalable Matrix Extension 2. This also enables SME instructions.
+@item lse128
+Enable the LSE128 128-bit atomic instructions extension. This also
+enables LSE instructions.
@item d128
Enable support for 128-bit system register read/write instructions.
+This also enables the LSE128 extension.
@item gcs
Enable support for Armv9.4-a Guarded Control Stack extension.
@item the
diff --git a/gcc/testsuite/gcc.target/aarch64/cpunative/info_23
b/gcc/testsuite/gcc.target/aarch64/cpunative/info_23
new file mode 100644
index 000..0ca69d0a907
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/cpunative/info_23
@@ -0,0 +1,8 @@
+processor : 0
+BogoMIPS : 100.00
+Features : fp asimd evtstrm aes pmull sha1 sha2 crc32 asimddp atomics
lse128
+CPU implementer: 0xfe
+CPU architecture: 8
+CPU variant: 0x0
+CPU part : 0xd08
+CPU revision : 2
diff --git a/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_23.c
b/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_23.c
new file mode 100644
index 000..8a1e235d8ab
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_23.c
@@ -0,0 +1,11 @@
+/* { dg-do compile { target { { aarch64*-*-linux*} && native } } } */
+/* { dg-set-compiler-env-var GCC_CPUINFO
"$srcdir/gcc.target/aarch64/cpunative/info_23" } */
+/* { dg-additional-options "-mcpu=native" } */
+
+int main()
+{
+ return 0;
+}
+
+/* { dg-final { scan-assembler {\.arch armv8-a\+dotprod\+crc\+crypto\+lse128}
} } */
+/* Test one where lse128 is available and so should be emitted. */
diff --git a/gcc/testsuite/gcc.target/aarch64/lse128-flag.c
b/gcc/testsuite/gcc.target/aarch64/lse128-flag.c
new file mode 100644
index 000..71339c3af6d
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/lse128-flag.c
@@ -0,0 +1,10 @@
+/* { dg-do compile { target { aarch64*-*-*} } } */
+/* { dg-additional-options "-march=armv9.4-a+lse128" } */
+
+int main()
+{
+ return 0;
+}
+
+/* { dg-final { scan-assembler {\.arch armv9\.4-a\+crc\+lse128} } } */
+/* Test a
[gcc r14-9685] aarch64: Align lrcpc3 FEAT_STRING with /proc/cpuinfo 'Features' entry
https://gcc.gnu.org/g:258defbdee985c8f27c33e9f533c19d059941972
commit r14-9685-g258defbdee985c8f27c33e9f533c19d059941972
Author: Victor Do Nascimento
Date: Tue Mar 5 20:38:26 2024 +
aarch64: Align lrcpc3 FEAT_STRING with /proc/cpuinfo 'Features' entry
Due to the Linux kernel exposing the lrcpc3 architectural feature as
"lrcpc3", this patch corrects the relevant FEATURE_STRING entry in the
"rcpc3" AARCH64_OPT_FMV_EXTENSION macro, such that the feature can be
correctly detected when doing native compilation on rcpc3-enabled
targets.
gcc/ChangeLog:
* config/aarch64/aarch64-option-extensions.def (rcpc3):
Fix FEATURE_STRING field to "lrcpc3".
gcc/testsuite/ChangeLog:
* gcc.target/aarch64/cpunative/info_24: New.
* gcc.target/aarch64/cpunative/native_cpu_24.c: Likewise.
Diff:
---
gcc/config/aarch64/aarch64-option-extensions.def | 2 +-
gcc/testsuite/gcc.target/aarch64/cpunative/info_24 | 8
gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_24.c | 11 +++
3 files changed, 20 insertions(+), 1 deletion(-)
diff --git a/gcc/config/aarch64/aarch64-option-extensions.def
b/gcc/config/aarch64/aarch64-option-extensions.def
index ac54b899a06..061a145e9e7 100644
--- a/gcc/config/aarch64/aarch64-option-extensions.def
+++ b/gcc/config/aarch64/aarch64-option-extensions.def
@@ -174,7 +174,7 @@ AARCH64_OPT_FMV_EXTENSION("rcpc", RCPC, (), (), (), "lrcpc")
AARCH64_FMV_FEATURE("rcpc2", RCPC2, (RCPC))
-AARCH64_OPT_FMV_EXTENSION("rcpc3", RCPC3, (), (), (), "rcpc3")
+AARCH64_OPT_FMV_EXTENSION("rcpc3", RCPC3, (), (), (), "lrcpc3")
AARCH64_FMV_FEATURE("frintts", FRINTTS, ())
diff --git a/gcc/testsuite/gcc.target/aarch64/cpunative/info_24
b/gcc/testsuite/gcc.target/aarch64/cpunative/info_24
new file mode 100644
index 000..8d3c16a1091
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/cpunative/info_24
@@ -0,0 +1,8 @@
+processor : 0
+BogoMIPS : 100.00
+Features : fp asimd evtstrm aes pmull sha1 sha2 crc32 asimddp lrcpc3
+CPU implementer: 0xfe
+CPU architecture: 8
+CPU variant: 0x0
+CPU part : 0xd08
+CPU revision : 2
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_24.c
b/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_24.c
new file mode 100644
index 000..05dc870885f
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_24.c
@@ -0,0 +1,11 @@
+/* { dg-do compile { target { { aarch64*-*-linux*} && native } } } */
+/* { dg-set-compiler-env-var GCC_CPUINFO
"$srcdir/gcc.target/aarch64/cpunative/info_23" } */
+/* { dg-additional-options "-mcpu=native --save-temps " } */
+
+int main()
+{
+ return 0;
+}
+
+/* { dg-final { scan-assembler {\.arch armv8-a\+dotprod\+crc\+crypto\+rcpc3} }
} */
+/* Test one where rcpc3 is available and so should be emitted. */
[gcc r14-9683] testsuite: Fix copy-headers-8.c
https://gcc.gnu.org/g:291c46a3f0d0355680f94280e955f4faf1cae6f9
commit r14-9683-g291c46a3f0d0355680f94280e955f4faf1cae6f9
Author: Stefan Schulze Frielinghaus
Date: Wed Mar 27 08:50:47 2024 +0100
testsuite: Fix copy-headers-8.c
For targets where LOGICAL_OP_NON_SHORT_CIRCUIT evaluates to false, two
conditional jumps are emitted instead of a combined conditional which
this test is all about. Thus, set it to true.
gcc/testsuite/ChangeLog:
* gcc.dg/tree-ssa/copy-headers-8.c: Set
LOGICAL_OP_NON_SHORT_CIRCUIT to true.
Diff:
---
gcc/testsuite/gcc.dg/tree-ssa/copy-headers-8.c | 5 -
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/gcc/testsuite/gcc.dg/tree-ssa/copy-headers-8.c
b/gcc/testsuite/gcc.dg/tree-ssa/copy-headers-8.c
index 8b4b5e7ea81..e35aaf93da8 100644
--- a/gcc/testsuite/gcc.dg/tree-ssa/copy-headers-8.c
+++ b/gcc/testsuite/gcc.dg/tree-ssa/copy-headers-8.c
@@ -1,5 +1,8 @@
+/* For targets where LOGICAL_OP_NON_SHORT_CIRCUIT evaluates to false, two
+ conditional jumps are emitted instead of a combined conditional which this
+ test is all about. Thus, set it to true. */
/* { dg-do compile } */
-/* { dg-options "-O2 -fdump-tree-ch2-details" } */
+/* { dg-options "-O2 -fdump-tree-ch2-details --param
logical-op-non-short-circuit=1" } */
int is_sorted(int *a, int n, int m, int k)
{
