[gcc r14-10086] c++: Copy over DECL_DISREGARD_INLINE_LIMITS flag to inheriting ctors [PR114784]

2024-04-22 Thread Jakub Jelinek via Gcc-cvs
https://gcc.gnu.org/g:aa73eb97a1e3c84564fa71158d09f9c5582c4d2e

commit r14-10086-gaa73eb97a1e3c84564fa71158d09f9c5582c4d2e
Author: Jakub Jelinek 
Date:   Tue Apr 23 08:36:15 2024 +0200

c++: Copy over DECL_DISREGARD_INLINE_LIMITS flag to inheriting ctors 
[PR114784]

The following testcase is rejected with
error: inlining failed in call to 'always_inline' '...': call is unlikely 
and code size would grow
errors.  The problem is that starting with the r14-2149 change
we try to copy most of the attributes from the inherited to
inheriting ctor, but don't copy associated flags that decl_attributes
sets.

Now, the other clone_attrs user, cp/optimize.cc (maybe_clone_body)
copies over
  DECL_COMDAT (clone) = DECL_COMDAT (fn);
  DECL_WEAK (clone) = DECL_WEAK (fn);
  if (DECL_ONE_ONLY (fn))
cgraph_node::get_create (clone)->set_comdat_group (cxx_comdat_group 
(clone));
  DECL_USE_TEMPLATE (clone) = DECL_USE_TEMPLATE (fn);
  DECL_EXTERNAL (clone) = DECL_EXTERNAL (fn);
  DECL_INTERFACE_KNOWN (clone) = DECL_INTERFACE_KNOWN (fn);
  DECL_NOT_REALLY_EXTERN (clone) = DECL_NOT_REALLY_EXTERN (fn);
  DECL_VISIBILITY (clone) = DECL_VISIBILITY (fn);
  DECL_VISIBILITY_SPECIFIED (clone) = DECL_VISIBILITY_SPECIFIED (fn);
  DECL_DLLIMPORT_P (clone) = DECL_DLLIMPORT_P (fn);
  DECL_DISREGARD_INLINE_LIMITS (clone) = DECL_DISREGARD_INLINE_LIMITS 
(fn);
The following patch just copies DECL_DISREGARD_INLINE_LIMITS to fix
this exact bug, not really sure which other flags should be copied
and which shouldn't.
Plus there are tons of other flags, some of which might need to be copied
too, some of which might not, perhaps in both places, like:
DECL_UNINLINABLE, maybe DECL_PRESERVE_P, TREE_USED, maybe
DECL_USER_ALIGN/DECL_ALIGN, maybe DECL_WEAK, maybe
DECL_NO_INSTRUMENT_FUNCTION_ENTRY_EXIT, DECL_NO_LIMIT_STACK.
TREE_READONLY, DECL_PURE_P, TREE_THIS_VOLATILE (for const, pure and
noreturn attributes) probably makes no sense, DECL_IS_RETURNS_TWICE neither
(returns_twice ctor?).  What about TREE_NOTHROW?
DECL_FUNCTION_SPECIFIC_OPTIMIZATION, DECL_FUNCTION_SPECIFIC_TARGET...

Anyway, another problem is that if inherited_ctor is a TEMPLATE_DECL, as
also can be seen in the using D::D; case in the testcase, then
DECL_ATTRIBUTES (fn) = clone_attrs (DECL_ATTRIBUTES (inherited_ctor));
attempts to copy the attributes from the TEMPLATE_DECL which doesn't have
them.  The following patch copies them from STRIP_TEMPLATE (inherited_ctor)
which does.  E.g. DECL_DECLARED_CONSTEXPR_P works fine as the macro
itself uses STRIP_TEMPLATE too, but not 100% sure about other macros used
on inherited_ctor earlier.

2024-04-23  Jakub Jelinek  

PR c++/114784
* method.cc (implicitly_declare_fn): Call clone_attrs
on DECL_ATTRIBUTES on STRIP_TEMPLATE (inherited_ctor) rather than
inherited_ctor.  Also copy DECL_DISREGARD_INLINE_LIMITS flag from 
it.

* g++.dg/cpp0x/inh-ctor39.C: New test.

Diff:
---
 gcc/cp/method.cc|  5 ++-
 gcc/testsuite/g++.dg/cpp0x/inh-ctor39.C | 55 +
 2 files changed, 59 insertions(+), 1 deletion(-)

diff --git a/gcc/cp/method.cc b/gcc/cp/method.cc
index 98c10e6a8b5..08a3d34fb01 100644
--- a/gcc/cp/method.cc
+++ b/gcc/cp/method.cc
@@ -3307,8 +3307,11 @@ implicitly_declare_fn (special_function_kind kind, tree 
type,
   /* Copy constexpr from the inherited constructor even if the
 inheriting constructor doesn't satisfy the requirements.  */
   constexpr_p = DECL_DECLARED_CONSTEXPR_P (inherited_ctor);
+  tree inherited_ctor_fn = STRIP_TEMPLATE (inherited_ctor);
   /* Also copy any attributes.  */
-  DECL_ATTRIBUTES (fn) = clone_attrs (DECL_ATTRIBUTES (inherited_ctor));
+  DECL_ATTRIBUTES (fn) = clone_attrs (DECL_ATTRIBUTES (inherited_ctor_fn));
+  DECL_DISREGARD_INLINE_LIMITS (fn)
+   = DECL_DISREGARD_INLINE_LIMITS (inherited_ctor_fn);
 }
 
   /* Add the "this" parameter.  */
diff --git a/gcc/testsuite/g++.dg/cpp0x/inh-ctor39.C 
b/gcc/testsuite/g++.dg/cpp0x/inh-ctor39.C
new file mode 100644
index 000..89c0d8d87a9
--- /dev/null
+++ b/gcc/testsuite/g++.dg/cpp0x/inh-ctor39.C
@@ -0,0 +1,55 @@
+// PR c++/114784
+// { dg-do compile { target c++11 } }
+// { dg-additional-options "-O2" }
+
+template 
+struct A {
+  [[gnu::always_inline]] A (int t) { foo ().bar (t, {}); }
+  [[gnu::always_inline]] A (long long t) { foo ().bar (t, {}); }
+  T foo ();
+};
+
+struct B : A {
+  using A::A;
+  [[gnu::always_inline]] B (long long v) : A (v) {}
+  template 
+  void bar (T &&, int);
+  char b;
+};
+
+struct C {
+  C (int v) : a(v) { }
+  C (long long v) : a(v) { }
+  B a;
+};
+
+static C
+baz ()
+{
+  C x(0);
+  C y(0LL);
+  return 0;
+}
+
+[[gnu::cold]] int
+qux ()
+{
+

[gcc r14-10085] c++: Check if allocation functions are xobj members [PR114078]

2024-04-22 Thread Nathaniel Shead via Gcc-cvs
https://gcc.gnu.org/g:cf51fe706ea0219beb5bb85e81606d372ca9635e

commit r14-10085-gcf51fe706ea0219beb5bb85e81606d372ca9635e
Author: Nathaniel Shead 
Date:   Sat Apr 20 15:08:02 2024 +1000

c++: Check if allocation functions are xobj members [PR114078]

A class allocation member function is implicitly 'static' by
[class.free] p3, so cannot have an explicit object parameter.

PR c++/114078

gcc/cp/ChangeLog:

* decl.cc (grokdeclarator): Check allocation functions for xobj
parameters.

gcc/testsuite/ChangeLog:

* g++.dg/cpp23/explicit-obj-ops-alloc.C: New test.

Signed-off-by: Nathaniel Shead 

Diff:
---
 gcc/cp/decl.cc  |  6 ++
 gcc/testsuite/g++.dg/cpp23/explicit-obj-ops-alloc.C | 11 +++
 2 files changed, 17 insertions(+)

diff --git a/gcc/cp/decl.cc b/gcc/cp/decl.cc
index 65ab64885ff..2af026d255d 100644
--- a/gcc/cp/decl.cc
+++ b/gcc/cp/decl.cc
@@ -13728,6 +13728,12 @@ grokdeclarator (const cp_declarator *declarator,
inform (DECL_SOURCE_LOCATION (xobj_parm),
"explicit object parameter declared here");
  }
+   if (unqualified_id
+   && identifier_p (unqualified_id)
+   && IDENTIFIER_NEWDEL_OP_P (unqualified_id))
+ error_at (DECL_SOURCE_LOCATION (xobj_parm),
+   "%qD cannot be an explicit object member "
+   "function", unqualified_id);
  }
  }
tree pushed_scope = NULL_TREE;
diff --git a/gcc/testsuite/g++.dg/cpp23/explicit-obj-ops-alloc.C 
b/gcc/testsuite/g++.dg/cpp23/explicit-obj-ops-alloc.C
new file mode 100644
index 000..8a277db7ef5
--- /dev/null
+++ b/gcc/testsuite/g++.dg/cpp23/explicit-obj-ops-alloc.C
@@ -0,0 +1,11 @@
+// PR c++/114078
+// { dg-do compile { target c++23 } }
+
+using size_t = decltype(sizeof(0));
+
+struct S {
+  void* operator new(this size_t);  // { dg-error "explicit object" }
+  void* operator new[](this size_t);  // { dg-error "explicit object" }
+  void operator delete(this void*);  // { dg-error "explicit object" }
+  void operator delete[](this void*);  // { dg-error "explicit object" }
+};


[gcc(refs/users/aoliva/heads/testme)] make -freg-struct-return visibly a negative alias of -fpcc-struct-return

2024-04-22 Thread Alexandre Oliva via Gcc-cvs
https://gcc.gnu.org/g:ffb3aca361d2b0e9ba415930a0fc61e8219c635c

commit ffb3aca361d2b0e9ba415930a0fc61e8219c635c
Author: Alexandre Oliva 
Date:   Tue Apr 23 00:33:04 2024 -0300

make -freg-struct-return visibly a negative alias of -fpcc-struct-return

The fact that both options accept negative forms suggests that maybe
they aren't negative forms of each other.  They are, but that isn't
clear even by examining common.opt.  Use NegativeAlias to make it
abundantly clear.

The 'Optimization' keyword next to freg-struct-return was the only
thing that caused flag_pcc_struct_return to be a per-function flag,
and ipa-inline relied on that.  After making it an alias, the
Optimization keyword was no longer operational.  I'm not sure it was
sensible or desirable for flag_pcc_struct_return to be a per-function
setting, but this patch does not intend to change behavior.


for  gcc/ChangeLog

* common.opt (freg-struct-return): Make it explicitly
fpcc-struct-return's NegativeAlias.  Copy Optimization...
(freg-struct-return): ... here.

Diff:
---
 gcc/common.opt | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/gcc/common.opt b/gcc/common.opt
index ad348844775..12d93c76a1e 100644
--- a/gcc/common.opt
+++ b/gcc/common.opt
@@ -2406,7 +2406,7 @@ Common RejectNegative Joined UInteger Optimization
 -fpack-struct= Set initial maximum structure member alignment.
 
 fpcc-struct-return
-Common Var(flag_pcc_struct_return,1) Init(DEFAULT_PCC_STRUCT_RETURN)
+Common Var(flag_pcc_struct_return,1) Init(DEFAULT_PCC_STRUCT_RETURN) 
Optimization
 Return small aggregates in memory, not registers.
 
 fpeel-loops
@@ -2596,7 +2596,7 @@ Common Var(flag_record_gcc_switches)
 Record gcc command line switches in the object file.
 
 freg-struct-return
-Common Var(flag_pcc_struct_return,0) Optimization
+Common NegativeAlias Alias(fpcc_struct_return) Optimization
 Return small aggregates in registers.
 
 fregmove


[gcc/aoliva/heads/testme] make -freg-struct-return visibly a negative alias of -fpcc-

2024-04-22 Thread Alexandre Oliva via Gcc-cvs
The branch 'aoliva/heads/testme' was updated to point to:

 ffb3aca361d... make -freg-struct-return visibly a negative alias of -fpcc-

It previously pointed to:

 60e63cf86f9... make -freg-struct-return visibly a negative alias of -fpcc-

Diff:

!!! WARNING: THE FOLLOWING COMMITS ARE NO LONGER ACCESSIBLE (LOST):
---

  60e63cf... make -freg-struct-return visibly a negative alias of -fpcc-


Summary of changes (added commits):
---

  ffb3aca... make -freg-struct-return visibly a negative alias of -fpcc-


[gcc(refs/users/aoliva/heads/testme)] make -freg-struct-return visibly a negative alias of -fpcc-struct-return

2024-04-22 Thread Alexandre Oliva via Gcc-cvs
https://gcc.gnu.org/g:60e63cf86f91608df32377f9ffc7c3f3e9f316fd

commit 60e63cf86f91608df32377f9ffc7c3f3e9f316fd
Author: Alexandre Oliva 
Date:   Tue Apr 23 00:33:04 2024 -0300

make -freg-struct-return visibly a negative alias of -fpcc-struct-return

The fact that both options accept negative forms suggests that maybe
they aren't negative forms of each other.  They are, but that isn't
clear even by examining common.opt.  Use NegativeAlias to make it
abundantly clear.


for  gcc/ChangeLog

* common.opt (freg-struct-return): Make it explicitly
fpcc-struct-return's NegativeAlias.

Diff:
---
 gcc/common.opt | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/gcc/common.opt b/gcc/common.opt
index ad348844775..12d93c76a1e 100644
--- a/gcc/common.opt
+++ b/gcc/common.opt
@@ -2406,7 +2406,7 @@ Common RejectNegative Joined UInteger Optimization
 -fpack-struct= Set initial maximum structure member alignment.
 
 fpcc-struct-return
-Common Var(flag_pcc_struct_return,1) Init(DEFAULT_PCC_STRUCT_RETURN)
+Common Var(flag_pcc_struct_return,1) Init(DEFAULT_PCC_STRUCT_RETURN) 
Optimization
 Return small aggregates in memory, not registers.
 
 fpeel-loops
@@ -2596,7 +2596,7 @@ Common Var(flag_record_gcc_switches)
 Record gcc command line switches in the object file.
 
 freg-struct-return
-Common Var(flag_pcc_struct_return,0) Optimization
+Common NegativeAlias Alias(fpcc_struct_return) Optimization
 Return small aggregates in registers.
 
 fregmove


[gcc/aoliva/heads/testme] make -freg-struct-return visibly a negative alias of -fpcc-

2024-04-22 Thread Alexandre Oliva via Gcc-cvs
The branch 'aoliva/heads/testme' was updated to point to:

 60e63cf86f9... make -freg-struct-return visibly a negative alias of -fpcc-

It previously pointed to:

 9d8a2a67a84... make -freg-struct-return visibly a negative alias of -fpcc-

Diff:

!!! WARNING: THE FOLLOWING COMMITS ARE NO LONGER ACCESSIBLE (LOST):
---

  9d8a2a6... make -freg-struct-return visibly a negative alias of -fpcc-


Summary of changes (added commits):
---

  60e63cf... make -freg-struct-return visibly a negative alias of -fpcc-


[gcc(refs/users/aoliva/heads/testme)] make -freg-struct-return visibly a negative alias of -fpcc-struct-return

2024-04-22 Thread Alexandre Oliva via Gcc-cvs
https://gcc.gnu.org/g:9d8a2a67a84deaaf0645a73d17564d68059b2433

commit 9d8a2a67a84deaaf0645a73d17564d68059b2433
Author: Alexandre Oliva 
Date:   Tue Apr 23 00:33:04 2024 -0300

make -freg-struct-return visibly a negative alias of -fpcc-struct-return

The fact that both options accept negative forms suggests that maybe
they aren't negative forms of each other.  They are, but that isn't
clear even by examining common.opt.  Use NegativeAlias to make it
abundantly clear.


for  gcc/ChangeLog

* common.opt (freg-struct-return): Make it explicitly
fpcc-struct-return's NegativeAlias.

Diff:
---
 gcc/common.opt | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/gcc/common.opt b/gcc/common.opt
index ad348844775..f973d767584 100644
--- a/gcc/common.opt
+++ b/gcc/common.opt
@@ -2596,7 +2596,7 @@ Common Var(flag_record_gcc_switches)
 Record gcc command line switches in the object file.
 
 freg-struct-return
-Common Var(flag_pcc_struct_return,0) Optimization
+Common NegativeAlias Alias(fpcc_struct_return) Optimization
 Return small aggregates in registers.
 
 fregmove


[gcc/aoliva/heads/testme] make -freg-struct-return visibly a negative alias of -fpcc-

2024-04-22 Thread Alexandre Oliva via Gcc-cvs
The branch 'aoliva/heads/testme' was updated to point to:

 9d8a2a67a84... make -freg-struct-return visibly a negative alias of -fpcc-

It previously pointed to:

 e50550cae7e... make -freg-struct-return visibly a negative alias of -fpcc-

Diff:

!!! WARNING: THE FOLLOWING COMMITS ARE NO LONGER ACCESSIBLE (LOST):
---

  e50550c... make -freg-struct-return visibly a negative alias of -fpcc-


Summary of changes (added commits):
---

  9d8a2a6... make -freg-struct-return visibly a negative alias of -fpcc-


[gcc(refs/users/aoliva/heads/testme)] add explicit ABI and align options to pr88233.c

2024-04-22 Thread Alexandre Oliva via Gcc-cvs
https://gcc.gnu.org/g:30e8256702cc4dfb56d329ee279e957a10fc962b

commit 30e8256702cc4dfb56d329ee279e957a10fc962b
Author: Alexandre Oliva 
Date:   Sun Apr 21 17:24:30 2024 -0300

add explicit ABI and align options to pr88233.c

We've observed failures of this test on powerpc configurations that
default to different calling conventions and alignment requirements.
Both settings are needed for the original expectations to be met.

The test was later modified to have different expectations for big and
little endian code generation.  This patch restores the original
codegen expectations, that, with the explicit options, don't vary any
more.


for  gcc/testsuite/ChangeLog

* gcc.target/powerpc/pr88233.c: Make some alignment strictness
and calling conventions assumptions explicit.  Restore uniform
codegen expectations

Diff:
---
 gcc/testsuite/gcc.target/powerpc/pr88233.c | 7 +++
 1 file changed, 3 insertions(+), 4 deletions(-)

diff --git a/gcc/testsuite/gcc.target/powerpc/pr88233.c 
b/gcc/testsuite/gcc.target/powerpc/pr88233.c
index 27c73717a3f..46a3ebfa287 100644
--- a/gcc/testsuite/gcc.target/powerpc/pr88233.c
+++ b/gcc/testsuite/gcc.target/powerpc/pr88233.c
@@ -1,5 +1,5 @@
 /* { dg-require-effective-target lp64 } */
-/* { dg-options "-O2 -mdejagnu-cpu=power8" } */
+/* { dg-options "-O2 -mdejagnu-cpu=power8 -mno-strict-align 
-fpcc-struct-return" } */
 
 typedef struct { double a[2]; } A;
 A
@@ -9,6 +9,5 @@ foo (const A *a)
 }
 
 /* { dg-final { scan-assembler-not {\mmtvsr} } } */
-/* { dg-final { scan-assembler-times {\mlxvd2x\M} 1 { target { be } } } } */
-/* { dg-final { scan-assembler-times {\mstxvd2x\M} 1 { target { be } } } } */
-/* { dg-final { scan-assembler-times {\mlfd\M} 2 { target { le } } } } */
+/* { dg-final { scan-assembler-times {\mlxvd2x\M} 1 } } */
+/* { dg-final { scan-assembler-times {\mstxvd2x\M} 1 } } */


[gcc(refs/users/aoliva/heads/testme)] make -freg-struct-return visibly a negative alias of -fpcc-struct-return

2024-04-22 Thread Alexandre Oliva via Gcc-cvs
https://gcc.gnu.org/g:e50550cae7e3108d7f7a0ba2f9b8f14c16e29e35

commit e50550cae7e3108d7f7a0ba2f9b8f14c16e29e35
Author: Alexandre Oliva 
Date:   Tue Apr 23 00:33:04 2024 -0300

make -freg-struct-return visibly a negative alias of -fpcc-struct-return

The fact that both options accept negative forms suggests that maybe
they aren't negative forms of each other.  They are, but that isn't
clear even by examining common.opt.  Use NegativeAlias to make it
abundantly clear.


for  gcc/ChangeLog

* common.opt (freg-struct-return): Make it explicitly
fpcc-struct-return's NegativeAlias.

Diff:
---
 gcc/common.opt | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/gcc/common.opt b/gcc/common.opt
index ad348844775..ebef5977451 100644
--- a/gcc/common.opt
+++ b/gcc/common.opt
@@ -2596,7 +2596,7 @@ Common Var(flag_record_gcc_switches)
 Record gcc command line switches in the object file.
 
 freg-struct-return
-Common Var(flag_pcc_struct_return,0) Optimization
+Common NegativeAlias Alias(pcc_struct_return) Optimization
 Return small aggregates in registers.
 
 fregmove


[gcc/aoliva/heads/testme] (2 commits) make -freg-struct-return visibly a negative alias of -fpcc-

2024-04-22 Thread Alexandre Oliva via Gcc-cvs
The branch 'aoliva/heads/testme' was updated to point to:

 e50550cae7e... make -freg-struct-return visibly a negative alias of -fpcc-

It previously pointed to:

 68e3d62f56e... add explicit ABI and align options to pr88233.c

Diff:

!!! WARNING: THE FOLLOWING COMMITS ARE NO LONGER ACCESSIBLE (LOST):
---

  68e3d62... add explicit ABI and align options to pr88233.c


Summary of changes (added commits):
---

  e50550c... make -freg-struct-return visibly a negative alias of -fpcc-
  30e8256... add explicit ABI and align options to pr88233.c


[gcc r14-10084] LoongArch: Define builtin macros for ISA evolutions

2024-04-22 Thread LuluCheng via Gcc-cvs
https://gcc.gnu.org/g:77e114bb0dc03d1df7f84221e3132d19030c34b4

commit r14-10084-g77e114bb0dc03d1df7f84221e3132d19030c34b4
Author: Yang Yujie 
Date:   Tue Apr 23 10:42:48 2024 +0800

LoongArch: Define builtin macros for ISA evolutions

Detailed description of these definitions can be found at
https://github.com/loongson/la-toolchain-conventions, which
the LoongArch GCC port aims to conform to.

gcc/ChangeLog:

* config.gcc: Add loongarch-evolution.o.
* config/loongarch/genopts/genstr.sh: Enable generation of
loongarch-evolution.[cc,h].
* config/loongarch/t-loongarch: Likewise.
* config/loongarch/genopts/gen-evolution.awk: New file.
* config/loongarch/genopts/isa-evolution.in: Mark ISA version
of introduction for each ISA evolution feature.
* config/loongarch/loongarch-c.cc (loongarch_cpu_cpp_builtins):
Define builtin macros for enabled ISA evolutions and the ISA
version.
* config/loongarch/loongarch-cpu.cc: Use loongarch-evolution.h.
* config/loongarch/loongarch.h: Likewise.
* config/loongarch/loongarch-cpucfg-map.h: Delete.
* config/loongarch/loongarch-evolution.cc: New file.
* config/loongarch/loongarch-evolution.h: New file.
* config/loongarch/loongarch-opts.h (ISA_HAS_FRECIPE): Define.
(ISA_HAS_DIV32): Likewise.
(ISA_HAS_LAM_BH): Likewise.
(ISA_HAS_LAMCAS): Likewise.
(ISA_HAS_LD_SEQ_SA): Likewise.

Diff:
---
 gcc/config.gcc |   2 +-
 gcc/config/loongarch/genopts/gen-evolution.awk | 230 +
 gcc/config/loongarch/genopts/genstr.sh |  82 ++--
 gcc/config/loongarch/genopts/isa-evolution.in  |  10 +-
 gcc/config/loongarch/loongarch-c.cc|  23 +++
 gcc/config/loongarch/loongarch-cpu.cc  |   2 +-
 gcc/config/loongarch/loongarch-evolution.cc|  60 ++
 ...oongarch-cpucfg-map.h => loongarch-evolution.h} |  46 -
 gcc/config/loongarch/loongarch-opts.h  |  11 -
 gcc/config/loongarch/loongarch.h   |   1 +
 gcc/config/loongarch/t-loongarch   |  26 ++-
 11 files changed, 398 insertions(+), 95 deletions(-)

diff --git a/gcc/config.gcc b/gcc/config.gcc
index 2cdecf78e05..ce683adcc8a 100644
--- a/gcc/config.gcc
+++ b/gcc/config.gcc
@@ -486,7 +486,7 @@ loongarch*-*-*)
cpu_type=loongarch
d_target_objs="loongarch-d.o"
extra_headers="larchintrin.h lsxintrin.h lasxintrin.h"
-   extra_objs="loongarch-c.o loongarch-builtins.o loongarch-cpu.o 
loongarch-opts.o loongarch-def.o"
+   extra_objs="loongarch-c.o loongarch-builtins.o loongarch-cpu.o 
loongarch-opts.o loongarch-def.o loongarch-evolution.o"
extra_gcc_objs="loongarch-driver.o loongarch-cpu.o loongarch-opts.o 
loongarch-def.o"
extra_options="${extra_options} g.opt fused-madd.opt"
;;
diff --git a/gcc/config/loongarch/genopts/gen-evolution.awk 
b/gcc/config/loongarch/genopts/gen-evolution.awk
new file mode 100644
index 000..4d105afa906
--- /dev/null
+++ b/gcc/config/loongarch/genopts/gen-evolution.awk
@@ -0,0 +1,230 @@
+#!/usr/bin/gawk
+#
+# A simple script that generates loongarch-evolution.h
+# from genopts/isa-evolution.in
+#
+# Copyright (C) 2021-2024 Free Software Foundation, Inc.
+#
+# This file is part of GCC.
+#
+# GCC is free software; you can redistribute it and/or modify it under
+# the terms of the GNU General Public License as published by the Free
+# Software Foundation; either version 3, or (at your option) any later
+# version.
+#
+# GCC is distributed in the hope that it will be useful, but WITHOUT
+# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+# or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+# License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with GCC; see the file COPYING3.  If not see
+# .
+
+BEGIN {
+# isa_version_major[]
+# isa_version_minor[]
+# cpucfg_word[]
+# cpucfg_bit_in_word[]
+# name_capitalized[]
+# comment[]
+}
+
+{
+cpucfg_word[NR] = $1
+cpucfg_bit_in_word[NR] = $2
+name[NR] = gensub(/-/, "_", "g", $3)
+name_capitalized[NR] = toupper(name[NR])
+isa_version_major[NR] = gensub(/^([1-9][0-9]*)\.([0-9]+)$/, "\\1", 1, $4)
+isa_version_minor[NR] = gensub(/^([1-9][0-9]*)\.([0-9]+)$/, "\\2", 1, $4)
+
+$1 = $2 = $3 = $4 = ""
+sub (/^\s*/, "")
+comment[NR] = $0
+}
+
+function copyright_header(from_year,to_year)
+{
+print "   Copyright (C) " from_year "-" to_year \
+  " Free Software Foundation, Inc."
+print ""
+print "This file is part of GCC."
+print ""
+print "GCC is free software; you can redistribute it and/or modify"
+print "it under the t

[gcc r14-10083] LoongArch: Define ISA versions

2024-04-22 Thread LuluCheng via Gcc-cvs
https://gcc.gnu.org/g:b4ebdd153b2b068082b452772095260b03b78cc2

commit r14-10083-gb4ebdd153b2b068082b452772095260b03b78cc2
Author: Yang Yujie 
Date:   Tue Apr 23 10:42:47 2024 +0800

LoongArch: Define ISA versions

These ISA versions are defined as -march= parameters and
are recommended for building binaries for distribution.

Detailed description of these definitions can be found at
https://github.com/loongson/la-toolchain-conventions, which
the LoongArch GCC port aims to conform to.

gcc/ChangeLog:

* config.gcc: Make la64v1.0 the default ISA preset of the lp64d ABI.
* config/loongarch/genopts/loongarch-strings: Define la64v1.0, 
la64v1.1.
* config/loongarch/genopts/loongarch.opt.in: Likewise.
* config/loongarch/loongarch-c.cc (LARCH_CPP_SET_PROCESSOR): 
Likewise.
(loongarch_cpu_cpp_builtins): Likewise.
* config/loongarch/loongarch-cpu.cc (get_native_prid): Likewise.
(fill_native_cpu_config): Likewise.
* config/loongarch/loongarch-def.cc (array_tune): Likewise.
* config/loongarch/loongarch-def.h: Likewise.
* config/loongarch/loongarch-driver.cc (driver_set_m_parm): 
Likewise.
(driver_get_normalized_m_opts): Likewise.
* config/loongarch/loongarch-opts.cc (default_tune_for_arch): 
Likewise.
(TUNE_FOR_ARCH): Likewise.
(arch_str): Likewise.
(loongarch_target_option_override): Likewise.
* config/loongarch/loongarch-opts.h (TARGET_uARCH_LA464): Likewise.
(TARGET_uARCH_LA664): Likewise.
* config/loongarch/loongarch-str.h (STR_CPU_ABI_DEFAULT): Likewise.
(STR_ARCH_ABI_DEFAULT): Likewise.
(STR_TUNE_GENERIC): Likewise.
(STR_ARCH_LA64V1_0): Likewise.
(STR_ARCH_LA64V1_1): Likewise.
* config/loongarch/loongarch.cc 
(loongarch_cpu_sched_reassociation_width): Likewise.
(loongarch_asm_code_end): Likewise.
* config/loongarch/loongarch.opt: Likewise.
* doc/invoke.texi: Likewise.

Diff:
---
 gcc/config.gcc | 34 +--
 gcc/config/loongarch/genopts/loongarch-strings |  5 +-
 gcc/config/loongarch/genopts/loongarch.opt.in  | 43 ++---
 gcc/config/loongarch/loongarch-c.cc| 37 
 gcc/config/loongarch/loongarch-cpu.cc  | 35 ++-
 gcc/config/loongarch/loongarch-def.cc  | 83 +-
 gcc/config/loongarch/loongarch-def.h   | 37 
 gcc/config/loongarch/loongarch-driver.cc   |  8 +--
 gcc/config/loongarch/loongarch-opts.cc | 66 ++--
 gcc/config/loongarch/loongarch-opts.h  |  4 +-
 gcc/config/loongarch/loongarch-str.h   |  5 +-
 gcc/config/loongarch/loongarch.cc  | 11 ++--
 gcc/config/loongarch/loongarch.opt | 43 ++---
 gcc/doc/invoke.texi| 57 +++---
 14 files changed, 300 insertions(+), 168 deletions(-)

diff --git a/gcc/config.gcc b/gcc/config.gcc
index 029ad1f1f08..2cdecf78e05 100644
--- a/gcc/config.gcc
+++ b/gcc/config.gcc
@@ -5073,7 +5073,7 @@ case "${target}" in
 
# Perform initial sanity checks on --with-* options.
case ${with_arch} in
-   "" | abi-default | loongarch64 | la[46]64) ;; # OK, append here.
+   "" | la64v1.[01] | abi-default | loongarch64 | la[46]64) ;; # 
OK, append here.
native)
if test x${host} != x${target}; then
echo "--with-arch=native is illegal for 
cross-compiler." 1>&2
@@ -5120,10 +5120,18 @@ case "${target}" in
 
# Infer ISA-related default options from the ABI: pass 1
case ${abi_base}/${abi_ext} in
-   lp64*/base)
+   lp64d/base)
# architectures that support lp64* ABI
-   arch_pattern="native|abi-default|loongarch64|la[46]64"
-   # default architecture for lp64* ABI
+   
arch_pattern="native|abi-default|la64v1.[01]|loongarch64|la[46]64"
+
+   # default architecture for lp64d ABI
+   arch_default="la64v1.0"
+   ;;
+   lp64[fs]/base)
+   # architectures that support lp64* ABI
+   
arch_pattern="native|abi-default|la64v1.[01]|loongarch64|la[46]64"
+
+   # default architecture for lp64[fs] ABI
arch_default="abi-default"
;;
*)
@@ -5195,15 +5203,7 @@ case "${target}" in
 
 
# Check default with_tune configuration using with_arch.
-   case ${with_arch} in
-   loongarch64)
-   tune_pattern="native|abi-defaul

[gcc(refs/users/aoliva/heads/testme)] add explicit ABI and align options to pr88233.c

2024-04-22 Thread Alexandre Oliva via Gcc-cvs
https://gcc.gnu.org/g:68e3d62f56eea3a5fa798ec514bd89ddc6668c4a

commit 68e3d62f56eea3a5fa798ec514bd89ddc6668c4a
Author: Alexandre Oliva 
Date:   Sun Apr 21 17:24:30 2024 -0300

add explicit ABI and align options to pr88233.c

We've observed failures of this test on powerpc configurations that
default to different calling conventions and alignment requirements.
Both settings are needed for the original expectations to be met.

The test was later modified to have different expectations for big and
little endian code generation.  This patch restores the original
codegen expectations, that, with the explicit options, don't vary any
more.


for  gcc/testsuite/ChangeLog

* gcc.target/powerpc/pr88233.c: Make some alignment strictness
and calling conventions assumptions explicit.  Restore uniform
codegen expectations

Diff:
---
 gcc/testsuite/gcc.target/powerpc/pr88233.c | 7 +++
 1 file changed, 3 insertions(+), 4 deletions(-)

diff --git a/gcc/testsuite/gcc.target/powerpc/pr88233.c 
b/gcc/testsuite/gcc.target/powerpc/pr88233.c
index 27c73717a3f..7ea459cb802 100644
--- a/gcc/testsuite/gcc.target/powerpc/pr88233.c
+++ b/gcc/testsuite/gcc.target/powerpc/pr88233.c
@@ -1,5 +1,5 @@
 /* { dg-require-effective-target lp64 } */
-/* { dg-options "-O2 -mdejagnu-cpu=power8" } */
+/* { dg-options "-O2 -mdejagnu-cpu=power8 -mno-strict-align 
-fno-reg-struct-return" } */
 
 typedef struct { double a[2]; } A;
 A
@@ -9,6 +9,5 @@ foo (const A *a)
 }
 
 /* { dg-final { scan-assembler-not {\mmtvsr} } } */
-/* { dg-final { scan-assembler-times {\mlxvd2x\M} 1 { target { be } } } } */
-/* { dg-final { scan-assembler-times {\mstxvd2x\M} 1 { target { be } } } } */
-/* { dg-final { scan-assembler-times {\mlfd\M} 2 { target { le } } } } */
+/* { dg-final { scan-assembler-times {\mlxvd2x\M} 1 } } */
+/* { dg-final { scan-assembler-times {\mstxvd2x\M} 1 } } */


[gcc(refs/users/aoliva/heads/testme)] decay vect tests from run to link for pr95401

2024-04-22 Thread Alexandre Oliva via Gcc-cvs
https://gcc.gnu.org/g:f7a0734ee96341645e18e183210deb0d9a0c97d7

commit f7a0734ee96341645e18e183210deb0d9a0c97d7
Author: Alexandre Oliva 
Date:   Sun Apr 21 17:24:21 2024 -0300

decay vect tests from run to link for pr95401

When vect.exp finds our configuration disables altivec by default, it
disables the execution of vectorization tests, assuming the test
hardware doesn't support it.

Tests become just compile tests, but compile tests won't work
correctly when additional sources are named, e.g. pr95401.cc, because
GCC refuses to compile multiple files into the same asm output.

With this patch, the default for when execution is not possible
becomes link.


for  gcc/testsuite/ChangeLog

* lib/target-supports.exp (check_vect_support_and_set_flags):
Decay to link rather than compile.

Diff:
---
 gcc/testsuite/lib/target-supports.exp | 18 +-
 1 file changed, 9 insertions(+), 9 deletions(-)

diff --git a/gcc/testsuite/lib/target-supports.exp 
b/gcc/testsuite/lib/target-supports.exp
index 3a5713d9869..54a55585371 100644
--- a/gcc/testsuite/lib/target-supports.exp
+++ b/gcc/testsuite/lib/target-supports.exp
@@ -11625,7 +11625,7 @@ proc check_vect_support_and_set_flags { } {
 if [check_750cl_hw_available] {
 set dg-do-what-default run
 } else {
-set dg-do-what-default compile
+set dg-do-what-default link
 }
 } elseif [istarget powerpc*-*-*] {
 # Skip targets not supporting -maltivec.
@@ -11655,14 +11655,14 @@ proc check_vect_support_and_set_flags { } {
 # some other cpu type specified above.
set DEFAULT_VECTCFLAGS [linsert $DEFAULT_VECTCFLAGS 0 
"-mcpu=970"]
 }
-set dg-do-what-default compile
+set dg-do-what-default link
 }
 } elseif { [istarget i?86-*-*] || [istarget x86_64-*-*] } {
 lappend DEFAULT_VECTCFLAGS "-msse2"
 if { [check_effective_target_sse2_runtime] } {
 set dg-do-what-default run
 } else {
-set dg-do-what-default compile
+set dg-do-what-default link
 }
 } elseif { [istarget mips*-*-*]
   && [check_effective_target_nomips16] } {
@@ -11681,7 +11681,7 @@ proc check_vect_support_and_set_flags { } {
 if [check_effective_target_ultrasparc_hw] {
 set dg-do-what-default run
 } else {
-set dg-do-what-default compile
+set dg-do-what-default link
 }
 } elseif [istarget alpha*-*-*] {
 # Alpha's vectorization capabilities are extremely limited.
@@ -11694,7 +11694,7 @@ proc check_vect_support_and_set_flags { } {
 if [check_alpha_max_hw_available] {
 set dg-do-what-default run
 } else {
-set dg-do-what-default compile
+set dg-do-what-default link
 }
 } elseif [istarget ia64-*-*] {
 set dg-do-what-default run
@@ -11707,7 +11707,7 @@ proc check_vect_support_and_set_flags { } {
 if [is-effective-target arm_neon_hw] {
 set dg-do-what-default run
 } else {
-set dg-do-what-default compile
+set dg-do-what-default link
 }
 } elseif [istarget aarch64*-*-*] {
 set dg-do-what-default run
@@ -11731,7 +11731,7 @@ proc check_vect_support_and_set_flags { } {
 set dg-do-what-default run
 } else {
lappend DEFAULT_VECTCFLAGS "-march=z14" "-mzarch"
-set dg-do-what-default compile
+set dg-do-what-default link
 }
 } elseif [istarget amdgcn-*-*] {
 set dg-do-what-default run
@@ -11742,7 +11742,7 @@ proc check_vect_support_and_set_flags { } {
foreach item [add_options_for_riscv_v ""] {
lappend DEFAULT_VECTCFLAGS $item
}
-   set dg-do-what-default compile
+   set dg-do-what-default link
}
 } elseif [istarget loongarch*-*-*] {
   # Set the default vectorization option to "-mlsx" due to the problem
@@ -11751,7 +11751,7 @@ proc check_vect_support_and_set_flags { } {
   if [check_effective_target_loongarch_sx_hw] {
  set dg-do-what-default run
   } else {
- set dg-do-what-default compile
+ set dg-do-what-default link
   }
 } else {
 return 0


[gcc(refs/users/aoliva/heads/testme)] [testsuite] [powerpc] adjust -m32 counts for fold-vec-extract*

2024-04-22 Thread Alexandre Oliva via Gcc-cvs
https://gcc.gnu.org/g:9aad4681cb81920420e3cef32d02acf4bec891d6

commit 9aad4681cb81920420e3cef32d02acf4bec891d6
Author: Alexandre Oliva 
Date:   Sun Apr 21 17:24:41 2024 -0300

[testsuite] [powerpc] adjust -m32 counts for fold-vec-extract*

Codegen changes caused add instruction count mismatches on
ppc-*-linux-gnu and other 32-bit ppc targets.  At some point the
expected counts were adjusted for lp64, but ilp32 differences
remained, and published test results confirm it.


for  gcc/testsuite/ChangeLog

PR testsuite/101169
* gcc.target/powerpc/fold-vec-extract-double.p7.c: Adjust addi
counts for ilp32.
* gcc.target/powerpc/fold-vec-extract-float.p7.c: Likewise.
* gcc.target/powerpc/fold-vec-extract-float.p8.c: Likewise.
* gcc.target/powerpc/fold-vec-extract-int.p7.c: Likewise.
* gcc.target/powerpc/fold-vec-extract-int.p8.c: Likewise.
* gcc.target/powerpc/fold-vec-extract-short.p7.c: Likewise.
* gcc.target/powerpc/fold-vec-extract-short.p8.c: Likewise.

Diff:
---
 gcc/testsuite/gcc.target/powerpc/fold-vec-extract-double.p7.c | 5 ++---
 gcc/testsuite/gcc.target/powerpc/fold-vec-extract-float.p7.c  | 5 ++---
 gcc/testsuite/gcc.target/powerpc/fold-vec-extract-float.p8.c  | 2 +-
 gcc/testsuite/gcc.target/powerpc/fold-vec-extract-int.p7.c| 3 +--
 gcc/testsuite/gcc.target/powerpc/fold-vec-extract-int.p8.c| 2 +-
 gcc/testsuite/gcc.target/powerpc/fold-vec-extract-short.p7.c  | 3 +--
 gcc/testsuite/gcc.target/powerpc/fold-vec-extract-short.p8.c  | 2 +-
 7 files changed, 9 insertions(+), 13 deletions(-)

diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-double.p7.c 
b/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-double.p7.c
index 3cae644b90b..e69d9253e2d 100644
--- a/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-double.p7.c
+++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-double.p7.c
@@ -13,12 +13,11 @@
 /* { dg-final { scan-assembler-times {\mxxpermdi\M} 1 } } */
 /* { dg-final { scan-assembler-times {\mli\M} 1 } } */
 /* -m32 target has an 'add' in place of one of the 'addi'. */
-/* { dg-final { scan-assembler-times {\maddi\M|\madd\M} 2 { target lp64 } } } 
*/
-/* { dg-final { scan-assembler-times {\maddi\M|\madd\M} 3 { target ilp32 } } } 
*/
+/* { dg-final { scan-assembler-times {\maddi?\M} 2 } } */
 /* -m32 target has a rlwinm in place of a rldic .  */
 /* { dg-final { scan-assembler-times {\mrldic\M|\mrlwinm\M} 1 } } */
 /* { dg-final { scan-assembler-times {\mstxvd2x\M} 1 } } */
-/* { dg-final { scan-assembler-times {\mlfdx\M|\mlfd\M} 1 } } */
+/* { dg-final { scan-assembler-times {\mlfdx?\M} 1 } } */
 
 #include 
 
diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-float.p7.c 
b/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-float.p7.c
index 59a4979457d..9ff197a7049 100644
--- a/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-float.p7.c
+++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-float.p7.c
@@ -12,13 +12,12 @@
 /* { dg-final { scan-assembler-times {\mxscvspdp\M} 1 } } */
 /* { dg-final { scan-assembler-times {\mli\M} 1 } } */
 /* -m32 as an add in place of an addi. */
-/* { dg-final { scan-assembler-times {\maddi\M|\madd\M} 2 { target lp64 } } } 
*/
-/* { dg-final { scan-assembler-times {\maddi\M|\madd\M} 3 { target ilp32 } } } 
*/
+/* { dg-final { scan-assembler-times {\maddi?\M} 2 } } */
 /* { dg-final { scan-assembler-times {\mstxvd2x\M|\mstvx\M|\mstxv\M} 1 } } */
 /* -m32 uses rlwinm in place of rldic */
 /* { dg-final { scan-assembler-times {\mrldic\M|\mrlwinm\M} 1 } } */
 /* -m32 has lfs in place of lfsx */
-/* { dg-final { scan-assembler-times {\mlfsx\M|\mlfs\M} 1 } } */
+/* { dg-final { scan-assembler-times {\mlfsx?\M} 1 } } */
 
 #include 
 
diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-float.p8.c 
b/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-float.p8.c
index ce4e43c1fb4..cd80c5e1b19 100644
--- a/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-float.p8.c
+++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-float.p8.c
@@ -26,7 +26,7 @@
 /* { dg-final { scan-assembler-times {\mstxvd2x\M} 1 { target ilp32 } } } */
 /* { dg-final { scan-assembler-times {\madd\M} 1 { target ilp32 } } } */
 /* { dg-final { scan-assembler-times {\mlfs\M} 1 { target ilp32 } } } */
-/* { dg-final { scan-assembler-times {\maddi\M} 2 { target ilp32 } } } */
+/* { dg-final { scan-assembler-times {\maddi\M} 1 { target ilp32 } } } */
 
 
 #include 
diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-int.p7.c 
b/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-int.p7.c
index 3729a1646e9..cc3c803b49c 100644
--- a/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-int.p7.c
+++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-int.p7.c
@@ -10,8 +10,7 @@
 // P7 variables:  li, addi, stxvw4x, lwa/lwz
 
 /* { dg-final { scan-assembler-times {\mli\M} 6 } } */
-/* { dg-final { scan-assemble

[gcc(refs/users/aoliva/heads/testme)] xfail fetestexcept test - ppc always uses fcmpu

2024-04-22 Thread Alexandre Oliva via Gcc-cvs
https://gcc.gnu.org/g:2062c8d2122c4b7dc82af9a7114136ca371da5ff

commit 2062c8d2122c4b7dc82af9a7114136ca371da5ff
Author: Alexandre Oliva 
Date:   Sun Apr 21 17:24:11 2024 -0300

xfail fetestexcept test - ppc always uses fcmpu

gcc.dg/torture/pr91323.c tests that a compare with NaNf doesn't set an
exception using builtin compare intrinsics, and that it does when
using regular compare operators.

That doesn't seem to be expected to work on powerpc targets.  It fails
on GNU/Linux, it's marked to be skipped on AIX, and a similar test,
gcc.dg/torture/pr93133.c, has the execution test xfailed for all of
powerpc*-*-*.

In this test, the functions that use intrinsics for the compare end up
with the same code as the one that uses compare operators, using
fcmpu, a floating compare that, unlike fcmpo, does not set the invalid
operand exception for quiet NaN.  I couldn't find any evidence that
the rs6000 backend ever outputs fcmpo.  Therefore, I'm adding the same
execution xfail marker to this test.


for  gcc/testsuite/ChangeLog

PR target/58684
* gcc.dg/torture/pr91323.c: Expect execution fail on
powerpc*-*-*.

Diff:
---
 gcc/testsuite/gcc.dg/torture/pr91323.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/gcc/testsuite/gcc.dg/torture/pr91323.c 
b/gcc/testsuite/gcc.dg/torture/pr91323.c
index 1411fcaa396..f188faa3ccf 100644
--- a/gcc/testsuite/gcc.dg/torture/pr91323.c
+++ b/gcc/testsuite/gcc.dg/torture/pr91323.c
@@ -1,4 +1,5 @@
-/* { dg-do run } */
+/* { dg-do run { xfail powerpc*-*-* } } */
+/* The ppc xfail is because of PR target/58684.  */
 /* { dg-add-options ieee } */
 /* { dg-require-effective-target fenv_exceptions } */
 /* { dg-skip-if "fenv" { powerpc-ibm-aix* } } */


[gcc(refs/users/aoliva/heads/testme)] [testsuite] require sqrt_insn effective target where needed

2024-04-22 Thread Alexandre Oliva via Gcc-cvs
https://gcc.gnu.org/g:4923693ac47e4bb3d6a6d72dd538fbeec68c478d

commit 4923693ac47e4bb3d6a6d72dd538fbeec68c478d
Author: Alexandre Oliva 
Date:   Mon Apr 22 01:12:55 2024 -0300

[testsuite] require sqrt_insn effective target where needed

Some tests fail on ppc and ppc64 when testing a compiler [with options
for] for a CPU [emulator] that doesn't support the sqrt insn.

The gcc.dg/cdce3.c is one in which the expected shrink-wrap
optimization only takes place when the target CPU supports a sqrt
insn.

The gcc.target/powerpc/pr46728-1[0-4].c tests use -mpowerpc-gpopt and
call sqrt(), which involves the sqrt insn that the target CPU under
test may not support.

Require a sqrt_insn effective target for all the affected tests.


for  gcc/testsuite/ChangeLog

* gcc.dg/cdce3.c: Require sqrt_insn effective target.
* gcc.target/powerpc/pr46728-10.c: Likewise.
* gcc.target/powerpc/pr46728-11.c: Likewise.
* gcc.target/powerpc/pr46728-13.c: Likewise.
* gcc.target/powerpc/pr46728-14.c: Likewise.

Diff:
---
 gcc/testsuite/gcc.dg/cdce3.c  | 3 ++-
 gcc/testsuite/gcc.target/powerpc/pr46728-10.c | 1 +
 gcc/testsuite/gcc.target/powerpc/pr46728-11.c | 1 +
 gcc/testsuite/gcc.target/powerpc/pr46728-13.c | 1 +
 gcc/testsuite/gcc.target/powerpc/pr46728-14.c | 1 +
 5 files changed, 6 insertions(+), 1 deletion(-)

diff --git a/gcc/testsuite/gcc.dg/cdce3.c b/gcc/testsuite/gcc.dg/cdce3.c
index 601ddf055fd..f759a95972e 100644
--- a/gcc/testsuite/gcc.dg/cdce3.c
+++ b/gcc/testsuite/gcc.dg/cdce3.c
@@ -1,7 +1,8 @@
 /* { dg-do compile } */
 /* { dg-require-effective-target hard_float } */
+/* { dg-require-effective-target sqrt_insn } */
 /* { dg-options "-O2 -fmath-errno -fdump-tree-cdce-details 
-fdump-tree-optimized" } */
-/* { dg-final { scan-tree-dump "cdce3.c:11: \[^\n\r]* function call is 
shrink-wrapped into error conditions\." "cdce" } } */
+/* { dg-final { scan-tree-dump "cdce3.c:12: \[^\n\r]* function call is 
shrink-wrapped into error conditions\." "cdce" } } */
 /* { dg-final { scan-tree-dump "sqrtf \\(\[^\n\r]*\\); \\\[tail call\\\]" 
"optimized" } } */
 /* { dg-skip-if "doesn't have a sqrtf insn" { mmix-*-* } } */
 
diff --git a/gcc/testsuite/gcc.target/powerpc/pr46728-10.c 
b/gcc/testsuite/gcc.target/powerpc/pr46728-10.c
index 3be4728d333..7e9bb638106 100644
--- a/gcc/testsuite/gcc.target/powerpc/pr46728-10.c
+++ b/gcc/testsuite/gcc.target/powerpc/pr46728-10.c
@@ -1,6 +1,7 @@
 /* { dg-do run } */
 /* { dg-skip-if "-mpowerpc-gpopt not supported" { powerpc*-*-darwin* } } */
 /* { dg-options "-O2 -ffast-math -fno-inline -fno-unroll-loops -lm 
-mpowerpc-gpopt" } */
+/* { dg-require-effective-target sqrt_insn } */
 
 #include 
 
diff --git a/gcc/testsuite/gcc.target/powerpc/pr46728-11.c 
b/gcc/testsuite/gcc.target/powerpc/pr46728-11.c
index 43b6728a4b8..5bfa2592567 100644
--- a/gcc/testsuite/gcc.target/powerpc/pr46728-11.c
+++ b/gcc/testsuite/gcc.target/powerpc/pr46728-11.c
@@ -1,6 +1,7 @@
 /* { dg-do run } */
 /* { dg-skip-if "-mpowerpc-gpopt not supported" { powerpc*-*-darwin* } } */
 /* { dg-options "-O2 -ffast-math -fno-inline -fno-unroll-loops -lm 
-mpowerpc-gpopt" } */
+/* { dg-require-effective-target sqrt_insn } */
 
 #include 
 
diff --git a/gcc/testsuite/gcc.target/powerpc/pr46728-13.c 
b/gcc/testsuite/gcc.target/powerpc/pr46728-13.c
index b9fd63973b7..b66d0209a5e 100644
--- a/gcc/testsuite/gcc.target/powerpc/pr46728-13.c
+++ b/gcc/testsuite/gcc.target/powerpc/pr46728-13.c
@@ -1,6 +1,7 @@
 /* { dg-do run } */
 /* { dg-skip-if "-mpowerpc-gpopt not supported" { powerpc*-*-darwin* } } */
 /* { dg-options "-O2 -ffast-math -fno-inline -fno-unroll-loops -lm 
-mpowerpc-gpopt" } */
+/* { dg-require-effective-target sqrt_insn } */
 
 #include 
 
diff --git a/gcc/testsuite/gcc.target/powerpc/pr46728-14.c 
b/gcc/testsuite/gcc.target/powerpc/pr46728-14.c
index 5a13bdb..71a1a70c4e7 100644
--- a/gcc/testsuite/gcc.target/powerpc/pr46728-14.c
+++ b/gcc/testsuite/gcc.target/powerpc/pr46728-14.c
@@ -1,6 +1,7 @@
 /* { dg-do run } */
 /* { dg-skip-if "-mpowerpc-gpopt not supported" { powerpc*-*-darwin* } } */
 /* { dg-options "-O2 -ffast-math -fno-inline -fno-unroll-loops -lm 
-mpowerpc-gpopt" } */
+/* { dg-require-effective-target sqrt_insn } */
 
 #include 


[gcc/aoliva/heads/testme] (5 commits) add explicit ABI and align options to pr88233.c

2024-04-22 Thread Alexandre Oliva via Gcc-cvs
The branch 'aoliva/heads/testme' was updated to point to:

 68e3d62f56e... add explicit ABI and align options to pr88233.c

It previously pointed to:

 edf330eeb9d... [testsuite] [powerpc] adjust -m32 counts for fold-vec-extra

Diff:

!!! WARNING: THE FOLLOWING COMMITS ARE NO LONGER ACCESSIBLE (LOST):
---

  edf330e... [testsuite] [powerpc] adjust -m32 counts for fold-vec-extra
  960142e... decay vect tests from run to link for pr95401
  1dd110c... xfail fetestexcept test - ppc always uses fcmpu
  cef8842... [testsuite] require sqrt_insn effective target where needed
  c5fbace... add explicit ABI and align options to pr88233.c


Summary of changes (added commits):
---

  68e3d62... add explicit ABI and align options to pr88233.c
  9aad468... [testsuite] [powerpc] adjust -m32 counts for fold-vec-extra
  f7a0734... decay vect tests from run to link for pr95401
  2062c8d... xfail fetestexcept test - ppc always uses fcmpu
  4923693... [testsuite] require sqrt_insn effective target where needed


[gcc r14-10081] RISC-V: Adjust overlap attr after revert d3544cea63d and e65aaf8efe1

2024-04-22 Thread Pan Li via Gcc-cvs
https://gcc.gnu.org/g:2a8187e0a1cf5fb5d1adcb5a2a2b579a80215202

commit r14-10081-g2a8187e0a1cf5fb5d1adcb5a2a2b579a80215202
Author: Pan Li 
Date:   Mon Apr 22 21:20:02 2024 +0800

RISC-V: Adjust overlap attr after revert d3544cea63d and e65aaf8efe1

After we reverted below 2 commits, the reference to attr need some
adjustment as the group_overlap is no longer available.

* RISC-V: Robostify the W43, W86, W87 constraint enabled attribute
* RISC-V: Rename vconstraint into group_overlap

The below tests are passed for this patch.

* The rv64gcv fully regression tests.

gcc/ChangeLog:

* config/riscv/vector-crypto.md:

Signed-off-by: Pan Li 

Diff:
---
 gcc/config/riscv/vector-crypto.md | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/gcc/config/riscv/vector-crypto.md 
b/gcc/config/riscv/vector-crypto.md
index 519c6a10d94..23dc549e5b8 100755
--- a/gcc/config/riscv/vector-crypto.md
+++ b/gcc/config/riscv/vector-crypto.md
@@ -322,7 +322,7 @@
   "vwsll.v%o4\t%0,%3,%4%p1"
   [(set_attr "type" "vwsll")
(set_attr "mode" "")
-   (set_attr "group_overlap" 
"W21,W21,W21,W21,W42,W42,W42,W42,W84,W84,W84,W84,none,none")])
+   (set_attr "vconstraint" 
"W21,W21,W21,W21,W42,W42,W42,W42,W84,W84,W84,W84,no,no")])
 
 ;; vbrev.v vbrev8.v vrev8.v
 (define_insn "@pred_v"


[gcc(refs/vendors/microsoft/heads/main)] Merge commit 'ef2392236ec629351496d7f299d6a0956080e4d9' into merge-master-ef2392236ec629351496d7f299

2024-04-22 Thread Eugene Rozenfeld via Gcc-cvs
https://gcc.gnu.org/g:012850a7800c90506ecefda08067edf7c0035826

commit 012850a7800c90506ecefda08067edf7c0035826
Merge: b707d632683 ef2392236ec
Author: MS Automation 
Date:   Sun Apr 21 13:17:55 2024 +

Merge commit 'ef2392236ec629351496d7f299d6a0956080e4d9' into 
merge-master-ef2392236ec629351496d7f299d6a0956080e4d9-2024-04-21T13-17-53

Diff:

 ChangeLog  |38 +
 MAINTAINERS| 6 +-
 Makefile.in|33 +
 Makefile.tpl   |26 +-
 config/ChangeLog   |14 +
 config/acx.m4  |10 +
 config/lcmessage.m4| 4 +-
 configure  |80 +
 configure.ac   |30 +
 contrib/ChangeLog  |18 +
 contrib/check-params-in-docs.py|19 +-
 contrib/config-list.mk | 3 +-
 contrib/gcc-changelog/git_update_version.py| 3 +-
 gcc/ChangeLog  |  1472 ++
 gcc/DATESTAMP  | 2 +-
 gcc/ada/ChangeLog  | 9 +
 .../doc/gnat_rm/implementation_defined_aspects.rst |12 +
 .../doc/gnat_rm/implementation_defined_pragmas.rst |18 +
 gcc/ada/gnat_rm.texi   |  1649 +-
 gcc/ada/gnat_ugn.texi  | 4 +-
 gcc/analyzer/ChangeLog |85 +
 gcc/analyzer/access-diagram.cc |12 +-
 gcc/analyzer/analyzer.opt  | 2 +-
 gcc/analyzer/call-details.cc   |33 +-
 gcc/analyzer/call-summary.cc   |12 +
 gcc/analyzer/infinite-loop.cc  |22 +
 gcc/analyzer/infinite-recursion.cc |13 +
 gcc/analyzer/program-state.cc  | 4 +-
 gcc/analyzer/ranges.cc |15 +
 gcc/analyzer/ranges.h  | 4 +
 gcc/analyzer/region-model-manager.cc   | 2 +
 gcc/analyzer/region-model.cc   | 9 +-
 gcc/analyzer/region.cc | 2 +-
 gcc/analyzer/sm-taint.cc   |15 +-
 gcc/analyzer/store.cc  |20 +-
 gcc/asan.cc|29 +-
 gcc/attribs.cc | 7 +-
 gcc/auto-profile.cc| 1 -
 gcc/btfout.cc  |   169 +-
 gcc/builtins.cc| 2 +-
 gcc/c-family/ChangeLog |34 +
 gcc/c-family/c-common.cc   |15 +-
 gcc/c-family/c-pretty-print.cc | 2 +
 gcc/c-family/c-warn.cc | 1 -
 gcc/c-family/c.opt | 4 +
 gcc/c-family/c.opt.urls| 3 +
 gcc/c/ChangeLog|37 +
 gcc/c/c-decl.cc|53 +-
 gcc/c/c-typeck.cc  | 4 +-
 gcc/cfganal.cc |15 +-
 gcc/cfgloopmanip.cc| 2 +-
 gcc/cgraph.h   | 6 +
 gcc/cgraphunit.cc  | 2 +
 gcc/collect2.cc| 7 +-
 gcc/combine.cc |16 +-
 gcc/common.opt | 9 +
 gcc/common.opt.urls| 6 +
 gcc/common/config/riscv/riscv-common.cc| 1 -
 gcc/config.gcc |46 +-
 gcc/config/aarch64/aarch64-arches.def  | 2 +-
 gcc/config/aarch64/aarch64-c.cc| 6 +-
 gcc/config/aarch64/aarch64-cores.def   | 4 +-
 gcc/config/aarch64/aarch64-feature-deps.h  | 6 +-
 gcc/config/aarch64/aarch64-gnu.h   |68 +
 gcc/config/aarch64/aarch64-ldp-fusion.cc   | 2 +-
 gcc/config/aarch64/aarch64-option-extensions.def   |93 +-
 gcc/config/aarch64/aarch64-protos.h| 6 +-
 gcc/config/aarch64/aarch64-sve-builtins-base.cc|52 +-
 gcc/config/aarch64/aarch64-sve-builtins.cc |   104 +-
 gcc/config/aarch64/aarch64-sve-builtins.h  |18 +-
 gcc/config/aarch64/aarch64-sve.md  |22 +-
 gcc/config/aarch64/aarch64.cc  |   138 +-
 gcc/config/aarch64/aarch64.h   | 3 +-
 gcc/config/aarch64/aarch64.md  |23 +-
 gcc/config/a

[gcc/microsoft/heads/main] (408 commits) Merge commit 'ef2392236ec629351496d7f299d6a0956080e4d9' int

2024-04-22 Thread Eugene Rozenfeld via Gcc-cvs
The branch 'microsoft/heads/main' was updated to point to:

 012850a7800... Merge commit 'ef2392236ec629351496d7f299d6a0956080e4d9' int

It previously pointed to:

 b707d632683... Merge commit 'ecd2c373720af214f20671f9e7d760548b51ef4a' int

Diff:

Summary of changes (added commits):
---

  012850a... Merge commit 'ef2392236ec629351496d7f299d6a0956080e4d9' int
  ef23922... Revert "RISC-V: Support highpart register overlap for widen (*)
  d37b34f... RISC-V: Add xfail test case for incorrect overlap on v0 (*)
  a7d01a7... Daily bump. (*)
  3afcb04... Revert "RISC-V: Fix overlap group incorrect overlap on v0" (*)
  f9a48fe... PR modula2/112893 full type checking between proctype and p (*)
  1690e47... RISC-V: Add xfail test case for wv insn highest overlap (*)
  f5447ea... Revert "RISC-V: Support highest overlap for wv instructions (*)
  9f10005... RISC-V: Add xfail test case for wv insn register overlap (*)
  0cbeafe... Revert "RISC-V: Support one more overlap for wv instruction (*)
  90ded75... Daily bump. (*)
  c23db3e... i386: Fix up *avx2_eq3 constraints [PR114783] (*)
  2afdecc... c-family: Allow arguments with NULLPTR_TYPE as sentinels [P (*)
  a39983b... c: Fix ICE with -g and -std=c23 related to incomplete types (*)
  d86472a... libstdc++: Simplify constraints on <=> for std::reference_w (*)
  eed7fb1... libstdc++: Support link chains in std::chrono::tzdb::locate (*)
  e8f0540... Update gcc sv.po (*)
  33bf8e5... internal-fn: Fix up expand_arith_overflow [PR114753] (*)
  1216460... middle-end: refactory vect_recog_absolute_difference to sim (*)
  9451b6c... Enable 'gcc.dg/pr114768.c' for nvptx target [PR114768] (*)
  ede01df... bpf: remove huge memory waste with string allocation. (*)
  d7190d0... bpf: support more instructions to match CO-RE relocations (*)
  4d4929f... d: Fix ICE in build_deref, at d/d-codegen.cc:1650 [PR111650 (*)
  9f29584... rtlanal: Fix set_noop_p for volatile loads or stores [PR114 (*)
  36f4c8a... libgcc: Another __divmodbitint4 bug fix [PR114762] (*)
  694fa37... [vxworks] avoid mangling __STDC_VERSION_LIMITS_H__ (*)
  85c187b... Daily bump. (*)
  e498ba9... Add nios2*-*-* to the list of obsolete targets (*)
  e243d0f... Fortran: Fix ICE and clear incorrect error messages [PR1147 (*)
  7eecc08... [testsuite] [i386] add -msse2 to tests that require it (*)
  0ea96af... [testsuite] [i386] work around fails with --enable-frame-po (*)
  36d0038... [testsuite] [arm] accept empty init for bfloat16 (*)
  ce2dfc5... [c++] [testsuite] adjust contracts9.C for negative addresse (*)
  df92df0... [testsuite] [aarch64] Require fpic effective target. (*)
  514c6b1... [testsuite] [i386] require fpic for pr111497.C (*)
  cc02ebf... [testsuite] xfail pr103798-2 in C++ on vxworks too [PR11370 (*)
  e965162... [testsuite] [analyzer] include sys/select.h if available (*)
  8a11709... [testsuite] [analyzer] require fork where used (*)
  5be4f20... [testsuite] [analyzer] skip access-mode: O_ACCMODE on vxwor (*)
  76a1bcc... [testsuite] [analyzer] avoid vxworks libc mode_t (*)
  5dfbc05... [testsuite] introduce strndup effective target (*)
  dcf0bd1... [libstdc++] [testsuite] disable SRA for compare_exchange_pa (*)
  5b17817... [libstdc++] [testsuite] xfail double-prec from_chars for fl (*)
  da3504a... [libstdc++] define zoneinfo_dir_override on vxworks (*)
  a2f4be3... AArch64: remove reliance on register allocator for simd/gpr (*)
  82d6d38... libgcc: Fix up __divmodbitint4 [PR114755] (*)
  6c152c9... internal-fn: Temporarily disable flag_trapv during .{ADD,SU (*)
  6e62ede... testsuite, rs6000: Fix builtins-6-p9-runnable.c for BE [PR1 (*)
  58a0b19... rs6000: Fix bcd test case (*)
  69576bc... Daily bump. (*)
  7c2a9db... libstdc++: Implement "Printing blank lines with println" fo (*)
  5705614... DOCUMENTATION_ROOT_URL vs. release branches [PR114738] (*)
  a9fefbf... libcpp: Regenerate aclocal.m4 and configure [PR 114748] (*)
  bf2b523... tree-optimization/114749 - reset partial vector decision fo (*)
  420ece6... GCN: Enable effective-target 'vect_long_long' (*)
  909c6fa... AVR: target/114752 - Fix ICE on inline asm const 64-bit flo (*)
  3cfe94a... libstdc++: Add include guard to simd-internal header (*)
  0fc7f3c... libstdc++: Avoid ill-formed types on ARM (*)
  299d14a... asan: Don't instrument .ABNORMAL_DISPATCHER [PR114743] (*)
  9c7cf5d... Daily bump. (*)
  eadd05d... PR modula2/114745: const cast causes ICE (*)
  f438acf... testsuite: Fix data check loop on vect-early-break_124-pr11 (*)
  48024a9... Fortran: ALLOCATE of fixed-length CHARACTER with SOURCE/MOL (*)
  4437482... libstdc++: Fix "extact" typos in comments (*)
  8eddd87... Document that vector_size works with typedefs [PR92880] (*)
  f949481... tree-optimization/114736 - SLP DFS walk issue (*)
  45a41ac... tree-optimization/114733 - neg induction fails for 1 elemen (*)
  a7578a0... OpenACC 2.7: Adjust acc_map_data/acc_unmap_data interaction (*)
  274f6bb... Fix some comment nits (*)
  dc17e75...

[gcc r14-10080] PR modula2/114811 string set incl ICE bugfix

2024-04-22 Thread Gaius Mulley via Gcc-cvs
https://gcc.gnu.org/g:b909daa5b67317e46543a7b2ed76e82298645cf6

commit r14-10080-gb909daa5b67317e46543a7b2ed76e82298645cf6
Author: Gaius Mulley 
Date:   Mon Apr 22 20:34:11 2024 +0100

PR modula2/114811 string set incl ICE bugfix

This patch corrects gm2-torture.exp to recognize an ICE
in the fail case as a negative result.  The patch also fixes
FoldBinarySet so that the types are only checked once the operands
have been resolved.  Without this patch
gcc/testsuite/gm2/iso/fail/badexpression2.mod would cause an ICE.

gcc/m2/ChangeLog:

PR modula2/114811
* gm2-compiler/M2GenGCC.mod (FoldBinarySet): Add condition
checking to ensure op2 and op3 are fully resolved before
type checking is performed.

gcc/testsuite/ChangeLog:

PR modula2/114811
* lib/gm2-torture.exp: Correct regexp checking for internal
compiler error strings in compiler output.

Signed-off-by: Gaius Mulley 

Diff:
---
 gcc/m2/gm2-compiler/M2GenGCC.mod  | 43 +--
 gcc/testsuite/lib/gm2-torture.exp |  7 ---
 2 files changed, 27 insertions(+), 23 deletions(-)

diff --git a/gcc/m2/gm2-compiler/M2GenGCC.mod b/gcc/m2/gm2-compiler/M2GenGCC.mod
index da52c924974..26ed399b24c 100644
--- a/gcc/m2/gm2-compiler/M2GenGCC.mod
+++ b/gcc/m2/gm2-compiler/M2GenGCC.mod
@@ -5000,29 +5000,32 @@ BEGIN
TryDeclareConstant(tokenno, op3) ;
location := TokenToLocation(tokenno) ;
 
-   IF CheckBinaryExpressionTypes (quad, p)
+   IF GccKnowsAbout(op2) AND GccKnowsAbout(op3)
THEN
-  IF IsConst(op2) AND IsConstSet(op2) AND
- IsConst(op3) AND IsConstSet(op3) AND
- IsConst(op1)
+  IF CheckBinaryExpressionTypes (quad, p)
   THEN
- IF IsValueSolved(op2) AND IsValueSolved(op3)
+ IF IsConst(op2) AND IsConstSet(op2) AND
+IsConst(op3) AND IsConstSet(op3) AND
+IsConst(op1)
  THEN
-Assert(MixTypes(FindType(op3), FindType(op2), tokenno)#NulSym) ;
-PutConst(op1, MixTypes(FindType(op3), FindType(op2), tokenno)) ;
-PushValue(op2) ;
-PushValue(op3) ;
-op(tokenno) ;
-PopValue(op1) ;
-PushValue(op1) ;
-PutConstSet(op1) ;
-AddModGcc(op1,
-  DeclareKnownConstant(location,
-   Mod2Gcc(GetType(op3)),
-   PopSetTree(tokenno))) ;
-p(op1) ;
-NoChange := FALSE ;
-SubQuad(quad)
+IF IsValueSolved(op2) AND IsValueSolved(op3)
+THEN
+   Assert(MixTypes(FindType(op3), FindType(op2), tokenno)#NulSym) ;
+   PutConst(op1, MixTypes(FindType(op3), FindType(op2), tokenno)) ;
+   PushValue(op2) ;
+   PushValue(op3) ;
+   op(tokenno) ;
+   PopValue(op1) ;
+   PushValue(op1) ;
+   PutConstSet(op1) ;
+   AddModGcc(op1,
+ DeclareKnownConstant(location,
+  Mod2Gcc(GetType(op3)),
+  PopSetTree(tokenno))) ;
+   p(op1) ;
+   NoChange := FALSE ;
+   SubQuad(quad)
+END
  END
   END
END
diff --git a/gcc/testsuite/lib/gm2-torture.exp 
b/gcc/testsuite/lib/gm2-torture.exp
index 090929954ca..c29b0b4d1a0 100644
--- a/gcc/testsuite/lib/gm2-torture.exp
+++ b/gcc/testsuite/lib/gm2-torture.exp
@@ -138,7 +138,7 @@ proc gm2-torture-compile { src option } {
 
 proc gm2_check_compile_fail {testcase option objname gcc_output} {
 global tool;
-set fatal_signal "*cc: Internal compiler error: program*got fatal signal"
+set fatal_signal "*nternal compiler error: program*got fatal signal"
 
 if [string match "$fatal_signal 6" $gcc_output] then {
${tool}_fail $testcase "Got Signal 6, $option"
@@ -170,8 +170,9 @@ proc gm2_check_compile_fail {testcase option objname 
gcc_output} {
 regsub -all -- "\[\r\n\]*" $gcc_output "" gcc_output
 
 # check for any internal error
-if { [string match "internal error" $gcc_output] ||
-[string match "internal compiler error" $gcc_output] } then {
+if { [string match "*internal error*" $gcc_output] ||
+[string match "*internal compiler error*" $gcc_output] } then {
+   puts stderr "ICE: "
${tool}_fail $testcase $option
return 0
 }


[gcc r14-10079] libstdc++: Fix conversion of simd to vector builtin

2024-04-22 Thread Matthias Kretz via Libstdc++-cvs
https://gcc.gnu.org/g:7ef139146a8923a8719873ca3fdae175668e8d63

commit r14-10079-g7ef139146a8923a8719873ca3fdae175668e8d63
Author: Matthias Kretz 
Date:   Mon Apr 22 16:12:34 2024 +0200

libstdc++: Fix conversion of simd to vector builtin

Signed-off-by: Matthias Kretz 

libstdc++-v3/ChangeLog:

PR libstdc++/114803
* include/experimental/bits/simd_builtin.h
(_SimdBase2::operator __vector_type_t): There is no __builtin()
function in _SimdWrapper, instead use its conversion operator.
* testsuite/experimental/simd/pr114803_vecbuiltin_cvt.cc: New
test.

Diff:
---
 .../include/experimental/bits/simd_builtin.h   |   2 +-
 .../experimental/simd/pr114803_vecbuiltin_cvt.cc   | 105 +
 2 files changed, 106 insertions(+), 1 deletion(-)

diff --git a/libstdc++-v3/include/experimental/bits/simd_builtin.h 
b/libstdc++-v3/include/experimental/bits/simd_builtin.h
index 49c7c7e1c70..4ceeb423894 100644
--- a/libstdc++-v3/include/experimental/bits/simd_builtin.h
+++ b/libstdc++-v3/include/experimental/bits/simd_builtin.h
@@ -841,7 +841,7 @@ template 
 
   _GLIBCXX_SIMD_ALWAYS_INLINE explicit
   operator __vector_type_t<_Tp, _Np>() const
-  { return static_cast*>(this)->_M_data.__builtin(); 
}
+  { return __data(*static_cast*>(this)); }
 };
 
 struct _SimdBase1
diff --git 
a/libstdc++-v3/testsuite/experimental/simd/pr114803_vecbuiltin_cvt.cc 
b/libstdc++-v3/testsuite/experimental/simd/pr114803_vecbuiltin_cvt.cc
new file mode 100644
index 000..103dd19394c
--- /dev/null
+++ b/libstdc++-v3/testsuite/experimental/simd/pr114803_vecbuiltin_cvt.cc
@@ -0,0 +1,105 @@
+// { dg-options "-std=gnu++17" }
+// { dg-do compile { target c++17 } }
+
+#include 
+
+template 
+  void
+  maybe_test()
+  {
+using V = std::experimental::simd>;
+if constexpr (std::is_destructible_v)
+  {
+   using V2 [[gnu::vector_size(16)]] = T;
+   V x = {};
+   V2 x2 = static_cast(x);
+   x = static_cast(x2);
+   for (unsigned i = 0; i < V::size(); ++i)
+ {
+   if (x2[i] != 0)
+ __builtin_abort();
+ }
+#ifdef __SSE__
+   if constexpr (std::is_same_v)
+ x = static_cast(static_cast<__m128>(x));
+   else if constexpr (std::is_same_v)
+ x = static_cast(static_cast<__m128d>(x));
+   else if constexpr (std::is_integral_v)
+ x = static_cast(static_cast<__m128i>(x));
+#elif __ALTIVEC__
+   if constexpr (std::is_same_v)
+ x = static_cast(static_cast<__vector float>(x));
+#ifdef __VSX__
+   else if constexpr (std::is_same_v)
+ x = static_cast(static_cast<__vector double>(x));
+#endif
+   else if constexpr (std::is_integral_v && sizeof(T) == sizeof(signed 
char)
+&& std::is_signed_v)
+ x = static_cast(static_cast<__vector signed char>(x));
+   else if constexpr (std::is_integral_v && sizeof(T) == sizeof(signed 
char))
+ x = static_cast(static_cast<__vector unsigned char>(x));
+   else if constexpr (std::is_integral_v && sizeof(T) == sizeof(short)
+&& std::is_signed_v)
+ x = static_cast(static_cast<__vector signed short>(x));
+   else if constexpr (std::is_integral_v && sizeof(T) == sizeof(short))
+ x = static_cast(static_cast<__vector unsigned short>(x));
+   else if constexpr (std::is_integral_v && sizeof(T) == sizeof(int)
+&& std::is_signed_v)
+ x = static_cast(static_cast<__vector signed int>(x));
+   else if constexpr (std::is_integral_v && sizeof(T) == sizeof(int))
+ x = static_cast(static_cast<__vector unsigned int>(x));
+#ifdef __VSX__
+   else if constexpr (std::is_integral_v && sizeof(T) == sizeof(long 
long)
+&& std::is_signed_v)
+ x = static_cast(static_cast<__vector signed long long>(x));
+   else if constexpr (std::is_integral_v && sizeof(T) == sizeof(long 
long))
+ x = static_cast(static_cast<__vector unsigned long long>(x));
+#endif
+#elif __ARM_NEON
+   if constexpr (std::is_same_v)
+ x = static_cast(static_cast(x));
+#ifdef __aarch64__
+   else if constexpr (std::is_same_v)
+ x = static_cast(static_cast(x));
+#endif
+   else if constexpr (std::is_integral_v && sizeof(T) == 1 && 
std::is_signed_v)
+ x = static_cast(static_cast(x));
+   else if constexpr (std::is_integral_v && sizeof(T) == 1)
+ x = static_cast(static_cast(x));
+   else if constexpr (std::is_integral_v && sizeof(T) == 2 && 
std::is_signed_v)
+ x = static_cast(static_cast(x));
+   else if constexpr (std::is_integral_v && sizeof(T) == 2)
+ x = static_cast(static_cast(x));
+   else if constexpr (std::is_integral_v && sizeof(T) == 4 && 
std::is_signed_v)
+ x = static_cast(static_cast(x));
+   else if constexpr (std::is_integral_v && s

[gcc r14-10078] libstdc++: Silence irrelevant warnings in

2024-04-22 Thread Matthias Kretz via Gcc-cvs
https://gcc.gnu.org/g:e7a3ad29c9c832b6ae999cbfb0af89e121959030

commit r14-10078-ge7a3ad29c9c832b6ae999cbfb0af89e121959030
Author: Matthias Kretz 
Date:   Wed Apr 17 10:35:47 2024 +0200

libstdc++: Silence irrelevant warnings in 

Avoid
-Wnarrowing in C code;
-Wtautological-compare in unconditional static_assert (necessary for
faking a dependency on a template parameter)

Signed-off-by: Matthias Kretz 

libstdc++-v3/ChangeLog:

* include/experimental/bits/simd.h: Ignore -Wnarrowing for
arm_neon.h.
(__int_for_sizeof): Replace tautological compare with checking
for invalid template parameter value.
* include/experimental/bits/simd_builtin.h (__extract_part):
Remove tautological compare by combining two static_assert.

Diff:
---
 libstdc++-v3/include/experimental/bits/simd.h | 8 +++-
 libstdc++-v3/include/experimental/bits/simd_builtin.h | 3 +--
 2 files changed, 8 insertions(+), 3 deletions(-)

diff --git a/libstdc++-v3/include/experimental/bits/simd.h 
b/libstdc++-v3/include/experimental/bits/simd.h
index 03c2e17a326..6ef9c955cfa 100644
--- a/libstdc++-v3/include/experimental/bits/simd.h
+++ b/libstdc++-v3/include/experimental/bits/simd.h
@@ -44,7 +44,12 @@
 #if _GLIBCXX_SIMD_X86INTRIN
 #include 
 #elif _GLIBCXX_SIMD_HAVE_NEON
+#pragma GCC diagnostic push
+// narrowing conversion of '__a' from 'uint64_t' {aka 'long long unsigned 
int'} to
+//   'int64x1_t' {aka 'long long int'} [-Wnarrowing]
+#pragma GCC diagnostic ignored "-Wnarrowing"
 #include 
+#pragma GCC diagnostic pop
 #endif
 #if _GLIBCXX_SIMD_HAVE_SVE
 #include 
@@ -598,6 +603,7 @@ template 
   constexpr auto
   __int_for_sizeof()
   {
+static_assert(_Bytes > 0);
 if constexpr (_Bytes == sizeof(int))
   return int();
   #ifdef __clang__
@@ -663,7 +669,7 @@ template 
return _Ip{};
   }
 else
-  static_assert(_Bytes != _Bytes, "this should be unreachable");
+  static_assert(_Bytes == 0, "this should be unreachable");
   }
 #pragma GCC diagnostic pop
 
diff --git a/libstdc++-v3/include/experimental/bits/simd_builtin.h 
b/libstdc++-v3/include/experimental/bits/simd_builtin.h
index af0c4886108..49c7c7e1c70 100644
--- a/libstdc++-v3/include/experimental/bits/simd_builtin.h
+++ b/libstdc++-v3/include/experimental/bits/simd_builtin.h
@@ -278,8 +278,7 @@ template 
   __extract_part(const _SimdWrapper __x)
   {
 static_assert(_Combine == 1, "_Combine != 1 not implemented");
-static_assert(__have_avx512f && _Np == _Np);
-static_assert(_Total >= 2 && _Index + _Combine <= _Total && _Index >= 0);
+static_assert(__have_avx512f && _Total >= 2 && _Index + _Combine <= _Total 
&& _Index >= 0);
 return __x._M_data >> (_Index * _Np / _Total);
   }


[gcc r12-10385] testsuite: Remove duplicate -lgcov [PR114034]

2024-04-22 Thread Iain D Sandoe via Gcc-cvs
https://gcc.gnu.org/g:6a4824a8bc86fcbcb8f51bab4c24d72ffd00715e

commit r12-10385-g6a4824a8bc86fcbcb8f51bab4c24d72ffd00715e
Author: Iain Sandoe 
Date:   Sun Mar 31 11:22:58 2024 +0100

testsuite: Remove duplicate -lgcov [PR114034]

Duplicate library entries now cause linker warnings with newer linker
versions on Darwin which leads to these tests regressing.  The library
is already added by the test flags so there is no need to put an extra
one in the options.

PR testsuite/114034

gcc/testsuite/ChangeLog:

* g++.dg/gcov/gcov-dump-1.C: Remove extra -lgcov.
* g++.dg/gcov/gcov-dump-2.C: Likewise.

Signed-off-by: Iain Sandoe 
(cherry picked from commit 799a056cf804f433ce0050a5a6bf900f7a01ecb1)

Diff:
---
 gcc/testsuite/g++.dg/gcov/gcov-dump-1.C | 2 +-
 gcc/testsuite/g++.dg/gcov/gcov-dump-2.C | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/gcc/testsuite/g++.dg/gcov/gcov-dump-1.C 
b/gcc/testsuite/g++.dg/gcov/gcov-dump-1.C
index f0e81e9b042..774a7269ff2 100644
--- a/gcc/testsuite/g++.dg/gcov/gcov-dump-1.C
+++ b/gcc/testsuite/g++.dg/gcov/gcov-dump-1.C
@@ -1,4 +1,4 @@
-/* { dg-options "-fprofile-generate -ftest-coverage -lgcov" } */
+/* { dg-options "-fprofile-generate -ftest-coverage " } */
 /* { dg-do run { target native } } */
 
 int value;
diff --git a/gcc/testsuite/g++.dg/gcov/gcov-dump-2.C 
b/gcc/testsuite/g++.dg/gcov/gcov-dump-2.C
index 6234a81a586..e748989d2c0 100644
--- a/gcc/testsuite/g++.dg/gcov/gcov-dump-2.C
+++ b/gcc/testsuite/g++.dg/gcov/gcov-dump-2.C
@@ -1,4 +1,4 @@
-/* { dg-options "-fprofile-generate -ftest-coverage -lgcov" } */
+/* { dg-options "-fprofile-generate -ftest-coverage " } */
 /* { dg-do run { target native } } */
 
 int value;


[gcc r12-10384] Darwin, ppc: Add system stubs for all 32b PPC

2024-04-22 Thread Iain D Sandoe via Gcc-cvs
https://gcc.gnu.org/g:be44511b14d14e1e3d7230a7a64db5a3a0ed0129

commit r12-10384-gbe44511b14d14e1e3d7230a7a64db5a3a0ed0129
Author: Iain Sandoe 
Date:   Wed Jul 26 14:31:02 2023 +0100

Darwin, ppc: Add system stubs for all 32b PPC

This is a minor adjustment to make the GCC behaviour better match the
old system tools.

Signed-off-by: Iain Sandoe 

gcc/ChangeLog:

* config/rs6000/darwin.h (LIB_SPEC): Include libSystemStubs for
all 32b Darwin PowerPC cases.

(cherry picked from commit b3ab28c3e85af7995fffb87eb190ef942b7e9e4a)

Diff:
---
 gcc/config/rs6000/darwin.h | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/gcc/config/rs6000/darwin.h b/gcc/config/rs6000/darwin.h
index b5cef42610f..626b40dab29 100644
--- a/gcc/config/rs6000/darwin.h
+++ b/gcc/config/rs6000/darwin.h
@@ -98,7 +98,7 @@
Include libmx when targeting Darwin 7.0 and above, but before libSystem,
since the functions are actually in libSystem but for 7.x compatibility
we want them to be looked for in libmx first.
-   Include libSystemStubs when compiling against 10.3 - 10.5 SDKs (we assume
+   Include libSystemStubs when compiling against 10.3 - 10.6 SDKs (we assume
this is the case when targetting these) - but not for 64-bit long double.
Don't do either for m64, the library is either a dummy or non-existent.
 */
@@ -107,8 +107,8 @@
 #define LIB_SPEC \
 "%{!static:\
   %{!m64:%{!mlong-double-64:   \
-%{pg:%:version-compare(>< 10.3 10.5 mmacosx-version-min= 
-lSystemStubs_profile)} \
-%{!pg:%:version-compare(>< 10.3 10.5 mmacosx-version-min= -lSystemStubs)} \
+%{pg:%:version-compare(>< 10.3 10.7 mmacosx-version-min= 
-lSystemStubs_profile)} \
+%{!pg:%:version-compare(>< 10.3 10.7 mmacosx-version-min= -lSystemStubs)} \
  %:version-compare(>< 10.3 10.4 mmacosx-version-min= -lmx)}}   \
   -lSystem \
 }"


[gcc r12-10383] jit, Darwin: Implement library exports list.

2024-04-22 Thread Iain D Sandoe via Gcc-cvs
https://gcc.gnu.org/g:22203bd7cfe463fce6f3a84118f9479d37e48570

commit r12-10383-g22203bd7cfe463fce6f3a84118f9479d37e48570
Author: Iain Sandoe 
Date:   Sat Jan 13 17:20:47 2024 +

jit, Darwin: Implement library exports list.

Currently, we have no exports list for libgccjit, which means that
all symbols are exported, including those from libstdc++ which is
linked statically into the lib.  This causes failures when the
shared libstdc++ is used but some c++ symbols are satisfied from
libgccjit.

This implements an export file for Darwin (which is currently
manually created by cross-checking libgccjit.map).  Ideally we'd
script this, at some point.  Update libtool current and age to
reflect the current ABI version (we are not bumping the SO name
at this stage).

This fixes a number of new failures in jit testing.

gcc/jit/ChangeLog:

* Make-lang.in: Implement exports list, and use a shared
libgcc.
* libgccjit.exports: New file.

Signed-off-by: Iain Sandoe 
(cherry picked from commit b120e355e59142bd15d6b010461d07236288d843)

Diff:
---
 gcc/jit/Make-lang.in  |  47 ++
 gcc/jit/libgccjit.exports | 219 ++
 2 files changed, 249 insertions(+), 17 deletions(-)

diff --git a/gcc/jit/Make-lang.in b/gcc/jit/Make-lang.in
index 6e10abfd0ac..33ed7e357a2 100644
--- a/gcc/jit/Make-lang.in
+++ b/gcc/jit/Make-lang.in
@@ -55,7 +55,17 @@ else
 
 ifneq (,$(findstring darwin,$(host)))
 
-LIBGCCJIT_AGE = 1
+# NOTE that we are building here for the host, and so tests for target-
+# specific functionality will only work when host == target.  This causes
+# fails when building cross-compilers with different object formats (at
+# least when the respective linkers do not accept the same command line
+# options).  Fortunately, for Darwin we can safely hard-code the relevant
+# host options, since all usable linkers support them).
+
+LIBGCCJIT_CURRENT = 24
+LIBGCCJIT_REVISION = 0
+LIBGCCJIT_AGE = 24
+LIBGCCJIT_COMPAT = 0
 LIBGCCJIT_BASENAME = libgccjit
 
 LIBGCCJIT_SONAME = \
@@ -63,18 +73,18 @@ LIBGCCJIT_SONAME = \
 LIBGCCJIT_FILENAME = $(LIBGCCJIT_BASENAME).$(LIBGCCJIT_VERSION_NUM).dylib
 LIBGCCJIT_LINKER_NAME = $(LIBGCCJIT_BASENAME).dylib
 
-# Conditionalize the use of the LD_VERSION_SCRIPT_OPTION and
-# LD_SONAME_OPTION depending if configure found them, using $(if)
-# We have to define a COMMA here, otherwise the commas in the "true"
-# result are treated as separators by the $(if).
+# Darwin does not have a version script option. Exported symbols are controlled
+# by the following, and library versioning is done using libtool.
+# We have to define a COMMA here, otherwise the commas are treated as
+# separators.
 COMMA := ,
 LIBGCCJIT_VERSION_SCRIPT_OPTION = \
-   $(if $(LD_VERSION_SCRIPT_OPTION),\
- 
-Wl$(COMMA)$(LD_VERSION_SCRIPT_OPTION)$(COMMA)$(srcdir)/jit/libgccjit.map)
+  -Wl$(COMMA)-exported_symbols_list$(COMMA)$(srcdir)/jit/libgccjit.exports
 
+# For Darwin host, we need a l64 or ld64-compatible linker, that uses
+# -install_name to introduce this.
 LIBGCCJIT_SONAME_OPTION = \
-   $(if $(LD_SONAME_OPTION), \
--Wl$(COMMA)$(LD_SONAME_OPTION)$(COMMA)$(LIBGCCJIT_SONAME))
+  -Wl$(COMMA)-install_name$(COMMA)$(LIBGCCJIT_SONAME)
 
 LIBGCCJIT_SONAME_SYMLINK = $(LIBGCCJIT_FILENAME)
 LIBGCCJIT_LINKER_NAME_SYMLINK = $(LIBGCCJIT_LINKER_NAME)
@@ -143,15 +153,18 @@ ifneq (,$(findstring mingw,$(target)))
 # Create import library
 LIBGCCJIT_EXTRA_OPTS = -Wl,--out-implib,$(LIBGCCJIT_IMPORT_LIB)
 else
-
 ifneq (,$(findstring darwin,$(host)))
-# TODO : Construct a Darwin-style symbol export file.
-LIBGCCJIT_EXTRA_OPTS = -Wl,-compatibility_version,$(LIBGCCJIT_VERSION_NUM) \
-   
-Wl,-current_version,$(LIBGCCJIT_VERSION_NUM).$(LIBGCCJIT_MINOR_NUM).$(LIBGCCJIT_AGE)
 \
-   $(LIBGCCJIT_VERSION_SCRIPT_OPTION) \
-   $(LIBGCCJIT_SONAME_OPTION)
+LIBGCCJIT_VERS = $(LIBGCCJIT_CURRENT).$(LIBGCCJIT_REVISION).$(LIBGCCJIT_AGE)
+LIBGCCJIT_EXTRA_OPTS = -Wl,-current_version,$(LIBGCCJIT_VERS) \
+ -Wl,-compatibility_version,$(LIBGCCJIT_COMPAT) \
+  $(LIBGCCJIT_VERSION_SCRIPT_OPTION) $(LIBGCCJIT_SONAME_OPTION)
+# Use the default (shared) libgcc.
+JIT_LDFLAGS = $(filter-out -static-libgcc, $(LDFLAGS))
+ifeq (,$(findstring darwin8,$(host)))
+JIT_LDFLAGS += -Wl,-rpath,@loader_path
+endif
 else
-
+JIT_LDFLAGS = $(LDFLAGS)
 LIBGCCJIT_EXTRA_OPTS = $(LIBGCCJIT_VERSION_SCRIPT_OPTION) \
$(LIBGCCJIT_SONAME_OPTION)
 endif
@@ -165,7 +178,7 @@ $(LIBGCCJIT_FILENAME): $(jit_OBJS) \
$(LIBDEPS) $(srcdir)/jit/libgccjit.map \
$(EXTRA_GCC_OBJS) $(jit.prev)
@$(call LINK_PROGRESS,$(INDEX.jit),start)
-   +$(LLINKER) $(ALL_LINKERFLAGS) $(LDFLAGS) -o $@ -shared \
+   +$(LLINKER) $(ALL_LINKERFLAGS) $(JIT_LDFLAGS) -o $@ -shared \
 $(jit_OBJS) libbackend.a libcommon-target.a libcommon.a \
 $(CPPLIB) $(LIBDECNUMBER

[gcc r12-10382] Darwin: Correct a version check.

2024-04-22 Thread Iain D Sandoe via Gcc-cvs
https://gcc.gnu.org/g:13ae931863dcc3684742ed81ce84d005fbec1bb7

commit r12-10382-g13ae931863dcc3684742ed81ce84d005fbec1bb7
Author: Iain Sandoe 
Date:   Mon Apr 1 20:47:25 2024 +0100

Darwin: Correct a version check.

When the version for dsymutil comes from a clang build, it is
of the form NNmm.pp.qq where NN and mm are the major and minor
LLVM version components.  We need to check for a major version
greater than or equal to 7 - so use 700 in the check.

gcc/ChangeLog:

* config/darwin.cc (darwin_override_options): Update the
clang major version value in the dsymutil check.

Signed-off-by: Iain Sandoe 
(cherry picked from commit 451bb0b9262d2f54173937569a29d7f1ad234e30)

Diff:
---
 gcc/config/darwin.cc | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/gcc/config/darwin.cc b/gcc/config/darwin.cc
index 6153f3c39fe..76feb87a29d 100644
--- a/gcc/config/darwin.cc
+++ b/gcc/config/darwin.cc
@@ -3381,7 +3381,7 @@ darwin_override_options (void)
   /* External toolchains based on LLVM or clang 7+ have support for
 dwarf-4.  */
   if ((dsymutil_version.kind == LLVM && dsymutil_version.major >= 7)
- || (dsymutil_version.kind == CLANG && dsymutil_version.major >= 7))
+ || (dsymutil_version.kind == CLANG && dsymutil_version.major >= 700))
dwarf_version = 4;
   else if (dsymutil_version.kind == DWARFUTILS
   && dsymutil_version.major >= 121)


[gcc r12-10381] configure, Darwin: Correct a pasto in host-shared processing.

2024-04-22 Thread Iain D Sandoe via Gcc-cvs
https://gcc.gnu.org/g:f6b8bd94ff853ac321c72cc80968d8386023b7e5

commit r12-10381-gf6b8bd94ff853ac321c72cc80968d8386023b7e5
Author: Iain Sandoe 
Date:   Sun Jun 26 09:24:28 2022 +0100

configure, Darwin: Correct a pasto in host-shared processing.

We do, of course, mean $host not $target in this case.  Corrected thus.

Signed-off-by: Iain Sandoe 

ChangeLog:

* configure: Regenerate.
* configure.ac: Correct use of $host.

(cherry picked from commit 1edfc8f2d3307a3ffa077a605f432832d7715462)

Diff:
---
 configure| 2 +-
 configure.ac | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/configure b/configure
index 5dcaab14ae9..77638bc84a6 100755
--- a/configure
+++ b/configure
@@ -8646,7 +8646,7 @@ fi
 # Check whether --enable-host-shared was given.
 if test "${enable_host_shared+set}" = set; then :
   enableval=$enable_host_shared; host_shared=$enableval
- case $target in
+ case $host in
x86_64-*-darwin* | aarch64-*-darwin*)
  if test x$host_shared != xyes ; then
# PIC is the default, and actually cannot be switched off.
diff --git a/configure.ac b/configure.ac
index 85977482aee..7abd02f8b56 100644
--- a/configure.ac
+++ b/configure.ac
@@ -1918,7 +1918,7 @@ AC_ARG_ENABLE(host-shared,
 [AS_HELP_STRING([--enable-host-shared],
[build host code as shared libraries])],
 [host_shared=$enableval
- case $target in
+ case $host in
x86_64-*-darwin* | aarch64-*-darwin*)
  if test x$host_shared != xyes ; then
# PIC is the default, and actually cannot be switched off.


[gcc r14-10077] PR modula2/114807 badpointer3.mod causes an ICE

2024-04-22 Thread Gaius Mulley via Gcc-cvs
https://gcc.gnu.org/g:b0469e35dbcc9a93a2cb50e3c0445edc3db174be

commit r14-10077-gb0469e35dbcc9a93a2cb50e3c0445edc3db174be
Author: Gaius Mulley 
Date:   Mon Apr 22 18:19:32 2024 +0100

PR modula2/114807 badpointer3.mod causes an ICE

This patch fixes an ICE caused when a constant string
is built and attempted to be passed into a procedure with
an opaque type.

gcc/m2/ChangeLog:

PR modula2/114807
* gm2-compiler/M2Check.mod (checkUnbounded): Remove unused
local variables.
(constCheckMeta): Include check for IsReallyPointer in the
failure case.
* gm2-compiler/M2Quads.mod (MoveWithMode): Remove CopyConstString.
* gm2-compiler/SymbolTable.def (IsHiddenReallyPointer): Export.
* gm2-compiler/SymbolTable.mod (SkipHiddenType): Remove.
(IsReallyPointer): Include IsHiddenReallyPointer test.

gcc/testsuite/ChangeLog:

PR modula2/114807
* gm2/pim/fail/badproctype.mod: Change MYSHORTREAL
to SHORTREAL.
* gm2/pim/fail/badprocbool.mod: New test.
* gm2/pim/fail/badproccard.mod: New test.
* gm2/pim/fail/badprocint.mod: New test.
* gm2/pim/fail/badprocint2.mod: New test.
* gm2/pim/pass/goodproccard2.mod: New test.
* gm2/pim/pass/goodprocint.mod: New test.
* gm2/pim/pass/goodprocint3.mod: New test.
* gm2/pim/run/pass/genconststr.mod: New test.

Signed-off-by: Gaius Mulley 

Diff:
---
 gcc/m2/gm2-compiler/M2Check.mod|  9 
 gcc/m2/gm2-compiler/M2Quads.mod|  3 +--
 gcc/m2/gm2-compiler/SymbolTable.def|  8 +++
 gcc/m2/gm2-compiler/SymbolTable.mod| 29 --
 gcc/testsuite/gm2/pim/fail/badprocbool.mod | 13 
 gcc/testsuite/gm2/pim/fail/badproccard.mod | 13 
 gcc/testsuite/gm2/pim/fail/badprocint.mod  | 17 +++
 gcc/testsuite/gm2/pim/fail/badprocint2.mod | 14 +
 gcc/testsuite/gm2/pim/fail/badproctype.mod |  9 +++-
 gcc/testsuite/gm2/pim/pass/goodproccard2.mod   | 16 ++
 gcc/testsuite/gm2/pim/pass/goodprocint.mod | 13 
 gcc/testsuite/gm2/pim/pass/goodprocint3.mod| 14 +
 gcc/testsuite/gm2/pim/run/pass/genconststr.mod | 23 
 13 files changed, 143 insertions(+), 38 deletions(-)

diff --git a/gcc/m2/gm2-compiler/M2Check.mod b/gcc/m2/gm2-compiler/M2Check.mod
index a4451938b88..1750fe07ecf 100644
--- a/gcc/m2/gm2-compiler/M2Check.mod
+++ b/gcc/m2/gm2-compiler/M2Check.mod
@@ -47,7 +47,8 @@ FROM SymbolTable IMPORT NulSym, IsRecord, IsSet, GetDType, 
GetSType, IsType,
 IsReallyPointer, IsPointer, IsParameter, ModeOfAddr,
 GetMode, GetType, IsUnbounded, IsComposite, 
IsConstructor,
 IsParameter, IsConstString, IsConstLitInternal, 
IsConstLit,
-GetStringLength, GetProcedureProcType ;
+GetStringLength, GetProcedureProcType, IsHiddenType,
+IsHiddenReallyPointer ;
 
 FROM M2GCCDeclare IMPORT GetTypeMin, GetTypeMax ;
 FROM M2System IMPORT Address ;
@@ -264,9 +265,6 @@ END checkSubrange ;
 *)
 
 PROCEDURE checkUnbounded (result: status; tinfo: tInfo; unbounded, right: 
CARDINAL) : status ;
-VAR
-   lLow,  rLow,
-   lHigh, rHigh: CARDINAL ;
 BEGIN
(* Firstly check to see if we have resolved this as false.  *)
IF isFalse (result)
@@ -683,7 +681,8 @@ BEGIN
  THEN
 RETURN result
  ELSIF IsSet (typeRight) OR IsEnumeration (typeRight) OR
-   IsProcedure (typeRight) OR IsRecord (typeRight)
+   IsProcedure (typeRight) OR IsRecord (typeRight) OR
+   IsReallyPointer (typeRight)
  THEN
 RETURN false
  ELSIF IsArray (typeRight)
diff --git a/gcc/m2/gm2-compiler/M2Quads.mod b/gcc/m2/gm2-compiler/M2Quads.mod
index 68b91201702..8a9a23013b2 100644
--- a/gcc/m2/gm2-compiler/M2Quads.mod
+++ b/gcc/m2/gm2-compiler/M2Quads.mod
@@ -73,7 +73,7 @@ FROM SymbolTable IMPORT ModeOfAddr, GetMode, PutMode, 
GetSymName, IsUnknown,
 GetModuleQuads, GetProcedureQuads,
 GetModuleCtors,
 MakeProcedure,
-CopyConstString, PutConstStringKnown,
+PutConstStringKnown,
 PutModuleStartQuad, PutModuleEndQuad,
 PutModuleFinallyStartQuad, PutModuleFinallyEndQuad,
 PutProcedureStartQuad, PutProcedureEndQuad,
@@ -3454,7 +3454,6 @@ BEGIN
THEN
   GenQuadOtok (tokno, BecomesOp, Des, NulSym, Exp, TRUE,
destok, UnknownTokenNo, exptok) ;
-  CopyConstString (tokno, Des, Exp)
ELSE
   IF GetMode(Des)=RightValue
   THEN
diff --git a

[gcc r14-10076] libstdc++: Workaround kernel-headers on s390x-linux

2024-04-22 Thread Jakub Jelinek via Libstdc++-cvs
https://gcc.gnu.org/g:cf5f7791056b3ed993bc8024be767a86157514a9

commit r14-10076-gcf5f7791056b3ed993bc8024be767a86157514a9
Author: Jakub Jelinek 
Date:   Mon Apr 22 18:00:06 2024 +0200

libstdc++: Workaround kernel-headers on s390x-linux

We see
FAIL: 17_intro/headers/c++1998/all_attributes.cc   (test for excess errors)
FAIL: 17_intro/headers/c++2011/all_attributes.cc   (test for excess errors)
FAIL: 17_intro/headers/c++2014/all_attributes.cc   (test for excess errors)
FAIL: 17_intro/headers/c++2017/all_attributes.cc   (test for excess errors)
FAIL: 17_intro/headers/c++2020/all_attributes.cc   (test for excess errors)
FAIL: 17_intro/names.cc  -std=gnu++17 (test for excess errors)
on s390x-linux.
The first 5 are due to kernel-headers not using uglified attribute names,
where  contains
__attribute__((packed, aligned(4)))
I've filed a downstream bugreport for this in
https://bugzilla.redhat.com/show_bug.cgi?id=2276084
(not really sure where to report kernel-headers issues upstream), while the
last one is due to  from glibc containing:
  #ifdef __USE_MISC
  # define __ctx(fld) fld
  #else
  # define __ctx(fld) __ ## fld
  #endif
  ...
  typedef union
{
  double  __ctx(d);
  float   __ctx(f);
} fpreg_t;
and g++ predefining -D_GNU_SOURCE which implies define __USE_MISC.

The following patch adds a workaround for this on the libstdc++ testsuite
side.

2024-04-22  Jakub Jelinek  

* testsuite/17_intro/names.cc (d, f): Undefine on s390*-linux*.
* testsuite/17_intro/headers/c++1998/all_attributes.cc (packed): 
Don't
define on s390.
* testsuite/17_intro/headers/c++2011/all_attributes.cc (packed):
Likewise.
* testsuite/17_intro/headers/c++2014/all_attributes.cc (packed):
Likewise.
* testsuite/17_intro/headers/c++2017/all_attributes.cc (packed):
Likewise.
* testsuite/17_intro/headers/c++2020/all_attributes.cc (packed):
Likewise.

Diff:
---
 libstdc++-v3/testsuite/17_intro/headers/c++1998/all_attributes.cc | 4 
 libstdc++-v3/testsuite/17_intro/headers/c++2011/all_attributes.cc | 4 
 libstdc++-v3/testsuite/17_intro/headers/c++2014/all_attributes.cc | 4 
 libstdc++-v3/testsuite/17_intro/headers/c++2017/all_attributes.cc | 4 
 libstdc++-v3/testsuite/17_intro/headers/c++2020/all_attributes.cc | 4 
 libstdc++-v3/testsuite/17_intro/names.cc  | 6 ++
 6 files changed, 26 insertions(+)

diff --git a/libstdc++-v3/testsuite/17_intro/headers/c++1998/all_attributes.cc 
b/libstdc++-v3/testsuite/17_intro/headers/c++1998/all_attributes.cc
index ae81846b9a3..0c38259b74e 100644
--- a/libstdc++-v3/testsuite/17_intro/headers/c++1998/all_attributes.cc
+++ b/libstdc++-v3/testsuite/17_intro/headers/c++1998/all_attributes.cc
@@ -29,7 +29,11 @@
 # define noreturn 1
 # define visibility 1
 #endif
+#ifndef __s390__
+// kernel-headers  uses __attribute__((packed,aligned(4))) on
+// S390.
 #define packed 1
+#endif
 #define pure 1
 // glibc's sysdeps/unix/sysv/linux/arm/sys/ucontext.h uses this on ARM.
 #ifndef __arm__
diff --git a/libstdc++-v3/testsuite/17_intro/headers/c++2011/all_attributes.cc 
b/libstdc++-v3/testsuite/17_intro/headers/c++2011/all_attributes.cc
index 5f7f31ad5da..cc34a35ae4d 100644
--- a/libstdc++-v3/testsuite/17_intro/headers/c++2011/all_attributes.cc
+++ b/libstdc++-v3/testsuite/17_intro/headers/c++2011/all_attributes.cc
@@ -29,7 +29,11 @@
 # define visibility 1
 #endif
 #define no_unique_address 1
+#ifndef __s390__
+// kernel-headers  uses __attribute__((packed,aligned(4))) on
+// S390.
 #define packed 1
+#endif
 #define pure 1
 // glibc's sysdeps/unix/sysv/linux/arm/sys/ucontext.h uses this on ARM.
 #ifndef __arm__
diff --git a/libstdc++-v3/testsuite/17_intro/headers/c++2014/all_attributes.cc 
b/libstdc++-v3/testsuite/17_intro/headers/c++2014/all_attributes.cc
index befc1ca8bfb..80d0852453b 100644
--- a/libstdc++-v3/testsuite/17_intro/headers/c++2014/all_attributes.cc
+++ b/libstdc++-v3/testsuite/17_intro/headers/c++2014/all_attributes.cc
@@ -29,7 +29,11 @@
 # define visibility 1
 #endif
 #define no_unique_address 1
+#ifndef __s390__
+// kernel-headers  uses __attribute__((packed,aligned(4))) on
+// S390.
 #define packed 1
+#endif
 #define pure 1
 // glibc's sysdeps/unix/sysv/linux/arm/sys/ucontext.h uses this on ARM.
 #ifndef __arm__
diff --git a/libstdc++-v3/testsuite/17_intro/headers/c++2017/all_attributes.cc 
b/libstdc++-v3/testsuite/17_intro/headers/c++2017/all_attributes.cc
index a59fe1be5fa..4f8ba4d10ba 100644
--- a/libstdc++-v3/testsuite/17_intro/headers/c++2017/all_attributes.cc
+++ b/libstdc++-v3/testsuite/17_intro/headers/c++2017/all_attributes.cc
@@ -28,7 +28,11 @@
 # define visibility 1
 #endif
 #define no_unique_address 1
+#ifndef __s390__
+// kernel-headers  uses __attribute__((pac

[gcc r14-10075] testsuite: prune -freport-bug output

2024-04-22 Thread Marek Polacek via Gcc-cvs
https://gcc.gnu.org/g:0db19228a9feba5a8f4e13b21f25f3aa8a6c5e85

commit r14-10075-g0db19228a9feba5a8f4e13b21f25f3aa8a6c5e85
Author: Marek Polacek 
Date:   Fri Apr 19 13:51:41 2024 -0400

testsuite: prune -freport-bug output

When the compiler defaults to -freport-bug, a few dg-ice tests fail
with:

Excess errors:
Preprocessed source stored into /tmp/cc6hldZ0.out file, please attach this 
to your bugreport.

We could add -fno-report-bug to those tests.  But it seems to me that a
better fix would be to prune the "Preprocessed source stored..." message
in prune_gcc_output.

gcc/testsuite/ChangeLog:

* lib/prune.exp (prune_gcc_output): Also prune -freport-bug output.

Reviewed-by: Jakub Jelinek 

Diff:
---
 gcc/testsuite/lib/prune.exp | 1 +
 1 file changed, 1 insertion(+)

diff --git a/gcc/testsuite/lib/prune.exp b/gcc/testsuite/lib/prune.exp
index f3d3c99fbcb..d00d37f015f 100644
--- a/gcc/testsuite/lib/prune.exp
+++ b/gcc/testsuite/lib/prune.exp
@@ -51,6 +51,7 @@ proc prune_gcc_output { text } {
 regsub -all "(^|\n)\[^\n\]*: re(compiling|linking)\[^\n\]*" $text "" text
 regsub -all "(^|\n)Please submit.*instructions\[^\n\]*" $text "" text
 regsub -all "(^|\n)\[0-9\]\[0-9\]* errors\." $text "" text
+regsub -all "(^|\n)Preprocessed.*bugreport\[^\n\]*" $text "" text
 
 # Diagnostic inclusion stack
 regsub -all "(^|\n)(In file)?\[ \]+included from \[^\n\]*" $text "" text


[gcc r11-11337] Objective-C, NeXT: Adjust symbol marking to match host tools.

2024-04-22 Thread Iain D Sandoe via Gcc-cvs
https://gcc.gnu.org/g:49c3c423218ea5f02dbbc6b847e15c06174f81ba

commit r11-11337-g49c3c423218ea5f02dbbc6b847e15c06174f81ba
Author: Iain Sandoe 
Date:   Mon May 2 19:42:49 2022 +0100

Objective-C, NeXT: Adjust symbol marking to match host tools.

Current host tools mark some additional symbols as 'no dead strip' and also
expose one additional group to the linker.  This does not affect older 
Darwin
versions or x86_64, but omitting these changes results in link errors for
aarch64.

Signed-off-by: Iain Sandoe 

gcc/ChangeLog:

* config/darwin.c (darwin_label_is_anonymous_local_objc_name): Make
protocol class methods linker-visible.

gcc/objc/ChangeLog:

* objc-next-runtime-abi-02.c (next_runtime_abi_02_protocol_decl): Do
not dead-strip the runtime meta-data symbols.
(build_v2_classrefs_table): Likewise.
(build_v2_protocol_list_address_table): Likewise.

(cherry picked from commit ecd5727c0a662a8fea6b5f8eac6f3f15bf5ef851)

Diff:
---
 gcc/config/darwin.c | 2 ++
 gcc/objc/objc-next-runtime-abi-02.c | 6 --
 2 files changed, 6 insertions(+), 2 deletions(-)

diff --git a/gcc/config/darwin.c b/gcc/config/darwin.c
index b79c0d1d2b4..dedf84d6247 100644
--- a/gcc/config/darwin.c
+++ b/gcc/config/darwin.c
@@ -1933,6 +1933,8 @@ darwin_label_is_anonymous_local_objc_name (const char 
*name)
 }
   else if (!strncmp ((const char *)p, "ClassMethods", 12))
 return false;
+  else if (!strncmp ((const char *)p, "ClassProtocols", 14))
+return false;
   else if (!strncmp ((const char *)p, "Instance", 8))
 {
   if (p[8] == 'I' || p[8] == 'M')
diff --git a/gcc/objc/objc-next-runtime-abi-02.c 
b/gcc/objc/objc-next-runtime-abi-02.c
index 19f137c632e..f1c858b2cd7 100644
--- a/gcc/objc/objc-next-runtime-abi-02.c
+++ b/gcc/objc/objc-next-runtime-abi-02.c
@@ -1035,6 +1035,7 @@ next_runtime_abi_02_protocol_decl (tree p)
   else
 decl = start_var_decl (objc_v2_protocol_template, buf);
   OBJCMETA (decl, objc_meta, meta_protocol);
+  DECL_PRESERVE_P (decl) = 1;
   return decl;
 }
 
@@ -2124,8 +2125,8 @@ build_v2_classrefs_table (void)
  expr = convert (objc_class_type, build_fold_addr_expr (expr));
}
   /* The runtime wants this, even if it appears unused, so we must force 
the
-output.
-  DECL_PRESERVE_P (decl) = 1; */
+output.  */
+  DECL_PRESERVE_P (decl) = 1;
   finish_var_decl (decl, expr);
 }
 }
@@ -2327,6 +2328,7 @@ build_v2_protocol_list_address_table (void)
   expr = convert (objc_protocol_type, build_fold_addr_expr (ref->refdecl));
   OBJCMETA (decl, objc_meta, meta_label_protocollist);
   finish_var_decl (decl, expr);
+  DECL_PRESERVE_P (decl) = 1;
 }
 
 /* TODO: delete the vec.  */


[gcc r11-11336] testsuite: Fix weak_undefined handling on Darwin

2024-04-22 Thread Iain D Sandoe via Gcc-cvs
https://gcc.gnu.org/g:d79d1073c444ceb85b3cd2f55be7b4dfe598d287

commit r11-11336-gd79d1073c444ceb85b3cd2f55be7b4dfe598d287
Author: Rainer Orth 
Date:   Tue Mar 28 10:40:05 2023 +0200

testsuite: Fix weak_undefined handling on Darwin

The patch that introduced the weak_undefined effective-target keyword
and corresponding dg-add-options support

commit 378ec7b87a5265dbe2d489c245fac98ef37fa638
Author: Alexandre Oliva 
Date:   Thu Mar 23 00:45:05 2023 -0300

[testsuite] test for weak_undefined support and add options

badly broke the affected tests on macOS like so:

ERROR: gcc.dg/addr_equal-1.c: unknown dg option: 89 for " dg-add-options 5 
weak_undefined "
ERROR: gcc.dg/addr_equal-1.c: unknown dg option: 89 for " dg-add-options 5 
weak_undefined "

add_options_for_weak_undefined tries to call an non-existant proc "89".
Even after fixing this by escaping the brackets, two tests still failed to
link since they lacked the corresponding calls do dg-add-options
weak_undefined.

Tested on x86_64-apple-darwin20.6.0 and i386-pc-solaris2.11.

2023-03-27  Rainer Orth  

gcc/testsuite:
* lib/target-supports.exp (add_options_for_weak_undefined): Escape
brackets.
* gcc.dg/visibility-22.c: Add weak_undefined options.

(cherry picked from commit 8443f42f05f9026dadad1236b9e44ec294c70337)

Diff:
---
 gcc/testsuite/gcc.dg/visibility-22.c  |  1 +
 gcc/testsuite/lib/target-supports.exp | 12 
 2 files changed, 13 insertions(+)

diff --git a/gcc/testsuite/gcc.dg/visibility-22.c 
b/gcc/testsuite/gcc.dg/visibility-22.c
index e2b78d1c7fd..9123b350b2e 100644
--- a/gcc/testsuite/gcc.dg/visibility-22.c
+++ b/gcc/testsuite/gcc.dg/visibility-22.c
@@ -3,6 +3,7 @@
 /* { dg-require-visibility "" } */
 /* { dg-require-effective-target weak_undefined } */
 /* { dg-options "-O2 -fPIC" { target fpic } } */
+/* { dg-add-options weak_undefined } */
 
 extern void foo () __attribute__((weak,visibility("hidden")));
 int
diff --git a/gcc/testsuite/lib/target-supports.exp 
b/gcc/testsuite/lib/target-supports.exp
index a09606e4497..63a5f5579be 100644
--- a/gcc/testsuite/lib/target-supports.exp
+++ b/gcc/testsuite/lib/target-supports.exp
@@ -348,6 +348,18 @@ proc check_weak_available { } {
 }
 }
 
+# return options to add to enable weak undefined symbols.
+
+proc add_options_for_weak_undefined { flags } {
+if { [istarget *-*-darwin*] } {
+   lappend flags "-Wl,-undefined,dynamic_lookup"
+   if { [istarget *-*-darwin\[89\]*] } {
+   lappend flags "-Wl,-flat_namespace"
+   }
+}
+return $flags
+}
+
 # return 1 if weak undefined symbols are supported.
 
 proc check_effective_target_weak_undefined { } {


[gcc r11-11335] testsuite, objective-c: Fix a testcase on Windows.

2024-04-22 Thread Iain D Sandoe via Gcc-cvs
https://gcc.gnu.org/g:ce169d2712296b193ecb94768fee1477bb0d0ed0

commit r11-11335-gce169d2712296b193ecb94768fee1477bb0d0ed0
Author: Iain Sandoe 
Date:   Wed Feb 15 10:47:51 2023 +

testsuite, objective-c: Fix a testcase on Windows.

Windows needs to use uintptr_t to represent an integral pointer type (long
is not the right type there).

Patch from 'nightstike'.

Signed-off-by: Iain Sandoe 

gcc/testsuite/ChangeLog:

* obj-c++.dg/proto-lossage-4.mm: Use uintptr_t for integral pointer
representations.

(cherry picked from commit 142bd88c5f609546a466743ab1066d5620a830bc)

Diff:
---
 gcc/testsuite/obj-c++.dg/proto-lossage-4.mm | 14 --
 1 file changed, 8 insertions(+), 6 deletions(-)

diff --git a/gcc/testsuite/obj-c++.dg/proto-lossage-4.mm 
b/gcc/testsuite/obj-c++.dg/proto-lossage-4.mm
index 2e753d1f8ba..ff053bec7d0 100644
--- a/gcc/testsuite/obj-c++.dg/proto-lossage-4.mm
+++ b/gcc/testsuite/obj-c++.dg/proto-lossage-4.mm
@@ -6,24 +6,26 @@
 /* One-line substitute for objc/objc.h */
 typedef struct objc_object { struct objc_class *class_pointer; } *id;
 
+typedef __UINTPTR_TYPE__ uintptr_t;
+
 @protocol Proto
-- (long)someValue;
+- (uintptr_t)someValue;
 @end
 
 @interface Obj
-- (long)anotherValue;
+- (uintptr_t)anotherValue;
 @end
 
-long foo(void) {
-  long receiver = 2;
+uintptr_t foo(void) {
+  uintptr_t receiver = 2;
   Obj *objrcvr;
   Obj  *objrcvr2;
 
   /* NB: Since 'receiver' is an invalid ObjC message receiver, the compiler
  should warn but then search for methods as if we were messaging 'id'.  */
 
-  receiver += [receiver someValue]; /* { dg-warning "invalid receiver type 
.long int." } */
-  receiver += [receiver anotherValue]; /* { dg-warning "invalid receiver type 
.long int." } */
+  receiver += [receiver someValue]; /* { dg-warning "invalid receiver type 
.uintptr_t." } */
+  receiver += [receiver anotherValue]; /* { dg-warning "invalid receiver type 
.uintptr_t." } */
 
   receiver += [(Obj *)receiver someValue]; /* { dg-warning ".Obj. may not 
respond to .\\-someValue." } */
 /* { dg-error "invalid conversion" "" { target *-*-* } .-1 } */


[gcc r11-11334] c++, driver: Fix -static-libstdc++ for targets without Bstatic/dynamic.

2024-04-22 Thread Iain D Sandoe via Gcc-cvs
https://gcc.gnu.org/g:8af693c4ae1a0f8cecef34e98dad1752ebf0bb75

commit r11-11334-g8af693c4ae1a0f8cecef34e98dad1752ebf0bb75
Author: Iain Sandoe 
Date:   Thu Jan 6 08:37:18 2022 +

c++, driver: Fix -static-libstdc++ for targets without Bstatic/dynamic.

The current implementation for swapping between the static and shared c++
runtimes relies on the static linker supporting Bstatic/dynamic which is
not available for every target (Darwin's linker does not support this).

Specs substitution (%s) is an alternative solution for this (which is what
Darwin uses for Fortran, D and Objective-C).  However, specs substitution
requires that the '-static-libstdc++' be preserved in the driver's command
line.  The patch here arranges for this to be done when the configuration
determines that linker support for Bstatic/dynamic is missing.

Signed-off-by: Iain Sandoe 

gcc/cp/ChangeLog:

* g++spec.c (lang_specific_driver): Preserve -static-libstdc++ in
the driver command line for targets without -Bstatic/dynamic support
in their static linker.

(cherry picked from commit a846817739c1e7b930d593cd51963d6b46b5dfc6)

Diff:
---
 gcc/cp/g++spec.c | 5 +
 1 file changed, 5 insertions(+)

diff --git a/gcc/cp/g++spec.c b/gcc/cp/g++spec.c
index 3c9bd1490b4..984106f10dd 100644
--- a/gcc/cp/g++spec.c
+++ b/gcc/cp/g++spec.c
@@ -222,7 +222,12 @@ lang_specific_driver (struct cl_decoded_option 
**in_decoded_options,
 
case OPT_static_libstdc__:
  library = library >= 0 ? 2 : library;
+#ifdef HAVE_LD_STATIC_DYNAMIC
+ /* Remove -static-libstdc++ from the command only if target supports
+LD_STATIC_DYNAMIC.  When not supported, it is left in so that a
+back-end target can use outfile substitution.  */
  args[i] |= SKIPOPT;
+#endif
  break;
 
case OPT_stdlib_:


[gcc r11-11333] testsuite, Darwin: Fix darwin-comm-1.c error messages for Darwin <= 10.

2024-04-22 Thread Iain D Sandoe via Gcc-cvs
https://gcc.gnu.org/g:45385f6932567f1b0ce5e1f809135c73c6b70df5

commit r11-11333-g45385f6932567f1b0ce5e1f809135c73c6b70df5
Author: Iain Sandoe 
Date:   Sat Jun 25 09:58:35 2022 +0100

testsuite, Darwin: Fix darwin-comm-1.c error messages for Darwin <= 10.

When amending the allowed alignment size to accommodate the larger values
permitted by newer tools, we retained the object file limit of 2^15 for
Darwin versions <= 10, since that is what the native tools expect there.

This triggers a different diagnostic path with a distinct error message,
which is checked in the revised test here.

Signed-off-by: Iain Sandoe 

gcc/testsuite/ChangeLog:

* gcc.dg/darwin-comm-1.c: Check for the correct error message for
Darwin <= 10.

(cherry picked from commit 54a5f478487a955c3ffaec3e9164a72599bc1cfb)

Diff:
---
 gcc/testsuite/gcc.dg/darwin-comm-1.c | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/gcc/testsuite/gcc.dg/darwin-comm-1.c 
b/gcc/testsuite/gcc.dg/darwin-comm-1.c
index 46519984fd8..2ea11d63d81 100644
--- a/gcc/testsuite/gcc.dg/darwin-comm-1.c
+++ b/gcc/testsuite/gcc.dg/darwin-comm-1.c
@@ -1,5 +1,6 @@
-/* { dg-do compile { target *-*-darwin[912]* } } */
+/* { dg-do compile { target *-*-darwin* } } */
 /* { dg-options "-fcommon" } */
 
 /* In all cases, common has a max alignment of 2^15.  */
-int badcommon __attribute__ ((aligned (65536))); /* { dg-error "common 
variables must have an alignment" } */
+int badcommon __attribute__ ((aligned (65536))); /* { dg-error "common 
variables must have an alignment" "" { target { *-*-darwin1[1-9]* *-*-darwin2* 
} } } */
+/* { dg-error "requested alignment .65536. exceeds object file maximum 32768" 
"" { target { *-*-darwin[4-9]* *-*-darwin10* } } .-1 } */
\ No newline at end of file


[gcc r11-11332] testsuite, Darwin: Remove an unnecessary flags addition.

2024-04-22 Thread Iain D Sandoe via Libstdc++-cvs
https://gcc.gnu.org/g:b4ad231ce26a66a9e11f246df2c602626d99fc6a

commit r11-11332-gb4ad231ce26a66a9e11f246df2c602626d99fc6a
Author: Iain Sandoe 
Date:   Sun Jun 19 20:47:43 2022 +0100

testsuite, Darwin: Remove an unnecessary flags addition.

The addition of the multiply_defined suppress flag has been handled for some
considerable time now in the Darwin specs; remove it from the testsuite 
libs.
Avoid duplicates in the specs.

Signed-off-by: Iain Sandoe 

gcc/ChangeLog:

* config/darwin.h: Avoid duplicate multiply_defined specs on
earlier Darwin versions with shared libgcc.

libstdc++-v3/ChangeLog:

* testsuite/lib/libstdc++.exp: Remove additional flag handled
by Darwin specs.

gcc/testsuite/ChangeLog:

* lib/g++.exp: Remove additional flag handled by Darwin specs.
* lib/obj-c++.exp: Likewise.

(cherry picked from commit 3c776fdf1a825818ad7248d442e846f532574ff7)

Diff:
---
 gcc/config/darwin.h  | 5 ++---
 gcc/testsuite/lib/g++.exp| 4 
 gcc/testsuite/lib/obj-c++.exp| 4 
 libstdc++-v3/testsuite/lib/libstdc++.exp | 3 ---
 4 files changed, 2 insertions(+), 14 deletions(-)

diff --git a/gcc/config/darwin.h b/gcc/config/darwin.h
index 504dfcec4da..b2bd33f8d4a 100644
--- a/gcc/config/darwin.h
+++ b/gcc/config/darwin.h
@@ -215,8 +215,7 @@ extern GTY(()) int darwin_ms_struct;
   "%{image_base*:-Xlinker -image_base -Xlinker %*} %= 10.7 mmacosx-version-min= -no_pie) }"
 
 #define DARWIN_CC1_SPEC
\
-  "%

[gcc r11-11331] configure, Darwin: Adjust handing of stdlib option.

2024-04-22 Thread Iain D Sandoe via Gcc-cvs
https://gcc.gnu.org/g:889dccb5131cd52f3f7735dce7b02105cc067a9e

commit r11-11331-g889dccb5131cd52f3f7735dce7b02105cc067a9e
Author: Iain Sandoe 
Date:   Sat Sep 16 08:40:49 2023 +0100

configure, Darwin: Adjust handing of stdlib option.

The intent of the configuration choices for -stdlib is that default
setting should choose reasonable options for the target.  This should
enable -stdlib= for Darwin targets where libc++ is the default on the
system (so that it is only necessary to provide the headers).

However, it seems that there are some cases where (external) config
scripts are using -stdlib (incorrectly) to determine if the compiler
in use is GCC or clang.

In order to allow for these cases, this patch refines the setting
like so:

--with-gxx-libcxx-include-dir= is used to configure the path containing
libc++ headers; it also controls the enabling of the -stdlib option.

We are adding a special value for path:
if --with-gxx-libcxx-include-dir is 'no' we disable the stdlib option.

Otherwise if the --with-gxx-libcxx-include-dir is set we use the path
provided, and enable the stdlib option.

if --with-gxx-libcxx-include-dir is unset
We decide on the stdlib option based on the OS type and revision being
targeted.  The path is set to a fixed position relative to the compiler
install (similar logic to that used for libstdc++ headers).

Signed-off-by: Iain Sandoe 

gcc/ChangeLog:

* configure: Regenerate.
* configure.ac: Handle explict disable of stdlib option, set
defaults for Darwin.

(cherry picked from commit ce7a757fd9ecb99c4f54cfde5cf5ef9a9e7819fc)

Diff:
---
 gcc/configure| 45 ++---
 gcc/configure.ac | 38 ++
 2 files changed, 64 insertions(+), 19 deletions(-)

diff --git a/gcc/configure b/gcc/configure
index 327c59652e8..3a9d5e269d1 100755
--- a/gcc/configure
+++ b/gcc/configure
@@ -3746,31 +3746,54 @@ gcc_gxx_libcxx_include_dir=
 if test "${with_gxx_libcxx_include_dir+set}" = set; then :
   withval=$with_gxx_libcxx_include_dir; case "${withval}" in
 yes)   as_fn_error $? "bad value ${withval} given for libc++ include 
directory" "$LINENO" 5 ;;
-no);;
 *) gcc_gxx_libcxx_include_dir=$with_gxx_libcxx_include_dir ;;
 esac
 fi
 
 
+# --with-gxx-libcxx-include-dir controls the enabling of the -stdlib option.
+# if --with-gxx-libcxx-include-dir is 'no' we disable the stdlib option.
+# if --with-gxx-libcxx-include-dir is unset we enable the stdlib option
+# based on the platform (to be available on platform versions where it is the
+# default for the system tools). We also use a default path within the compiler
+# install tree.
+# Otherwise, we use the path provided and enable the stdlib option.
 # If both --with-sysroot and --with-gxx-libcxx-include-dir are passed, we
 # check to see if the latter starts with the former and, upon success, compute
 # gcc_gxx_libcxx_include_dir as relative to the sysroot.
 gcc_gxx_libcxx_include_dir_add_sysroot=0
-
+gcc_enable_stdlib_opt=0
 if test x${gcc_gxx_libcxx_include_dir} != x; then
+  if test x${gcc_gxx_libcxx_include_dir} = xno; then
+# set defaults for the dir, but the option is disabled anyway.
+gcc_gxx_libcxx_include_dir=
+  else
+gcc_enable_stdlib_opt=1
+  fi
+else
+  case $target in
+*-darwin1[1-9]* | *-darwin2*)
+   # Default this on for Darwin versions which default to libcxx,
+   # and embed the path in the compiler install so that we get a
+   # self-contained toolchain.
+   gcc_enable_stdlib_opt=1
+   ;;
+*) ;;
+  esac
+fi
 
-$as_echo "#define ENABLE_STDLIB_OPTION 1" >>confdefs.h
+cat >>confdefs.h <<_ACEOF
+#define ENABLE_STDLIB_OPTION $gcc_enable_stdlib_opt
+_ACEOF
 
-else
-  $as_echo "#define ENABLE_STDLIB_OPTION 0" >>confdefs.h
 
-fi
-# ??? This logic must match 
libstdc++-v3/acinclude.m4:GLIBCXX_EXPORT_INSTALL_INFO.
+# Sysroot behaviour as for gxx-include-dir
 if test x${gcc_gxx_libcxx_include_dir} = x; then
+  # default path,embedded in the compiler tree.
+  libcxx_incdir='include/c++/v1'
   if test x${enable_version_specific_runtime_libs} = xyes; then
-gcc_gxx_libcxx_include_dir='${libsubdir}/libc++_include/c++/v1'
+gcc_gxx_libcxx_include_dir='${libsubdir}/$libcxx_incdir'
   else
-libcxx_incdir='libc++_include/c++/$(version)/v1'
 if test x$host != x$target; then
libcxx_incdir="$target_alias/$libcxx_incdir"
 fi
@@ -19423,7 +19446,7 @@ else
   lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2
   lt_status=$lt_dlunknown
   cat > conftest.$ac_ext <<_LT_EOF
-#line 19426 "configure"
+#line 19449 "configure"
 #include "confdefs.h"
 
 #if HAVE_DLFCN_H
@@ -19529,7 +19552,7 @@ else
   lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2
   lt_status=$lt_dlunknown
   cat > conftest.$ac_ext <<_LT_EOF
-#line 19532 "configure"
+#line 19555 

[gcc r14-10074] Revert "RISC-V: Rename vconstraint into group_overlap"

2024-04-22 Thread Pan Li via Gcc-cvs
https://gcc.gnu.org/g:cacc55a4c0be8d0bc7417b6a28924eadbbe428e3

commit r14-10074-gcacc55a4c0be8d0bc7417b6a28924eadbbe428e3
Author: Pan Li 
Date:   Mon Apr 22 20:45:40 2024 +0800

Revert "RISC-V: Rename vconstraint into group_overlap"

This reverts commit e65aaf8efe1900f7bbf76235a078000bf2ec8b45.

Diff:
---
 gcc/config/riscv/constraints.md | 12 ++--
 gcc/config/riscv/riscv.md   | 19 ---
 gcc/config/riscv/vector.md  |  4 ++--
 3 files changed, 16 insertions(+), 19 deletions(-)

diff --git a/gcc/config/riscv/constraints.md b/gcc/config/riscv/constraints.md
index 972e8842c9f..e37c6936bfa 100644
--- a/gcc/config/riscv/constraints.md
+++ b/gcc/config/riscv/constraints.md
@@ -173,14 +173,14 @@
 (define_register_constraint "W84" "TARGET_VECTOR ? V_REGS : NO_REGS"
   "A vector register has register number % 8 == 4." "regno % 8 == 4")
 
-(define_register_constraint "W43" "TARGET_VECTOR ? V_REGS : NO_REGS"
-  "A vector register has register number % 4 == 3." "regno % 4 == 3")
+(define_register_constraint "W41" "TARGET_VECTOR ? V_REGS : NO_REGS"
+  "A vector register has register number % 4 == 1." "regno % 4 == 1")
 
-(define_register_constraint "W86" "TARGET_VECTOR ? V_REGS : NO_REGS"
-  "A vector register has register number % 8 == 6." "regno % 8 == 6")
+(define_register_constraint "W81" "TARGET_VECTOR ? V_REGS : NO_REGS"
+  "A vector register has register number % 8 == 1." "regno % 8 == 1")
 
-(define_register_constraint "W87" "TARGET_VECTOR ? V_REGS : NO_REGS"
-  "A vector register has register number % 8 == 7." "regno % 8 == 7")
+(define_register_constraint "W82" "TARGET_VECTOR ? V_REGS : NO_REGS"
+  "A vector register has register number % 8 == 2." "regno % 8 == 2")
 
 ;; This constraint is used to match instruction "csrr %0, vlenb" which is 
generated in "mov".
 ;; VLENB is a run-time constant which represent the vector register length in 
bytes.
diff --git a/gcc/config/riscv/riscv.md b/gcc/config/riscv/riscv.md
index 3628e2215da..1693d4008c6 100644
--- a/gcc/config/riscv/riscv.md
+++ b/gcc/config/riscv/riscv.md
@@ -538,25 +538,22 @@
   ]
   (const_string "no")))
 
-;; Widening instructions have group-overlap constraints.  Those are only
-;; valid for certain register-group sizes.  This attribute marks the
-;; alternatives not matching the required register-group size as disabled.
-(define_attr "group_overlap" "none,W21,W42,W84,W43,W86,W87"
-  (const_string "none"))
+(define_attr "vconstraint" "no,W21,W42,W84,W41,W81,W82"
+  (const_string "no"))
 
-(define_attr "group_overlap_valid" "no,yes"
-  (cond [(eq_attr "group_overlap" "none")
+(define_attr "vconstraint_enabled" "no,yes"
+  (cond [(eq_attr "vconstraint" "no")
  (const_string "yes")
 
- (and (eq_attr "group_overlap" "W21")
+ (and (eq_attr "vconstraint" "W21")
  (match_test "riscv_get_v_regno_alignment (GET_MODE (operands[0])) 
!= 2"))
 (const_string "no")
 
- (and (eq_attr "group_overlap" "W42,W43")
+ (and (eq_attr "vconstraint" "W42,W41")
  (match_test "riscv_get_v_regno_alignment (GET_MODE (operands[0])) 
!= 4"))
 (const_string "no")
 
- (and (eq_attr "group_overlap" "W84,W86,W87")
+ (and (eq_attr "vconstraint" "W84,W81,W82")
  (match_test "riscv_get_v_regno_alignment (GET_MODE (operands[0])) 
!= 8"))
 (const_string "no")
 ]
@@ -590,7 +587,7 @@
 (eq_attr "fp_vector_disabled" "yes")
 (const_string "no")
 
-(eq_attr "group_overlap_valid" "no")
+(eq_attr "vconstraint_enabled" "no")
 (const_string "no")
 
 (eq_attr "spec_restriction_disabled" "yes")
diff --git a/gcc/config/riscv/vector.md b/gcc/config/riscv/vector.md
index 598aa8fba33..cb5174a5e91 100644
--- a/gcc/config/riscv/vector.md
+++ b/gcc/config/riscv/vector.md
@@ -3747,7 +3747,7 @@
   "vext.vf2\t%0,%3%p1"
   [(set_attr "type" "vext")
(set_attr "mode" "")
-   (set_attr "group_overlap" "W21,W21,W42,W42,W84,W84,none,none")])
+   (set_attr "vconstraint" "W21,W21,W42,W42,W84,W84,no,no")])
 
 ;; Vector Quad-Widening Sign-extend and Zero-extend.
 (define_insn "@pred__vf4"
@@ -3970,7 +3970,7 @@
(set (attr "ta") (symbol_ref "riscv_vector::get_ta(operands[5])"))
(set (attr "ma") (symbol_ref "riscv_vector::get_ma(operands[6])"))
(set (attr "avl_type_idx") (const_int 7))
-   (set_attr "group_overlap" "W21,W21,W42,W42,W84,W84,none,none")])
+   (set_attr "vconstraint" "W21,W21,W42,W42,W84,W84,no,no")])
 
 ;; 
---
 ;;  Predicated integer Narrowing operations


[gcc r14-10073] Revert "RISC-V: Robostify the W43, W86, W87 constraint enabled attribute"

2024-04-22 Thread Pan Li via Gcc-cvs
https://gcc.gnu.org/g:b78c88438cf3672987736edc013ffc0b20e879f7

commit r14-10073-gb78c88438cf3672987736edc013ffc0b20e879f7
Author: Pan Li 
Date:   Mon Apr 22 20:44:38 2024 +0800

Revert "RISC-V: Robostify the W43, W86, W87 constraint enabled attribute"

This reverts commit d3544cea63d0a642b6357a7be55986f5562beaa0.

Diff:
---
 gcc/config/riscv/riscv.md | 19 ++-
 1 file changed, 2 insertions(+), 17 deletions(-)

diff --git a/gcc/config/riscv/riscv.md b/gcc/config/riscv/riscv.md
index f0928398698..3628e2215da 100644
--- a/gcc/config/riscv/riscv.md
+++ b/gcc/config/riscv/riscv.md
@@ -552,28 +552,13 @@
  (match_test "riscv_get_v_regno_alignment (GET_MODE (operands[0])) 
!= 2"))
 (const_string "no")
 
- (and (eq_attr "group_overlap" "W42")
+ (and (eq_attr "group_overlap" "W42,W43")
  (match_test "riscv_get_v_regno_alignment (GET_MODE (operands[0])) 
!= 4"))
 (const_string "no")
 
- (and (eq_attr "group_overlap" "W84")
+ (and (eq_attr "group_overlap" "W84,W86,W87")
  (match_test "riscv_get_v_regno_alignment (GET_MODE (operands[0])) 
!= 8"))
 (const_string "no")
-
- ;; According to RVV ISA:
- ;; The destination EEW is greater than the source EEW, the source 
EMUL is at least 1,
-;; and the overlap is in the highest-numbered part of the destination 
register group
-;; (e.g., when LMUL=8, vzext.vf4 v0, v6 is legal, but a source of v0, 
v2, or v4 is not).
-;; So the source operand should have LMUL >= 1.
- (and (eq_attr "group_overlap" "W43")
- (match_test "riscv_get_v_regno_alignment (GET_MODE (operands[0])) 
!= 4
-  && riscv_get_v_regno_alignment (GET_MODE 
(operands[3])) >= 1"))
-(const_string "no")
-
- (and (eq_attr "group_overlap" "W86,W87")
- (match_test "riscv_get_v_regno_alignment (GET_MODE (operands[0])) 
!= 8
-  && riscv_get_v_regno_alignment (GET_MODE 
(operands[3])) >= 1"))
-(const_string "no")
 ]
(const_string "yes")))


[gcc r13-8641] i386: Fix Sierra Forest auto dispatch

2024-04-22 Thread Haochen Jiang via Gcc-cvs
https://gcc.gnu.org/g:d80c9df20ed77a26eb71457679dad2b564c5da60

commit r13-8641-gd80c9df20ed77a26eb71457679dad2b564c5da60
Author: Haochen Jiang 
Date:   Mon Apr 22 16:57:36 2024 +0800

i386: Fix Sierra Forest auto dispatch

gcc/ChangeLog:

* common/config/i386/i386-common.cc (processor_alias_table):
Let Sierra Forest map to CPU_TYPE enum.

Diff:
---
 gcc/common/config/i386/i386-common.cc | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/gcc/common/config/i386/i386-common.cc 
b/gcc/common/config/i386/i386-common.cc
index 988805a3aed..a8809889360 100644
--- a/gcc/common/config/i386/i386-common.cc
+++ b/gcc/common/config/i386/i386-common.cc
@@ -2110,7 +2110,7 @@ const pta processor_alias_table[] =
   {"gracemont", PROCESSOR_ALDERLAKE, CPU_HASWELL, PTA_ALDERLAKE,
M_CPU_SUBTYPE (INTEL_COREI7_ALDERLAKE), P_PROC_AVX2},
   {"sierraforest", PROCESSOR_SIERRAFOREST, CPU_HASWELL, PTA_SIERRAFOREST,
-M_CPU_SUBTYPE (INTEL_SIERRAFOREST), P_PROC_AVX2},
+M_CPU_TYPE (INTEL_SIERRAFOREST), P_PROC_AVX2},
   {"grandridge", PROCESSOR_GRANDRIDGE, CPU_HASWELL, PTA_GRANDRIDGE,
 M_CPU_TYPE (INTEL_GRANDRIDGE), P_PROC_AVX2},
   {"knl", PROCESSOR_KNL, CPU_SLM, PTA_KNL,


[gcc r14-10072] i386: Fix Sierra Forest auto dispatch

2024-04-22 Thread Haochen Jiang via Gcc-cvs
https://gcc.gnu.org/g:6b5248d15c6d10325c6cbb92a0e0a9eb04e3f122

commit r14-10072-g6b5248d15c6d10325c6cbb92a0e0a9eb04e3f122
Author: Haochen Jiang 
Date:   Mon Apr 22 16:57:36 2024 +0800

i386: Fix Sierra Forest auto dispatch

gcc/ChangeLog:

* common/config/i386/i386-common.cc (processor_alias_table):
Let Sierra Forest map to CPU_TYPE enum.

Diff:
---
 gcc/common/config/i386/i386-common.cc | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/gcc/common/config/i386/i386-common.cc 
b/gcc/common/config/i386/i386-common.cc
index f814df8385b..77b154663bc 100644
--- a/gcc/common/config/i386/i386-common.cc
+++ b/gcc/common/config/i386/i386-common.cc
@@ -2302,7 +2302,7 @@ const pta processor_alias_table[] =
   {"gracemont", PROCESSOR_ALDERLAKE, CPU_HASWELL, PTA_ALDERLAKE,
M_CPU_SUBTYPE (INTEL_COREI7_ALDERLAKE), P_PROC_AVX2},
   {"sierraforest", PROCESSOR_SIERRAFOREST, CPU_HASWELL, PTA_SIERRAFOREST,
-M_CPU_SUBTYPE (INTEL_SIERRAFOREST), P_PROC_AVX2},
+M_CPU_TYPE (INTEL_SIERRAFOREST), P_PROC_AVX2},
   {"grandridge", PROCESSOR_GRANDRIDGE, CPU_HASWELL, PTA_GRANDRIDGE,
 M_CPU_TYPE (INTEL_GRANDRIDGE), P_PROC_AVX2},
   {"clearwaterforest", PROCESSOR_CLEARWATERFOREST, CPU_HASWELL,


[gcc r14-10071] s390x: Do not default to -mvx for -mesa

2024-04-22 Thread Andreas Krebbel via Gcc-cvs
https://gcc.gnu.org/g:1b7785fdf95d179209f7277dd0ef912562130a39

commit r14-10071-g1b7785fdf95d179209f7277dd0ef912562130a39
Author: Andreas Krebbel 
Date:   Mon Apr 22 11:07:43 2024 +0200

s390x: Do not default to -mvx for -mesa

We currently enable the vector extensions also for -march=z13 -m31
-mesa which is very wrong.

gcc/ChangeLog:

* config/s390/s390.cc (s390_option_override_internal): Check zarch
flag before enabling -mvx.

Diff:
---
 gcc/config/s390/s390.cc | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/gcc/config/s390/s390.cc b/gcc/config/s390/s390.cc
index bf46eab2d63..5968808fcb6 100644
--- a/gcc/config/s390/s390.cc
+++ b/gcc/config/s390/s390.cc
@@ -16104,7 +16104,7 @@ s390_option_override_internal (struct gcc_options *opts,
 }
   else
 {
-  if (TARGET_CPU_VX_P (opts))
+  if (TARGET_CPU_VX_P (opts) && TARGET_ZARCH_P (opts->x_target_flags))
/* Enable vector support if available and not explicitly disabled
   by user.  E.g. with -m31 -march=z13 -mzarch */
opts->x_target_flags |= MASK_OPT_VX;


[gcc r14-10070] RISC-V: Add xfail test case for highpart overlap floating-point widen insn

2024-04-22 Thread Pan Li via Gcc-cvs
https://gcc.gnu.org/g:b991193eb8a79ec7562f3de3df866df9f041015a

commit r14-10070-gb991193eb8a79ec7562f3de3df866df9f041015a
Author: Pan Li 
Date:   Mon Apr 22 16:07:36 2024 +0800

RISC-V: Add xfail test case for highpart overlap floating-point widen insn

We reverted below patch for register group overlap, add the related
insn test and mark it as xfail.  And we will remove the xfail
after we support the register overlap in GCC-15.

8614cbb2534 RISC-V: Support highpart overlap for floating-point widen 
instructions

The below test suites are passed.
* The rv64gcv fully regression test.

gcc/testsuite/ChangeLog:

* gcc.target/riscv/rvv/base/pr112431-10.c: New test.
* gcc.target/riscv/rvv/base/pr112431-11.c: New test.
* gcc.target/riscv/rvv/base/pr112431-12.c: New test.
* gcc.target/riscv/rvv/base/pr112431-13.c: New test.
* gcc.target/riscv/rvv/base/pr112431-14.c: New test.
* gcc.target/riscv/rvv/base/pr112431-15.c: New test.
* gcc.target/riscv/rvv/base/pr112431-7.c: New test.
* gcc.target/riscv/rvv/base/pr112431-8.c: New test.
* gcc.target/riscv/rvv/base/pr112431-9.c: New test.

Signed-off-by: Pan Li 

Diff:
---
 .../gcc.target/riscv/rvv/base/pr112431-10.c| 104 
 .../gcc.target/riscv/rvv/base/pr112431-11.c|  68 
 .../gcc.target/riscv/rvv/base/pr112431-12.c|  51 ++
 .../gcc.target/riscv/rvv/base/pr112431-13.c| 188 +
 .../gcc.target/riscv/rvv/base/pr112431-14.c| 119 +
 .../gcc.target/riscv/rvv/base/pr112431-15.c|  86 ++
 .../gcc.target/riscv/rvv/base/pr112431-7.c | 104 
 .../gcc.target/riscv/rvv/base/pr112431-8.c |  68 
 .../gcc.target/riscv/rvv/base/pr112431-9.c |  51 ++
 9 files changed, 839 insertions(+)

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/base/pr112431-10.c 
b/gcc/testsuite/gcc.target/riscv/rvv/base/pr112431-10.c
new file mode 100644
index 000..5d3f2fbe46d
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/rvv/base/pr112431-10.c
@@ -0,0 +1,104 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gcv -mabi=lp64d -O3" } */
+
+#include "riscv_vector.h"
+
+double __attribute__ ((noinline))
+sumation (double sum0, double sum1, double sum2, double sum3, double sum4,
+ double sum5, double sum6, double sum7, double sum8, double sum9,
+ double sum10, double sum11, double sum12, double sum13, double sum14,
+ double sum15)
+{
+  return sum0 + sum1 + sum2 + sum3 + sum4 + sum5 + sum6 + sum7 + sum8 + sum9
++ sum10 + sum11 + sum12 + sum13 + sum14 + sum15;
+}
+
+double
+foo (char const *buf, size_t len)
+{
+  double sum = 0;
+  size_t vl = __riscv_vsetvlmax_e8m8 ();
+  size_t step = vl * 4;
+  const char *it = buf, *end = buf + len;
+  for (; it + step <= end;)
+{
+  vint32m1_t v0 = __riscv_vle32_v_i32m1 ((void *) it, vl);
+  it += vl;
+  vint32m1_t v1 = __riscv_vle32_v_i32m1 ((void *) it, vl);
+  it += vl;
+  vint32m1_t v2 = __riscv_vle32_v_i32m1 ((void *) it, vl);
+  it += vl;
+  vint32m1_t v3 = __riscv_vle32_v_i32m1 ((void *) it, vl);
+  it += vl;
+  vint32m1_t v4 = __riscv_vle32_v_i32m1 ((void *) it, vl);
+  it += vl;
+  vint32m1_t v5 = __riscv_vle32_v_i32m1 ((void *) it, vl);
+  it += vl;
+  vint32m1_t v6 = __riscv_vle32_v_i32m1 ((void *) it, vl);
+  it += vl;
+  vint32m1_t v7 = __riscv_vle32_v_i32m1 ((void *) it, vl);
+  it += vl;
+  vint32m1_t v8 = __riscv_vle32_v_i32m1 ((void *) it, vl);
+  it += vl;
+  vint32m1_t v9 = __riscv_vle32_v_i32m1 ((void *) it, vl);
+  it += vl;
+  vint32m1_t v10 = __riscv_vle32_v_i32m1 ((void *) it, vl);
+  it += vl;
+  vint32m1_t v11 = __riscv_vle32_v_i32m1 ((void *) it, vl);
+  it += vl;
+  vint32m1_t v12 = __riscv_vle32_v_i32m1 ((void *) it, vl);
+  it += vl;
+  vint32m1_t v13 = __riscv_vle32_v_i32m1 ((void *) it, vl);
+  it += vl;
+  vint32m1_t v14 = __riscv_vle32_v_i32m1 ((void *) it, vl);
+  it += vl;
+  vint32m1_t v15 = __riscv_vle32_v_i32m1 ((void *) it, vl);
+  it += vl;
+  
+  asm volatile("nop" ::: "memory");
+  vfloat64m2_t vw0 = __riscv_vfwcvt_f_x_v_f64m2 (v0, vl);
+  vfloat64m2_t vw1 = __riscv_vfwcvt_f_x_v_f64m2 (v1, vl);
+  vfloat64m2_t vw2 = __riscv_vfwcvt_f_x_v_f64m2 (v2, vl);
+  vfloat64m2_t vw3 = __riscv_vfwcvt_f_x_v_f64m2 (v3, vl);
+  vfloat64m2_t vw4 = __riscv_vfwcvt_f_x_v_f64m2 (v4, vl);
+  vfloat64m2_t vw5 = __riscv_vfwcvt_f_x_v_f64m2 (v5, vl);
+  vfloat64m2_t vw6 = __riscv_vfwcvt_f_x_v_f64m2 (v6, vl);
+  vfloat64m2_t vw7 = __riscv_vfwcvt_f_x_v_f64m2 (v7, vl);
+  vfloat64m2_t vw8 = __riscv_vfwcvt_f_x_v_f64m2 (v8, vl);
+  vfloat64m2_t vw9 = __riscv_vfwcvt_f_x_v_f64m2 (v9, vl);
+  vfloat64m2_t vw10 = __riscv_

[gcc r14-10069] Revert "RISC-V: Support highpart overlap for floating-point widen instructions"

2024-04-22 Thread Pan Li via Gcc-cvs
https://gcc.gnu.org/g:4df96b4ec788f2d588febf3555685f2700b932b3

commit r14-10069-g4df96b4ec788f2d588febf3555685f2700b932b3
Author: Pan Li 
Date:   Mon Apr 22 16:25:57 2024 +0800

Revert "RISC-V: Support highpart overlap for floating-point widen 
instructions"

This reverts commit 8614cbb253484e28c3eb20cde4d1067aad56de58.

Diff:
---
 gcc/config/riscv/vector.md |  78 -
 .../gcc.target/riscv/rvv/base/pr112431-10.c| 104 
 .../gcc.target/riscv/rvv/base/pr112431-11.c|  68 
 .../gcc.target/riscv/rvv/base/pr112431-12.c|  51 --
 .../gcc.target/riscv/rvv/base/pr112431-13.c| 188 -
 .../gcc.target/riscv/rvv/base/pr112431-14.c| 119 -
 .../gcc.target/riscv/rvv/base/pr112431-15.c|  86 --
 .../gcc.target/riscv/rvv/base/pr112431-7.c | 106 
 .../gcc.target/riscv/rvv/base/pr112431-8.c |  68 
 .../gcc.target/riscv/rvv/base/pr112431-9.c |  51 --
 10 files changed, 37 insertions(+), 882 deletions(-)

diff --git a/gcc/config/riscv/vector.md b/gcc/config/riscv/vector.md
index 768d23e9f1d..598aa8fba33 100644
--- a/gcc/config/riscv/vector.md
+++ b/gcc/config/riscv/vector.md
@@ -7696,88 +7696,84 @@
 ;; 
---
 
 (define_insn "@pred_widen_fcvt_x_f"
-  [(set (match_operand:VWCONVERTI 0 "register_operand"  "=vr,   vr,   
vr,   vr,  vr,vr, ?&vr, ?&vr")
+  [(set (match_operand:VWCONVERTI 0 "register_operand" "=&vr,  &vr")
(if_then_else:VWCONVERTI
  (unspec:
-   [(match_operand: 1 "vector_mask_operand"  
"vmWc1,vmWc1,vmWc1,vmWc1,vmWc1,vmWc1,vmWc1,vmWc1")
-(match_operand 4 "vector_length_operand" "   rK,   rK,   
rK,   rK,   rK,   rK,   rK,   rK")
-(match_operand 5 "const_int_operand" "i,i,
i,i,i,i,i,i")
-(match_operand 6 "const_int_operand" "i,i,
i,i,i,i,i,i")
-(match_operand 7 "const_int_operand" "i,i,
i,i,i,i,i,i")
-(match_operand 8 "const_int_operand" "i,i,
i,i,i,i,i,i")
+   [(match_operand: 1 "vector_mask_operand"  "vmWc1,vmWc1")
+(match_operand 4 "vector_length_operand" "   rK,   rK")
+(match_operand 5 "const_int_operand" "i,i")
+(match_operand 6 "const_int_operand" "i,i")
+(match_operand 7 "const_int_operand" "i,i")
+(match_operand 8 "const_int_operand" "i,i")
 (reg:SI VL_REGNUM)
 (reg:SI VTYPE_REGNUM)
 (reg:SI FRM_REGNUM)] UNSPEC_VPREDICATE)
  (unspec:VWCONVERTI
-[(match_operand: 3 "register_operand" "  W21,  W21,  
W42,  W42,  W84,  W84,   vr,   vr")] VFCVTS)
- (match_operand:VWCONVERTI 2 "vector_merge_operand"  "   vu,0,   
vu,0,   vu,0,   vu,0")))]
+[(match_operand: 3 "register_operand" "   vr,   vr")] 
VFCVTS)
+ (match_operand:VWCONVERTI 2 "vector_merge_operand"  "   vu,0")))]
   "TARGET_VECTOR"
   "vfwcvt.x.f.v\t%0,%3%p1"
   [(set_attr "type" "vfwcvtftoi")
(set_attr "mode" "")
(set (attr "frm_mode")
-   (symbol_ref "riscv_vector::get_frm_mode (operands[8])"))
-   (set_attr "group_overlap" "W21,W21,W42,W42,W84,W84,none,none")])
+   (symbol_ref "riscv_vector::get_frm_mode (operands[8])"))])
 
 (define_insn "@pred_widen_"
-  [(set (match_operand:VWCONVERTI 0 "register_operand" "=vr,   vr,   
vr,   vr,  vr,vr, ?&vr, ?&vr")
+  [(set (match_operand:VWCONVERTI 0 "register_operand""=&vr,  &vr")
(if_then_else:VWCONVERTI
  (unspec:
-   [(match_operand: 1 "vector_mask_operand" 
"vmWc1,vmWc1,vmWc1,vmWc1,vmWc1,vmWc1,vmWc1,vmWc1")
-(match_operand 4 "vector_length_operand""   rK,   rK,   
rK,   rK,   rK,   rK,   rK,   rK")
-(match_operand 5 "const_int_operand""i,i,
i,i,i,i,i,i")
-(match_operand 6 "const_int_operand""i,i,
i,i,i,i,i,i")
-(match_operand 7 "const_int_operand""i,i,
i,i,i,i,i,i")
+   [(match_operand: 1 "vector_mask_operand" "vmWc1,vmWc1")
+(match_operand 4 "vector_length_operand""   rK,   rK")
+(match_operand 5 "const_int_operand""i,i")
+(match_operand 6 "const_int_operand""i,i")
+(match_operand 7 "const_int_operand""i,i")
 (reg:SI VL_REGNUM)
 (reg:SI VTYPE_REGNUM)] UNSPEC_VPREDICATE)
  (any_fix:VWCONVERTI
- 

[gcc r14-10068] RISC-V: Add xfail test case for indexed load overlap with SRC EEW < DEST EEW

2024-04-22 Thread Pan Li via Gcc-cvs
https://gcc.gnu.org/g:a367b99f916cb7d2d673180ace640096fd118950

commit r14-10068-ga367b99f916cb7d2d673180ace640096fd118950
Author: Pan Li 
Date:   Mon Apr 22 15:36:59 2024 +0800

RISC-V: Add xfail test case for indexed load overlap with SRC EEW < DEST EEW

Update in v2:
* Add change log to pr112431-34.c.

Original log:

We reverted below patch for register group overlap, add the related
insn test and mark it as xfail.  And we will remove the xfail
after we support the register overlap in GCC-15.

4418d55bcd1 RISC-V: Support highpart overlap for indexed load with SRC EEW 
< DEST EEW

The below test suites are passed.
* The rv64gcv fully regression test.

gcc/testsuite/ChangeLog:

* gcc.target/riscv/rvv/base/pr112431-34.c: Remove xfail for vluxei8 
check.
* gcc.target/riscv/rvv/base/pr112431-28.c: New test.
* gcc.target/riscv/rvv/base/pr112431-29.c: New test.
* gcc.target/riscv/rvv/base/pr112431-30.c: New test.
* gcc.target/riscv/rvv/base/pr112431-31.c: New test.
* gcc.target/riscv/rvv/base/pr112431-32.c: New test.
* gcc.target/riscv/rvv/base/pr112431-33.c: New test.

Signed-off-by: Pan Li 

Diff:
---
 .../gcc.target/riscv/rvv/base/pr112431-28.c| 104 +
 .../gcc.target/riscv/rvv/base/pr112431-29.c|  68 ++
 .../gcc.target/riscv/rvv/base/pr112431-30.c|  51 ++
 .../gcc.target/riscv/rvv/base/pr112431-31.c|  68 ++
 .../gcc.target/riscv/rvv/base/pr112431-32.c|  51 ++
 .../gcc.target/riscv/rvv/base/pr112431-33.c|  51 ++
 .../gcc.target/riscv/rvv/base/pr112431-34.c|   2 +-
 7 files changed, 394 insertions(+), 1 deletion(-)

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/base/pr112431-28.c 
b/gcc/testsuite/gcc.target/riscv/rvv/base/pr112431-28.c
new file mode 100644
index 000..c16cbdfe9f9
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/rvv/base/pr112431-28.c
@@ -0,0 +1,104 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gcv -mabi=lp64d -O3" } */
+
+#include "riscv_vector.h"
+
+size_t __attribute__ ((noinline))
+sumation (size_t sum0, size_t sum1, size_t sum2, size_t sum3, size_t sum4,
+ size_t sum5, size_t sum6, size_t sum7, size_t sum8, size_t sum9,
+ size_t sum10, size_t sum11, size_t sum12, size_t sum13, size_t sum14,
+ size_t sum15)
+{
+  return sum0 + sum1 + sum2 + sum3 + sum4 + sum5 + sum6 + sum7 + sum8 + sum9
++ sum10 + sum11 + sum12 + sum13 + sum14 + sum15;
+}
+
+size_t
+foo (char const *buf, size_t len)
+{
+  size_t sum = 0;
+  size_t vl = __riscv_vsetvlmax_e8m8 ();
+  size_t step = vl * 4;
+  const char *it = buf, *end = buf + len;
+  for (; it + step <= end;)
+{
+  vuint8m1_t v0 = __riscv_vle8_v_u8m1 ((void *) it, vl);
+  it += vl;
+  vuint8m1_t v1 = __riscv_vle8_v_u8m1 ((void *) it, vl);
+  it += vl;
+  vuint8m1_t v2 = __riscv_vle8_v_u8m1 ((void *) it, vl);
+  it += vl;
+  vuint8m1_t v3 = __riscv_vle8_v_u8m1 ((void *) it, vl);
+  it += vl;
+  vuint8m1_t v4 = __riscv_vle8_v_u8m1 ((void *) it, vl);
+  it += vl;
+  vuint8m1_t v5 = __riscv_vle8_v_u8m1 ((void *) it, vl);
+  it += vl;
+  vuint8m1_t v6 = __riscv_vle8_v_u8m1 ((void *) it, vl);
+  it += vl;
+  vuint8m1_t v7 = __riscv_vle8_v_u8m1 ((void *) it, vl);
+  it += vl;
+  vuint8m1_t v8 = __riscv_vle8_v_u8m1 ((void *) it, vl);
+  it += vl;
+  vuint8m1_t v9 = __riscv_vle8_v_u8m1 ((void *) it, vl);
+  it += vl;
+  vuint8m1_t v10 = __riscv_vle8_v_u8m1 ((void *) it, vl);
+  it += vl;
+  vuint8m1_t v11 = __riscv_vle8_v_u8m1 ((void *) it, vl);
+  it += vl;
+  vuint8m1_t v12 = __riscv_vle8_v_u8m1 ((void *) it, vl);
+  it += vl;
+  vuint8m1_t v13 = __riscv_vle8_v_u8m1 ((void *) it, vl);
+  it += vl;
+  vuint8m1_t v14 = __riscv_vle8_v_u8m1 ((void *) it, vl);
+  it += vl;
+  vuint8m1_t v15 = __riscv_vle8_v_u8m1 ((void *) it, vl);
+  it += vl;
+  
+  asm volatile("nop" ::: "memory");
+  vint16m2_t vw0 = __riscv_vluxei8_v_i16m2 ((void *) it, v0, vl);
+  vint16m2_t vw1 = __riscv_vluxei8_v_i16m2 ((void *) it, v1, vl);
+  vint16m2_t vw2 = __riscv_vluxei8_v_i16m2 ((void *) it, v2, vl);
+  vint16m2_t vw3 = __riscv_vluxei8_v_i16m2 ((void *) it, v3, vl);
+  vint16m2_t vw4 = __riscv_vluxei8_v_i16m2 ((void *) it, v4, vl);
+  vint16m2_t vw5 = __riscv_vluxei8_v_i16m2 ((void *) it, v5, vl);
+  vint16m2_t vw6 = __riscv_vluxei8_v_i16m2 ((void *) it, v6, vl);
+  vint16m2_t vw7 = __riscv_vluxei8_v_i16m2 ((void *) it, v7, vl);
+  vint16m2_t vw8 = __riscv_vluxei8_v_i16m2 ((void *) it, v8, vl);
+  vint16m2_t vw9 = __riscv_vluxei8_v_i16m2 ((void *) it, v9, vl);
+  vint16m2_t vw10 = __riscv_vluxei8_v_i16m2 ((void *) it, v10, vl);
+  vint16m2_t vw11 = __riscv_vluxei8_v_i16

[gcc r14-10067] Revert "RISC-V: Support highpart overlap for indexed load with SRC EEW < DEST EEW"

2024-04-22 Thread Pan Li via Gcc-cvs
https://gcc.gnu.org/g:9257c7a72059aba0df1684a0722c4d1538cbb6d4

commit r14-10067-g9257c7a72059aba0df1684a0722c4d1538cbb6d4
Author: Pan Li 
Date:   Mon Apr 22 15:39:45 2024 +0800

Revert "RISC-V: Support highpart overlap for indexed load with SRC EEW < 
DEST EEW"

This reverts commit 4418d55bcd1b7e0ef823981b6a781d7de5c38cce.

Diff:
---
 gcc/config/riscv/vector.md |  63 ++---
 .../gcc.target/riscv/rvv/base/pr112431-28.c| 104 -
 .../gcc.target/riscv/rvv/base/pr112431-29.c|  68 --
 .../gcc.target/riscv/rvv/base/pr112431-30.c|  51 --
 .../gcc.target/riscv/rvv/base/pr112431-31.c|  68 --
 .../gcc.target/riscv/rvv/base/pr112431-32.c|  51 --
 .../gcc.target/riscv/rvv/base/pr112431-33.c|  51 --
 7 files changed, 30 insertions(+), 426 deletions(-)

diff --git a/gcc/config/riscv/vector.md b/gcc/config/riscv/vector.md
index aef8cad20a0..768d23e9f1d 100644
--- a/gcc/config/riscv/vector.md
+++ b/gcc/config/riscv/vector.md
@@ -2254,70 +2254,67 @@
 
 ;; DEST eew is greater than SOURCE eew.
 (define_insn "@pred_indexed_load_x2_greater_eew"
-  [(set (match_operand:VEEWEXT2 0 "register_operand" "=vr, 
  vr,   vr,   vr,   vr,   vr, ?&vr, ?&vr")
+  [(set (match_operand:VEEWEXT2 0 "register_operand""=&vr, 
 &vr")
(if_then_else:VEEWEXT2
  (unspec:
-   [(match_operand: 1 "vector_mask_operand"   
"vmWc1,vmWc1,vmWc1,vmWc1,vmWc1,vmWc1,vmWc1,vmWc1")
-(match_operand 5 "vector_length_operand"  "   rK,  
 rK,   rK,   rK,   rK,   rK,   rK,   rK")
-(match_operand 6 "const_int_operand"  "i,  
  i,i,i,i,i,i,i")
-(match_operand 7 "const_int_operand"  "i,  
  i,i,i,i,i,i,i")
-(match_operand 8 "const_int_operand"  "i,  
  i,i,i,i,i,i,i")
+   [(match_operand: 1 "vector_mask_operand"   
"vmWc1,vmWc1")
+(match_operand 5 "vector_length_operand"  "   rK,  
 rK")
+(match_operand 6 "const_int_operand"  "i,  
  i")
+(match_operand 7 "const_int_operand"  "i,  
  i")
+(match_operand 8 "const_int_operand"  "i,  
  i")
 (reg:SI VL_REGNUM)
 (reg:SI VTYPE_REGNUM)] UNSPEC_VPREDICATE)
  (unspec:VEEWEXT2
-   [(match_operand 3 "pmode_reg_or_0_operand" "   rJ,  
 rJ,   rJ,   rJ,   rJ,   rJ,   rJ,   rJ")
+   [(match_operand 3 "pmode_reg_or_0_operand" "   rJ,  
 rJ")
 (mem:BLK (scratch))
-(match_operand: 4 "register_operand" "  W21,  
W21,  W42,  W42,  W84,  W84,   vr,   vr")] ORDER)
- (match_operand:VEEWEXT2 2 "vector_merge_operand" "   vu,  
  0,   vu,0,   vu,0,   vu,0")))]
+(match_operand: 4 "register_operand" "   vr,  
 vr")] ORDER)
+ (match_operand:VEEWEXT2 2 "vector_merge_operand" "   vu,  
  0")))]
   "TARGET_VECTOR"
   "vlxei.v\t%0,(%z3),%4%p1"
   [(set_attr "type" "vldx")
-   (set_attr "mode" "")
-   (set_attr "group_overlap" "W21,W21,W42,W42,W84,W84,none,none")])
+   (set_attr "mode" "")])
 
 (define_insn "@pred_indexed_load_x4_greater_eew"
-  [(set (match_operand:VEEWEXT4 0 "register_operand""=vr,  
  vr,   vr,   vr, ?&vr, ?&vr")
+  [(set (match_operand:VEEWEXT4 0 "register_operand""=&vr, 
 &vr")
(if_then_else:VEEWEXT4
  (unspec:
-   [(match_operand: 1 "vector_mask_operand"   
"vmWc1,vmWc1,vmWc1,vmWc1,vmWc1,vmWc1")
-(match_operand 5 "vector_length_operand"  "   rK,  
 rK,   rK,   rK,   rK,   rK")
-(match_operand 6 "const_int_operand"  "i,  
  i,i,i,i,i")
-(match_operand 7 "const_int_operand"  "i,  
  i,i,i,i,i")
-(match_operand 8 "const_int_operand"  "i,  
  i,i,i,i,i")
+   [(match_operand: 1 "vector_mask_operand"   
"vmWc1,vmWc1")
+(match_operand 5 "vector_length_operand"  "   rK,  
 rK")
+(match_operand 6 "const_int_operand"  "i,  
  i")
+(match_operand 7 "const_int_operand"  "i,  
  i")
+(match_operand 8 "const_int_operand"  "i,  
  i")
 (reg:SI VL_REGNUM)
 (reg:SI VTYPE_REGNUM)] UNSPEC_VPREDICATE)
  (unspec:VEEWEXT4
-   [(match_operand 3 "pmode_reg_or_0_operand" "   rJ,  
 rJ,   rJ,   rJ,   rJ,   rJ")
+   [(match_operand 3 "pm

[gcc r14-10066] s390: testsuite: Remove xfail for vpopct{b,h}

2024-04-22 Thread Stefan Schulze Frielinghaus via Gcc-cvs
https://gcc.gnu.org/g:16aea8c584ea2784a4f5a39352f867506d3441f6

commit r14-10066-g16aea8c584ea2784a4f5a39352f867506d3441f6
Author: Stefan Schulze Frielinghaus 
Date:   Mon Apr 15 15:28:43 2024 +0200

s390: testsuite: Remove xfail for vpopct{b,h}

Starting with r14-9316-g7890836de20912 patterns for vpopct{b,h} are also
detected.  Thus, remove xfails.

gcc/testsuite/ChangeLog:

* gcc.target/s390/vxe/popcount-1.c: Remove xfail.

Diff:
---
 gcc/testsuite/gcc.target/s390/vxe/popcount-1.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/gcc/testsuite/gcc.target/s390/vxe/popcount-1.c 
b/gcc/testsuite/gcc.target/s390/vxe/popcount-1.c
index 9ea835a1cf0..25ef354f963 100644
--- a/gcc/testsuite/gcc.target/s390/vxe/popcount-1.c
+++ b/gcc/testsuite/gcc.target/s390/vxe/popcount-1.c
@@ -21,7 +21,7 @@ vpopctb (uv16qi a)
 
   return r;
 }
-/* { dg-final { scan-assembler "vpopctb\t%v24,%v24" { xfail *-*-* } } } */
+/* { dg-final { scan-assembler "vpopctb\t%v24,%v24" } } */
 
 uv8hi __attribute__((noinline))
 vpopcth (uv8hi a)
@@ -34,7 +34,7 @@ vpopcth (uv8hi a)
 
   return r;
 }
-/* { dg-final { scan-assembler "vpopcth\t%v24,%v24" { xfail *-*-* } } } */
+/* { dg-final { scan-assembler "vpopcth\t%v24,%v24" } } */
 
 uv4si __attribute__((noinline))
 vpopctf (uv4si a)