[gcc r14-10104] i386: Fix behavior for both using AVX10.1-256 in options and function attribute
https://gcc.gnu.org/g:d279c9d89b2f6ce89c1eec0ff4b980e9c5f51fd1
commit r14-10104-gd279c9d89b2f6ce89c1eec0ff4b980e9c5f51fd1
Author: Haochen Jiang
Date: Wed Apr 24 10:43:18 2024 +0800
i386: Fix behavior for both using AVX10.1-256 in options and function
attribute
When we are using -mavx10.1-256 in command line and avx10.1-256 in
target attribute together, zmm should never be generated. But current
GCC will generate zmm since it wrongly enables EVEX512 for non-explicitly
set AVX512. This patch will fix that issue.
gcc/ChangeLog:
* config/i386/i386-options.cc (ix86_valid_target_attribute_tree):
Check whether AVX512F is explicitly enabled.
gcc/testsuite/ChangeLog:
* gcc.target/i386/avx10_1-24.c: New test.
Diff:
---
gcc/config/i386/i386-options.cc| 1 +
gcc/testsuite/gcc.target/i386/avx10_1-24.c | 7 +++
2 files changed, 8 insertions(+)
diff --git a/gcc/config/i386/i386-options.cc b/gcc/config/i386/i386-options.cc
index 68a2e1c6910..ac48b5c61c4 100644
--- a/gcc/config/i386/i386-options.cc
+++ b/gcc/config/i386/i386-options.cc
@@ -1431,6 +1431,7 @@ ix86_valid_target_attribute_tree (tree fndecl, tree args,
scenario. */
if ((def->x_ix86_isa_flags2 & OPTION_MASK_ISA2_AVX10_1_256)
&& (opts->x_ix86_isa_flags & OPTION_MASK_ISA_AVX512F)
+ && (opts->x_ix86_isa_flags_explicit & OPTION_MASK_ISA_AVX512F)
&& !(def->x_ix86_isa_flags2_explicit & OPTION_MASK_ISA2_EVEX512)
&& !(opts->x_ix86_isa_flags2_explicit & OPTION_MASK_ISA2_EVEX512))
opts->x_ix86_isa_flags2 |= OPTION_MASK_ISA2_EVEX512;
diff --git a/gcc/testsuite/gcc.target/i386/avx10_1-24.c
b/gcc/testsuite/gcc.target/i386/avx10_1-24.c
new file mode 100644
index 000..2e93f041760
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx10_1-24.c
@@ -0,0 +1,7 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -march=x86-64 -mavx10.1" } */
+/* { dg-final { scan-assembler-not "%zmm" } } */
+
+typedef float __m512 __attribute__ ((__vector_size__ (64), __may_alias__));
+
+void __attribute__((target("avx10.1-256"))) callee256(__m512 *a, __m512 *b) {
*a = *b; }
[gcc r14-10105] tree-optimization/114832 - wrong dominator info with vect peeling
https://gcc.gnu.org/g:e28e8ab1a92e9b49f7c4045377577c8dc17751b7
commit r14-10105-ge28e8ab1a92e9b49f7c4045377577c8dc17751b7
Author: Richard Biener
Date: Wed Apr 24 06:24:22 2024 +0200
tree-optimization/114832 - wrong dominator info with vect peeling
When we update the dominator of the redirected exit after peeling
we check whether the immediate dominator was the loop header rather
than the exit source when we later want to just update it to the
new source. The following fixes this oversight.
PR tree-optimization/114832
* tree-vect-loop-manip.cc (slpeel_tree_duplicate_loop_to_edge_cfg):
Fix dominance check.
* gcc.dg/vect/pr114832.c: New testcase.
Diff:
---
gcc/testsuite/gcc.dg/vect/pr114832.c | 13 +
gcc/tree-vect-loop-manip.cc | 2 +-
2 files changed, 14 insertions(+), 1 deletion(-)
diff --git a/gcc/testsuite/gcc.dg/vect/pr114832.c
b/gcc/testsuite/gcc.dg/vect/pr114832.c
new file mode 100644
index 000..2de07ae22ef
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/vect/pr114832.c
@@ -0,0 +1,13 @@
+/* { dg-do compile } */
+/* { dg-additional-options "-fno-tree-loop-if-convert
-fno-tree-loop-distribute-patterns" } */
+
+int a, b, c, d[3];
+void e() {
+ int f, g = 0;
+ for (; g < 3; g++) {
+if (f || a || b && c) {
+ int h, *i = &h, **j = &i;
+}
+d[g] = 0;
+ }
+}
diff --git a/gcc/tree-vect-loop-manip.cc b/gcc/tree-vect-loop-manip.cc
index 8d9b533d50f..43c7881c640 100644
--- a/gcc/tree-vect-loop-manip.cc
+++ b/gcc/tree-vect-loop-manip.cc
@@ -1523,7 +1523,7 @@ slpeel_tree_duplicate_loop_to_edge_cfg (class loop *loop,
edge loop_exit,
exit_dest = exit->dest;
was_imm_dom = (get_immediate_dominator (CDI_DOMINATORS,
- exit_dest) == loop->header ?
+ exit_dest) == exit->src ?
true : false);
/* Also copy the pre-header, this avoids jumping through hoops to
[gcc r14-10106] tree-optimization/114787 - more careful loop update with CFG cleanup
https://gcc.gnu.org/g:cc48418cfc2e555d837ae9138cbfac23acb3cdf9
commit r14-10106-gcc48418cfc2e555d837ae9138cbfac23acb3cdf9
Author: Richard Biener
Date: Wed Apr 24 08:42:40 2024 +0200
tree-optimization/114787 - more careful loop update with CFG cleanup
When CFG cleanup removes a backedge we have to be more careful with
loop update. In particular we need to clear niter info and estimates
and if we remove the last backedge of a loop we have to also mark
it for removal to prevent a following basic block merging to associate
loop info with an unrelated header.
PR tree-optimization/114787
* tree-cfg.cc (remove_edge_and_dominated_blocks): When
removing a loop backedge clear niter info and when removing
the last backedge of a loop mark that loop for removal.
* gcc.dg/torture/pr114787.c: New testcase.
Diff:
---
gcc/testsuite/gcc.dg/torture/pr114787.c | 27 +++
gcc/tree-cfg.cc | 26 +++---
2 files changed, 50 insertions(+), 3 deletions(-)
diff --git a/gcc/testsuite/gcc.dg/torture/pr114787.c
b/gcc/testsuite/gcc.dg/torture/pr114787.c
new file mode 100644
index 000..1c7294bee7b
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/torture/pr114787.c
@@ -0,0 +1,27 @@
+/* { dg-do run } */
+
+int a, b, c, d, e = -1, f, g, h, j, k, n, o, p;
+int main() {
+ int i, l = 2, m;
+ for (b = 0; b < 1; b++)
+l = 0;
+ for (; a >= 0; a--)
+for (m = 3; m; m--) {
+ k = g;
+ i = 0;
+ for (; i < 1; i++)
+for (; f < 1; f++)
+ h = g;
+ n = 2 & ((e ^ d) | 1) * j;
+ o = ~(e & n);
+q:
+ if (c <= e)
+return 0;
+ e = o;
+}
+ p = l;
+ l = 0;
+ if (p)
+goto q;
+ return 0;
+}
diff --git a/gcc/tree-cfg.cc b/gcc/tree-cfg.cc
index d98b68d6787..b1ba33018fd 100644
--- a/gcc/tree-cfg.cc
+++ b/gcc/tree-cfg.cc
@@ -9013,10 +9013,30 @@ remove_edge_and_dominated_blocks (edge e)
/* If we are removing a path inside a non-root loop that may change
loop ownership of blocks or remove loops. Mark loops for fixup. */
+ class loop *src_loop = e->src->loop_father;
if (current_loops
- && loop_outer (e->src->loop_father) != NULL
- && e->src->loop_father == e->dest->loop_father)
-loops_state_set (LOOPS_NEED_FIXUP);
+ && loop_outer (src_loop) != NULL
+ && src_loop == e->dest->loop_father)
+{
+ loops_state_set (LOOPS_NEED_FIXUP);
+ /* If we are removing a backedge clear the number of iterations
+and estimates. */
+ class loop *dest_loop = e->dest->loop_father;
+ if (e->dest == src_loop->header
+ || (e->dest == dest_loop->header
+ && flow_loop_nested_p (dest_loop, src_loop)))
+ {
+ free_numbers_of_iterations_estimates (dest_loop);
+ /* If we removed the last backedge mark the loop for removal. */
+ FOR_EACH_EDGE (f, ei, dest_loop->header->preds)
+ if (f != e
+ && (f->src->loop_father == dest_loop
+ || flow_loop_nested_p (dest_loop, f->src->loop_father)))
+ break;
+ if (!f)
+ mark_loop_for_removal (dest_loop);
+ }
+}
if (!dom_info_available_p (CDI_DOMINATORS))
{
[gcc] Created branch 'devel/subreg-coalesce'
The branch 'devel/subreg-coalesce' was created pointing to: 443748259d9... libstdc++: Fix "extact" typos in comments
[gcc/devel/subreg-coalesce] (111 commits) tree-optimization/114787 - more careful loop update with CF
The branch 'devel/subreg-coalesce' was updated to point to:
cc48418cfc2... tree-optimization/114787 - more careful loop update with CF
It previously pointed to:
443748259d9... libstdc++: Fix "extact" typos in comments
Diff:
Summary of changes (added commits):
---
cc48418... tree-optimization/114787 - more careful loop update with CF (*)
e28e8ab... tree-optimization/114832 - wrong dominator info with vect p (*)
d279c9d... i386: Fix behavior for both using AVX10.1-256 in options an (*)
f952745... RISC-V: Add xfail test case for highpart overlap of vext.vf (*)
8bcefc2... Revert "RISC-V: Support highpart overlap for vext.vf" (*)
3091f1d... Daily bump. (*)
7318f1a... c++: Fix ICE with xobj parms and maybe incomplete decl-spec (*)
628c222... i386: Avoid =&r,r,r andn double-word alternative for ia32 [ (*)
f7a5c99... Regenerate gcc.pot (*)
0bf94da... Fortran: check C_SIZEOF on additions from TS29113/F2018 [PR (*)
4f9401d... c++/modules: deduced return type merging [PR114795] (*)
d2f05fe... libbacktrace: test --compress-debug-sections=ARG for each A (*)
0c8e99e... testsuite: Adjust testsuite expectations for diagnostic spe (*)
6f0a646... Remove repeated information in -ftree-loop-distribute-patte (*)
f994094... Further spelling fixes in translatable strings (*)
4338ac1... Spelling fixes for translatable strings (*)
3d56999... s390: testsuite: Xfail forwprop-4{0,1}.c (*)
ca00bf0... Fortran: Check that the ICE does not reappear [PR102597] (*)
18e8e55... tree-optimization/114799 - SLP and patterns (*)
42189f2... s390x: Fix vec_xl/vec_xst type aliasing [PR114676] (*)
aa73eb9... c++: Copy over DECL_DISREGARD_INLINE_LIMITS flag to inherit (*)
cf51fe7... c++: Check if allocation functions are xobj members [PR1140 (*)
77e114b... LoongArch: Define builtin macros for ISA evolutions (*)
b4ebdd1... LoongArch: Define ISA versions (*)
8c6ee63... Daily bump. (*)
2a8187e... RISC-V: Adjust overlap attr after revert d3544cea63d and e6 (*)
b909daa... PR modula2/114811 string set incl ICE bugfix (*)
7ef1391... libstdc++: Fix conversion of simd to vector builtin (*)
e7a3ad2... libstdc++: Silence irrelevant warnings in 3 constraints [PR114783] (*)
2afdecc... c-family: Allow arguments with NULLPTR_TYPE as sentinels [P (*)
a39983b... c: Fix ICE with -g and -std=c23 related to incomplete types (*)
d86472a... libstdc++: Simplify constraints on <=> for std::reference_w (*)
eed7fb1... libstdc++: Support link chains in std::chrono::tzdb::locate (*)
e8f0540... Update gcc sv.po (*)
33bf8e5... internal-fn: Fix up expand_arith_overflow [PR114753] (*)
1216460... middle-end: refactory vect_recog_absolute_difference to sim (*)
9451b6c... Enable 'gcc.dg/pr114768.c' for nvptx target [PR114768] (*)
ede01df... bpf: remove huge memory waste with string allocation. (*)
d7190d0... bpf: support more instructions to match CO-RE relocations (*)
4d4929f... d: Fix ICE in build_deref, at d/d-codegen.cc:1650 [PR111650 (*)
9f29584... rtlanal: Fix set_noop_p for volatile loads or stores [PR114 (*)
36f4c8a... libgcc: Another __divmodbitint4 bug fix [PR114762] (*)
694fa37... [vxworks] avoid mangling __STDC_VERSION_LIMITS_H__ (*)
85c187b... Daily bump. (*)
e498ba9... Add nios2*-*-* to the list of obsolete targets (*)
e243d0f... Fortran: Fix ICE and clear incorrect error messages [PR1147 (*)
7eecc08... [testsuite] [i386] add -msse2 to tests that require it (*)
0ea96af... [testsuite] [i386] work around fails with --enable-frame-po (*)
36d0038... [testsuite] [arm] accept empty init for bfloat16 (*)
ce2dfc5... [c++] [testsuite] adjust contracts9.C for negative addresse (*)
df92df0... [testsuite] [aarch64] Require fpic effective target. (*)
514c6b1... [testsuite] [i386] require fpic for pr111497.C (*)
cc02ebf... [testsuite] xfail pr103798-2 in C++ on vxworks too [PR11370 (*)
e965162... [testsuite] [analyzer] include sys/select.h if available (*)
8a11709... [testsuite] [analyzer] require fork where used (*)
5be4f20... [testsuite] [analyzer] skip access-mode: O_ACCMODE on vxwor (*)
76a1bcc... [testsuite] [analyzer] avoid vxworks libc mode_t (*)
5dfbc05... [testsuite] introduce strndup effective target (*)
dcf0bd1... [libstdc++] [testsuite] disable SRA for compare_exchange_pa (*)
5b17817... [libstdc++] [testsuite] xfail double-prec from_chars for fl (*)
da3504a... [libstdc++] define zoneinfo_dir_override on vxworks (*)
a2f4be3... AArch64: remove reliance on register allocator for simd/gpr (*)
82d6d38... libgcc: Fix up __divmodbitint4 [PR114755] (*)
6c152c9... internal-fn: Temporarily disable flag_trapv during .{ADD,SU (*)
6e62ede... testsuite, rs6000: Fix builtins-6-p9-runnable.c for BE [PR1 (*)
58a0b19... rs6000: Fix bcd test case (*)
69576bc... Daily bump. (*)
7c2a9db... libstdc++: Implement "Printing blank lines with println" fo (*)
5705614... DOCUMENTATION_ROOT_URL vs. release branches [PR114738] (
[gcc/devel/subreg-coalesce] df: Add -ftrack-subreg-liveness option
https://gcc.gnu.org/g:b6b50e19f88bd33b6c0d252795ebb6cffda9574f
commit b6b50e19f88bd33b6c0d252795ebb6cffda9574f
Author: Lehua Ding
Date: Tue Jan 30 16:45:25 2024 +0800
df: Add -ftrack-subreg-liveness option
Add new flag -ftrack-subreg-liveness to enable track-subreg-liveness.
This flag is enabled at -O3/fast.
gcc/ChangeLog:
* common.opt: add -ftrack-subreg-liveness option.
* opts.cc: auto aneble -ftrack-subreg-liveness in -O3/fast
Diff:
---
gcc/common.opt | 4
gcc/common.opt.urls | 3 +++
gcc/doc/invoke.texi | 8
gcc/opts.cc | 1 +
4 files changed, 16 insertions(+)
diff --git a/gcc/common.opt b/gcc/common.opt
index ad348844775..bd030973434 100644
--- a/gcc/common.opt
+++ b/gcc/common.opt
@@ -2157,6 +2157,10 @@ fira-share-spill-slots
Common Var(flag_ira_share_spill_slots) Init(1) Optimization
Share stack slots for spilled pseudo-registers.
+ftrack-subreg-liveness
+Common Var(flag_track_subreg_liveness) Init(0) Optimization
+Track subreg liveness information.
+
fira-verbose=
Common RejectNegative Joined UInteger Var(flag_ira_verbose) Init(5)
-fira-verbose= Control IRA's level of diagnostic messages.
diff --git a/gcc/common.opt.urls b/gcc/common.opt.urls
index f71ed80a34b..59f27a6f7c6 100644
--- a/gcc/common.opt.urls
+++ b/gcc/common.opt.urls
@@ -880,6 +880,9 @@
UrlSuffix(gcc/Optimize-Options.html#index-fira-share-save-slots)
fira-share-spill-slots
UrlSuffix(gcc/Optimize-Options.html#index-fira-share-spill-slots)
+ftrack-subreg-liveness
+UrlSuffix(gcc/Optimize-Options.html#index-ftrack-subreg-liveness)
+
fira-verbose=
UrlSuffix(gcc/Developer-Options.html#index-fira-verbose)
diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi
index 27c31ab0c86..9724cbb32ba 100644
--- a/gcc/doc/invoke.texi
+++ b/gcc/doc/invoke.texi
@@ -13186,6 +13186,14 @@ Disable sharing of stack slots allocated for
pseudo-registers. Each
pseudo-register that does not get a hard register gets a separate
stack slot, and as a result function stack frames are larger.
+@opindex ftrack-subreg-liveness
+@item -ftrack-subreg-liveness
+Enable tracking subreg liveness information. This infomation allows IRA
+and LRA to support subreg coalesce feature which can improve the quality
+of register allocation.
+
+This option is enabled at level @option{-O3} for all targets.
+
@opindex flra-remat
@item -flra-remat
Enable CFG-sensitive rematerialization in LRA. Instead of loading
diff --git a/gcc/opts.cc b/gcc/opts.cc
index a90dc57f8b5..7b5d905a241 100644
--- a/gcc/opts.cc
+++ b/gcc/opts.cc
@@ -689,6 +689,7 @@ static const struct default_options default_options_table[]
=
{ OPT_LEVELS_3_PLUS, OPT_funswitch_loops, NULL, 1 },
{ OPT_LEVELS_3_PLUS, OPT_fvect_cost_model_, NULL, VECT_COST_MODEL_DYNAMIC
},
{ OPT_LEVELS_3_PLUS, OPT_fversion_loops_for_strides, NULL, 1 },
+{ OPT_LEVELS_3_PLUS, OPT_ftrack_subreg_liveness, NULL, 1 },
/* -O3 parameters. */
{ OPT_LEVELS_3_PLUS, OPT__param_max_inline_insns_auto_, NULL, 30 },
[gcc/devel/subreg-coalesce] df: Add DF_LIVE_SUBREG problem
https://gcc.gnu.org/g:8e76084576fb8e0054fa19e3bc16e97d05c10630 commit 8e76084576fb8e0054fa19e3bc16e97d05c10630 Author: Lehua Ding Date: Tue Jan 30 16:47:25 2024 +0800 df: Add DF_LIVE_SUBREG problem This patch add a new DF problem, named DF_LIVE_SUBREG. This problem is extended from the DF_LR problem and support track the subreg liveness of multireg pseudo if these pseudo satisfy the following conditions: 1. the mode size greater than it's REGMODE_NATURAL_SIZE. 2. the reg is used in insns via subreg pattern. The main methods are as follows: 1. split bitmap in/out/def/use fileds to full_in/out/def/use and partial_in/out/def/use. If a pseudo need to be tracked it's subreg liveness, then it is recorded in partial_in/out/def/use fileds. Meantimes, there are range_in/out/def/use fileds which records the live range of the tracked pseudo. 2. in the df_live_subreg_finalize function, we move the tracked pseudo from the partial_in/out/def/use to full_in/out/def/use if the pseudo's live range is full. gcc/ChangeLog: * Makefile.in: Add subreg-live-range object file. * df-problems.cc (struct df_live_subreg_problem_data): Private struct for DF_LIVE_SUBREG problem. (df_live_subreg_get_bb_info): getting bb regs in/out data. (get_live_subreg_local_bb_info): getting bb regs use/def data. (multireg_p): checking is the regno a pseudo multireg. (need_track_subreg_p): checking is the regno need to be tracked. (init_range): getting the range of subreg rtx. (remove_subreg_range): removing use data for the reg/subreg rtx. (add_subreg_range): adding def/use data for the reg/subreg rtx. (df_live_subreg_free_bb_info): Free basic block df data. (df_live_subreg_alloc): Allocate and init df data. (df_live_subreg_reset): Reset the live in/out df data. (df_live_subreg_bb_local_compute): Compute basic block df data. (df_live_subreg_local_compute): Compute all basic blocks df data. (df_live_subreg_init): Init the in/out df data. (df_live_subreg_check_result): Assert the full and partial df data. (df_live_subreg_confluence_0): Confluence function for infinite loops. (df_live_subreg_confluence_n): Confluence function for normal edge. (df_live_subreg_transfer_function): Transfer function. (df_live_subreg_finalize): Finalize the all_in/all_out df data. (df_live_subreg_free): Free the df data. (df_live_subreg_top_dump): Dump top df data. (df_live_subreg_bottom_dump): Dump bottom df data. (df_live_subreg_add_problem): Add the DF_LIVE_SUBREG problem. * df.h (enum df_problem_id): Add DF_LIVE_SUBREG. (class subregs_live): Simple decalare. (class df_live_subreg_local_bb_info): New class for full/partial def/use df data. (class df_live_subreg_bb_info): New class for full/partial in/out df data. (df_live_subreg): getting the df_live_subreg data. (df_live_subreg_add_problem): Exported. (df_live_subreg_finalize): Ditto. (df_live_subreg_check_result): Ditto. (multireg_p): Ditto. (init_range): Ditto. (add_subreg_range): Ditto. (remove_subreg_range): Ditto. (df_get_subreg_live_in): Accessor the all_in df data. (df_get_subreg_live_out): Accessor the all_out df data. (df_get_subreg_live_full_in): Accessor the full_in df data. (df_get_subreg_live_full_out): Accessor the full_out df data. (df_get_subreg_live_partial_in): Accessor the partial_in df data. (df_get_subreg_live_partial_out): Accessor the partial_out df data. (df_get_subreg_live_range_in): Accessor the range_in df data. (df_get_subreg_live_range_out): Accessor the range_out df data. * regs.h (get_nblocks): Get the blocks of mode. * sbitmap.cc (bitmap_full_p): sbitmap predicator. (bitmap_same_p): sbitmap predicator. (test_full): test bitmap_full_p. (test_same): test bitmap_same_p. (sbitmap_cc_tests): Add test_full and test_same. * sbitmap.h (bitmap_full_p): Exported. (bitmap_same_p): Ditto. * timevar.def (TV_DF_LIVE_SUBREG): add DF_LIVE_SUBREG timevar. * subreg-live-range.cc: New file. * subreg-live-range.h: New file. Diff: --- gcc/Makefile.in | 1 + gcc/df-problems.cc | 855 ++- gcc/df.h | 155 + gcc/regs.h | 5 + gcc/sbitmap.cc | 98 ++ gcc/sbitmap.h|
[gcc/devel/subreg-coalesce] lra: Apply DF_LIVE_SUBREG data
https://gcc.gnu.org/g:cde1363042b2857111e461968a6367381d46c936
commit cde1363042b2857111e461968a6367381d46c936
Author: Lehua Ding
Date: Fri Feb 2 10:35:37 2024 +0800
lra: Apply DF_LIVE_SUBREG data
This patch apply the DF_LIVE_SUBREG to LRA pass. More changes were made
to the LRA than the IRA since the LRA will modify the DF data directly.
The main big changes are centered on the lra-lives.cc file.
gcc/ChangeLog:
* lra-coalesce.cc (update_live_info): Extend to DF_LIVE_SUBREG.
(lra_coalesce): Ditto.
* lra-constraints.cc (update_ebb_live_info): Ditto.
(get_live_on_other_edges): Ditto.
(inherit_in_ebb): Ditto.
(lra_inheritance): Ditto.
(fix_bb_live_info): Ditto.
(remove_inheritance_pseudos): Ditto.
* lra-int.h (GCC_LRA_INT_H): include subreg-live-range.h
(struct lra_insn_reg): Add op filed to record the corresponding rtx.
* lra-lives.cc (class bb_data_pseudos): Extend the bb_data_pseudos
to
include new partial_def/use and range_def/use fileds for
DF_LIVE_SUBREG
problem.
(need_track_subreg_p): checking is the regno need to be tracked.
(make_hard_regno_live): switch to live_subreg filed.
(make_hard_regno_dead): Ditto.
(mark_regno_live): Support record subreg liveness.
(mark_regno_dead): Ditto.
(live_trans_fun): Adjust transfer function to support subreg
liveness.
(live_con_fun_0): Adjust Confluence function to support subreg
liveness.
(live_con_fun_n): Ditto.
(initiate_live_solver): Ditto.
(finish_live_solver): Ditto.
(process_bb_lives): Ditto.
(lra_create_live_ranges_1): Dump subreg liveness.
* lra-remat.cc (dump_candidates_and_remat_bb_data): Switch to
DF_LIVE_SUBREG df data.
(calculate_livein_cands): Ditto.
(do_remat): Ditto.
* lra-spills.cc (spill_pseudos): Ditto.
* lra.cc (new_insn_reg): New argument op.
(add_regs_to_insn_regno_info): Add new argument op.
Diff:
---
gcc/lra-coalesce.cc| 27 +++-
gcc/lra-constraints.cc | 109 ---
gcc/lra-int.h | 4 +
gcc/lra-lives.cc | 357 +++--
gcc/lra-remat.cc | 8 +-
gcc/lra-spills.cc | 27 +++-
gcc/lra.cc | 10 +-
7 files changed, 430 insertions(+), 112 deletions(-)
diff --git a/gcc/lra-coalesce.cc b/gcc/lra-coalesce.cc
index a9b5b51cb3f..9416775a009 100644
--- a/gcc/lra-coalesce.cc
+++ b/gcc/lra-coalesce.cc
@@ -186,19 +186,28 @@ static bitmap_head used_pseudos_bitmap;
/* Set up USED_PSEUDOS_BITMAP, and update LR_BITMAP (a BB live info
bitmap). */
static void
-update_live_info (bitmap lr_bitmap)
+update_live_info (bitmap all, bitmap full, bitmap partial)
{
unsigned int j;
bitmap_iterator bi;
bitmap_clear (&used_pseudos_bitmap);
- EXECUTE_IF_AND_IN_BITMAP (&coalesced_pseudos_bitmap, lr_bitmap,
+ EXECUTE_IF_AND_IN_BITMAP (&coalesced_pseudos_bitmap, all,
FIRST_PSEUDO_REGISTER, j, bi)
bitmap_set_bit (&used_pseudos_bitmap, first_coalesced_pseudo[j]);
- if (! bitmap_empty_p (&used_pseudos_bitmap))
+ if (!bitmap_empty_p (&used_pseudos_bitmap))
{
- bitmap_and_compl_into (lr_bitmap, &coalesced_pseudos_bitmap);
- bitmap_ior_into (lr_bitmap, &used_pseudos_bitmap);
+ bitmap_and_compl_into (all, &coalesced_pseudos_bitmap);
+ bitmap_ior_into (all, &used_pseudos_bitmap);
+
+ if (flag_track_subreg_liveness)
+ {
+ bitmap_and_compl_into (full, &coalesced_pseudos_bitmap);
+ bitmap_ior_and_compl_into (full, &used_pseudos_bitmap, partial);
+
+ bitmap_and_compl_into (partial, &coalesced_pseudos_bitmap);
+ bitmap_ior_and_compl_into (partial, &used_pseudos_bitmap, full);
+ }
}
}
@@ -301,8 +310,12 @@ lra_coalesce (void)
bitmap_initialize (&used_pseudos_bitmap, ®_obstack);
FOR_EACH_BB_FN (bb, cfun)
{
- update_live_info (df_get_live_in (bb));
- update_live_info (df_get_live_out (bb));
+ update_live_info (df_get_subreg_live_in (bb),
+ df_get_subreg_live_full_in (bb),
+ df_get_subreg_live_partial_in (bb));
+ update_live_info (df_get_subreg_live_out (bb),
+ df_get_subreg_live_full_out (bb),
+ df_get_subreg_live_partial_out (bb));
FOR_BB_INSNS_SAFE (bb, insn, next)
if (INSN_P (insn)
&& bitmap_bit_p (&involved_insns_bitmap, INSN_UID (insn)))
diff --git a/gcc/lra-constraints.cc b/gcc/lra-constraints.cc
index 10e3d4e4097..9586e5602e4 100644
--- a/gcc/lra-constraints.cc
+++ b/gcc/lra-constraints.cc
@@ -6515,34 +6515,86 @@ update_ebb_live_info (rtx_insn *head, rtx_insn *tail)
{
if (pr
[gcc/devel/subreg-coalesce] ira: Apply DF_LIVE_SUBREG data
https://gcc.gnu.org/g:cf327312a72fe55d7e06a84bbae3d5de649a1ed3
commit cf327312a72fe55d7e06a84bbae3d5de649a1ed3
Author: Lehua Ding
Date: Fri Feb 2 10:35:17 2024 +0800
ira: Apply DF_LIVE_SUBREG data
This patch simple replace df_get_live_in to df_get_subreg_live_in
and replace df_get_live_out to df_get_subreg_live_out.
gcc/ChangeLog:
* ira-build.cc (create_bb_allocnos): Switch to DF_LIVE_SUBREG df
data.
(create_loop_allocnos): Ditto.
* ira-color.cc (ira_loop_edge_freq): Ditto.
* ira-emit.cc (generate_edge_moves): Ditto.
(add_ranges_and_copies): Ditto.
* ira-lives.cc (process_out_of_region_eh_regs): Ditto.
(add_conflict_from_region_landing_pads): Ditto.
(process_bb_node_lives): Ditto.
* ira.cc (find_moveable_pseudos): Ditto.
(interesting_dest_for_shprep_1): Ditto.
(allocate_initial_values): Ditto.
(ira): Ditto.
Diff:
---
gcc/ira-build.cc | 7 ---
gcc/ira-color.cc | 8
gcc/ira-emit.cc | 12 ++--
gcc/ira-lives.cc | 7 ---
gcc/ira.cc | 19 ---
5 files changed, 30 insertions(+), 23 deletions(-)
diff --git a/gcc/ira-build.cc b/gcc/ira-build.cc
index ea593d5a087..283ff36d3dd 100644
--- a/gcc/ira-build.cc
+++ b/gcc/ira-build.cc
@@ -1921,7 +1921,8 @@ create_bb_allocnos (ira_loop_tree_node_t bb_node)
create_insn_allocnos (PATTERN (insn), NULL, false);
/* It might be a allocno living through from one subloop to
another. */
- EXECUTE_IF_SET_IN_REG_SET (df_get_live_in (bb), FIRST_PSEUDO_REGISTER, i, bi)
+ EXECUTE_IF_SET_IN_REG_SET (df_get_subreg_live_in (bb), FIRST_PSEUDO_REGISTER,
+i, bi)
if (ira_curr_regno_allocno_map[i] == NULL)
ira_create_allocno (i, false, ira_curr_loop_tree_node);
}
@@ -1937,9 +1938,9 @@ create_loop_allocnos (edge e)
bitmap_iterator bi;
ira_loop_tree_node_t parent;
- live_in_regs = df_get_live_in (e->dest);
+ live_in_regs = df_get_subreg_live_in (e->dest);
border_allocnos = ira_curr_loop_tree_node->border_allocnos;
- EXECUTE_IF_SET_IN_REG_SET (df_get_live_out (e->src),
+ EXECUTE_IF_SET_IN_REG_SET (df_get_subreg_live_out (e->src),
FIRST_PSEUDO_REGISTER, i, bi)
if (bitmap_bit_p (live_in_regs, i))
{
diff --git a/gcc/ira-color.cc b/gcc/ira-color.cc
index b9ae32d1b4d..bfebc48ef83 100644
--- a/gcc/ira-color.cc
+++ b/gcc/ira-color.cc
@@ -2786,8 +2786,8 @@ ira_loop_edge_freq (ira_loop_tree_node_t loop_node, int
regno, bool exit_p)
FOR_EACH_EDGE (e, ei, loop_node->loop->header->preds)
if (e->src != loop_node->loop->latch
&& (regno < 0
- || (bitmap_bit_p (df_get_live_out (e->src), regno)
- && bitmap_bit_p (df_get_live_in (e->dest), regno
+ || (bitmap_bit_p (df_get_subreg_live_out (e->src), regno)
+ && bitmap_bit_p (df_get_subreg_live_in (e->dest), regno
freq += EDGE_FREQUENCY (e);
}
else
@@ -2795,8 +2795,8 @@ ira_loop_edge_freq (ira_loop_tree_node_t loop_node, int
regno, bool exit_p)
auto_vec edges = get_loop_exit_edges (loop_node->loop);
FOR_EACH_VEC_ELT (edges, i, e)
if (regno < 0
- || (bitmap_bit_p (df_get_live_out (e->src), regno)
- && bitmap_bit_p (df_get_live_in (e->dest), regno)))
+ || (bitmap_bit_p (df_get_subreg_live_out (e->src), regno)
+ && bitmap_bit_p (df_get_subreg_live_in (e->dest), regno)))
freq += EDGE_FREQUENCY (e);
}
diff --git a/gcc/ira-emit.cc b/gcc/ira-emit.cc
index d347f11fa02..8075b082e36 100644
--- a/gcc/ira-emit.cc
+++ b/gcc/ira-emit.cc
@@ -510,8 +510,8 @@ generate_edge_moves (edge e)
return;
src_map = src_loop_node->regno_allocno_map;
dest_map = dest_loop_node->regno_allocno_map;
- regs_live_in_dest = df_get_live_in (e->dest);
- regs_live_out_src = df_get_live_out (e->src);
+ regs_live_in_dest = df_get_subreg_live_in (e->dest);
+ regs_live_out_src = df_get_subreg_live_out (e->src);
EXECUTE_IF_SET_IN_REG_SET (regs_live_in_dest,
FIRST_PSEUDO_REGISTER, regno, bi)
if (bitmap_bit_p (regs_live_out_src, regno))
@@ -1229,16 +1229,16 @@ add_ranges_and_copies (void)
destination block) to use for searching allocnos by their
regnos because of subsequent IR flattening. */
node = IRA_BB_NODE (bb)->parent;
- bitmap_copy (live_through, df_get_live_in (bb));
+ bitmap_copy (live_through, df_get_subreg_live_in (bb));
add_range_and_copies_from_move_list
(at_bb_start[bb->index], node, live_through, REG_FREQ_FROM_BB (bb));
- bitmap_copy (live_through, df_get_live_out (bb));
+ bitmap_copy (live_through, df_get_subreg_live_out (bb));
add_range_and_copies_from_move_list
(at_bb_end[bb->index], node, live_through, REG_FREQ_FROM_BB (bb));
[gcc r14-10107] bpf: define BPF feature pre-processor macros
https://gcc.gnu.org/g:152d945d42136737305fd55f1239a3dd6037c8a7
commit r14-10107-g152d945d42136737305fd55f1239a3dd6037c8a7
Author: Jose E. Marchesi
Date: Wed Apr 24 13:48:51 2024 +0200
bpf: define BPF feature pre-processor macros
This commit makes the BPF backend to define the following macros for
c-family languages:
__BPF_CPU_VERSION__
This is a numeric value identifying the version of the BPF "cpu"
for which GCC is generating code.
__BPF_FEATURE_ALU32
__BPF_FEATURE_JMP32
__BPF_FEATURE_JMP_EXT
__BPF_FEATURE_BSWAP
__BPF_FEATURE_SDIV_SMOD
__BPF_FEATURE_MOVSX
__BPF_FEATURE_LDSX
__BPF_FEATURE_GOTOL
__BPF_FEATURE_ST
These are defines if the corresponding "feature" is enabled. The
features are implicitly enabled by the BPF CPU version enabled,
and most of them can also be enabled/disabled using
target-specific -m[no-]FEATURE command line switches.
Note that this patch moves the definition of bpf_target_macros, that
implements TARGET_CPU_CPP_BUILTINS in the BPF backend, to a bpf-c.cc
file. This is because we are now using facilities from c-family/* and
these features are not available in compilers like lto1.
A couple of tests are also added.
Tested in target bpf-unknown-none-gcc and host x86_64-linux-gnu.
No regressions.
gcc/ChangeLog
* config.gcc: Add bpf-c.o as a target object for C and C++.
* config/bpf/bpf.cc (bpf_target_macros): Move to bpf-c.cc.
* config/bpf/bpf-c.cc: New file.
(bpf_target_macros): Move from bpf.cc and define BPF CPU
feature macros.
* config/bpf/t-bpf: Add rules to build bpf-c.o.
gcc/testsuite/ChangeLog
* gcc.target/bpf/feature-macro-1.c: New test.
* gcc.target/bpf/feature-macro-2.c: Likewise.
Diff:
---
gcc/config.gcc | 2 +
gcc/config/bpf/bpf-c.cc| 88 ++
gcc/config/bpf/bpf.cc | 17 -
gcc/config/bpf/t-bpf | 4 ++
gcc/testsuite/gcc.target/bpf/feature-macro-1.c | 34 ++
gcc/testsuite/gcc.target/bpf/feature-macro-2.c | 14
6 files changed, 142 insertions(+), 17 deletions(-)
diff --git a/gcc/config.gcc b/gcc/config.gcc
index ce683adcc8a..c2764095f0c 100644
--- a/gcc/config.gcc
+++ b/gcc/config.gcc
@@ -394,6 +394,8 @@ bfin*-*)
;;
bpf-*-*)
cpu_type=bpf
+ c_target_objs="bpf-c.o"
+ cxx_target_objs="bpf-c.o"
;;
frv*) cpu_type=frv
extra_options="${extra_options} g.opt"
diff --git a/gcc/config/bpf/bpf-c.cc b/gcc/config/bpf/bpf-c.cc
new file mode 100644
index 000..f12f0627103
--- /dev/null
+++ b/gcc/config/bpf/bpf-c.cc
@@ -0,0 +1,88 @@
+/* BPF-specific code for C family languages.
+ Copyright (C) 2024 Free Software Foundation, Inc.
+ Contributed by Oracle Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 3, or (at your option)
+any later version.
+
+GCC is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with GCC; see the file COPYING3. If not see
+
[gcc r13-8644] RISC-V: Fix recursive vsetvli checking [PR114172]
https://gcc.gnu.org/g:67e50daa5bd05f16d98c2dc651af2d6fa8335186
commit r13-8644-g67e50daa5bd05f16d98c2dc651af2d6fa8335186
Author: Kito Cheng
Date: Wed Apr 24 16:54:44 2024 +0800
RISC-V: Fix recursive vsetvli checking [PR114172]
extract_single_source will recursive checking the sources to
make sure if it's single source, however it may cause infinite
recursive when the source is come from itself, so it should just skip
first source to prevent that.
NOTE: This logic has existing on trunk/GCC 14, but it included in a big
vsetvli improvement patch, which is not backport to GCC 13.
```
void saxpy_rvv_m8(float *y, long vl)
{
for (;;)
{
vl = __riscv_vsetvl_e32m8(vl); //ICE
vfloat32m8_t y_vec;
__riscv_vse32_v_f32m8(y, y_vec, vl);
}
}
```
gcc/ChangeLog:
PR target/114172
* config/riscv/riscv-vsetvl.cc (extract_single_source):
Skip first set.
gcc/testsuite/ChangeLog:
PR target/114172
* gcc.target/riscv/rvv/vsetvl/pr114172.c: New.
Diff:
---
gcc/config/riscv/riscv-vsetvl.cc | 4
gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr114172.c | 14 ++
2 files changed, 18 insertions(+)
diff --git a/gcc/config/riscv/riscv-vsetvl.cc b/gcc/config/riscv/riscv-vsetvl.cc
index 9dca2ce709d..36d2e6e6f20 100644
--- a/gcc/config/riscv/riscv-vsetvl.cc
+++ b/gcc/config/riscv/riscv-vsetvl.cc
@@ -1196,6 +1196,10 @@ extract_single_source (set_info *set)
return nullptr;
for (const set_info *set : sets)
{
+ /* Skip first set, this can prevent us run into infinite recursive
+checking if first set is come from itself. */
+ if (set == *sets.begin ())
+ continue;
/* If there is a head or end insn, we conservative return
NULL so that VSETVL PASS will insert vsetvl directly. */
if (set->insn ()->is_artificial ())
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr114172.c
b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr114172.c
new file mode 100644
index 000..ed1494666d6
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr114172.c
@@ -0,0 +1,14 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gcv -mabi=lp64 -fno-tree-vectorize" } */
+
+#include "riscv_vector.h"
+
+void e(long, vfloat32m4_t);
+
+void b(long c) {
+ for (;;) {
+c = __riscv_vsetvl_e32m4(c);
+vfloat32m4_t d;
+e(c, d);
+ }
+}
[gcc r14-10108] Revert "RISC-V: Support highpart register overlap for vwcvt"
https://gcc.gnu.org/g:bc17a92380ff89b47b5bdc54d44368174d97d2df commit r14-10108-gbc17a92380ff89b47b5bdc54d44368174d97d2df Author: Pan Li Date: Wed Apr 24 19:20:39 2024 +0800 Revert "RISC-V: Support highpart register overlap for vwcvt" This reverts commit bdad036da32f72b84a96070518e7d75c21706dc2. Diff: --- gcc/config/riscv/constraints.md| 23 - gcc/config/riscv/riscv.md | 24 - gcc/config/riscv/vector-crypto.md | 21 ++--- gcc/config/riscv/vector.md | 19 ++-- .../gcc.target/riscv/rvv/base/pr112431-1.c | 104 - .../gcc.target/riscv/rvv/base/pr112431-2.c | 68 -- .../gcc.target/riscv/rvv/base/pr112431-3.c | 51 -- .../gcc.target/riscv/rvv/base/pr112431-39.c| 2 +- .../gcc.target/riscv/rvv/base/pr112431-40.c| 2 +- .../gcc.target/riscv/rvv/base/pr112431-41.c| 2 +- 10 files changed, 22 insertions(+), 294 deletions(-) diff --git a/gcc/config/riscv/constraints.md b/gcc/config/riscv/constraints.md index e37c6936bfa..a590df545d7 100644 --- a/gcc/config/riscv/constraints.md +++ b/gcc/config/riscv/constraints.md @@ -159,29 +159,6 @@ (define_register_constraint "vm" "TARGET_VECTOR ? VM_REGS : NO_REGS" "A vector mask register (if available).") -;; These following constraints are used by RVV instructions with dest EEW > src EEW. -;; RISC-V 'V' Spec 5.2. Vector Operands: -;; The destination EEW is greater than the source EEW, the source EMUL is at least 1, -;; and the overlap is in the highest-numbered part of the destination register group. -;; (e.g., when LMUL=8, vzext.vf4 v0, v6 is legal, but a source of v0, v2, or v4 is not). -(define_register_constraint "W21" "TARGET_VECTOR ? V_REGS : NO_REGS" - "A vector register has register number % 2 == 1." "regno % 2 == 1") - -(define_register_constraint "W42" "TARGET_VECTOR ? V_REGS : NO_REGS" - "A vector register has register number % 4 == 2." "regno % 4 == 2") - -(define_register_constraint "W84" "TARGET_VECTOR ? V_REGS : NO_REGS" - "A vector register has register number % 8 == 4." "regno % 8 == 4") - -(define_register_constraint "W41" "TARGET_VECTOR ? V_REGS : NO_REGS" - "A vector register has register number % 4 == 1." "regno % 4 == 1") - -(define_register_constraint "W81" "TARGET_VECTOR ? V_REGS : NO_REGS" - "A vector register has register number % 8 == 1." "regno % 8 == 1") - -(define_register_constraint "W82" "TARGET_VECTOR ? V_REGS : NO_REGS" - "A vector register has register number % 8 == 2." "regno % 8 == 2") - ;; This constraint is used to match instruction "csrr %0, vlenb" which is generated in "mov". ;; VLENB is a run-time constant which represent the vector register length in bytes. ;; BYTES_PER_RISCV_VECTOR represent runtime invariant of vector register length in bytes. diff --git a/gcc/config/riscv/riscv.md b/gcc/config/riscv/riscv.md index 1693d4008c6..455715ab2f7 100644 --- a/gcc/config/riscv/riscv.md +++ b/gcc/config/riscv/riscv.md @@ -538,27 +538,6 @@ ] (const_string "no"))) -(define_attr "vconstraint" "no,W21,W42,W84,W41,W81,W82" - (const_string "no")) - -(define_attr "vconstraint_enabled" "no,yes" - (cond [(eq_attr "vconstraint" "no") - (const_string "yes") - - (and (eq_attr "vconstraint" "W21") - (match_test "riscv_get_v_regno_alignment (GET_MODE (operands[0])) != 2")) -(const_string "no") - - (and (eq_attr "vconstraint" "W42,W41") - (match_test "riscv_get_v_regno_alignment (GET_MODE (operands[0])) != 4")) -(const_string "no") - - (and (eq_attr "vconstraint" "W84,W81,W82") - (match_test "riscv_get_v_regno_alignment (GET_MODE (operands[0])) != 8")) -(const_string "no") -] - (const_string "yes"))) - ;; This attribute marks the alternatives not matching the constraints ;; described in spec as disabled. (define_attr "spec_restriction" "none,thv,rvv" @@ -587,9 +566,6 @@ (eq_attr "fp_vector_disabled" "yes") (const_string "no") -(eq_attr "vconstraint_enabled" "no") -(const_string "no") - (eq_attr "spec_restriction_disabled" "yes") (const_string "no") ] diff --git a/gcc/config/riscv/vector-crypto.md b/gcc/config/riscv/vector-crypto.md index 23dc549e5b8..8a4888a7653 100755 --- a/gcc/config/riscv/vector-crypto.md +++ b/gcc/config/riscv/vector-crypto.md @@ -303,26 +303,25 @@ (set_attr "mode" "")]) (define_insn "@pred_vwsll_scalar" - [(set (match_operand:VWEXTI 0 "register_operand""=vd, vr, vd, vr, vd, vr, vd, vr, vd, vr, vd, vr, ?&vr, ?&vr") + [(set (match_operand:VWEXTI 0 "register_operand" "=vr, vr") (if_then_else:VWEXTI (unspec: - [(match_operand: 1 "vector_mask_operand" " vm,Wc1, vm,Wc1, vm,Wc1, vm,Wc1, vm,Wc1, vm,Wc1,vmWc1,vmWc1") - (match_operand 5 "vector_length_operand"" rK, rK, rK, rK, rK, rK, rK, rK,
[gcc r11-11349] sanitizer/111736 - skip ASAN for globals in alternate address-space
https://gcc.gnu.org/g:b86b523fb53f5ffb0e3f3236fc526a587944d9ea commit r11-11349-gb86b523fb53f5ffb0e3f3236fc526a587944d9ea Author: Richard Biener Date: Tue Dec 5 14:00:43 2023 +0100 sanitizer/111736 - skip ASAN for globals in alternate address-space gcc/ChangeLog: PR sanitizer/111736 * asan.c (asan_protect_global): Do not protect globals in non-generic address-space. (cherry picked from commit 7e40497805c0831596334fe474112f991276e11b) Diff: --- gcc/asan.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/gcc/asan.c b/gcc/asan.c index 2aa2be13bf6..b92c6007c97 100644 --- a/gcc/asan.c +++ b/gcc/asan.c @@ -2238,6 +2238,8 @@ asan_protect_global (tree decl, bool ignore_decl_rtl_set_p) || (DECL_SECTION_NAME (decl) != NULL && !symtab_node::get (decl)->implicit_section && !section_sanitized_p (DECL_SECTION_NAME (decl))) + /* Don't protect variables in non-generic address-space. */ + || !ADDR_SPACE_GENERIC_P (TYPE_ADDR_SPACE (TREE_TYPE (decl))) || DECL_SIZE (decl) == 0 || ASAN_RED_ZONE_SIZE * BITS_PER_UNIT > MAX_OFILE_ALIGNMENT || TREE_CODE (DECL_SIZE_UNIT (decl)) != INTEGER_CST
[gcc r11-11350] tree-optimization/111736 - avoid address sanitizing of __seg_gs
https://gcc.gnu.org/g:b4e1aee01a2fa617cf74ab04cf0ab574761aaaea
commit r11-11350-gb4e1aee01a2fa617cf74ab04cf0ab574761aaaea
Author: Richard Biener
Date: Thu Mar 21 08:30:39 2024 +0100
tree-optimization/111736 - avoid address sanitizing of __seg_gs
The following more thoroughly avoids address sanitizing accesses
to non-generic address-spaces.
gcc/ChangeLog:
PR tree-optimization/111736
* asan.c (instrument_derefs): Do not instrument accesses
to non-generic address-spaces.
gcc/testsuite/ChangeLog:
* gcc.target/i386/pr111736.c: New testcase.
(cherry picked from commit 134ef2a8cac1a5cc718739bd7d3b3472947c80d6)
Diff:
---
gcc/asan.c | 4
gcc/testsuite/gcc.target/i386/pr111736.c | 23 +++
2 files changed, 27 insertions(+)
diff --git a/gcc/asan.c b/gcc/asan.c
index b92c6007c97..fe24f531a04 100644
--- a/gcc/asan.c
+++ b/gcc/asan.c
@@ -2699,6 +2699,10 @@ instrument_derefs (gimple_stmt_iterator *iter, tree t,
if (VAR_P (inner) && DECL_HARD_REGISTER (inner))
return;
+ /* Accesses to non-generic address-spaces should not be instrumented. */
+ if (!ADDR_SPACE_GENERIC_P (TYPE_ADDR_SPACE (TREE_TYPE (inner
+return;
+
poly_int64 decl_size;
if ((VAR_P (inner) || TREE_CODE (inner) == RESULT_DECL)
&& offset == NULL_TREE
diff --git a/gcc/testsuite/gcc.target/i386/pr111736.c
b/gcc/testsuite/gcc.target/i386/pr111736.c
new file mode 100644
index 000..231fdd07e80
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/pr111736.c
@@ -0,0 +1,23 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -fsanitize=address" } */
+
+int __seg_gs m;
+
+int foo (void)
+{
+ return m;
+}
+
+extern int __seg_gs n;
+
+int bar (void)
+{
+ return n;
+}
+
+int baz (int __seg_gs *o)
+{
+ return *o;
+}
+
+/* { dg-final { scan-assembler-not "asan_report_load" } } */
[gcc r11-11352] tsan: Don't instrument non-generic AS accesses [PR111736]
https://gcc.gnu.org/g:09910b6753427eeb3f6dded4fae3578851da7422
commit r11-11352-g09910b6753427eeb3f6dded4fae3578851da7422
Author: Jakub Jelinek
Date: Tue Mar 26 11:06:15 2024 +0100
tsan: Don't instrument non-generic AS accesses [PR111736]
Similar to the asan and ubsan changes, we shouldn't instrument non-generic
address space accesses with tsan, because we just have library functions
which take address of the objects as generic address space pointers, so they
can't handle anything else.
2024-03-26 Jakub Jelinek
gcc/ChangeLog:
PR sanitizer/111736
* tsan.c (instrument_expr): Punt on non-generic address space
accesses.
gcc/testsuite/ChangeLog:
* gcc.dg/tsan/pr111736.c: New test.
(cherry picked from commit 471967ab8b4c49338ba77defbe24b06cc51c0093)
Diff:
---
gcc/testsuite/gcc.dg/tsan/pr111736.c | 17 +
gcc/tsan.c | 3 +++
2 files changed, 20 insertions(+)
diff --git a/gcc/testsuite/gcc.dg/tsan/pr111736.c
b/gcc/testsuite/gcc.dg/tsan/pr111736.c
new file mode 100644
index 000..34ab88b3d4f
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/tsan/pr111736.c
@@ -0,0 +1,17 @@
+/* PR sanitizer/111736 */
+/* { dg-do compile { target i?86-*-* x86_64-*-* } } */
+/* { dg-options "-fsanitize=thread -fdump-tree-optimized -ffat-lto-objects" }
*/
+/* { dg-final { scan-tree-dump-not "__tsan_read" "optimized" } } */
+/* { dg-final { scan-tree-dump-not "__tsan_write" "optimized" } } */
+
+#ifdef __x86_64__
+#define SEG __seg_fs
+#else
+#define SEG __seg_gs
+#endif
+
+void
+foo (int SEG *p, int SEG *q)
+{
+ *q = *p;
+}
diff --git a/gcc/tsan.c b/gcc/tsan.c
index 7db157e21e5..e426f647cb0 100644
--- a/gcc/tsan.c
+++ b/gcc/tsan.c
@@ -139,6 +139,9 @@ instrument_expr (gimple_stmt_iterator gsi, tree expr, bool
is_write)
if (TREE_READONLY (base) || (VAR_P (base) && DECL_HARD_REGISTER (base)))
return false;
+ if (!ADDR_SPACE_GENERIC_P (TYPE_ADDR_SPACE (TREE_TYPE (base
+return false;
+
stmt = gsi_stmt (gsi);
loc = gimple_location (stmt);
rhs = is_vptr_store (stmt, expr, is_write);
[gcc r11-11351] ubsan: Don't -fsanitize=null instrument __seg_fs/gs pointers [PR111736]
https://gcc.gnu.org/g:624c3bb9ff762f196852dc77233610d1cdf7d7be
commit r11-11351-g624c3bb9ff762f196852dc77233610d1cdf7d7be
Author: Jakub Jelinek
Date: Fri Mar 22 09:23:44 2024 +0100
ubsan: Don't -fsanitize=null instrument __seg_fs/gs pointers [PR111736]
On x86 and avr some address spaces allow 0 pointers (on avr actually
even generic as, but libsanitizer isn't ported to it and
I'm not convinced we should completely kill -fsanitize=null in that
case).
The following patch makes sure those aren't diagnosed for -fsanitize=null,
though they are still sanitized for -fsanitize=alignment.
2024-03-22 Jakub Jelinek
gcc/ChangeLog:
PR sanitizer/111736
* ubsan.c (ubsan_expand_null_ifn, instrument_mem_ref): Avoid
SANITIZE_NULL instrumentation for non-generic address spaces
for which targetm.addr_space.zero_address_valid (as) is true.
gcc/testsuite/ChangeLog:
* gcc.dg/ubsan/pr111736.c: New test.
(cherry picked from commit ddd4a3ca87410886b039cc225907b4f6e650082e)
Diff:
---
gcc/testsuite/gcc.dg/ubsan/pr111736.c | 23 +++
gcc/ubsan.c | 19 +--
2 files changed, 40 insertions(+), 2 deletions(-)
diff --git a/gcc/testsuite/gcc.dg/ubsan/pr111736.c
b/gcc/testsuite/gcc.dg/ubsan/pr111736.c
new file mode 100644
index 000..359b31828f0
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/ubsan/pr111736.c
@@ -0,0 +1,23 @@
+/* PR sanitizer/111736 */
+/* { dg-do compile { target i?86-*-* x86_64-*-* } } */
+/* { dg-options "-fsanitize=null,alignment -fdump-tree-optimized
-ffat-lto-objects" } */
+/* { dg-final { scan-tree-dump-times "__ubsan_handle_type_mismatch" 1
"optimized" } } */
+/* { dg-final { scan-tree-dump-not "p_\[0-9]*.D. \[=!]= 0" "optimized" } } */
+
+#ifdef __x86_64__
+#define SEG __seg_fs
+#else
+#define SEG __seg_gs
+#endif
+
+int
+foo (int SEG *p, int *q)
+{
+ return *p;
+}
+
+__attribute__((no_sanitize("alignment"))) int
+bar (int SEG *p, int *q)
+{
+ return *p;
+}
diff --git a/gcc/ubsan.c b/gcc/ubsan.c
index 04e8c1552a7..2b12651b440 100644
--- a/gcc/ubsan.c
+++ b/gcc/ubsan.c
@@ -49,6 +49,7 @@ along with GCC; see the file COPYING3. If not see
#include "tree-cfg.h"
#include "gimple-fold.h"
#include "varasm.h"
+#include "target.h"
/* Map from a tree to a VAR_DECL tree. */
@@ -784,6 +785,13 @@ ubsan_expand_null_ifn (gimple_stmt_iterator *gsip)
}
}
check_null = sanitize_flags_p (SANITIZE_NULL);
+ if (check_null && POINTER_TYPE_P (TREE_TYPE (ptr)))
+{
+ addr_space_t as = TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (ptr)));
+ if (!ADDR_SPACE_GENERIC_P (as)
+ && targetm.addr_space.zero_address_valid (as))
+ check_null = false;
+}
if (check_align == NULL_TREE && !check_null)
{
@@ -1375,8 +1383,15 @@ instrument_mem_ref (tree mem, tree base,
gimple_stmt_iterator *iter,
if (align <= 1)
align = 0;
}
- if (align == 0 && !sanitize_flags_p (SANITIZE_NULL))
-return;
+ if (align == 0)
+{
+ if (!sanitize_flags_p (SANITIZE_NULL))
+ return;
+ addr_space_t as = TYPE_ADDR_SPACE (TREE_TYPE (base));
+ if (!ADDR_SPACE_GENERIC_P (as)
+ && targetm.addr_space.zero_address_valid (as))
+ return;
+}
tree t = TREE_OPERAND (base, 0);
if (!POINTER_TYPE_P (TREE_TYPE (t)))
return;
[gcc r14-10109] v2: DOCUMENTATION_ROOT_URL vs. release branches [PR114738]
https://gcc.gnu.org/g:97a54c05b8e338e673e1f7fb72c0e23abb571c60
commit r14-10109-g97a54c05b8e338e673e1f7fb72c0e23abb571c60
Author: Jakub Jelinek
Date: Wed Apr 24 18:29:12 2024 +0200
v2: DOCUMENTATION_ROOT_URL vs. release branches [PR114738]
This patch moves the documentation root URL infix for release branches
from get_option_url/make_doc_url to configure, such that only the default
changes and when users specify a custom documentation root URL, they don't
have to add gcc-MAJOR.MINOR.0 subdirectories for release branches.
Tested by checking
../configure --disable-bootstrap --enable-languages=c --disable-multilib
built trunk on
void
foo (int x)
{
__builtin_printf ("%ld\n", x);
}
testcase and looking for the URL in there, then repeating that after
changing gcc/BASE-VER to 14.1.0 and again after changing it to 14.1.1,
plus normal bootstrap/regtest.
2024-04-24 Jakub Jelinek
PR other/114738
* opts.cc (get_option_url): Revert 2024-04-17 changes.
* gcc-urlifier.cc: Don't include diagnostic-core.h.
(gcc_urlifier::make_doc_url): Revert 2024-04-17 changes.
* configure.ac (documentation-root-url): On release branches
append gcc-MAJOR.MINOR.0/ to the default DOCUMENTATION_ROOT_URL.
* doc/install.texi (--with-documentation-root-url=): Document
the change of the default.
* configure: Regenerate.
Diff:
---
gcc/configure| 12 +---
gcc/configure.ac | 13 ++---
gcc/doc/install.texi | 4 +++-
gcc/gcc-urlifier.cc | 12 +---
gcc/opts.cc | 14 +-
5 files changed, 24 insertions(+), 31 deletions(-)
diff --git a/gcc/configure b/gcc/configure
index 266ab8f84b2..23da7d55d62 100755
--- a/gcc/configure
+++ b/gcc/configure
@@ -8232,7 +8232,13 @@ if test "${with_documentation_root_url+set}" = set; then
:
*) as_fn_error $? "documentation root URL does not end with /"
"$LINENO" 5 ;;
esac
else
- DOCUMENTATION_ROOT_URL="https://gcc.gnu.org/onlinedocs/";
+
+ docroot_url_suffix=
+ case "$gcc_version" in
+ *.[123456].0) docroot_url_suffix="gcc-$gcc_version/";;
+ *.[123456].1) docroot_url_suffix="gcc-`echo $gcc_version | sed
's/1$/0/'`/";;
+ esac
+
DOCUMENTATION_ROOT_URL="https://gcc.gnu.org/onlinedocs/$docroot_url_suffix";
fi
@@ -21569,7 +21575,7 @@ else
lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2
lt_status=$lt_dlunknown
cat > conftest.$ac_ext <<_LT_EOF
-#line 21572 "configure"
+#line 21578 "configure"
#include "confdefs.h"
#if HAVE_DLFCN_H
@@ -21675,7 +21681,7 @@ else
lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2
lt_status=$lt_dlunknown
cat > conftest.$ac_ext <<_LT_EOF
-#line 21678 "configure"
+#line 21684 "configure"
#include "confdefs.h"
#if HAVE_DLFCN_H
diff --git a/gcc/configure.ac b/gcc/configure.ac
index a5aec1bc967..d7cf0b92cd8 100644
--- a/gcc/configure.ac
+++ b/gcc/configure.ac
@@ -1088,9 +1088,16 @@ AC_ARG_WITH(documentation-root-url,
no) AC_MSG_ERROR([documentation root URL not specified]) ;;
*/) DOCUMENTATION_ROOT_URL="$withval" ;;
*) AC_MSG_ERROR([documentation root URL does not end with /]) ;;
- esac],
- DOCUMENTATION_ROOT_URL="https://gcc.gnu.org/onlinedocs/";
-)
+ esac],[
+ docroot_url_suffix=
+changequote(,)dnl
+ case "$gcc_version" in
+ *.[123456].0) docroot_url_suffix="gcc-$gcc_version/";;
+ *.[123456].1) docroot_url_suffix="gcc-`echo $gcc_version | sed
's/1$/0/'`/";;
+ esac
+changequote([,])dnl
+
DOCUMENTATION_ROOT_URL="https://gcc.gnu.org/onlinedocs/$docroot_url_suffix";
+])
AC_DEFINE_UNQUOTED(DOCUMENTATION_ROOT_URL,"$DOCUMENTATION_ROOT_URL",
[Define to the root for documentation URLs.])
diff --git a/gcc/doc/install.texi b/gcc/doc/install.texi
index 1c58dc334ab..988c373aedc 100644
--- a/gcc/doc/install.texi
+++ b/gcc/doc/install.texi
@@ -764,7 +764,9 @@ The default value refers to the FSF's GCC bug tracker.
Specify the URL root that contains GCC option documentation. The @var{url}
should end with a @code{/} character.
-The default value is
@uref{https://gcc.gnu.org/onlinedocs/,,https://gcc.gnu.org/onlinedocs/}.
+The default value is
@uref{https://gcc.gnu.org/onlinedocs/,,https://gcc.gnu.org/onlinedocs/}
+on the GCC main development trunk. On release branches, the default
+is @code{https://gcc.gnu.org/onlinedocs/gcc-@var{major}.@var{minor}.0/}.
@item --with-changes-root-url=@var{url}
Specify the URL root that contains information about changes in GCC
diff --git a/gcc/gcc-urlifier.cc b/gcc/gcc-urlifier.cc
index ff8c3f65ac5..be6459e8d7c 100644
--- a/gcc/gcc-urlifier.cc
+++ b/gcc/gcc-urlifier.cc
@@ -26,7 +26,6 @@ along with GCC; see the file COPYING3. If not see
#include "gcc-urlifier.h"
#include "opts.h"
#include "options.h"
-#include "diagnostic-core.h"
#include "selftest.h"
[gcc r11-11353] Darwin: Fix empty g++ command lines [PR105599].
https://gcc.gnu.org/g:3bb14f6ed5bc70e25381c67963c90eaab91eca22
commit r11-11353-g3bb14f6ed5bc70e25381c67963c90eaab91eca22
Author: Iain Sandoe
Date: Sun May 29 16:14:32 2022 +0100
Darwin: Fix empty g++ command lines [PR105599].
An empty g++ command line should produce a diagnostic that there are no
inputs. The PR is that currently Darwin produces a dignostic about missing
link items instead - this is because (errnoeously), for this driver, we are
creating a link job for empty command lines.
The problem occurs in four stages:
The g++ driver appends -shared-libgcc to the command line.
The Darwin driver_init code in the backend does not see this (it sees an
empty command line).
When the back end driver code driver sees an empty command line, it does
not
add any supplementary flags (e.g. asm-macosx-version-min) - precisely to
avoid anything being claimed as an input_file and therefore triggering a
link
line.
Since we do not have a value for asm-macosx-version-min when processing the
driver specs, we unconditionally inject 'multiply_defined suppress' which
is
used with shared libgcc (but only intended on very old Darwin). This then
causes the generation of a link job.
The solution, for the present, is to move version-specific link params to
the
LINK_SPEC so that they are only processed when a link job has already been
decided.
Signed-off-by: Iain Sandoe
PR target/105599
gcc/ChangeLog:
* config/darwin.h: Move versions-specific handling of
multiply_defined
from SUBTARGET_DRIVER_SELF_SPECS to LINK_SPEC.
(cherry picked from commit 794737976b9a6418eab817f143bb4eb2d0c834d2)
Diff:
---
gcc/config/darwin.h | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/gcc/config/darwin.h b/gcc/config/darwin.h
index b2bd33f8d4a..5be13293319 100644
--- a/gcc/config/darwin.h
+++ b/gcc/config/darwin.h
@@ -215,7 +215,8 @@ extern GTY(()) int darwin_ms_struct;
"%{image_base*:-Xlinker -image_base -Xlinker %*} %
[gcc r11-11354] Fixincludes: Handle __FLT_EVAL_METHOD__ == 16 on darwin
https://gcc.gnu.org/g:a58d68924cadd62021e248bf2c6f5af638f7e0f1
commit r11-11354-ga58d68924cadd62021e248bf2c6f5af638f7e0f1
Author: Francois-Xavier Coudert
Date: Sat Jan 1 12:22:00 2022 +0100
Fixincludes: Handle __FLT_EVAL_METHOD__ == 16 on darwin
The darwin system headers error out on __FLT_EVAL_METHOD__ == 16, which
occurs when the compiler is called with -mavx512fp16 on i386. Allow this
value to proceed past the check (nothing else depends on it in the
system headers).
fixincludes/ChangeLog:
* inclhack.def: Add new fix on darwin.
* fixincl.x: Regenerate.
* tests/base/math.h: Regenerate.
(cherry picked from commit 4f3b1a09d3109f03299a2ac15cfa3059596fcb1d)
Diff:
---
fixincludes/fixincl.x | 53 +++
fixincludes/inclhack.def | 11 +
fixincludes/tests/base/math.h | 5
3 files changed, 64 insertions(+), 5 deletions(-)
diff --git a/fixincludes/fixincl.x b/fixincludes/fixincl.x
index 57bc3fa5489..442de9226b5 100644
--- a/fixincludes/fixincl.x
+++ b/fixincludes/fixincl.x
@@ -2,11 +2,11 @@
*
* DO NOT EDIT THIS FILE (fixincl.x)
*
- * It has been AutoGen-ed May 15, 2023 at 11:55:05 PM by AutoGen 5.18.7
+ * It has been AutoGen-ed April 12, 2024 at 12:46:40 PM by AutoGen 5.18.7
* From the definitionsinclhack.def
* and the template file fixincl
*/
-/* DO NOT SVN-MERGE THIS FILE, EITHER Mon May 15 23:55:05 BST 2023
+/* DO NOT SVN-MERGE THIS FILE, EITHER Fri Apr 12 12:46:40 BST 2024
*
* You must regenerate it. Use the ./genfixes script.
*
@@ -15,7 +15,7 @@
* certain ANSI-incompatible system header files which are fixed to work
* correctly with ANSI C and placed in a directory that GNU C will search.
*
- * This file contains 262 fixup descriptions.
+ * This file contains 263 fixup descriptions.
*
* See README for more information.
*
@@ -3651,6 +3651,43 @@ static const char* apzDarwin_Ucred__AtomicPatch[] = {
#endif\n",
(char*)NULL };
+/* * * * * * * * * * * * * * * * * * * * * * * * * *
+ *
+ * Description of Darwin_Flt_Eval_Method fix
+ */
+tSCC zDarwin_Flt_Eval_MethodName[] =
+ "darwin_flt_eval_method";
+
+/*
+ * File name selection pattern
+ */
+tSCC zDarwin_Flt_Eval_MethodList[] =
+ "math.h\0";
+/*
+ * Machine/OS name selection pattern
+ */
+tSCC* apzDarwin_Flt_Eval_MethodMachs[] = {
+"*-*-darwin*",
+(const char*)NULL };
+
+/*
+ * content selection pattern - do fix if pattern found
+ */
+tSCC zDarwin_Flt_Eval_MethodSelect0[] =
+ "^#if __FLT_EVAL_METHOD__ == 0$";
+
+#defineDARWIN_FLT_EVAL_METHOD_TEST_CT 1
+static tTestDesc aDarwin_Flt_Eval_MethodTests[] = {
+ { TT_EGREP,zDarwin_Flt_Eval_MethodSelect0, (regex_t*)NULL }, };
+
+/*
+ * Fix Command Arguments for Darwin_Flt_Eval_Method
+ */
+static const char* apzDarwin_Flt_Eval_MethodPatch[] = {
+"format",
+"#if __FLT_EVAL_METHOD__ == 0 || __FLT_EVAL_METHOD__ == 16",
+(char*)NULL };
+
/* * * * * * * * * * * * * * * * * * * * * * * * * *
*
* Description of Dec_Intern_Asm fix
@@ -10647,9 +10684,9 @@ static const char* apzX11_SprintfPatch[] = {
*
* List of all fixes
*/
-#define REGEX_COUNT 300
+#define REGEX_COUNT 301
#define MACH_LIST_SIZE_LIMIT 187
-#define FIX_COUNT262
+#define FIX_COUNT263
/*
* Enumerate the fixes
@@ -10741,6 +10778,7 @@ typedef enum {
DARWIN_STDINT_6_FIXIDX,
DARWIN_STDINT_7_FIXIDX,
DARWIN_UCRED__ATOMIC_FIXIDX,
+DARWIN_FLT_EVAL_METHOD_FIXIDX,
DEC_INTERN_ASM_FIXIDX,
DJGPP_WCHAR_H_FIXIDX,
ECD_CURSOR_FIXIDX,
@@ -11350,6 +11388,11 @@ tFixDesc fixDescList[ FIX_COUNT ] = {
DARWIN_UCRED__ATOMIC_TEST_CT, FD_MACH_ONLY | FD_SUBROUTINE,
aDarwin_Ucred__AtomicTests, apzDarwin_Ucred__AtomicPatch, 0 },
+ { zDarwin_Flt_Eval_MethodName,zDarwin_Flt_Eval_MethodList,
+ apzDarwin_Flt_Eval_MethodMachs,
+ DARWIN_FLT_EVAL_METHOD_TEST_CT, FD_MACH_ONLY | FD_SUBROUTINE,
+ aDarwin_Flt_Eval_MethodTests, apzDarwin_Flt_Eval_MethodPatch, 0 },
+
{ zDec_Intern_AsmName,zDec_Intern_AsmList,
apzDec_Intern_AsmMachs,
DEC_INTERN_ASM_TEST_CT, FD_MACH_ONLY,
diff --git a/fixincludes/inclhack.def b/fixincludes/inclhack.def
index c2f54d1189a..6478ca19932 100644
--- a/fixincludes/inclhack.def
+++ b/fixincludes/inclhack.def
@@ -1814,6 +1814,17 @@ fix = {
test_text = ""; /* Don't provide this for wrap fixes. */
};
+/* The darwin headers don't accept __FLT_EVAL_METHOD__ == 16. */
+fix = {
+hackname = darwin_flt_eval_method;
+mach = "*-*-darwin*";
+files = math.h;
+select= "^#if __FLT_EVAL_METHOD__ == 0$";
+c_fix = format;
+c_fix_arg = "#if __FLT_EVAL_METHOD__ == 0 || __FLT_EVAL_METHOD__ == 16";
+test_text = "#if __FLT_EVAL_METHOD__ == 0";
+};
+
/*
* Fix on Digital UNIX V4.0:
* It contains a prototype for a DEC C internal asm() function,
[gcc r11-11355] testsuite: Add target requires for ifuncs to mv31.C.
https://gcc.gnu.org/g:61e6a6d2aa139781de9b6b94206f6a526c0addaa
commit r11-11355-g61e6a6d2aa139781de9b6b94206f6a526c0addaa
Author: Iain Sandoe
Date: Thu Apr 28 08:51:48 2022 +0100
testsuite: Add target requires for ifuncs to mv31.C.
g++.target/i386/mv31.C fails on targets without ifuncs support so add
the necessary target supports guard.
Signed-off-by: Iain Sandoe
gcc/testsuite/ChangeLog:
* g++.target/i386/mv31.C: Add target supports guard for ifuncs.
(cherry picked from commit 350fcc7884ba80f38dd1476ae41029c648a5f8b9)
Diff:
---
gcc/testsuite/g++.target/i386/mv31.C | 1 +
1 file changed, 1 insertion(+)
diff --git a/gcc/testsuite/g++.target/i386/mv31.C
b/gcc/testsuite/g++.target/i386/mv31.C
index 5d8fd1ddf75..70a40f1e28a 100644
--- a/gcc/testsuite/g++.target/i386/mv31.C
+++ b/gcc/testsuite/g++.target/i386/mv31.C
@@ -1,4 +1,5 @@
// PR c++/104669
+// { dg-require-ifunc "" }
void bar()
{
[gcc r11-11356] libstdc++, Darwin: Limit recursive mutex init to OS versions needing it.
https://gcc.gnu.org/g:17212f5912d8f57b3757633444ae64c9831aa8f7 commit r11-11356-g17212f5912d8f57b3757633444ae64c9831aa8f7 Author: Iain Sandoe Date: Sat Dec 3 17:09:35 2022 + libstdc++, Darwin: Limit recursive mutex init to OS versions needing it. The problem described in pr 51906 was fixed in the next OS release. Limit the workaround to systems that need it. Signed-off-by: Iain Sandoe libstdc++-v3/ChangeLog: * config/os/bsd/darwin/os_defines.h (_GTHREAD_USE_RECURSIVE_MUTEX_INIT_FUNC): Limit use of this macro to OS versions that need it. (cherry picked from commit a044c9d25972b22c6b4c8ec27f2de5fd622573cc) Diff: --- libstdc++-v3/config/os/bsd/darwin/os_defines.h | 6 +- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/libstdc++-v3/config/os/bsd/darwin/os_defines.h b/libstdc++-v3/config/os/bsd/darwin/os_defines.h index 0b3bb7950b1..394d7209711 100644 --- a/libstdc++-v3/config/os/bsd/darwin/os_defines.h +++ b/libstdc++-v3/config/os/bsd/darwin/os_defines.h @@ -39,8 +39,12 @@ // -flat_namespace to work around the way that it doesn't. #define _GLIBCXX_WEAK_DEFINITION __attribute__ ((weak)) -// Static initializer macro is buggy in darwin, see libstdc++/51906 +#if defined (__ENVIRONMENT_MAC_OS_X_VERSION_MIN_REQUIRED__) \ + && (__ENVIRONMENT_MAC_OS_X_VERSION_MIN_REQUIRED__ < 1080) +// Static initializer macro is absent for Darwin < 11 and buggy in Darwin 11, +// see libstdc++/51906. Fixed in Darwin 12 (OS X 10.8). #define _GTHREAD_USE_RECURSIVE_MUTEX_INIT_FUNC +#endif // Configure checks for nanosleep fail on Darwin, but nanosleep and // sched_yield are always available, so use them.
[gcc r11-11357] testsuite, objective-c: Cater for Windows intptr type.
https://gcc.gnu.org/g:e3a4a568f4ac08ca981b41360aeab005cf6e41cf
commit r11-11357-ge3a4a568f4ac08ca981b41360aeab005cf6e41cf
Author: Iain Sandoe
Date: Thu Feb 16 16:18:11 2023 +
testsuite, objective-c: Cater for Windows intptr type.
This adjusts the diagnostic output matches to cater for the differences
in intptr types on Windows.
Patch from 'nightstrike'.
Signed-off-by: Iain Sandoe
gcc/testsuite/ChangeLog:
* objc.dg/proto-lossage-4.m: Amendn diagnostic matches for Windows.
(cherry picked from commit 07f497c2da3600cc99cd7d1b5c6726972fb2b5a1)
Diff:
---
gcc/testsuite/objc.dg/proto-lossage-4.m | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/gcc/testsuite/objc.dg/proto-lossage-4.m
b/gcc/testsuite/objc.dg/proto-lossage-4.m
index 9d1def5f9de..9b2367a568a 100644
--- a/gcc/testsuite/objc.dg/proto-lossage-4.m
+++ b/gcc/testsuite/objc.dg/proto-lossage-4.m
@@ -28,13 +28,13 @@ long foo(void) {
receiver += [receiver anotherValue]; /* { dg-warning "invalid receiver type
.intptr_t." } */
receiver += [(Obj *)receiver someValue]; /* { dg-warning ".Obj. may not
respond to .\\-someValue." } */
-/* { dg-warning "assignment to 'intptr_t' {aka '(long )?int'} from 'id' makes
integer from pointer without a cast" "" { target *-*-* } .-1 } */
+/* { dg-warning "assignment to 'intptr_t' {aka '(long )*int'} from 'id' makes
integer from pointer without a cast" "" { target *-*-* } .-1 } */
receiver += [(Obj *)receiver anotherValue];
receiver += [(Obj *)receiver someValue];
receiver += [(Obj *)receiver anotherValue];
receiver += [objrcvr someValue]; /* { dg-warning ".Obj. may not respond to
.\\-someValue." } */
-/* { dg-warning "assignment to 'intptr_t' {aka '(long )?int'} from 'id' makes
integer from pointer without a cast" "" { target *-*-* } .-1 } */
+/* { dg-warning "assignment to 'intptr_t' {aka '(long )*int'} from 'id' makes
integer from pointer without a cast" "" { target *-*-* } .-1 } */
receiver += [objrcvr anotherValue];
receiver += [(Obj *)objrcvr someValue];
@@ -42,7 +42,7 @@ long foo(void) {
receiver += [objrcvr2 someValue];
receiver += [objrcvr2 anotherValue];
receiver += [(Obj *)objrcvr2 someValue]; /* { dg-warning ".Obj. may not
respond to .\\-someValue." } */
-/* { dg-warning "assignment to 'intptr_t' {aka '(long )?int'} from 'id' makes
integer from pointer without a cast" "" { target *-*-* } .-1 } */
+/* { dg-warning "assignment to 'intptr_t' {aka '(long )*int'} from 'id' makes
integer from pointer without a cast" "" { target *-*-* } .-1 } */
receiver += [(Obj *)objrcvr2 anotherValue];
[gcc r11-11358] testsuite, objective-c++: Fix imported NSObjCRuntime.h.
https://gcc.gnu.org/g:c2a39d977605e554177236bf524c97ff14196f95 commit r11-11358-gc2a39d977605e554177236bf524c97ff14196f95 Author: Iain Sandoe Date: Fri Jun 23 15:29:14 2023 +0100 testsuite,objective-c++: Fix imported NSObjCRuntime.h. We have imported some headers from the GNUStep project to allow us to maintain the testsuite independent to changing versions of system headers. One of these headers has a macro that (now we have support for __has_feature) expands to a declaration that triggers a warning. These headers are considered part of the implementation so that, in this case, we can suppress the warning with the system_header pragma. Signed-off-by: Iain Sandoe gcc/testsuite/ChangeLog: * objc-obj-c++-shared/GNUStep/Foundation/NSObjCRuntime.h: Make this header use pragma system_header. (cherry picked from commit d83e0e3bc375a05844438d28c9a4ab24c5401eb9) Diff: --- gcc/testsuite/objc-obj-c++-shared/GNUStep/Foundation/NSObjCRuntime.h | 3 +++ 1 file changed, 3 insertions(+) diff --git a/gcc/testsuite/objc-obj-c++-shared/GNUStep/Foundation/NSObjCRuntime.h b/gcc/testsuite/objc-obj-c++-shared/GNUStep/Foundation/NSObjCRuntime.h index 189af80436a..62556f9ac88 100644 --- a/gcc/testsuite/objc-obj-c++-shared/GNUStep/Foundation/NSObjCRuntime.h +++ b/gcc/testsuite/objc-obj-c++-shared/GNUStep/Foundation/NSObjCRuntime.h @@ -29,6 +29,9 @@ #ifndef __NSObjCRuntime_h_GNUSTEP_BASE_INCLUDE #define __NSObjCRuntime_h_GNUSTEP_BASE_INCLUDE +/* Allow the elaborated enum use in _GS_NAMED_ENUM. */ +#pragma GCC system_header + #ifdef __cplusplus #ifndef __STDC_LIMIT_MACROS #define __STDC_LIMIT_MACROS 1
[gcc r11-11359] build: Allow for Xcode 15 ld -v output
https://gcc.gnu.org/g:6e01c09e6bb841a31165e3a793628c847a0652c0
commit r11-11359-g6e01c09e6bb841a31165e3a793628c847a0652c0
Author: Rainer Orth
Date: Thu Aug 17 10:14:49 2023 +0200
build: Allow for Xcode 15 ld -v output
Since Xcode 15 beta 6, ld -v output differs from previous versions:
* macOS 13/Xcode 14:
@(#)PROGRAM:ld PROJECT:ld64-857.1
* macOS 14/Xcode 15:
@(#)PROGRAM:ld PROJECT:dyld-1015.1
configure cannot handle the new form, so LD64_VERSION isn't set.
This patch fixes this. The autoconf manual states that sed doesn't
portably support alternation, so I'm using two separate expressions to
extract the version number.
Tested on x86_64-apple-darwin23.0.0.
2023-08-16 Rainer Orth
gcc:
* configure.ac (gcc_cv_ld64_version): Allow for dyld in ld -v
output.
* configure: Regenerate.
(cherry picked from commit 0beac9209f0ae230b34ad31e76e7b0b633a5fb21)
Diff:
---
gcc/configure| 3 ++-
gcc/configure.ac | 3 ++-
2 files changed, 4 insertions(+), 2 deletions(-)
diff --git a/gcc/configure b/gcc/configure
index 0b9c7451231..bf0bd5f428d 100755
--- a/gcc/configure
+++ b/gcc/configure
@@ -30733,7 +30733,8 @@ $as_echo "$gcc_cv_ld64_major" >&6; }
{ $as_echo "$as_me:${as_lineno-$LINENO}: checking linker version" >&5
$as_echo_n "checking linker version... " >&6; }
if test x"${gcc_cv_ld64_version}" = x; then
- gcc_cv_ld64_version=`$gcc_cv_ld -v 2>&1 | grep ld64 | sed s/.*ld64-// |
awk '{print $1}'`
+ gcc_cv_ld64_version=`$gcc_cv_ld -v 2>&1 | $EGREP 'ld64|dyld' \
+ | sed -e 's/.*ld64-//' -e 's/.*dyld-//'| awk '{print $1}'`
fi
{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $gcc_cv_ld64_version" >&5
$as_echo "$gcc_cv_ld64_version" >&6; }
diff --git a/gcc/configure.ac b/gcc/configure.ac
index 2bf0e8a12b7..d52104fbd41 100644
--- a/gcc/configure.ac
+++ b/gcc/configure.ac
@@ -6383,7 +6383,8 @@ if test x"$ld64_flag" = x"yes"; then
# If the version was not specified, try to find it.
AC_MSG_CHECKING(linker version)
if test x"${gcc_cv_ld64_version}" = x; then
- gcc_cv_ld64_version=`$gcc_cv_ld -v 2>&1 | grep ld64 | sed s/.*ld64-// |
awk '{print $1}'`
+ gcc_cv_ld64_version=`$gcc_cv_ld -v 2>&1 | $EGREP 'ld64|dyld' \
+ | sed -e 's/.*ld64-//' -e 's/.*dyld-//'| awk '{print $1}'`
fi
AC_MSG_RESULT($gcc_cv_ld64_version)
[gcc r11-11360] fixincludes: Update darwin_flt_eval_method for macOS 14
https://gcc.gnu.org/g:cb1e6094f3711897615c58ad6b0e53ec69ea9e39
commit r11-11360-gcb1e6094f3711897615c58ad6b0e53ec69ea9e39
Author: Rainer Orth
Date: Thu Aug 17 10:16:57 2023 +0200
fixincludes: Update darwin_flt_eval_method for macOS 14
On macOS 14, a guard in changed:
-- MacOSX13.3.sdk/usr/include/math.h2023-04-19 01:54:44
+++ MacOSX14.0.sdk/usr/include/math.h 2023-08-01 08:42:43
@@ -22,0 +23 @@
+
@@ -43 +44 @@
-#if __FLT_EVAL_METHOD__ == 0
+#if __FLT_EVAL_METHOD__ == 0 || __FLT_EVAL_METHOD__ == -1
@@ -49 +50 @@
-#elif __FLT_EVAL_METHOD__ == 2 || __FLT_EVAL_METHOD__ == -1
+#elif __FLT_EVAL_METHOD__ == 2
Therefore the darwin_flt_eval_method fixincludes fix doesn't match any
longer, leading to a large number of testsuite failures like
/private/var/gcc/regression/master/14-gcc/build/gcc/include-fixed/math.h:69:5:
error: #error "Unsupported value of __FLT_EVAL_METHOD__."
where __FLT_EVAL_METHOD__ = 16.
This patch adjusts the fix to allow for both forms.
Tested with make check in fixincludes on x86_64-apple-darwin23.0.0 and
verifying that has indeed been fixed as expected.
2023-08-16 Rainer Orth
fixincludes:
* inclhack.def (darwin_flt_eval_method): Handle macOS 14 guard
variant.
* fixincl.x: Regenerate.
* tests/base/math.h [DARWIN_FLT_EVAL_METHOD_CHECK]: Update test.
(cherry picked from commit 93f803d53b5ccaabded9d7b4512b54da81c1c616)
Diff:
---
fixincludes/fixincl.x | 8
fixincludes/inclhack.def | 7 ---
fixincludes/tests/base/math.h | 1 +
3 files changed, 9 insertions(+), 7 deletions(-)
diff --git a/fixincludes/fixincl.x b/fixincludes/fixincl.x
index 442de9226b5..055a9a03f85 100644
--- a/fixincludes/fixincl.x
+++ b/fixincludes/fixincl.x
@@ -2,11 +2,11 @@
*
* DO NOT EDIT THIS FILE (fixincl.x)
*
- * It has been AutoGen-ed April 12, 2024 at 12:46:40 PM by AutoGen 5.18.7
+ * It has been AutoGen-ed April 12, 2024 at 01:20:56 PM by AutoGen 5.18.7
* From the definitionsinclhack.def
* and the template file fixincl
*/
-/* DO NOT SVN-MERGE THIS FILE, EITHER Fri Apr 12 12:46:40 BST 2024
+/* DO NOT SVN-MERGE THIS FILE, EITHER Fri Apr 12 13:20:56 BST 2024
*
* You must regenerate it. Use the ./genfixes script.
*
@@ -3674,7 +3674,7 @@ tSCC* apzDarwin_Flt_Eval_MethodMachs[] = {
* content selection pattern - do fix if pattern found
*/
tSCC zDarwin_Flt_Eval_MethodSelect0[] =
- "^#if __FLT_EVAL_METHOD__ == 0$";
+ "^#if __FLT_EVAL_METHOD__ == 0( \\|\\| __FLT_EVAL_METHOD__ == -1)?$";
#defineDARWIN_FLT_EVAL_METHOD_TEST_CT 1
static tTestDesc aDarwin_Flt_Eval_MethodTests[] = {
@@ -3685,7 +3685,7 @@ static tTestDesc aDarwin_Flt_Eval_MethodTests[] = {
*/
static const char* apzDarwin_Flt_Eval_MethodPatch[] = {
"format",
-"#if __FLT_EVAL_METHOD__ == 0 || __FLT_EVAL_METHOD__ == 16",
+"%0 || __FLT_EVAL_METHOD__ == 16",
(char*)NULL };
/* * * * * * * * * * * * * * * * * * * * * * * * * *
diff --git a/fixincludes/inclhack.def b/fixincludes/inclhack.def
index 6478ca19932..0782fb05c85 100644
--- a/fixincludes/inclhack.def
+++ b/fixincludes/inclhack.def
@@ -1819,10 +1819,11 @@ fix = {
hackname = darwin_flt_eval_method;
mach = "*-*-darwin*";
files = math.h;
-select= "^#if __FLT_EVAL_METHOD__ == 0$";
+select= "^#if __FLT_EVAL_METHOD__ == 0( \\|\\| __FLT_EVAL_METHOD__ ==
-1)?$";
c_fix = format;
-c_fix_arg = "#if __FLT_EVAL_METHOD__ == 0 || __FLT_EVAL_METHOD__ == 16";
-test_text = "#if __FLT_EVAL_METHOD__ == 0";
+c_fix_arg = "%0 || __FLT_EVAL_METHOD__ == 16";
+test_text = "#if __FLT_EVAL_METHOD__ == 0\n"
+ "#if __FLT_EVAL_METHOD__ == 0 || __FLT_EVAL_METHOD__ == -1";
};
/*
diff --git a/fixincludes/tests/base/math.h b/fixincludes/tests/base/math.h
index 58f695f9adf..8005e39bc32 100644
--- a/fixincludes/tests/base/math.h
+++ b/fixincludes/tests/base/math.h
@@ -32,6 +32,7 @@
#if defined( DARWIN_FLT_EVAL_METHOD_CHECK )
#if __FLT_EVAL_METHOD__ == 0 || __FLT_EVAL_METHOD__ == 16
+#if __FLT_EVAL_METHOD__ == 0 || __FLT_EVAL_METHOD__ == -1 ||
__FLT_EVAL_METHOD__ == 16
#endif /* DARWIN_FLT_EVAL_METHOD_CHECK */
[gcc r11-11361] Testsuite, darwin: account for macOS 13 and 14
https://gcc.gnu.org/g:dbedcc5e0b6189e51060d69d442a610a0db82ac7
commit r11-11361-gdbedcc5e0b6189e51060d69d442a610a0db82ac7
Author: Francois-Xavier Coudert
Date: Mon Aug 21 00:00:44 2023 +0200
Testsuite, darwin: account for macOS 13 and 14
gcc/testsuite/ChangeLog:
* gcc.dg/darwin-minversion-link.c: Account for macOS 13 and 14.
(cherry picked from commit 6d33602650612c89e7e32201266763b167f62a46)
Diff:
---
gcc/testsuite/gcc.dg/darwin-minversion-link.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/gcc/testsuite/gcc.dg/darwin-minversion-link.c
b/gcc/testsuite/gcc.dg/darwin-minversion-link.c
index b6ede31c985..a835e9d4648 100644
--- a/gcc/testsuite/gcc.dg/darwin-minversion-link.c
+++ b/gcc/testsuite/gcc.dg/darwin-minversion-link.c
@@ -17,6 +17,8 @@
/* { dg-additional-options "-mmacosx-version-min=010.015.06 -DCHECK=101506" {
target *-*-darwin19* } } */
/* { dg-additional-options "-mmacosx-version-min=011.000.00 -DCHECK=11" {
target *-*-darwin20* } } */
/* { dg-additional-options "-mmacosx-version-min=012.000.00 -DCHECK=12" {
target *-*-darwin21* } } */
+/* { dg-additional-options "-mmacosx-version-min=013.000.00 -DCHECK=13" {
target *-*-darwin22* } } */
+/* { dg-additional-options "-mmacosx-version-min=014.000.00 -DCHECK=14" {
target *-*-darwin23* } } */
int
main ()
[gcc r14-10110] c++: constexpr union member access folding [PR114709]
https://gcc.gnu.org/g:0844170e9ef60a8b2f6fba6786672f30ce1c2749
commit r14-10110-g0844170e9ef60a8b2f6fba6786672f30ce1c2749
Author: Patrick Palka
Date: Wed Apr 24 17:49:56 2024 -0400
c++: constexpr union member access folding [PR114709]
The object/offset canonicalization performed in cxx_fold_indirect_ref
is undesirable for union member accesses because it loses information
about the member being accessed which we may later need to diagnose an
inactive-member access. So this patch restricts the canonicalization
accordingly.
PR c++/114709
gcc/cp/ChangeLog:
* constexpr.cc (cxx_fold_indirect_ref): Restrict object/offset
canonicalization to RECORD_TYPE member accesses.
gcc/testsuite/ChangeLog:
* g++.dg/cpp0x/constexpr-union8.C: New test.
Reviewed-by: Jason Merrill
Diff:
---
gcc/cp/constexpr.cc | 3 +++
gcc/testsuite/g++.dg/cpp0x/constexpr-union8.C | 8
2 files changed, 11 insertions(+)
diff --git a/gcc/cp/constexpr.cc b/gcc/cp/constexpr.cc
index 302b266809f..2e83d24dfda 100644
--- a/gcc/cp/constexpr.cc
+++ b/gcc/cp/constexpr.cc
@@ -5799,6 +5799,9 @@ cxx_fold_indirect_ref (const constexpr_ctx *ctx,
location_t loc, tree type,
more folding opportunities. */
auto canonicalize_obj_off = [] (tree& obj, tree& off) {
while (TREE_CODE (obj) == COMPONENT_REF
+ /* We need to preserve union member accesses so that we can
+ later properly diagnose accessing the wrong member. */
+ && TREE_CODE (TREE_TYPE (TREE_OPERAND (obj, 0))) == RECORD_TYPE
&& (tree_int_cst_sign_bit (off) || integer_zerop (off)))
{
tree field = TREE_OPERAND (obj, 1);
diff --git a/gcc/testsuite/g++.dg/cpp0x/constexpr-union8.C
b/gcc/testsuite/g++.dg/cpp0x/constexpr-union8.C
new file mode 100644
index 000..34c264944b6
--- /dev/null
+++ b/gcc/testsuite/g++.dg/cpp0x/constexpr-union8.C
@@ -0,0 +1,8 @@
+// PR c++/114709
+// { dg-do compile { target c++11 } }
+
+struct T1 { int a, b; };
+struct T2 { int c; double d; };
+union U { T1 t1; T2 t2; };
+
+constexpr int v = U{{1,2}}.t2.*&T2::c; // { dg-error "accessing 'U::t2'" }
[gcc r14-10111] c++/modules testsuite: restrict expensive pr99023 test
https://gcc.gnu.org/g:26a3edbe2357cf975f345ad1b59b9f9a3444316e
commit r14-10111-g26a3edbe2357cf975f345ad1b59b9f9a3444316e
Author: Patrick Palka
Date: Wed Apr 24 17:51:54 2024 -0400
c++/modules testsuite: restrict expensive pr99023 test
The pr99023 testcase uses --param=ggc-min-expand=0 which forces a GC
during every collection point and consequently is very slow to run,
and ends up being the main bottleneck of the modules.exp testsuite.
So this patch restricts this test to run once, in C++20 mode, instead of
multiple times (C++17, C++20 and C++23 mode by default). After this
patch the modules.exp testsuite finishes in 3m instead of 3m40s with -j8
on my machine.
gcc/testsuite/ChangeLog:
* g++.dg/modules/pr99023_a.X: Run only in C++20 mode.
* g++.dg/modules/pr99023_b.X: Likewise.
Reviewed-by: Jason Merrill
Diff:
---
gcc/testsuite/g++.dg/modules/pr99023_a.X | 1 +
gcc/testsuite/g++.dg/modules/pr99023_b.X | 1 +
2 files changed, 2 insertions(+)
diff --git a/gcc/testsuite/g++.dg/modules/pr99023_a.X
b/gcc/testsuite/g++.dg/modules/pr99023_a.X
index c872d15f792..507e9569535 100644
--- a/gcc/testsuite/g++.dg/modules/pr99023_a.X
+++ b/gcc/testsuite/g++.dg/modules/pr99023_a.X
@@ -1,4 +1,5 @@
// PR c++/99023, ICE
+// { dg-require-effective-target c++20_only }
// { dg-additional-options {-x c++-system-header initializer_list -fmodules-ts
--param ggc-min-expand=0} }
// { dg-prune-output {linker input file unused} }
diff --git a/gcc/testsuite/g++.dg/modules/pr99023_b.X
b/gcc/testsuite/g++.dg/modules/pr99023_b.X
index ca5f32e5bcc..59d32bee8d5 100644
--- a/gcc/testsuite/g++.dg/modules/pr99023_b.X
+++ b/gcc/testsuite/g++.dg/modules/pr99023_b.X
@@ -1,4 +1,5 @@
// PR c++/99023, ICE
+// { dg-require-effective-target c++20_only }
// { dg-additional-options {-x c++-system-header iostream -fmodules-ts
-flang-info-include-translate= --param ggc-min-expand=0} }
// { dg-prune-output {linker input file unused} }
[gcc r14-10113] RISC-V: Add xfail test case for highpart register overlap of vwcvt
https://gcc.gnu.org/g:d44c2052c59545731edcf7f99a32bcef3b0415b6
commit r14-10113-gd44c2052c59545731edcf7f99a32bcef3b0415b6
Author: Pan Li
Date: Wed Apr 24 23:09:24 2024 +0800
RISC-V: Add xfail test case for highpart register overlap of vwcvt
We reverted below patch for register group overlap, add the related
insn test and mark it as xfail. And we will remove the xfail
after we support the register overlap in GCC-15.
bdad036da32 RISC-V: Support highpart register overlap for vwcvt
The below test suites are passed for this patch
* The rv64gcv fully regression test with isl build.
gcc/testsuite/ChangeLog:
* gcc.target/riscv/rvv/base/pr112431-1.c: New test.
* gcc.target/riscv/rvv/base/pr112431-2.c: New test.
* gcc.target/riscv/rvv/base/pr112431-3.c: New test.
Signed-off-by: Pan Li
Diff:
---
.../gcc.target/riscv/rvv/base/pr112431-1.c | 104 +
.../gcc.target/riscv/rvv/base/pr112431-2.c | 68 ++
.../gcc.target/riscv/rvv/base/pr112431-3.c | 51 ++
3 files changed, 223 insertions(+)
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/base/pr112431-1.c
b/gcc/testsuite/gcc.target/riscv/rvv/base/pr112431-1.c
new file mode 100644
index 000..6f9c6f7bd8c
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/rvv/base/pr112431-1.c
@@ -0,0 +1,104 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gcv -mabi=lp64d -O3" } */
+
+#include "riscv_vector.h"
+
+size_t __attribute__ ((noinline))
+sumation (size_t sum0, size_t sum1, size_t sum2, size_t sum3, size_t sum4,
+ size_t sum5, size_t sum6, size_t sum7, size_t sum8, size_t sum9,
+ size_t sum10, size_t sum11, size_t sum12, size_t sum13, size_t sum14,
+ size_t sum15)
+{
+ return sum0 + sum1 + sum2 + sum3 + sum4 + sum5 + sum6 + sum7 + sum8 + sum9
++ sum10 + sum11 + sum12 + sum13 + sum14 + sum15;
+}
+
+size_t
+foo (char const *buf, size_t len)
+{
+ size_t sum = 0;
+ size_t vl = __riscv_vsetvlmax_e8m8 ();
+ size_t step = vl * 4;
+ const char *it = buf, *end = buf + len;
+ for (; it + step <= end;)
+{
+ vint8m1_t v0 = __riscv_vle8_v_i8m1 ((void *) it, vl);
+ it += vl;
+ vint8m1_t v1 = __riscv_vle8_v_i8m1 ((void *) it, vl);
+ it += vl;
+ vint8m1_t v2 = __riscv_vle8_v_i8m1 ((void *) it, vl);
+ it += vl;
+ vint8m1_t v3 = __riscv_vle8_v_i8m1 ((void *) it, vl);
+ it += vl;
+ vint8m1_t v4 = __riscv_vle8_v_i8m1 ((void *) it, vl);
+ it += vl;
+ vint8m1_t v5 = __riscv_vle8_v_i8m1 ((void *) it, vl);
+ it += vl;
+ vint8m1_t v6 = __riscv_vle8_v_i8m1 ((void *) it, vl);
+ it += vl;
+ vint8m1_t v7 = __riscv_vle8_v_i8m1 ((void *) it, vl);
+ it += vl;
+ vint8m1_t v8 = __riscv_vle8_v_i8m1 ((void *) it, vl);
+ it += vl;
+ vint8m1_t v9 = __riscv_vle8_v_i8m1 ((void *) it, vl);
+ it += vl;
+ vint8m1_t v10 = __riscv_vle8_v_i8m1 ((void *) it, vl);
+ it += vl;
+ vint8m1_t v11 = __riscv_vle8_v_i8m1 ((void *) it, vl);
+ it += vl;
+ vint8m1_t v12 = __riscv_vle8_v_i8m1 ((void *) it, vl);
+ it += vl;
+ vint8m1_t v13 = __riscv_vle8_v_i8m1 ((void *) it, vl);
+ it += vl;
+ vint8m1_t v14 = __riscv_vle8_v_i8m1 ((void *) it, vl);
+ it += vl;
+ vint8m1_t v15 = __riscv_vle8_v_i8m1 ((void *) it, vl);
+ it += vl;
+
+ asm volatile("nop" ::: "memory");
+ vint16m2_t vw0 = __riscv_vwcvt_x_x_v_i16m2 (v0, vl);
+ vint16m2_t vw1 = __riscv_vwcvt_x_x_v_i16m2 (v1, vl);
+ vint16m2_t vw2 = __riscv_vwcvt_x_x_v_i16m2 (v2, vl);
+ vint16m2_t vw3 = __riscv_vwcvt_x_x_v_i16m2 (v3, vl);
+ vint16m2_t vw4 = __riscv_vwcvt_x_x_v_i16m2 (v4, vl);
+ vint16m2_t vw5 = __riscv_vwcvt_x_x_v_i16m2 (v5, vl);
+ vint16m2_t vw6 = __riscv_vwcvt_x_x_v_i16m2 (v6, vl);
+ vint16m2_t vw7 = __riscv_vwcvt_x_x_v_i16m2 (v7, vl);
+ vint16m2_t vw8 = __riscv_vwcvt_x_x_v_i16m2 (v8, vl);
+ vint16m2_t vw9 = __riscv_vwcvt_x_x_v_i16m2 (v9, vl);
+ vint16m2_t vw10 = __riscv_vwcvt_x_x_v_i16m2 (v10, vl);
+ vint16m2_t vw11 = __riscv_vwcvt_x_x_v_i16m2 (v11, vl);
+ vint16m2_t vw12 = __riscv_vwcvt_x_x_v_i16m2 (v12, vl);
+ vint16m2_t vw13 = __riscv_vwcvt_x_x_v_i16m2 (v13, vl);
+ vint16m2_t vw14 = __riscv_vwcvt_x_x_v_i16m2 (v14, vl);
+ vint16m2_t vw15 = __riscv_vwcvt_x_x_v_i16m2 (v15, vl);
+
+ asm volatile("nop" ::: "memory");
+ size_t sum0 = __riscv_vmv_x_s_i16m2_i16 (vw0);
+ size_t sum1 = __riscv_vmv_x_s_i16m2_i16 (vw1);
+ size_t sum2 = __riscv_vmv_x_s_i16m2_i16 (vw2);
+ size_t sum3 = __riscv_vmv_x_s_i16m2_i16 (vw3);
+ size_t sum4 = __riscv_vmv_x_s_i16m2_i16 (vw4);
+ size_t sum5 = __riscv_vmv_x_s_i16m2_i16 (vw5);
+ size_t sum6 = __riscv_vmv_x_s_i16m2_i16 (vw6);
+ size_t sum7 = __riscv_vmv_x_s_i16m2_i16 (vw7);
+ size_t sum8 = __riscv_vmv_x_s_i16m2_i16 (vw8);
+ si
[gcc r14-10114] rs6000: Use bcdsub. instead of bcdadd. for bcd invalid number checking
https://gcc.gnu.org/g:09680e3ee7d72978b493dd4127ce2e769f96a45e
commit r14-10114-g09680e3ee7d72978b493dd4127ce2e769f96a45e
Author: Haochen Gui
Date: Thu Apr 25 09:55:53 2024 +0800
rs6000: Use bcdsub. instead of bcdadd. for bcd invalid number checking
bcdadd. might causes overflow which also set the overflow/invalid bit.
bcdsub. doesn't have the issue when do subtracting on two same bcd number.
gcc/
* config/rs6000/altivec.md (*bcdinvalid_): Replace bcdadd
with bcdsub.
(bcdinvalid_): Likewise.
gcc/testsuite/
* gcc.target/powerpc/bcd-4.c: Adjust the number of bcdadd and
bcdsub.
Diff:
---
gcc/config/rs6000/altivec.md | 6 +++---
gcc/testsuite/gcc.target/powerpc/bcd-4.c | 4 ++--
2 files changed, 5 insertions(+), 5 deletions(-)
diff --git a/gcc/config/rs6000/altivec.md b/gcc/config/rs6000/altivec.md
index 4d4c94ff0a0..bb20441c096 100644
--- a/gcc/config/rs6000/altivec.md
+++ b/gcc/config/rs6000/altivec.md
@@ -4586,18 +4586,18 @@
[(set (reg:CCFP CR6_REGNO)
(compare:CCFP
(unspec:V2DF [(match_operand:VBCD 1 "register_operand" "v")]
- UNSPEC_BCDADD)
+ UNSPEC_BCDSUB)
(match_operand:V2DF 2 "zero_constant" "j")))
(clobber (match_scratch:VBCD 0 "=v"))]
"TARGET_P8_VECTOR"
- "bcdadd. %0,%1,%1,0"
+ "bcdsub. %0,%1,%1,0"
[(set_attr "type" "vecsimple")])
(define_expand "bcdinvalid_"
[(parallel [(set (reg:CCFP CR6_REGNO)
(compare:CCFP
(unspec:V2DF [(match_operand:VBCD 1 "register_operand")]
-UNSPEC_BCDADD)
+UNSPEC_BCDSUB)
(match_dup 2)))
(clobber (match_scratch:VBCD 3))])
(set (match_operand:SI 0 "register_operand")
diff --git a/gcc/testsuite/gcc.target/powerpc/bcd-4.c
b/gcc/testsuite/gcc.target/powerpc/bcd-4.c
index 2c7041c4d32..6d2c59ef792 100644
--- a/gcc/testsuite/gcc.target/powerpc/bcd-4.c
+++ b/gcc/testsuite/gcc.target/powerpc/bcd-4.c
@@ -2,8 +2,8 @@
/* { dg-require-effective-target int128 } */
/* { dg-require-effective-target p9vector_hw } */
/* { dg-options "-mdejagnu-cpu=power9 -O2 -save-temps" } */
-/* { dg-final { scan-assembler-times {\mbcdadd\M} 7 } } */
-/* { dg-final { scan-assembler-times {\mbcdsub\M} 18 } } */
+/* { dg-final { scan-assembler-times {\mbcdadd\M} 5 } } */
+/* { dg-final { scan-assembler-times {\mbcdsub\M} 20 } } */
/* { dg-final { scan-assembler-times {\mbcds\M} 2 } } */
/* { dg-final { scan-assembler-times {\mdenbcdq\M} 1 } } */
[gcc r13-8646] rs6000: Fix wrong align passed to build_aligned_type [PR88309]
https://gcc.gnu.org/g:a9f174f01f25fa6df989707dc2fec29ef78aad24
commit r13-8646-ga9f174f01f25fa6df989707dc2fec29ef78aad24
Author: Kewen Lin
Date: Mon Apr 8 21:01:36 2024 -0500
rs6000: Fix wrong align passed to build_aligned_type [PR88309]
As the comments in PR88309 show, there are two oversights
in rs6000_gimple_fold_builtin that pass align in bytes to
build_aligned_type but which actually requires align in
bits, it causes unexpected ICE or hanging in function
is_miss_rate_acceptable due to zero align_unit value.
This patch is to fix them by converting bytes to bits, add
an assertion on positive align_unit value and notes function
build_aligned_type requires align measured in bits in its
function comment.
PR target/88309
Co-authored-by: Andrew Pinski
gcc/ChangeLog:
* config/rs6000/rs6000-builtin.cc (rs6000_gimple_fold_builtin): Fix
wrong align passed to function build_aligned_type.
* tree-ssa-loop-prefetch.cc (is_miss_rate_acceptable): Add an
assertion to ensure align_unit should be positive.
* tree.cc (build_qualified_type): Update function comments.
gcc/testsuite/ChangeLog:
* gcc.target/powerpc/pr88309.c: New test.
Diff:
---
gcc/config/rs6000/rs6000-builtin.cc| 4 ++--
gcc/testsuite/gcc.target/powerpc/pr88309.c | 27 +++
gcc/tree-ssa-loop-prefetch.cc | 2 ++
gcc/tree.cc| 3 ++-
4 files changed, 33 insertions(+), 3 deletions(-)
diff --git a/gcc/config/rs6000/rs6000-builtin.cc
b/gcc/config/rs6000/rs6000-builtin.cc
index 534698e7d3e..2b4412e0403 100644
--- a/gcc/config/rs6000/rs6000-builtin.cc
+++ b/gcc/config/rs6000/rs6000-builtin.cc
@@ -1896,7 +1896,7 @@ rs6000_gimple_fold_builtin (gimple_stmt_iterator *gsi)
tree lhs_type = TREE_TYPE (lhs);
/* In GIMPLE the type of the MEM_REF specifies the alignment. The
required alignment (power) is 4 bytes regardless of data type. */
- tree align_ltype = build_aligned_type (lhs_type, 4);
+ tree align_ltype = build_aligned_type (lhs_type, 32);
/* POINTER_PLUS_EXPR wants the offset to be of type 'sizetype'. Create
the tree using the value from arg0. The resulting type will match
the type of arg1. */
@@ -1940,7 +1940,7 @@ rs6000_gimple_fold_builtin (gimple_stmt_iterator *gsi)
tree arg2_type = ptr_type_node;
/* In GIMPLE the type of the MEM_REF specifies the alignment. The
required alignment (power) is 4 bytes regardless of data type. */
- tree align_stype = build_aligned_type (arg0_type, 4);
+ tree align_stype = build_aligned_type (arg0_type, 32);
/* POINTER_PLUS_EXPR wants the offset to be of type 'sizetype'. Create
the tree using the value from arg1. */
gimple_seq stmts = NULL;
diff --git a/gcc/testsuite/gcc.target/powerpc/pr88309.c
b/gcc/testsuite/gcc.target/powerpc/pr88309.c
new file mode 100644
index 000..c0078cf2b8c
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/pr88309.c
@@ -0,0 +1,27 @@
+/* { dg-require-effective-target powerpc_vsx_ok } */
+/* { dg-options "-mvsx -O2 -fprefetch-loop-arrays" } */
+
+/* Verify there is no ICE or hanging. */
+
+#include
+
+void b(float *c, vector float a, vector float, vector float)
+{
+ vector float d;
+ vector char ahbc;
+ vec_xst(vec_perm(a, d, ahbc), 0, c);
+}
+
+vector float e(vector unsigned);
+
+void f() {
+ float *dst;
+ int g = 0;
+ for (;; g += 16) {
+vector unsigned m, i;
+vector unsigned n, j;
+vector unsigned k, l;
+b(dst + g * 3, e(m), e(n), e(k));
+b(dst + (g + 4) * 3, e(i), e(j), e(l));
+ }
+}
diff --git a/gcc/tree-ssa-loop-prefetch.cc b/gcc/tree-ssa-loop-prefetch.cc
index 130c00f3b3a..5a79a9e6a5e 100644
--- a/gcc/tree-ssa-loop-prefetch.cc
+++ b/gcc/tree-ssa-loop-prefetch.cc
@@ -739,6 +739,8 @@ is_miss_rate_acceptable (unsigned HOST_WIDE_INT
cache_line_size,
if (delta >= (HOST_WIDE_INT) cache_line_size)
return false;
+ gcc_assert (align_unit > 0);
+
miss_positions = 0;
total_positions = (cache_line_size / align_unit) * distinct_iters;
max_allowed_miss_positions = (ACCEPTABLE_MISS_RATE * total_positions) / 1000;
diff --git a/gcc/tree.cc b/gcc/tree.cc
index 207293c48cb..1d1c240b257 100644
--- a/gcc/tree.cc
+++ b/gcc/tree.cc
@@ -5660,7 +5660,8 @@ build_qualified_type (tree type, int type_quals
MEM_STAT_DECL)
return t;
}
-/* Create a variant of type T with alignment ALIGN. */
+/* Create a variant of type T with alignment ALIGN which
+ is measured in bits. */
tree
build_aligned_type (tree type, unsigned int align)
[gcc r12-10393] rs6000: Fix wrong align passed to build_aligned_type [PR88309]
https://gcc.gnu.org/g:43c8cb0e003996b3a7a9f98923f602561f3f0ec7
commit r12-10393-g43c8cb0e003996b3a7a9f98923f602561f3f0ec7
Author: Kewen Lin
Date: Mon Apr 8 21:01:36 2024 -0500
rs6000: Fix wrong align passed to build_aligned_type [PR88309]
As the comments in PR88309 show, there are two oversights
in rs6000_gimple_fold_builtin that pass align in bytes to
build_aligned_type but which actually requires align in
bits, it causes unexpected ICE or hanging in function
is_miss_rate_acceptable due to zero align_unit value.
This patch is to fix them by converting bytes to bits, add
an assertion on positive align_unit value and notes function
build_aligned_type requires align measured in bits in its
function comment.
PR target/88309
Co-authored-by: Andrew Pinski
gcc/ChangeLog:
* config/rs6000/rs6000-builtin.cc (rs6000_gimple_fold_builtin): Fix
wrong align passed to function build_aligned_type.
* tree-ssa-loop-prefetch.cc (is_miss_rate_acceptable): Add an
assertion to ensure align_unit should be positive.
* tree.cc (build_qualified_type): Update function comments.
gcc/testsuite/ChangeLog:
* gcc.target/powerpc/pr88309.c: New test.
Diff:
---
gcc/config/rs6000/rs6000-builtin.cc| 4 ++--
gcc/testsuite/gcc.target/powerpc/pr88309.c | 27 +++
gcc/tree-ssa-loop-prefetch.cc | 2 ++
gcc/tree.cc| 3 ++-
4 files changed, 33 insertions(+), 3 deletions(-)
diff --git a/gcc/config/rs6000/rs6000-builtin.cc
b/gcc/config/rs6000/rs6000-builtin.cc
index cc385a2b277..39a07a27c86 100644
--- a/gcc/config/rs6000/rs6000-builtin.cc
+++ b/gcc/config/rs6000/rs6000-builtin.cc
@@ -1920,7 +1920,7 @@ rs6000_gimple_fold_builtin (gimple_stmt_iterator *gsi)
tree lhs_type = TREE_TYPE (lhs);
/* In GIMPLE the type of the MEM_REF specifies the alignment. The
required alignment (power) is 4 bytes regardless of data type. */
- tree align_ltype = build_aligned_type (lhs_type, 4);
+ tree align_ltype = build_aligned_type (lhs_type, 32);
/* POINTER_PLUS_EXPR wants the offset to be of type 'sizetype'. Create
the tree using the value from arg0. The resulting type will match
the type of arg1. */
@@ -1964,7 +1964,7 @@ rs6000_gimple_fold_builtin (gimple_stmt_iterator *gsi)
tree arg2_type = ptr_type_node;
/* In GIMPLE the type of the MEM_REF specifies the alignment. The
required alignment (power) is 4 bytes regardless of data type. */
- tree align_stype = build_aligned_type (arg0_type, 4);
+ tree align_stype = build_aligned_type (arg0_type, 32);
/* POINTER_PLUS_EXPR wants the offset to be of type 'sizetype'. Create
the tree using the value from arg1. */
gimple_seq stmts = NULL;
diff --git a/gcc/testsuite/gcc.target/powerpc/pr88309.c
b/gcc/testsuite/gcc.target/powerpc/pr88309.c
new file mode 100644
index 000..c0078cf2b8c
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/pr88309.c
@@ -0,0 +1,27 @@
+/* { dg-require-effective-target powerpc_vsx_ok } */
+/* { dg-options "-mvsx -O2 -fprefetch-loop-arrays" } */
+
+/* Verify there is no ICE or hanging. */
+
+#include
+
+void b(float *c, vector float a, vector float, vector float)
+{
+ vector float d;
+ vector char ahbc;
+ vec_xst(vec_perm(a, d, ahbc), 0, c);
+}
+
+vector float e(vector unsigned);
+
+void f() {
+ float *dst;
+ int g = 0;
+ for (;; g += 16) {
+vector unsigned m, i;
+vector unsigned n, j;
+vector unsigned k, l;
+b(dst + g * 3, e(m), e(n), e(k));
+b(dst + (g + 4) * 3, e(i), e(j), e(l));
+ }
+}
diff --git a/gcc/tree-ssa-loop-prefetch.cc b/gcc/tree-ssa-loop-prefetch.cc
index aebd7c9206f..543e142f85d 100644
--- a/gcc/tree-ssa-loop-prefetch.cc
+++ b/gcc/tree-ssa-loop-prefetch.cc
@@ -739,6 +739,8 @@ is_miss_rate_acceptable (unsigned HOST_WIDE_INT
cache_line_size,
if (delta >= (HOST_WIDE_INT) cache_line_size)
return false;
+ gcc_assert (align_unit > 0);
+
miss_positions = 0;
total_positions = (cache_line_size / align_unit) * distinct_iters;
max_allowed_miss_positions = (ACCEPTABLE_MISS_RATE * total_positions) / 1000;
diff --git a/gcc/tree.cc b/gcc/tree.cc
index e6593de87b6..ead4c1421cd 100644
--- a/gcc/tree.cc
+++ b/gcc/tree.cc
@@ -5649,7 +5649,8 @@ build_qualified_type (tree type, int type_quals
MEM_STAT_DECL)
return t;
}
-/* Create a variant of type T with alignment ALIGN. */
+/* Create a variant of type T with alignment ALIGN which
+ is measured in bits. */
tree
build_aligned_type (tree type, unsigned int align)
[gcc r11-11363] rs6000: Fix wrong align passed to build_aligned_type [PR88309]
https://gcc.gnu.org/g:02f1b5361188c9d833cef39caf723d31d44ba5d5
commit r11-11363-g02f1b5361188c9d833cef39caf723d31d44ba5d5
Author: Kewen Lin
Date: Mon Apr 8 21:01:36 2024 -0500
rs6000: Fix wrong align passed to build_aligned_type [PR88309]
As the comments in PR88309 show, there are two oversights
in rs6000_gimple_fold_builtin that pass align in bytes to
build_aligned_type but which actually requires align in
bits, it causes unexpected ICE or hanging in function
is_miss_rate_acceptable due to zero align_unit value.
This patch is to fix them by converting bytes to bits, add
an assertion on positive align_unit value and notes function
build_aligned_type requires align measured in bits in its
function comment.
PR target/88309
Co-authored-by: Andrew Pinski
gcc/ChangeLog:
* config/rs6000/rs6000-call.c (rs6000_gimple_fold_builtin): Fix
wrong align passed to function build_aligned_type.
* tree-ssa-loop-prefetch.c (is_miss_rate_acceptable): Add an
assertion to ensure align_unit should be positive.
* tree.c (build_qualified_type): Update function comments.
gcc/testsuite/ChangeLog:
* gcc.target/powerpc/pr88309.c: New test.
(cherry picked from commit 26eb5f8fd173e2425ae7505528fc426de4b7e34c)
Diff:
---
gcc/config/rs6000/rs6000-call.c| 4 ++--
gcc/testsuite/gcc.target/powerpc/pr88309.c | 27 +++
gcc/tree-ssa-loop-prefetch.c | 2 ++
gcc/tree.c | 3 ++-
4 files changed, 33 insertions(+), 3 deletions(-)
diff --git a/gcc/config/rs6000/rs6000-call.c b/gcc/config/rs6000/rs6000-call.c
index 1be4797e834..c555f7857d1 100644
--- a/gcc/config/rs6000/rs6000-call.c
+++ b/gcc/config/rs6000/rs6000-call.c
@@ -12658,7 +12658,7 @@ rs6000_gimple_fold_builtin (gimple_stmt_iterator *gsi)
tree lhs_type = TREE_TYPE (lhs);
/* In GIMPLE the type of the MEM_REF specifies the alignment. The
required alignment (power) is 4 bytes regardless of data type. */
- tree align_ltype = build_aligned_type (lhs_type, 4);
+ tree align_ltype = build_aligned_type (lhs_type, 32);
/* POINTER_PLUS_EXPR wants the offset to be of type 'sizetype'. Create
the tree using the value from arg0. The resulting type will match
the type of arg1. */
@@ -12702,7 +12702,7 @@ rs6000_gimple_fold_builtin (gimple_stmt_iterator *gsi)
tree arg2_type = ptr_type_node;
/* In GIMPLE the type of the MEM_REF specifies the alignment. The
required alignment (power) is 4 bytes regardless of data type. */
- tree align_stype = build_aligned_type (arg0_type, 4);
+ tree align_stype = build_aligned_type (arg0_type, 32);
/* POINTER_PLUS_EXPR wants the offset to be of type 'sizetype'. Create
the tree using the value from arg1. */
gimple_seq stmts = NULL;
diff --git a/gcc/testsuite/gcc.target/powerpc/pr88309.c
b/gcc/testsuite/gcc.target/powerpc/pr88309.c
new file mode 100644
index 000..c0078cf2b8c
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/pr88309.c
@@ -0,0 +1,27 @@
+/* { dg-require-effective-target powerpc_vsx_ok } */
+/* { dg-options "-mvsx -O2 -fprefetch-loop-arrays" } */
+
+/* Verify there is no ICE or hanging. */
+
+#include
+
+void b(float *c, vector float a, vector float, vector float)
+{
+ vector float d;
+ vector char ahbc;
+ vec_xst(vec_perm(a, d, ahbc), 0, c);
+}
+
+vector float e(vector unsigned);
+
+void f() {
+ float *dst;
+ int g = 0;
+ for (;; g += 16) {
+vector unsigned m, i;
+vector unsigned n, j;
+vector unsigned k, l;
+b(dst + g * 3, e(m), e(n), e(k));
+b(dst + (g + 4) * 3, e(i), e(j), e(l));
+ }
+}
diff --git a/gcc/tree-ssa-loop-prefetch.c b/gcc/tree-ssa-loop-prefetch.c
index 98062eb4616..8d73b14dfc4 100644
--- a/gcc/tree-ssa-loop-prefetch.c
+++ b/gcc/tree-ssa-loop-prefetch.c
@@ -739,6 +739,8 @@ is_miss_rate_acceptable (unsigned HOST_WIDE_INT
cache_line_size,
if (delta >= (HOST_WIDE_INT) cache_line_size)
return false;
+ gcc_assert (align_unit > 0);
+
miss_positions = 0;
total_positions = (cache_line_size / align_unit) * distinct_iters;
max_allowed_miss_positions = (ACCEPTABLE_MISS_RATE * total_positions) / 1000;
diff --git a/gcc/tree.c b/gcc/tree.c
index 79e03204a6e..8b5b0b7508c 100644
--- a/gcc/tree.c
+++ b/gcc/tree.c
@@ -6711,7 +6711,8 @@ build_qualified_type (tree type, int type_quals
MEM_STAT_DECL)
return t;
}
-/* Create a variant of type T with alignment ALIGN. */
+/* Create a variant of type T with alignment ALIGN which
+ is measured in bits. */
tree
build_aligned_type (tree type, unsigned int align)
[gcc r14-10115] Fortran: Generate new charlens for shared symbol typespecs [PR89462]
https://gcc.gnu.org/g:1fd5a07444776d76cdd6a2eee7df0478201197a5
commit r14-10115-g1fd5a07444776d76cdd6a2eee7df0478201197a5
Author: Paul Thomas
Date: Thu Apr 25 06:52:31 2024 +0100
Fortran: Generate new charlens for shared symbol typespecs [PR89462]
2024-04-25 Paul Thomas
Jakub Jelinek
gcc/fortran
PR fortran/89462
* decl.cc (build_sym): Add an extra argument 'elem'. If 'elem'
is greater than 1, gfc_new_charlen is called to generate a new
charlen, registered in the symbol namespace.
(variable_decl, enumerator_decl): Set the new argument in the
calls to build_sym.
gcc/testsuite/
PR fortran/89462
* gfortran.dg/pr89462.f90: New test.
Diff:
---
gcc/fortran/decl.cc | 11 +++
gcc/testsuite/gfortran.dg/pr89462.f90 | 13 +
2 files changed, 20 insertions(+), 4 deletions(-)
diff --git a/gcc/fortran/decl.cc b/gcc/fortran/decl.cc
index a7576f4bc40..b8308aeee55 100644
--- a/gcc/fortran/decl.cc
+++ b/gcc/fortran/decl.cc
@@ -1713,7 +1713,7 @@ gfc_verify_c_interop_param (gfc_symbol *sym)
/* Function called by variable_decl() that adds a name to the symbol table. */
static bool
-build_sym (const char *name, gfc_charlen *cl, bool cl_deferred,
+build_sym (const char *name, int elem, gfc_charlen *cl, bool cl_deferred,
gfc_array_spec **as, locus *var_locus)
{
symbol_attribute attr;
@@ -1778,7 +1778,10 @@ build_sym (const char *name, gfc_charlen *cl, bool
cl_deferred,
if (sym->ts.type == BT_CHARACTER)
{
- sym->ts.u.cl = cl;
+ if (elem > 1)
+ sym->ts.u.cl = gfc_new_charlen (sym->ns, cl);
+ else
+ sym->ts.u.cl = cl;
sym->ts.deferred = cl_deferred;
}
@@ -2960,7 +2963,7 @@ variable_decl (int elem)
create a symbol for those yet. If we fail to create the symbol,
bail out. */
if (!gfc_comp_struct (gfc_current_state ())
- && !build_sym (name, cl, cl_deferred, &as, &var_locus))
+ && !build_sym (name, elem, cl, cl_deferred, &as, &var_locus))
{
m = MATCH_ERROR;
goto cleanup;
@@ -10938,7 +10941,7 @@ enumerator_decl (void)
/* OK, we've successfully matched the declaration. Now put the
symbol in the current namespace. If we fail to create the symbol,
bail out. */
- if (!build_sym (name, NULL, false, &as, &var_locus))
+ if (!build_sym (name, 1, NULL, false, &as, &var_locus))
{
m = MATCH_ERROR;
goto cleanup;
diff --git a/gcc/testsuite/gfortran.dg/pr89462.f90
b/gcc/testsuite/gfortran.dg/pr89462.f90
new file mode 100644
index 000..b2a4912fcc8
--- /dev/null
+++ b/gcc/testsuite/gfortran.dg/pr89462.f90
@@ -0,0 +1,13 @@
+! { dg-do compile }
+! { dg-options "-pedantic-errors" }
+! Test the fix for PR89462 in which the shared 'cl' field of the typespec
+! shared between 'test', 'TR' and 'aTP' caused the compiler to go into an
+! infinite loop.
+! Contributed by Sergei Trofimovich
+ CHARACTER*1 FUNCTION test(H) ! { dg-warning "Old-style character length" }
+ CHARACTER*1 test2,TR,aTP ! { dg-warning "Old-style character length" }
+ ENTRY test2(L)
+ CALL ttest3(aTP)
+ test = TR
+ RETURN
+ END
[gcc r14-10116] Fortran: Fix ICE in gfc_trans_create_temp_array from bad type [PR93678]
https://gcc.gnu.org/g:c058105bc47a0701e157d1028e60f48554561f9f
commit r14-10116-gc058105bc47a0701e157d1028e60f48554561f9f
Author: Paul Thomas
Date: Thu Apr 25 06:56:10 2024 +0100
Fortran: Fix ICE in gfc_trans_create_temp_array from bad type [PR93678]
2024-04-25 Paul Thomas
gcc/fortran
PR fortran/93678
* trans-expr.cc (gfc_conv_procedure_call): Use the interface,
where possible, to obtain the type of character procedure
pointers of class entities.
gcc/testsuite/
PR fortran/93678
* gfortran.dg/pr93678.f90: New test.
Diff:
---
gcc/fortran/trans-expr.cc | 10 --
gcc/testsuite/gfortran.dg/pr93678.f90 | 32
2 files changed, 40 insertions(+), 2 deletions(-)
diff --git a/gcc/fortran/trans-expr.cc b/gcc/fortran/trans-expr.cc
index 605434f4ddb..072adf3fe77 100644
--- a/gcc/fortran/trans-expr.cc
+++ b/gcc/fortran/trans-expr.cc
@@ -7879,8 +7879,14 @@ gfc_conv_procedure_call (gfc_se * se, gfc_symbol * sym,
{
gcc_assert (se->loop && info);
- /* Set the type of the array. */
- tmp = gfc_typenode_for_spec (&comp->ts);
+ /* Set the type of the array. vtable charlens are not always reliable.
+Use the interface, if possible. */
+ if (comp->ts.type == BT_CHARACTER
+ && expr->symtree->n.sym->ts.type == BT_CLASS
+ && comp->ts.interface && comp->ts.interface->result)
+ tmp = gfc_typenode_for_spec (&comp->ts.interface->result->ts);
+ else
+ tmp = gfc_typenode_for_spec (&comp->ts);
gcc_assert (se->ss->dimen == se->loop->dimen);
/* Evaluate the bounds of the result, if known. */
diff --git a/gcc/testsuite/gfortran.dg/pr93678.f90
b/gcc/testsuite/gfortran.dg/pr93678.f90
new file mode 100644
index 000..403bedd0c4f
--- /dev/null
+++ b/gcc/testsuite/gfortran.dg/pr93678.f90
@@ -0,0 +1,32 @@
+! { dg-do compile }
+! Test the fix for PR93678 in which the charlen for the 'unpackbytes'
+! vtable field was incomplete and caused the ICE as indicated.
+! Contributed by Luis Kornblueh
+!
+! The testcase was reduced by various gfortran regulars.
+module mo_a
+ implicit none
+ type t_b
+integer :: i
+ contains
+procedure :: unpackbytes => b_unpackbytes
+ end type t_b
+contains
+ function b_unpackbytes (me) result (res)
+class(t_b), intent(inout) :: me
+character :: res(1)
+res = char (me%i)
+ end function b_unpackbytes
+ subroutine b_unpackint (me, c)
+class(t_b), intent(inout) :: me
+character, intent(in) :: c
+! print *, b_unpackbytes (me) ! ok
+if (any (me% unpackbytes () .ne. c)) stop 1 ! ICEd here
+ end subroutine b_unpackint
+end module mo_a
+
+ use mo_a
+ class(t_b), allocatable :: z
+ allocate (z, source = t_b(97))
+ call b_unpackint (z, "a")
+end
[gcc r14-10117] RISC-V: Add early clobber to the dest of vwsll
https://gcc.gnu.org/g:10ad46bc191f8aa90b0d7b00963bfd52c6d7b09c commit r14-10117-g10ad46bc191f8aa90b0d7b00963bfd52c6d7b09c Author: Pan Li Date: Thu Apr 25 08:55:08 2024 +0800 RISC-V: Add early clobber to the dest of vwsll We missed the existing early clobber for the dest operand of vwsll pattern when resolve the conflict of revert register overlap. Thus add it back to the pattern. Unfortunately, we have no test to cover this part and will improve this after GCC-15 open. The below tests are passed for this patch: * The rv64gcv fully regression test with isl build. gcc/ChangeLog: * config/riscv/vector-crypto.md: Add early clobber to the dest operand of vwsll. Signed-off-by: Pan Li Diff: --- gcc/config/riscv/vector-crypto.md | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/gcc/config/riscv/vector-crypto.md b/gcc/config/riscv/vector-crypto.md index 8a4888a7653..e474ddf5da7 100755 --- a/gcc/config/riscv/vector-crypto.md +++ b/gcc/config/riscv/vector-crypto.md @@ -303,7 +303,7 @@ (set_attr "mode" "")]) (define_insn "@pred_vwsll_scalar" - [(set (match_operand:VWEXTI 0 "register_operand" "=vr, vr") + [(set (match_operand:VWEXTI 0 "register_operand" "=&vr,&vr") (if_then_else:VWEXTI (unspec: [(match_operand: 1 "vector_mask_operand" "vmWc1, vmWc1")
