[gcc r15-934] C23: allow aliasing for types derived from structs with variable size
https://gcc.gnu.org/g:d2cfe8a73b3c4195a25cde28e1641ef36ebb08c1
commit r15-934-gd2cfe8a73b3c4195a25cde28e1641ef36ebb08c1
Author: Martin Uecker
Date: Fri May 24 12:35:27 2024 +0200
C23: allow aliasing for types derived from structs with variable size
Previously, we set the aliasing set of structures with variable size
struct foo { int x[n]; char b; };
to zero. The reason is that such types can be compatible to diffrent
structure types which are incompatible.
struct foo { int x[2]; char b; };
struct foo { int x[3]; char b; };
But it is not enough to set the aliasing set to zero, because derived
types would then still end up in different equivalence classes even
though they might be compatible. Instead those types should be set
to structural equivalency. We also add checking assertions that
ensure that TYPE_CANONICAL is set correctly for all tagged types.
gcc/c/
* c-decl.cc (finish_struct): Do not set TYPE_CANONICAL for
structure or unions with variable size.
* c-objc-common.cc (c_get_alias_set): Do not set alias set to zero.
* c-typeck.cc (comptypes_verify): New function.
(comptypes,comptypes_same_p,comptypes_check_enum_int): Add
assertion.
(comptypes_equiv_p): Add assertion that ensures that compatible
types have the same equivalence class.
(tagged_types_tu_compatible_p): Remove now unneeded special case.
gcc/testsuite/
* gcc.dg/gnu23-tag-alias-8.c: New test.
Diff:
---
gcc/c/c-decl.cc | 2 +-
gcc/c/c-objc-common.cc | 5 -
gcc/c/c-typeck.cc| 37 +---
gcc/testsuite/gcc.dg/gnu23-tag-alias-8.c | 24 +
4 files changed, 59 insertions(+), 9 deletions(-)
diff --git a/gcc/c/c-decl.cc b/gcc/c/c-decl.cc
index 6e6606c9570..9f7d55c0b10 100644
--- a/gcc/c/c-decl.cc
+++ b/gcc/c/c-decl.cc
@@ -9749,7 +9749,7 @@ finish_struct (location_t loc, tree t, tree fieldlist,
tree attributes,
C_TYPE_BEING_DEFINED (t) = 0;
/* Set type canonical based on equivalence class. */
- if (flag_isoc23)
+ if (flag_isoc23 && !C_TYPE_VARIABLE_SIZE (t))
{
if (c_struct_htab == NULL)
c_struct_htab = hash_table::create_ggc (61);
diff --git a/gcc/c/c-objc-common.cc b/gcc/c/c-objc-common.cc
index 283f6a8ae26..738e899a2a9 100644
--- a/gcc/c/c-objc-common.cc
+++ b/gcc/c/c-objc-common.cc
@@ -420,11 +420,6 @@ c_var_mod_p (tree x, tree fn ATTRIBUTE_UNUSED)
alias_set_type
c_get_alias_set (tree t)
{
- /* Structs with variable size can alias different incompatible
- structs. Let them alias anything. */
- if (RECORD_OR_UNION_TYPE_P (t) && C_TYPE_VARIABLE_SIZE (t))
-return 0;
-
return c_common_get_alias_set (t);
}
diff --git a/gcc/c/c-typeck.cc b/gcc/c/c-typeck.cc
index 09b2c265a46..48934802148 100644
--- a/gcc/c/c-typeck.cc
+++ b/gcc/c/c-typeck.cc
@@ -1167,6 +1167,28 @@ common_type (tree t1, tree t2)
return c_common_type (t1, t2);
}
+
+
+/* Helper function for comptypes. For two compatible types, return 1
+ if they pass consistency checks. In particular we test that
+ TYPE_CANONICAL is set correctly, i.e. the two types can alias. */
+
+static bool
+comptypes_verify (tree type1, tree type2)
+{
+ if (TYPE_CANONICAL (type1) != TYPE_CANONICAL (type2)
+ && !TYPE_STRUCTURAL_EQUALITY_P (type1)
+ && !TYPE_STRUCTURAL_EQUALITY_P (type2))
+{
+ /* FIXME: check other types. */
+ if (RECORD_OR_UNION_TYPE_P (type1)
+ || TREE_CODE (type1) == ENUMERAL_TYPE
+ || TREE_CODE (type2) == ENUMERAL_TYPE)
+ return false;
+}
+ return true;
+}
+
struct comptypes_data {
bool enum_and_int_p;
bool different_types_p;
@@ -1188,6 +1210,8 @@ comptypes (tree type1, tree type2)
struct comptypes_data data = { };
bool ret = comptypes_internal (type1, type2, );
+ gcc_checking_assert (!ret || comptypes_verify (type1, type2));
+
return ret ? (data.warning_needed ? 2 : 1) : 0;
}
@@ -1201,6 +1225,8 @@ comptypes_same_p (tree type1, tree type2)
struct comptypes_data data = { };
bool ret = comptypes_internal (type1, type2, );
+ gcc_checking_assert (!ret || comptypes_verify (type1, type2));
+
if (data.different_types_p)
return false;
@@ -1218,6 +1244,8 @@ comptypes_check_enum_int (tree type1, tree type2, bool
*enum_and_int_p)
bool ret = comptypes_internal (type1, type2, );
*enum_and_int_p = data.enum_and_int_p;
+ gcc_checking_assert (!ret || comptypes_verify (type1, type2));
+
return ret ? (data.warning_needed ? 2 : 1) : 0;
}
@@ -1232,6 +1260,8 @@ comptypes_check_different_types (tree type1, tree type2,
bool ret = comptypes_internal (type1, type2, );
*different_types_p = data.different_types_p;
+ gcc_checking_assert (!ret || comptypes_verify (type1, type2));
+
return ret ? (data.warning_needed ? 2 :
[gcc r15-933] C: allow aliasing of compatible types derived from enumeral types [PR115157]
https://gcc.gnu.org/g:867d1264fe71d4291194373d1a1c409cac97a597
commit r15-933-g867d1264fe71d4291194373d1a1c409cac97a597
Author: Martin Uecker
Date: Sun May 19 23:13:22 2024 +0200
C: allow aliasing of compatible types derived from enumeral types [PR115157]
Aliasing of enumeral types with the underlying integer is now allowed
by setting the aliasing set to zero. But this does not allow aliasing
of derived types which are compatible as required by ISO C. Instead,
initially set structural equality. Then set TYPE_CANONICAL and update
pointers and main variants when the type is completed (as done for
structures and unions in C23).
PR tree-optimization/115157
PR tree-optimization/115177
gcc/c/
* c-decl.cc (shadow_tag-warned,parse_xref_tag,start_enum,
finish_enum): Set SET_TYPE_STRUCTURAL_EQUALITY / TYPE_CANONICAL.
* c-objc-common.cc (get_alias_set): Remove special case.
(get_aka_type): Add special case.
gcc/c-family/
* c-attribs.cc (handle_hardbool_attribute): Set TYPE_CANONICAL
for hardbools.
gcc/
* godump.cc (go_output_typedef): Use TYPE_MAIN_VARIANT instead
of TYPE_CANONICAL.
gcc/testsuite/
* gcc.dg/enum-alias-1.c: New test.
* gcc.dg/enum-alias-2.c: New test.
* gcc.dg/enum-alias-3.c: New test.
* gcc.dg/enum-alias-4.c: New test.
Diff:
---
gcc/c-family/c-attribs.cc | 1 +
gcc/c/c-decl.cc | 11 +--
gcc/c/c-objc-common.cc | 7 ++-
gcc/godump.cc | 10 +++---
gcc/testsuite/gcc.dg/enum-alias-1.c | 24
gcc/testsuite/gcc.dg/enum-alias-2.c | 25 +
gcc/testsuite/gcc.dg/enum-alias-3.c | 26 ++
gcc/testsuite/gcc.dg/enum-alias-4.c | 22 ++
8 files changed, 112 insertions(+), 14 deletions(-)
diff --git a/gcc/c-family/c-attribs.cc b/gcc/c-family/c-attribs.cc
index 605469dd7dd..e3833ed5f20 100644
--- a/gcc/c-family/c-attribs.cc
+++ b/gcc/c-family/c-attribs.cc
@@ -1074,6 +1074,7 @@ handle_hardbool_attribute (tree *node, tree name, tree
args,
TREE_SET_CODE (*node, ENUMERAL_TYPE);
ENUM_UNDERLYING_TYPE (*node) = orig;
+ TYPE_CANONICAL (*node) = TYPE_CANONICAL (orig);
tree false_value;
if (args)
diff --git a/gcc/c/c-decl.cc b/gcc/c/c-decl.cc
index b691b91b3db..6e6606c9570 100644
--- a/gcc/c/c-decl.cc
+++ b/gcc/c/c-decl.cc
@@ -5051,7 +5051,7 @@ shadow_tag_warned (const struct c_declspecs *declspecs,
int warned)
if (t == NULL_TREE)
{
t = make_node (code);
- if (flag_isoc23 && code != ENUMERAL_TYPE)
+ if (flag_isoc23 || code == ENUMERAL_TYPE)
SET_TYPE_STRUCTURAL_EQUALITY (t);
pushtag (input_location, name, t);
}
@@ -8828,7 +8828,7 @@ parser_xref_tag (location_t loc, enum tree_code code,
tree name,
the forward-reference will be altered into a real type. */
ref = make_node (code);
- if (flag_isoc23 && code != ENUMERAL_TYPE)
+ if (flag_isoc23 || code == ENUMERAL_TYPE)
SET_TYPE_STRUCTURAL_EQUALITY (ref);
if (code == ENUMERAL_TYPE)
{
@@ -9919,6 +9919,7 @@ start_enum (location_t loc, struct c_enum_contents
*the_enum, tree name,
{
enumtype = make_node (ENUMERAL_TYPE);
TYPE_SIZE (enumtype) = NULL_TREE;
+ SET_TYPE_STRUCTURAL_EQUALITY (enumtype);
pushtag (loc, name, enumtype);
if (fixed_underlying_type != NULL_TREE)
{
@@ -9935,6 +9936,8 @@ start_enum (location_t loc, struct c_enum_contents
*the_enum, tree name,
TYPE_SIZE (enumtype) = NULL_TREE;
TYPE_PRECISION (enumtype) = TYPE_PRECISION (fixed_underlying_type);
ENUM_UNDERLYING_TYPE (enumtype) = fixed_underlying_type;
+ TYPE_CANONICAL (enumtype) = TYPE_CANONICAL (fixed_underlying_type);
+ c_update_type_canonical (enumtype);
layout_type (enumtype);
}
}
@@ -10094,6 +10097,10 @@ finish_enum (tree enumtype, tree values, tree
attributes)
ENUM_UNDERLYING_TYPE (enumtype) =
c_common_type_for_size (TYPE_PRECISION (tem), TYPE_UNSIGNED (tem));
+ TYPE_CANONICAL (enumtype) =
+ TYPE_CANONICAL (ENUM_UNDERLYING_TYPE (enumtype));
+ c_update_type_canonical (enumtype);
+
layout_type (enumtype);
}
diff --git a/gcc/c/c-objc-common.cc b/gcc/c/c-objc-common.cc
index 42a62c84fe7..283f6a8ae26 100644
--- a/gcc/c/c-objc-common.cc
+++ b/gcc/c/c-objc-common.cc
@@ -130,6 +130,8 @@ get_aka_type (tree type)
result = get_aka_type (orig_type);
}
+ else if (TREE_CODE (type) == ENUMERAL_TYPE)
+return type;
else
{
tree canonical = TYPE_CANONICAL (type);
@@ -418,11 +420,6 @@ c_var_mod_p (tree x, tree fn ATTRIBUTE_UNUSED)
alias_set_type
[gcc r13-8811] i386: Fix ix86_option override after change [PR 113719]
https://gcc.gnu.org/g:173f8763a66622f2a70ad66f60573fcff7d6b49e
commit r13-8811-g173f8763a66622f2a70ad66f60573fcff7d6b49e
Author: Hongyu Wang
Date: Wed May 15 11:24:34 2024 +0800
i386: Fix ix86_option override after change [PR 113719]
In ix86_override_options_after_change, calls to ix86_default_align
and ix86_recompute_optlev_based_flags will cause mismatched target
opt_set when doing cl_optimization_restore. Move them back to
ix86_option_override_internal to solve the issue.
gcc/ChangeLog:
PR target/113719
* config/i386/i386-options.cc (ix86_override_options_after_change):
Remove call to ix86_default_align and
ix86_recompute_optlev_based_flags.
(ix86_option_override_internal): Call ix86_default_align and
ix86_recompute_optlev_based_flags.
(cherry picked from commit 499d00127d39ba894b0f7216d73660b380bdc325)
Diff:
---
gcc/config/i386/i386-options.cc | 10 +-
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/gcc/config/i386/i386-options.cc b/gcc/config/i386/i386-options.cc
index c1229475138..cdbe2dc6201 100644
--- a/gcc/config/i386/i386-options.cc
+++ b/gcc/config/i386/i386-options.cc
@@ -1875,11 +1875,6 @@ ix86_recompute_optlev_based_flags (struct gcc_options
*opts,
void
ix86_override_options_after_change (void)
{
- /* Default align_* from the processor table. */
- ix86_default_align (_options);
-
- ix86_recompute_optlev_based_flags (_options, _options_set);
-
/* Disable unrolling small loops when there's explicit
-f{,no}unroll-loop. */
if ((OPTION_SET_P (flag_unroll_loops))
@@ -2420,6 +2415,8 @@ ix86_option_override_internal (bool main_args_p,
set_ix86_tune_features (opts, ix86_tune, opts->x_ix86_dump_tunes);
+ ix86_recompute_optlev_based_flags (opts, opts_set);
+
ix86_override_options_after_change ();
ix86_tune_cost = processor_cost_table[ix86_tune];
@@ -2451,6 +2448,9 @@ ix86_option_override_internal (bool main_args_p,
|| TARGET_64BIT_P (opts->x_ix86_isa_flags))
opts->x_ix86_regparm = REGPARM_MAX;
+ /* Default align_* from the processor table. */
+ ix86_default_align (_options);
+
/* Provide default for -mbranch-cost= value. */
SET_OPTION_IF_UNSET (opts, opts_set, ix86_branch_cost,
ix86_tune_cost->branch_cost);
[gcc r14-10262] i386: Fix ix86_option override after change [PR 113719]
https://gcc.gnu.org/g:cd161b335c2723d0dce1cab00ad216b423ec2767
commit r14-10262-gcd161b335c2723d0dce1cab00ad216b423ec2767
Author: Hongyu Wang
Date: Wed May 15 11:24:34 2024 +0800
i386: Fix ix86_option override after change [PR 113719]
In ix86_override_options_after_change, calls to ix86_default_align
and ix86_recompute_optlev_based_flags will cause mismatched target
opt_set when doing cl_optimization_restore. Move them back to
ix86_option_override_internal to solve the issue.
gcc/ChangeLog:
PR target/113719
* config/i386/i386-options.cc (ix86_override_options_after_change):
Remove call to ix86_default_align and
ix86_recompute_optlev_based_flags.
(ix86_option_override_internal): Call ix86_default_align and
ix86_recompute_optlev_based_flags.
(cherry picked from commit 499d00127d39ba894b0f7216d73660b380bdc325)
Diff:
---
gcc/config/i386/i386-options.cc | 10 +-
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/gcc/config/i386/i386-options.cc b/gcc/config/i386/i386-options.cc
index ac48b5c61c4..d97464f2c74 100644
--- a/gcc/config/i386/i386-options.cc
+++ b/gcc/config/i386/i386-options.cc
@@ -1930,11 +1930,6 @@ ix86_recompute_optlev_based_flags (struct gcc_options
*opts,
void
ix86_override_options_after_change (void)
{
- /* Default align_* from the processor table. */
- ix86_default_align (_options);
-
- ix86_recompute_optlev_based_flags (_options, _options_set);
-
/* Disable unrolling small loops when there's explicit
-f{,no}unroll-loop. */
if ((OPTION_SET_P (flag_unroll_loops))
@@ -2530,6 +2525,8 @@ ix86_option_override_internal (bool main_args_p,
set_ix86_tune_features (opts, ix86_tune, opts->x_ix86_dump_tunes);
+ ix86_recompute_optlev_based_flags (opts, opts_set);
+
ix86_override_options_after_change ();
ix86_tune_cost = processor_cost_table[ix86_tune];
@@ -2565,6 +2562,9 @@ ix86_option_override_internal (bool main_args_p,
|| TARGET_64BIT_P (opts->x_ix86_isa_flags))
opts->x_ix86_regparm = REGPARM_MAX;
+ /* Default align_* from the processor table. */
+ ix86_default_align (_options);
+
/* Provide default for -mbranch-cost= value. */
SET_OPTION_IF_UNSET (opts, opts_set, ix86_branch_cost,
ix86_tune_cost->branch_cost);
[gcc r15-932] Rename double_u with __double_u to avoid pulluting the namespace.
https://gcc.gnu.org/g:3a873c0a7bc8183de95a6103b507101a25eed413
commit r15-932-g3a873c0a7bc8183de95a6103b507101a25eed413
Author: liuhongt
Date: Thu May 30 14:15:48 2024 +0800
Rename double_u with __double_u to avoid pulluting the namespace.
gcc/ChangeLog:
* config/i386/emmintrin.h (__double_u): Rename from double_u.
(_mm_load_sd): Replace double_u with __double_u.
(_mm_store_sd): Ditto.
(_mm_loadh_pd): Ditto.
(_mm_loadl_pd): Ditto.
* config/i386/xmmintrin.h (__float_u): Rename from float_u.
(_mm_load_ss): Ditto.
(_mm_store_ss): Ditto.
Diff:
---
gcc/config/i386/emmintrin.h | 10 +-
gcc/config/i386/xmmintrin.h | 6 +++---
2 files changed, 8 insertions(+), 8 deletions(-)
diff --git a/gcc/config/i386/emmintrin.h b/gcc/config/i386/emmintrin.h
index fa301103daf..356ca218fcb 100644
--- a/gcc/config/i386/emmintrin.h
+++ b/gcc/config/i386/emmintrin.h
@@ -56,7 +56,7 @@ typedef double __m128d __attribute__ ((__vector_size__ (16),
__may_alias__));
/* Unaligned version of the same types. */
typedef long long __m128i_u __attribute__ ((__vector_size__ (16),
__may_alias__, __aligned__ (1)));
typedef double __m128d_u __attribute__ ((__vector_size__ (16), __may_alias__,
__aligned__ (1)));
-typedef double double_u __attribute__ ((__may_alias__, __aligned__ (1)));
+typedef double __double_u __attribute__ ((__may_alias__, __aligned__ (1)));
/* Create a selector for use with the SHUFPD instruction. */
#define _MM_SHUFFLE2(fp1,fp0) \
@@ -146,7 +146,7 @@ _mm_load1_pd (double const *__P)
extern __inline __m128d __attribute__((__gnu_inline__, __always_inline__,
__artificial__))
_mm_load_sd (double const *__P)
{
- return __extension__ (__m128d) { *(double_u *)__P, 0.0 };
+ return __extension__ (__m128d) { *(__double_u *)__P, 0.0 };
}
extern __inline __m128d __attribute__((__gnu_inline__, __always_inline__,
__artificial__))
@@ -181,7 +181,7 @@ _mm_storeu_pd (double *__P, __m128d __A)
extern __inline void __attribute__((__gnu_inline__, __always_inline__,
__artificial__))
_mm_store_sd (double *__P, __m128d __A)
{
- *(double_u *)__P = ((__v2df)__A)[0] ;
+ *(__double_u *)__P = ((__v2df)__A)[0] ;
}
extern __inline double __attribute__((__gnu_inline__, __always_inline__,
__artificial__))
@@ -974,13 +974,13 @@ _mm_unpacklo_pd (__m128d __A, __m128d __B)
extern __inline __m128d __attribute__((__gnu_inline__, __always_inline__,
__artificial__))
_mm_loadh_pd (__m128d __A, double const *__B)
{
- return __extension__ (__m128d) { ((__v2df)__A)[0], *(double_u*)__B };
+ return __extension__ (__m128d) { ((__v2df)__A)[0], *(__double_u*)__B };
}
extern __inline __m128d __attribute__((__gnu_inline__, __always_inline__,
__artificial__))
_mm_loadl_pd (__m128d __A, double const *__B)
{
- return __extension__ (__m128d) { *(double_u*)__B, ((__v2df)__A)[1] };
+ return __extension__ (__m128d) { *(__double_u*)__B, ((__v2df)__A)[1] };
}
extern __inline int __attribute__((__gnu_inline__, __always_inline__,
__artificial__))
diff --git a/gcc/config/i386/xmmintrin.h b/gcc/config/i386/xmmintrin.h
index 87515ecb218..c90fc71331a 100644
--- a/gcc/config/i386/xmmintrin.h
+++ b/gcc/config/i386/xmmintrin.h
@@ -72,7 +72,7 @@ typedef float __m128 __attribute__ ((__vector_size__ (16),
__may_alias__));
/* Unaligned version of the same type. */
typedef float __m128_u __attribute__ ((__vector_size__ (16), __may_alias__,
__aligned__ (1)));
-typedef float float_u __attribute__ ((__may_alias__, __aligned__ (1)));
+typedef float __float_u __attribute__ ((__may_alias__, __aligned__ (1)));
/* Internal data types for implementing the intrinsics. */
typedef float __v4sf __attribute__ ((__vector_size__ (16)));
@@ -910,7 +910,7 @@ _mm_set_ps1 (float __F)
extern __inline __m128 __attribute__((__gnu_inline__, __always_inline__,
__artificial__))
_mm_load_ss (float const *__P)
{
- return __extension__ (__m128) (__v4sf){ *(float_u *)__P, 0.0f, 0.0f, 0.0f };
+ return __extension__ (__m128) (__v4sf){ *(__float_u *)__P, 0.0f, 0.0f, 0.0f
};
}
/* Create a vector with all four elements equal to *P. */
@@ -966,7 +966,7 @@ _mm_setr_ps (float __Z, float __Y, float __X, float __W)
extern __inline void __attribute__((__gnu_inline__, __always_inline__,
__artificial__))
_mm_store_ss (float *__P, __m128 __A)
{
- *(float_u *)__P = ((__v4sf)__A)[0];
+ *(__float_u *)__P = ((__v4sf)__A)[0];
}
extern __inline float __attribute__((__gnu_inline__, __always_inline__,
__artificial__))
[gcc r15-930] i386: Rewrite bswaphi2 handling [PR115102]
https://gcc.gnu.org/g:e715204f203d318524ae86f3f2a1e8d5d7cb08dc
commit r15-930-ge715204f203d318524ae86f3f2a1e8d5d7cb08dc
Author: Uros Bizjak
Date: Thu May 30 21:27:42 2024 +0200
i386: Rewrite bswaphi2 handling [PR115102]
Introduce *bswaphi2 instruction pattern and enable bswaphi2 expander
also for non-movbe targets. The testcase:
unsigned short bswap8 (unsigned short val)
{
return ((val & 0xff00) >> 8) | ((val & 0xff) << 8);
}
now expands through bswaphi2 named expander.
Rewrite bswaphi_lowpart insn pattern as bswaphisi2_lowpart in the RTX form
that combine pass can use to simplify:
Trying 6, 9, 8 -> 10:
6: r99:SI=bswap(r103:SI)
9: {r107:SI=r103:SI&0x;clobber flags:CC;}
REG_DEAD r103:SI
REG_UNUSED flags:CC
8: {r106:SI=r99:SI 0>>0x10;clobber flags:CC;}
REG_DEAD r99:SI
REG_UNUSED flags:CC
10: {r104:SI=r106:SI|r107:SI;clobber flags:CC;}
REG_DEAD r107:SI
REG_DEAD r106:SI
REG_UNUSED flags:CC
Successfully matched this instruction:
(set (reg:SI 104 [ _8 ])
(ior:SI (and:SI (reg/v:SI 103 [ val ])
(const_int -65536 [0x]))
(lshiftrt:SI (bswap:SI (reg/v:SI 103 [ val ]))
(const_int 16 [0x10]
allowing combination of insns 6, 8, 9 and 10
when compiling the following testcase:
unsigned int bswap8 (unsigned int val)
{
return (val & 0x) | ((val & 0xff00) >> 8) | ((val & 0xff) << 8);
}
to produce:
movl%edi, %eax
xchgb %ah, %al
ret
The expansion now always goes through a clobberless form of the bswaphi
instruction. The instruction is conditionally converted to a rotate at
peephole2 pass. This significantly simplifies bswaphisi2_lowpart
insn pattern attributes.
PR target/115102
gcc/ChangeLog:
* config/i386/i386.md (bswaphi2): Also enable for !TARGET_MOVBE.
(*bswaphi2): New insn pattern.
(bswaphisi2_lowpart): Rename from bswaphi_lowpart. Rewrite
insn RTX to match the expected form of the combine pass.
Remove rol{w} alternative and corresponding attributes.
(bswsaphisi2_lowpart peephole2): New peephole2 pattern to
conditionally convert bswaphisi2_lowpart to rotlhi3_1_slp.
(bswapsi2): Update expander for rename.
(rotlhi3_1_slp splitter): Conditionally split to bswaphi2.
gcc/testsuite/ChangeLog:
* gcc.target/i386/pr115102.c: New test.
Diff:
---
gcc/config/i386/i386.md | 77 +---
gcc/testsuite/gcc.target/i386/pr115102.c | 10 +
2 files changed, 60 insertions(+), 27 deletions(-)
diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md
index c162cd42386..375654cf74e 100644
--- a/gcc/config/i386/i386.md
+++ b/gcc/config/i386/i386.md
@@ -17210,9 +17210,7 @@
(clobber (reg:CC FLAGS_REG))]
"reload_completed
&& (TARGET_USE_XCHGB || optimize_function_for_size_p (cfun))"
- [(parallel [(set (strict_low_part (match_dup 0))
- (bswap:HI (match_dup 0)))
-(clobber (reg:CC FLAGS_REG))])])
+ [(set (match_dup 0) (bswap:HI (match_dup 0)))])
;; Rotations through carry flag
(define_insn "rcrsi2"
@@ -20730,12 +20728,11 @@
operands[1] = force_reg (SImode, operands[1]);
else
{
- rtx x = operands[0];
+ rtx x = gen_reg_rtx (SImode);
- emit_move_insn (x, operands[1]);
- emit_insn (gen_bswaphi_lowpart (gen_lowpart (HImode, x)));
+ emit_insn (gen_bswaphisi2_lowpart (x, operands[1]));
emit_insn (gen_rotlsi3 (x, x, GEN_INT (16)));
- emit_insn (gen_bswaphi_lowpart (gen_lowpart (HImode, x)));
+ emit_insn (gen_bswaphisi2_lowpart (operands[0], x));
DONE;
}
})
@@ -20767,7 +20764,11 @@
(define_expand "bswaphi2"
[(set (match_operand:HI 0 "register_operand")
(bswap:HI (match_operand:HI 1 "nonimmediate_operand")))]
- "TARGET_MOVBE")
+ ""
+{
+ if (!TARGET_MOVBE)
+operands[1] = force_reg (HImode, operands[1]);
+})
(define_insn "*bswaphi2_movbe"
[(set (match_operand:HI 0 "nonimmediate_operand" "=Q,r,m")
@@ -20788,33 +20789,55 @@
(set_attr "bdver1_decode" "double,*,*")
(set_attr "mode" "QI,HI,HI")])
+(define_insn "*bswaphi2"
+ [(set (match_operand:HI 0 "register_operand" "=Q")
+ (bswap:HI (match_operand:HI 1 "register_operand" "0")))]
+ "!TARGET_MOVBE"
+ "xchg{b}\t{%h0, %b0|%b0, %h0}"
+ [(set_attr "type" "imov")
+ (set_attr "pent_pair" "np")
+ (set_attr "athlon_decode" "vector")
+ (set_attr "amdfam10_decode" "double")
+ (set_attr "bdver1_decode" "double")
+ (set_attr "mode" "QI")])
+
(define_peephole2
[(set (match_operand:HI 0 "general_reg_operand")
(bswap:HI (match_dup 0)))]
-
[gcc r15-929] ira: Fix go_through_subreg offset calculation [PR115281]
https://gcc.gnu.org/g:46d931b3dd31cbba7c3355ada63f155aa24a4e2b
commit r15-929-g46d931b3dd31cbba7c3355ada63f155aa24a4e2b
Author: Richard Sandiford
Date: Thu May 30 16:17:58 2024 +0100
ira: Fix go_through_subreg offset calculation [PR115281]
go_through_subreg used:
else if (!can_div_trunc_p (SUBREG_BYTE (x),
REGMODE_NATURAL_SIZE (GET_MODE (x)), offset))
to calculate the register offset for a pseudo subreg x. In the blessed
days before poly-int, this was:
*offset = (SUBREG_BYTE (x) / REGMODE_NATURAL_SIZE (GET_MODE (x)));
But I think this is testing the wrong natural size. If we exclude
paradoxical subregs (which will get an offset of zero regardless),
it's the inner register that is being split, so it should be the
inner register's natural size that we use.
This matters in the testcase because we have an SFmode lowpart
subreg into the last of three variable-sized vectors. The
SUBREG_BYTE is therefore equal to the size of two variable-sized
vectors. Dividing by the vector size gives a register offset of 2,
as expected, but dividing by the size of a scalar FPR would give
a variable offset.
I think something similar could happen for fixed-size targets if
REGMODE_NATURAL_SIZE is different for vectors and integers (say),
although that case would trade an ICE for an incorrect offset.
gcc/
PR rtl-optimization/115281
* ira-conflicts.cc (go_through_subreg): Use the natural size of
the inner mode rather than the outer mode.
gcc/testsuite/
PR rtl-optimization/115281
* gfortran.dg/pr115281.f90: New test.
Diff:
---
gcc/ira-conflicts.cc | 3 ++-
gcc/testsuite/gfortran.dg/pr115281.f90 | 39 ++
2 files changed, 41 insertions(+), 1 deletion(-)
diff --git a/gcc/ira-conflicts.cc b/gcc/ira-conflicts.cc
index 83274c53330..15ac42d8848 100644
--- a/gcc/ira-conflicts.cc
+++ b/gcc/ira-conflicts.cc
@@ -227,8 +227,9 @@ go_through_subreg (rtx x, int *offset)
if (REGNO (reg) < FIRST_PSEUDO_REGISTER)
*offset = subreg_regno_offset (REGNO (reg), GET_MODE (reg),
SUBREG_BYTE (x), GET_MODE (x));
+ /* The offset is always 0 for paradoxical subregs. */
else if (!can_div_trunc_p (SUBREG_BYTE (x),
-REGMODE_NATURAL_SIZE (GET_MODE (x)), offset))
+REGMODE_NATURAL_SIZE (GET_MODE (reg)), offset))
/* Checked by validate_subreg. We must know at compile time which
inner hard registers are being accessed. */
gcc_unreachable ();
diff --git a/gcc/testsuite/gfortran.dg/pr115281.f90
b/gcc/testsuite/gfortran.dg/pr115281.f90
new file mode 100644
index 000..80aa822e745
--- /dev/null
+++ b/gcc/testsuite/gfortran.dg/pr115281.f90
@@ -0,0 +1,39 @@
+! { dg-options "-O3" }
+! { dg-additional-options "-mcpu=neoverse-v1" { target aarch64*-*-* } }
+
+SUBROUTINE fn0(ma, mb, nt)
+ CHARACTER ca
+ REAL r0(ma)
+ INTEGER i0(mb)
+ REAL r1(3,mb)
+ REAL r2(3,mb)
+ REAL r3(3,3)
+ zero=0.0
+ do na = 1, nt
+ nt = i0(na)
+ do l = 1, 3
+r1 (l, na) = r0 (nt)
+r2(l, na) = zero
+ enddo
+ enddo
+ if (ca .ne.'z') then
+ do j = 1, 3
+do i = 1, 3
+ r4 = zero
+enddo
+ enddo
+ do na = 1, nt
+do k = 1, 3
+ do l = 1, 3
+ do m = 1, 3
+ r3 = r4 * v
+ enddo
+ enddo
+enddo
+ do i = 1, 3
+ do k = 1, ifn (r3)
+ enddo
+enddo
+ enddo
+ endif
+END
[gcc r15-927] ggc: Reduce GGC_QUIRE_SIZE on Solaris/SPARC [PR115031]
https://gcc.gnu.org/g:32f99225bcaae9b792aec143239d17f2b7e2c54b commit r15-927-g32f99225bcaae9b792aec143239d17f2b7e2c54b Author: Rainer Orth Date: Thu May 30 15:00:59 2024 +0200 ggc: Reduce GGC_QUIRE_SIZE on Solaris/SPARC [PR115031] g++.dg/modules/pr99023_b.X currently FAILs on 32-bit Solaris/SPARC: FAIL: g++.dg/modules/pr99023_b.X -std=c++2a 1 blank line(s) in output FAIL: g++.dg/modules/pr99023_b.X -std=c++2a (test for excess errors) Excess errors: cc1plus: out of memory allocating 1048344 bytes after a total of 7913472 bytes It turns out that this exhaustion of the 32-bit address space happens due to a combination of three issues: * the SPARC pagesize of 8 kB, * ggc-page.cc's chunk size of 512 * pagesize, i.e. 4 MB, and * mmap adding two 8 kB unmapped red-zone pages to each mapping which result in the 4 MB mappings to actually consume 4.5 MB of address space. To avoid this, this patch reduces the chunk size so it remains at 4 MB even when combined with the red-zone pages, as recommended by mmap(2). Tested on sparc-sun-solaris2.11 and sparcv9-sun-solaris2.11. 2024-05-29 Rainer Orth gcc: PR c++/115031 * config/sparc/sol2.h (GGC_QUIRE_SIZE): Define as 510. Diff: --- gcc/config/sparc/sol2.h | 3 +++ 1 file changed, 3 insertions(+) diff --git a/gcc/config/sparc/sol2.h b/gcc/config/sparc/sol2.h index 552f58b2cc8..530e681aaee 100644 --- a/gcc/config/sparc/sol2.h +++ b/gcc/config/sparc/sol2.h @@ -38,6 +38,9 @@ along with GCC; see the file COPYING3. If not see #undef SPARC_DEFAULT_CMODEL #define SPARC_DEFAULT_CMODEL CM_MEDMID +/* Redue ggc-page.cc's chunk size to account for mmap red-zone pages. */ +#define GGC_QUIRE_SIZE 510 + /* Select a format to encode pointers in exception handling data. CODE is 0 for data, 1 for code labels, 2 for function pointers. GLOBAL is true if the symbol may be affected by dynamic relocations.
[gcc r15-926] analyzer: fix a -Wunused-parameter
https://gcc.gnu.org/g:0b3a3a66eb816b7c7e6bcb6f720813284e3eb0ef
commit r15-926-g0b3a3a66eb816b7c7e6bcb6f720813284e3eb0ef
Author: David Malcolm
Date: Thu May 30 08:42:01 2024 -0400
analyzer: fix a -Wunused-parameter
gcc/analyzer/ChangeLog:
* infinite-loop.cc (looping_back_event::get_desc): Fix unused
parameter warning introduced by me in r15-636-g770657d02c986c.
Signed-off-by: David Malcolm
Diff:
---
gcc/analyzer/infinite-loop.cc | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/gcc/analyzer/infinite-loop.cc b/gcc/analyzer/infinite-loop.cc
index 04346cdfdc3..a83b8130e43 100644
--- a/gcc/analyzer/infinite-loop.cc
+++ b/gcc/analyzer/infinite-loop.cc
@@ -171,7 +171,7 @@ public:
{
}
- label_text get_desc (bool can_colorize) const final override
+ label_text get_desc (bool) const final override
{
return label_text::borrow ("looping back...");
}
[gcc r15-925] Add new text_art::tree_widget and use it in analyzer
https://gcc.gnu.org/g:97238e4217d5cdc62686d86e784421bd0f76aa4a
commit r15-925-g97238e4217d5cdc62686d86e784421bd0f76aa4a
Author: David Malcolm
Date: Thu May 30 08:42:00 2024 -0400
Add new text_art::tree_widget and use it in analyzer
This patch adds a new text_art::tree_widget, which makes it easy
to generate hierarchical visualizations using either ASCII:
+- Child 0
| +- Grandchild 0 0
| +- Grandchild 0 1
| `- Grandchild 0 2
+- Child 1
| +- Grandchild 1 0
| +- Grandchild 1 1
| `- Grandchild 1 2
`- Child 2
+- Grandchild 2 0
+- Grandchild 2 1
`- Grandchild 2 2
or Unicode:
Root
├─ Child 0
│ ├─ Grandchild 0 0
│ ├─ Grandchild 0 1
│ ╰─ Grandchild 0 2
├─ Child 1
│ ├─ Grandchild 1 0
│ ├─ Grandchild 1 1
│ ╰─ Grandchild 1 2
╰─ Child 2
├─ Grandchild 2 0
├─ Grandchild 2 1
╰─ Grandchild 2 2
potentially with colorization of the connecting lines.
It adds a new template for typename T:
void text_art::dump (const T&);
for using this to dump any object to stderr that supports a
make_dump_widget method, with similar templates for dumping to
a pretty_printer * and a FILE *.
It uses this within the analyzer to add two new families of dumping
methods: one for program states, e.g.:
(gdb) call state->dump()
State
├─ Region Model
│ ├─ Current Frame: frame: ‘calls_malloc’@2
│ ├─ Store
│ │ ├─ m_called_unknown_fn: false
│ │ ├─ frame: ‘test’@1
│ │ │ ╰─ _1: (INIT_VAL(n_2(D))*(size_t)4)
│ │ ╰─ frame: ‘calls_malloc’@2
│ │ ├─ result_4: _ALLOCATED_REGION(27)
│ │ ╰─ _5: _ALLOCATED_REGION(27)
│ ╰─ Dynamic Extents
│ ╰─ HEAP_ALLOCATED_REGION(27): (INIT_VAL(n_2(D))*(size_t)4)
╰─ ‘malloc’ state machine
╰─ 0x468cb40: _ALLOCATED_REGION(27): unchecked ({free}) (‘result_4’)
and the other for showing the detail of the recursive makeup of svalues
and regions, e.g. the (INIT_VAL(n_2(D))*(size_t)4) from above:
(gdb) call size_in_bytes->dump()
(17): ‘long unsigned int’: binop_svalue(mult_expr: ‘*’)
├─ (15): ‘size_t’: initial_svalue
│ ╰─ m_reg: (12): ‘size_t’: decl_region(‘n_2(D)’)
│ ╰─ parent: (9): frame_region(‘test’, index: 0, depth: 1)
│╰─ parent: (1): stack region
│ ╰─ parent: (0): root region
╰─ (16): ‘size_t’: constant_svalue (‘4’)
I've already found both of these useful when debugging analyzer issues.
The patch uses the former to update the output of
-fdump-analyzer-exploded-nodes-2 and
-fdump-analyzer-exploded-nodes-3.
The older dumping functions within the analyzer are retained in case
they turn out to still be useful for debugging.
gcc/ChangeLog:
* Makefile.in (OBJS-libcommon): Add text-art/tree-widget.o.
* doc/analyzer.texi: Rewrite discussion of dumping state to
cover the text_art::tree_widget-based dumps, with a more
interesting example.
* text-art/dump-widget-info.h: New file.
* text-art/dump.h: New file.
* text-art/selftests.cc (selftest::text_art_tests): Call
text_art_tree_widget_cc_tests.
* text-art/selftests.h (selftest::text_art_tree_widget_cc_tests):
New decl.
* text-art/theme.cc (ascii_theme::get_cppchar): Handle the various
cell_kind::TREE_*.
(unicode_theme::get_cppchar): Likewise.
* text-art/theme.h (enum class theme::cell_kind): Add
TREE_CHILD_NON_FINAL, TREE_CHILD_FINAL, TREE_X_CONNECTOR, and
TREE_Y_CONNECTOR.
* text-art/tree-widget.cc: New file.
gcc/analyzer/ChangeLog:
* call-details.cc: Define INCLUDE_VECTOR.
* call-info.cc: Likewise.
* call-summary.cc: Likewise.
* checker-event.cc: Likewise.
* checker-path.cc: Likewise.
* complexity.cc: Likewise.
* constraint-manager.cc: Likewise.
(bounded_range::make_dump_widget): New.
(bounded_ranges::add_to_dump_widget): New.
(equiv_class::make_dump_widget): New.
(constraint::make_dump_widget): New.
(bounded_ranges_constraint::make_dump_widget): New.
(constraint_manager::make_dump_widget): New.
* constraint-manager.h (bounded_range::make_dump_widget): New
decl.
(bounded_ranges::add_to_dump_widget): New decl.
(equiv_class::make_dump_widget): New decl.
(constraint::make_dump_widget): New decl.
(bounded_ranges_constraint::make_dump_widget): New decl.
(constraint_manager::make_dump_widget): New decl.
* diagnostic-manager.cc: Define INCLUDE_VECTOR.
[gcc(refs/users/meissner/heads/work167-tar)] Update ChangeLog.*
https://gcc.gnu.org/g:f234f12040d1eb579c2de08a0fe2764cd6f87f0a commit f234f12040d1eb579c2de08a0fe2764cd6f87f0a Author: Michael Meissner Date: Thu May 30 08:36:03 2024 -0400 Update ChangeLog.* Diff: --- gcc/ChangeLog.tar | 26 ++ 1 file changed, 26 insertions(+) diff --git a/gcc/ChangeLog.tar b/gcc/ChangeLog.tar index 34207e707f6..9a2d05060e4 100644 --- a/gcc/ChangeLog.tar +++ b/gcc/ChangeLog.tar @@ -1,3 +1,29 @@ + Branch work167-tar, patch #207 + +Add wt to move constraints. + +2024-05-30 Michael Meissner + +gcc/ + + * config/rs6000/rs6000.md (mov_internal): Add wt to various move + constraints to support -m*spr debug switches. + (movcc_): Likewise. + (movsf_hardfloat): Likewise. + (movsd_hardfloat): Likewise. + (mov_hardfloat64): Likewise. + (mov_softfloat64): Likewise. + (*call_indirect_nonlocal_sysv): Add wt to call constraints. + (call_value_indirect_nonlocal_sysv): Likewise. + (call_indirect_aix): Likewise. + (call_value_indirect_aix): Likewise. + (call_indirect_elfv2): Likewise. + (call_indirect_pcrel): Likewise. + (call_value_indirect_elfv2): Likewise. + (call_value_indirect_pcrel): Likewise. + (sibcall_indirect_nonlocal_sysv): Likewise. + Branch work167-tar, patch #206 Add more SPR register debug options.
[gcc(refs/users/meissner/heads/work167-tar)] Add wt to move constraints.
https://gcc.gnu.org/g:6f640cba222d198bcd5a523df621e6d12b7e3901 commit 6f640cba222d198bcd5a523df621e6d12b7e3901 Author: Michael Meissner Date: Thu May 30 08:34:30 2024 -0400 Add wt to move constraints. 2024-05-30 Michael Meissner gcc/ * config/rs6000/rs6000.md (mov_internal): Add wt to various move constraints to support -m*spr debug switches. (movcc_): Likewise. (movsf_hardfloat): Likewise. (movsd_hardfloat): Likewise. (mov_hardfloat64): Likewise. (mov_softfloat64): Likewise. (*call_indirect_nonlocal_sysv): Add wt to call constraints. (call_value_indirect_nonlocal_sysv): Likewise. (call_indirect_aix): Likewise. (call_value_indirect_aix): Likewise. (call_indirect_elfv2): Likewise. (call_indirect_pcrel): Likewise. (call_value_indirect_elfv2): Likewise. (call_value_indirect_pcrel): Likewise. (sibcall_indirect_nonlocal_sysv): Likewise. Diff: --- gcc/config/rs6000/rs6000.md | 34 +- 1 file changed, 17 insertions(+), 17 deletions(-) diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md index 28f8ebee738..ba22a36b82e 100644 --- a/gcc/config/rs6000/rs6000.md +++ b/gcc/config/rs6000/rs6000.md @@ -8069,7 +8069,7 @@ [(set (match_operand:QHI 0 "nonimmediate_operand" "=r,r, wa,m, ?Z,r, wa,wa,wa,v, ?v,r, -wa,r, *c*l, *h") +wa,r, *wt*c*l, *h") (match_operand:QHI 1 "input_operand" "r, m, ?Z,r, wa,i, wa,O, wM,wB,wS,wa, @@ -8120,7 +8120,7 @@ (define_insn "*movcc_" [(set (match_operand:CC_any 0 "nonimmediate_operand" - "=y,x,?y,y,r,r,r,r, r,*c*l,r,m") + "=y,x,?y,y,r,r,r,r, r,*wt*c*l,r,m") (match_operand:CC_any 1 "general_operand" " y,r, r,O,x,y,r,I,*h, r,m,r"))] "register_operand (operands[0], mode) @@ -8210,7 +8210,7 @@ [(set (match_operand:SF 0 "nonimmediate_operand" "=!r, f, v, wa,m, wY, Z, m, wa, !r,f, wa, - !r,*c*l, !r, *h,wa") + !r,*wt*c*l, !r, *h,wa") (match_operand:SF 1 "input_operand" "m, m, wY, Z, f, v, wa,r, j, j, f, wa, @@ -8256,7 +8256,7 @@ (define_insn "movsd_hardfloat" [(set (match_operand:SD 0 "nonimmediate_operand" "=!r, d, m, ?Z,?d,?r, - f, !r,*c*l, !r,*h") + f, !r,*wt*c*l, !r,*h") (match_operand:SD 1 "input_operand" "m, ?Z,r, wx,r, d, f, r, r, *h,0"))] @@ -8286,7 +8286,7 @@ ;; LIS G-const. F/n-const NOP (define_insn "*mov_softfloat" [(set (match_operand:FMOVE32 0 "nonimmediate_operand" - "=r, *c*l, r, r, m, r, + "=r, *wt*c*l, r, r, m, r, r, r, r, *h") (match_operand:FMOVE32 1 "input_operand" @@ -8600,7 +8600,7 @@ [(set (match_operand:FMOVE64 0 "nonimmediate_operand" "=m, d, d, , wY, ,Z, , , !r, - YZ, r, !r, *c*l, !r, + YZ, r, !r, *wt*c*l,!r, *h, r, , wa") (match_operand:FMOVE64 1 "input_operand" "d, m, d, wY, , @@ -8652,7 +8652,7 @@ (define_insn "*mov_softfloat64" [(set (match_operand:FMOVE64 0 "nonimmediate_operand" - "=Y, r, r, *c*l, r, r, + "=Y, r, r, *wt*c*l, r, r, r, r, *h") (match_operand:FMOVE64 1 "input_operand" @@ -11501,7 +11501,7 @@ ;; which indicates how to set cr1 (define_insn "*call_indirect_nonlocal_sysv" - [(call (mem:SI (match_operand:P 0 "indirect_call_operand" "c,*l,X")) + [(call (mem:SI (match_operand:P 0 "indirect_call_operand" "wtc,*l,X")) (match_operand 1)) (use (match_operand:SI 2 "immediate_operand" "n,n,n")) (clobber (reg:P LR_REGNO))] @@ -11571,7 +11571,7 @@ (define_insn "*call_value_indirect_nonlocal_sysv" [(set (match_operand 0 "" "") - (call (mem:SI (match_operand:P 1
[gcc r15-924] libgomp.texi: Impl. update for USM and missing 5.2 item
https://gcc.gnu.org/g:370df6ef0fe6d99613050d33a18cc008be7ceca4
commit r15-924-g370df6ef0fe6d99613050d33a18cc008be7ceca4
Author: Tobias Burnus
Date: Thu May 30 13:21:43 2024 +0200
libgomp.texi: Impl. update for USM and missing 5.2 item
libgomp/ChangeLog:
* libgomp.texi (OpenMP 5.0 status): Mark 'requires' as done and
link to 'Offload-Target Specifics'.
(OpenMP 5.2 status): Add item about additional map-type modifiers
in 'declare mapper'.
Diff:
---
libgomp/libgomp.texi | 6 --
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/libgomp/libgomp.texi b/libgomp/libgomp.texi
index e79bd7a3392..d612488ad10 100644
--- a/libgomp/libgomp.texi
+++ b/libgomp/libgomp.texi
@@ -198,8 +198,8 @@ The OpenMP 4.5 specification is fully supported.
@item @var{target-offload-var} ICV and @code{OMP_TARGET_OFFLOAD}
env variable @tab Y @tab
@item Nested-parallel changes to @var{max-active-levels-var} ICV @tab Y @tab
-@item @code{requires} directive @tab P
- @tab complete but no non-host device provides
@code{unified_shared_memory}
+@item @code{requires} directive @tab Y
+ @tab See also @ref{Offload-Target Specifics}
@item @code{teams} construct outside an enclosing target region @tab Y @tab
@item Non-rectangular loop nests @tab P
@tab Full support for C/C++, partial for Fortran
@@ -443,6 +443,8 @@ to address of matching mapped list item per 5.1, Sect.
2.21.7.2 @tab N @tab
of the @code{interop} construct @tab N @tab
@item Invoke virtual member functions of C++ objects created on the host device
on other devices @tab N @tab
+@item @code{iterator} and @code{mapper} as map-type modifier in @code{declare
mappter}
+ @tab N @tab
@end multitable
[gcc r15-923] [testsuite] [powerpc] adjust -m32 counts for fold-vec-extract*
https://gcc.gnu.org/g:ac5c6c90a7f1f432fe19bc058d70b08967c25e3e
commit r15-923-gac5c6c90a7f1f432fe19bc058d70b08967c25e3e
Author: Alexandre Oliva
Date: Wed May 29 02:52:18 2024 -0300
[testsuite] [powerpc] adjust -m32 counts for fold-vec-extract*
Codegen changes caused add instruction count mismatches on
ppc-*-linux-gnu and other 32-bit ppc targets. At some point the
expected counts were adjusted for lp64, but ilp32 differences
remained, and published test results confirm it.
for gcc/testsuite/ChangeLog
PR testsuite/101169
* gcc.target/powerpc/fold-vec-extract-double.p7.c: Adjust addi
counts for ilp32.
* gcc.target/powerpc/fold-vec-extract-float.p7.c: Likewise.
* gcc.target/powerpc/fold-vec-extract-float.p8.c: Likewise.
* gcc.target/powerpc/fold-vec-extract-int.p7.c: Likewise.
* gcc.target/powerpc/fold-vec-extract-int.p8.c: Likewise.
* gcc.target/powerpc/fold-vec-extract-short.p7.c: Likewise.
* gcc.target/powerpc/fold-vec-extract-short.p8.c: Likewise.
Diff:
---
gcc/testsuite/gcc.target/powerpc/fold-vec-extract-double.p7.c | 5 ++---
gcc/testsuite/gcc.target/powerpc/fold-vec-extract-float.p7.c | 5 ++---
gcc/testsuite/gcc.target/powerpc/fold-vec-extract-float.p8.c | 3 +--
gcc/testsuite/gcc.target/powerpc/fold-vec-extract-int.p7.c| 3 +--
gcc/testsuite/gcc.target/powerpc/fold-vec-extract-int.p8.c| 3 +--
gcc/testsuite/gcc.target/powerpc/fold-vec-extract-short.p7.c | 3 +--
gcc/testsuite/gcc.target/powerpc/fold-vec-extract-short.p8.c | 3 +--
7 files changed, 9 insertions(+), 16 deletions(-)
diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-double.p7.c
b/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-double.p7.c
index 3cae644b90b..e69d9253e2d 100644
--- a/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-double.p7.c
+++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-double.p7.c
@@ -13,12 +13,11 @@
/* { dg-final { scan-assembler-times {\mxxpermdi\M} 1 } } */
/* { dg-final { scan-assembler-times {\mli\M} 1 } } */
/* -m32 target has an 'add' in place of one of the 'addi'. */
-/* { dg-final { scan-assembler-times {\maddi\M|\madd\M} 2 { target lp64 } } }
*/
-/* { dg-final { scan-assembler-times {\maddi\M|\madd\M} 3 { target ilp32 } } }
*/
+/* { dg-final { scan-assembler-times {\maddi?\M} 2 } } */
/* -m32 target has a rlwinm in place of a rldic . */
/* { dg-final { scan-assembler-times {\mrldic\M|\mrlwinm\M} 1 } } */
/* { dg-final { scan-assembler-times {\mstxvd2x\M} 1 } } */
-/* { dg-final { scan-assembler-times {\mlfdx\M|\mlfd\M} 1 } } */
+/* { dg-final { scan-assembler-times {\mlfdx?\M} 1 } } */
#include
diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-float.p7.c
b/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-float.p7.c
index f7c06e96109..ab03cd8adb0 100644
--- a/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-float.p7.c
+++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-float.p7.c
@@ -12,13 +12,12 @@
/* { dg-final { scan-assembler-times {\mxscvspdp\M} 1 } } */
/* { dg-final { scan-assembler-times {\mli\M} 1 } } */
/* -m32 as an add in place of an addi. */
-/* { dg-final { scan-assembler-times {\maddi\M|\madd\M} 2 { target lp64 } } }
*/
-/* { dg-final { scan-assembler-times {\maddi\M|\madd\M} 3 { target ilp32 } } }
*/
+/* { dg-final { scan-assembler-times {\maddi?\M} 2 } } */
/* { dg-final { scan-assembler-times {\mstxvd2x\M|\mstvx\M|\mstxv\M} 1 } } */
/* -m32 uses rlwinm in place of rldic */
/* { dg-final { scan-assembler-times {\mrldic\M|\mrlwinm\M} 1 } } */
/* -m32 has lfs in place of lfsx */
-/* { dg-final { scan-assembler-times {\mlfsx\M|\mlfs\M} 1 } } */
+/* { dg-final { scan-assembler-times {\mlfsx?\M} 1 } } */
#include
diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-float.p8.c
b/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-float.p8.c
index 6819d271c53..ce435d82c16 100644
--- a/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-float.p8.c
+++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-float.p8.c
@@ -24,9 +24,8 @@
/* { dg-final { scan-assembler-times {\mli\M} 1 { target ilp32 } } } */
/* { dg-final { scan-assembler-times {\mrlwinm\M} 1 { target ilp32 } } } */
/* { dg-final { scan-assembler-times {\mstxvd2x\M} 1 { target ilp32 } } } */
-/* { dg-final { scan-assembler-times {\madd\M} 1 { target ilp32 } } } */
/* { dg-final { scan-assembler-times {\mlfs\M} 1 { target ilp32 } } } */
-/* { dg-final { scan-assembler-times {\maddi\M} 2 { target ilp32 } } } */
+/* { dg-final { scan-assembler-times {\maddi?\M} 2 { target ilp32 } } } */
#include
diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-int.p7.c
b/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-int.p7.c
index 51636926953..20e3d253489 100644
--- a/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-int.p7.c
+++
[gcc r15-922] [testsuite] conditionalize dg-additional-sources on target and type
https://gcc.gnu.org/g:1d71818602f2a7f3b15a811fb20a84d2a177a8e5 commit r15-922-g1d71818602f2a7f3b15a811fb20a84d2a177a8e5 Author: Alexandre Oliva Date: Thu May 30 04:01:19 2024 -0300 [testsuite] conditionalize dg-additional-sources on target and type g++.dg/vect/pr95401.cc has dg-additional-sources, and that fails when check_vect_support_and_set_flags finds vector support lacking for execution tests: tests decay to compile tests, and additional sources are rejected by the compiler when compiling to a named output file. At first I considered using some effective target to conditionalize the additional sources. There was no support for target-specific additional sources, so I added that. But then, I found that adding an effective target to check whether the test involves linking would just make for busy work in this case, and so I went ahead and adjusted the handling of additional sources to refrain from adding them on compile tests, reporting them as unsupported. That solves the problem without using the newly-added machinery for per-target additional sources, but I figured since I'd implemented it I might as well contribute it, since there might be other uses for it. for gcc/ChangeLog * doc/sourcebuild.texi (dg-additional-sources): Document newly-added support for target selectors, and implicit discard on non-linking tests that name the compiler output explicitly. for gcc/testsuite/ChangeLog * lib/gcc-defs.exp (dg-additional-sources): Support target selectors. Make it cumulative. (dg-additional-files-options): Take dest and type. Note unsupported additional sources when not linking and naming the compiler output. Adjust source dirname prepending to cope with leading blanks. * lib/g++.exp (g++_target_compile): Pass dest and type on to dg-additional-files-options. * lib/gcc.exp (gcc_target_compile): Likewise. * lib/gdc.exp (gdb_target_compile): Likewise. * lib/gfortran.exp (gfortran_target_compile): Likewise. * lib/go.exp (go_target_compile): Likewise. * lib/obj-c++.exp (obj-c++_target_compile): Likewise. * lib/objc.exp (objc_target_compile): Likewise. * lib/rust.exp (rust_target_compile): Likewise. * lib/profopt.exp (profopt-execute): Likewise-ish. Diff:
[gcc r15-921] [libstdc++-v3] [rtems] enable filesystem support
https://gcc.gnu.org/g:5955c18dfb970740d55d432aeee5cb5a6f51cf65 commit r15-921-g5955c18dfb970740d55d432aeee5cb5a6f51cf65 Author: Alexandre Oliva Date: Thu May 30 04:01:15 2024 -0300 [libstdc++-v3] [rtems] enable filesystem support mkdir, chdir and chmod functions are defined in librtemscpu, that doesn't get linked in during libstdc++-v3 configure, but applications use -qrtems for linking, which brings those symbols in, so it makes sense to mark them as available so that the C++ filesystem APIs are enabled. for libstdc++-v3/ChangeLog * configure.ac [*-*-rtems*]: Set chdir, chmod and mkdir as available. * configure: Rebuilt. Diff: --- libstdc++-v3/configure| 7 +++ libstdc++-v3/configure.ac | 7 +++ 2 files changed, 14 insertions(+) diff --git a/libstdc++-v3/configure b/libstdc++-v3/configure index 5179cc507f1..5645e991af7 100755 --- a/libstdc++-v3/configure +++ b/libstdc++-v3/configure @@ -28610,6 +28610,13 @@ _ACEOF $as_echo "#define HAVE_USLEEP 1" >>confdefs.h + +# These functions are defined in librtemscpu. We don't use +# -qrtems during configure, so we don't link that in, and fail +# to find them. +glibcxx_cv_chdir=yes +glibcxx_cv_chmod=yes +glibcxx_cv_mkdir=yes ;; esac elif test "x$with_headers" != "xno"; then diff --git a/libstdc++-v3/configure.ac b/libstdc++-v3/configure.ac index 37396bd6ebb..ccb24a82be7 100644 --- a/libstdc++-v3/configure.ac +++ b/libstdc++-v3/configure.ac @@ -400,6 +400,13 @@ dnl # rather than hardcoding that information. AC_DEFINE(HAVE_SYMLINK) AC_DEFINE(HAVE_TRUNCATE) AC_DEFINE(HAVE_USLEEP) + +# These functions are defined in librtemscpu. We don't use +# -qrtems during configure, so we don't link that in, and fail +# to find them. +glibcxx_cv_chdir=yes +glibcxx_cv_chmod=yes +glibcxx_cv_mkdir=yes ;; esac elif test "x$with_headers" != "xno"; then
gcc-wwwdocs branch master updated. 614b76b185be56e74b607a92b49b359be5949565
This is an automated email from the git hooks/post-receive script. It was generated because a ref change was pushed to the repository containing the project "gcc-wwwdocs". The branch, master has been updated via 614b76b185be56e74b607a92b49b359be5949565 (commit) via ee01b4e9643cf1abe7c865d43dd5257a5b77b893 (commit) from ed119bf29bf7a0a0cf9ae9fb28fbd71f83ff9245 (commit) Those revisions listed above that are new to this repository have not appeared on any other notification email; so we list those revisions in full, below. - Log - commit 614b76b185be56e74b607a92b49b359be5949565 Author: Gerald Pfeifer Date: Thu May 30 10:59:38 2024 +0400 *: Use https to access gcc.gnu.org/onlinedocs diff --git a/htdocs/gcc-10/index.html b/htdocs/gcc-10/index.html index 5fb1e02e..fe1e4c07 100644 --- a/htdocs/gcc-10/index.html +++ b/htdocs/gcc-10/index.html @@ -28,31 +28,31 @@ GCC 10.4 relative to previous releases of GCC. GCC 10.5 July 7, 2023 (changes, - http://gcc.gnu.org/onlinedocs/10.5.0/;>documentation) + https://gcc.gnu.org/onlinedocs/10.5.0/;>documentation) GCC 10.4 June 28, 2022 (changes, - http://gcc.gnu.org/onlinedocs/10.4.0/;>documentation) + https://gcc.gnu.org/onlinedocs/10.4.0/;>documentation) GCC 10.3 April 8, 2021 (changes, - http://gcc.gnu.org/onlinedocs/10.3.0/;>documentation) + https://gcc.gnu.org/onlinedocs/10.3.0/;>documentation) GCC 10.2 July 23, 2020 (changes, - http://gcc.gnu.org/onlinedocs/10.2.0/;>documentation) + https://gcc.gnu.org/onlinedocs/10.2.0/;>documentation) GCC 10.1 May 7, 2020 (changes, - http://gcc.gnu.org/onlinedocs/10.1.0/;>documentation) + https://gcc.gnu.org/onlinedocs/10.1.0/;>documentation) @@ -66,7 +66,7 @@ GNU Compiler Collection. The GCC developers would like to thank the numerous people that have contributed new features, improvements, bug fixes, and other changes as well as test results to GCC. -This http://gcc.gnu.org/onlinedocs/gcc-10.1.0/gcc/Contributors.html;>amazing +This https://gcc.gnu.org/onlinedocs/gcc-10.1.0/gcc/Contributors.html;>amazing group of volunteers is what makes GCC successful. For additional information about GCC please refer to the diff --git a/htdocs/gcc-11/index.html b/htdocs/gcc-11/index.html index bb41c492..681da6a1 100644 --- a/htdocs/gcc-11/index.html +++ b/htdocs/gcc-11/index.html @@ -25,25 +25,25 @@ GCC 11.3 relative to previous releases of GCC. GCC 11.4 May 29, 2023 (changes, - http://gcc.gnu.org/onlinedocs/11.4.0/;>documentation) + https://gcc.gnu.org/onlinedocs/11.4.0/;>documentation) GCC 11.3 April 21, 2022 (changes, - http://gcc.gnu.org/onlinedocs/11.3.0/;>documentation) + https://gcc.gnu.org/onlinedocs/11.3.0/;>documentation) GCC 11.2 July 28, 2021 (changes, - http://gcc.gnu.org/onlinedocs/11.2.0/;>documentation) + https://gcc.gnu.org/onlinedocs/11.2.0/;>documentation) GCC 11.1 April 27, 2021 (changes, - http://gcc.gnu.org/onlinedocs/11.1.0/;>documentation) + https://gcc.gnu.org/onlinedocs/11.1.0/;>documentation) @@ -57,7 +57,7 @@ GNU Compiler Collection. The GCC developers would like to thank the numerous people that have contributed new features, improvements, bug fixes, and other changes as well as test results to GCC. -This http://gcc.gnu.org/onlinedocs/gcc-11.1.0/gcc/Contributors.html;>amazing +This https://gcc.gnu.org/onlinedocs/gcc-11.1.0/gcc/Contributors.html;>amazing group of volunteers is what makes GCC successful. For additional information about GCC please refer to the diff --git a/htdocs/gcc-12/index.html b/htdocs/gcc-12/index.html index a76ef1dc..3ba4df2b 100644 --- a/htdocs/gcc-12/index.html +++ b/htdocs/gcc-12/index.html @@ -25,19 +25,19 @@ GCC 12.2 relative to previous releases of GCC. GCC 12.3 May 8, 2023 (changes, - http://gcc.gnu.org/onlinedocs/12.3.0/;>documentation) + https://gcc.gnu.org/onlinedocs/12.3.0/;>documentation) GCC 12.2 Aug 19, 2022 (changes, - http://gcc.gnu.org/onlinedocs/12.2.0/;>documentation) + https://gcc.gnu.org/onlinedocs/12.2.0/;>documentation) GCC 12.1 May 6, 2022 (changes, - http://gcc.gnu.org/onlinedocs/12.1.0/;>documentation) + https://gcc.gnu.org/onlinedocs/12.1.0/;>documentation) @@ -51,7 +51,7 @@ GNU Compiler Collection. The GCC developers would like to thank the numerous people that have contributed new features, improvements, bug fixes, and other changes as well as test results to GCC. -This http://gcc.gnu.org/onlinedocs/gcc-12.1.0/gcc/Contributors.html;>amazing +This https://gcc.gnu.org/onlinedocs/gcc-12.1.0/gcc/Contributors.html;>amazing group of volunteers is what makes GCC successful. For additional information about GCC please refer to the diff --git a/htdocs/gcc-13/index.html b/htdocs/gcc-13/index.html index b04838db..ad1d5f1a 100644 ---
[gcc r15-920] Support vcond_mask_qiqi and friends.
https://gcc.gnu.org/g:b6c6d5abf0d31c936f50f8f9073c5e335b9e24b7
commit r15-920-gb6c6d5abf0d31c936f50f8f9073c5e335b9e24b7
Author: liuhongt
Date: Wed Feb 28 11:17:10 2024 +0800
Support vcond_mask_qiqi and friends.
gcc/ChangeLog:
* config/i386/sse.md (vcond_mask_): New expander.
gcc/testsuite/ChangeLog:
* gcc.target/i386/pr114125.c: New test.
Diff:
---
gcc/config/i386/sse.md | 20
gcc/testsuite/gcc.target/i386/pr114125.c | 10 ++
2 files changed, 30 insertions(+)
diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md
index 0f4fbcb2c5d..7cd912eeeb1 100644
--- a/gcc/config/i386/sse.md
+++ b/gcc/config/i386/sse.md
@@ -4807,6 +4807,26 @@
DONE;
})
+(define_expand "vcond_mask_"
+ [(match_operand:SWI1248_AVX512BW 0 "register_operand")
+ (match_operand:SWI1248_AVX512BW 1 "register_operand")
+ (match_operand:SWI1248_AVX512BW 2 "register_operand")
+ (match_operand:SWI1248_AVX512BW 3 "register_operand")]
+ "TARGET_AVX512F"
+{
+ /* (operand[1] & operand[3]) | (operand[2] & ~operand[3]) */
+ rtx op1 = gen_reg_rtx (mode);
+ rtx op2 = gen_reg_rtx (mode);
+ rtx op3 = gen_reg_rtx (mode);
+
+ emit_insn (gen_and3 (op1, operands[1], operands[3]));
+ emit_insn (gen_one_cmpl2 (op3, operands[3]));
+ emit_insn (gen_and3 (op2, operands[2], op3));
+ emit_insn (gen_ior3 (operands[0], op1, op2));
+
+ DONE;
+})
+
;
;;
;; Parallel floating point logical operations
diff --git a/gcc/testsuite/gcc.target/i386/pr114125.c
b/gcc/testsuite/gcc.target/i386/pr114125.c
new file mode 100644
index 000..e63fbffe965
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/pr114125.c
@@ -0,0 +1,10 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -march=x86-64-v4 -fdump-tree-forwprop3-raw " } */
+
+typedef long vec __attribute__((vector_size(16)));
+vec f(vec x){
+ vec y = x < 10;
+ return y & (y == 0);
+}
+
+/* { dg-final { scan-tree-dump-not "_expr" "forwprop3" } } */
