[gcc r15-2365] testsuite: Fix unaligned accesses in ipa-sra-8.c and ipa-sra-9.c
https://gcc.gnu.org/g:59c6d6a5b53d7b0e483a686f6b9db093bb77c064
commit r15-2365-g59c6d6a5b53d7b0e483a686f6b9db093bb77c064
Author: John David Anglin
Date: Sun Jul 28 13:34:54 2024 -0400
testsuite: Fix unaligned accesses in ipa-sra-8.c and ipa-sra-9.c
2024-07-28 John David Anglin
gcc/testsuite/ChangeLog:
PR testsuite/92550
* gcc.dg/ipa/ipa-sra-8.c: Change get_a argument type to SSS.
* gcc.dg/ipa/ipa-sra-9.c: Likewise.
Diff:
---
gcc/testsuite/gcc.dg/ipa/ipa-sra-8.c | 2 +-
gcc/testsuite/gcc.dg/ipa/ipa-sra-9.c | 4 +++-
2 files changed, 4 insertions(+), 2 deletions(-)
diff --git a/gcc/testsuite/gcc.dg/ipa/ipa-sra-8.c
b/gcc/testsuite/gcc.dg/ipa/ipa-sra-8.c
index 9e6e40ac54df..dd5c5d0c32b4 100644
--- a/gcc/testsuite/gcc.dg/ipa/ipa-sra-8.c
+++ b/gcc/testsuite/gcc.dg/ipa/ipa-sra-8.c
@@ -11,7 +11,7 @@ typedef SS __attribute__((aligned(1))) SSS;
static unsigned int __attribute__ ((noinline))
-get_a (SS s)
+get_a (SSS s)
{
return s.a;
};
diff --git a/gcc/testsuite/gcc.dg/ipa/ipa-sra-9.c
b/gcc/testsuite/gcc.dg/ipa/ipa-sra-9.c
index c5468cfbb76a..41d7ddd9fecb 100644
--- a/gcc/testsuite/gcc.dg/ipa/ipa-sra-9.c
+++ b/gcc/testsuite/gcc.dg/ipa/ipa-sra-9.c
@@ -7,6 +7,8 @@ typedef struct S {
unsigned a, b, c;
} SS;
+typedef SS __attribute__((aligned(1))) SSS;
+
typedef struct U {
SS s[2];
} UU;
@@ -14,7 +16,7 @@ typedef struct U {
typedef UU __attribute__((aligned(1))) UUU;
static unsigned int __attribute__ ((noinline))
-get_a (SS s)
+get_a (SSS s)
{
return s.a;
};
[gcc r15-1843] Skip 30_threads/future/members/poll.cc on hppa*-*-linux*
https://gcc.gnu.org/g:46ffda9bf19abeed95e9d758ed5e776ee221ee9e
commit r15-1843-g46ffda9bf19abeed95e9d758ed5e776ee221ee9e
Author: John David Anglin
Date: Thu Jul 4 09:16:18 2024 -0400
Skip 30_threads/future/members/poll.cc on hppa*-*-linux*
hppa*-*-linux* lacks high resolution timer support. Timer resolution
ranges from 1 to 10ms. As a result, a large number of iterations are
needed for the wait_for_0 and ready loops. This causes the
wait_until_sys_epoch and wait_until_steady_epoch loops to timeout.
There the loop wait time is determined by the timer resolution.
2024-07-04 John David Anglin
libstdc++-v3/ChangeLog:
PR libstdc++/98678
* testsuite/30_threads/future/members/poll.cc: Skip on
hppa*-*-linux*.
Diff:
---
libstdc++-v3/testsuite/30_threads/future/members/poll.cc | 1 +
1 file changed, 1 insertion(+)
diff --git a/libstdc++-v3/testsuite/30_threads/future/members/poll.cc
b/libstdc++-v3/testsuite/30_threads/future/members/poll.cc
index 4fa282bd87f..2bdbe7a48ce 100644
--- a/libstdc++-v3/testsuite/30_threads/future/members/poll.cc
+++ b/libstdc++-v3/testsuite/30_threads/future/members/poll.cc
@@ -19,6 +19,7 @@
// { dg-do run { target c++11 } }
// { dg-additional-options "-pthread" { target pthread } }
// { dg-require-gthreads "" }
+// { dg-skip-if "no high resolution timer support" { hppa*-*-linux* } }
#include
#include
[gcc r14-10376] Revert "Delete MALLOC_ABI_ALIGNMENT define from pa32-linux.h"
https://gcc.gnu.org/g:6e1fb1f9db3b722598a7332b92f4470a7bbc9c95 commit r14-10376-g6e1fb1f9db3b722598a7332b92f4470a7bbc9c95 Author: John David Anglin Date: Wed Jul 3 14:34:47 2024 -0400 Revert "Delete MALLOC_ABI_ALIGNMENT define from pa32-linux.h" This reverts commit 0ee3266b3dec4d984d43c79e2b3e649256e3eaaa. Diff: --- gcc/config/pa/pa32-linux.h | 5 + 1 file changed, 5 insertions(+) diff --git a/gcc/config/pa/pa32-linux.h b/gcc/config/pa/pa32-linux.h index 63abba26deb..187ae62b0f8 100644 --- a/gcc/config/pa/pa32-linux.h +++ b/gcc/config/pa/pa32-linux.h @@ -68,6 +68,11 @@ call_ ## FUNC (void) \ #undef WCHAR_TYPE_SIZE #define WCHAR_TYPE_SIZE BITS_PER_WORD +/* POSIX types such as pthread_mutex_t require 16-byte alignment to retain + layout compatibility with the original linux thread implementation. */ +#undef MALLOC_ABI_ALIGNMENT +#define MALLOC_ABI_ALIGNMENT 128 + /* Place jump tables in the text section except when generating non-PIC code. When generating non-PIC code, the relocations needed to load the address of the jump table result in a text label in the final executable
[gcc r15-1827] Revert "Delete MALLOC_ABI_ALIGNMENT define from pa32-linux.h"
https://gcc.gnu.org/g:ad2206d576603c94b0c1778c84b7f43fbf8a13b4 commit r15-1827-gad2206d576603c94b0c1778c84b7f43fbf8a13b4 Author: John David Anglin Date: Wed Jul 3 14:34:47 2024 -0400 Revert "Delete MALLOC_ABI_ALIGNMENT define from pa32-linux.h" This reverts commit 0ee3266b3dec4d984d43c79e2b3e649256e3eaaa. Diff: --- gcc/config/pa/pa32-linux.h | 5 + 1 file changed, 5 insertions(+) diff --git a/gcc/config/pa/pa32-linux.h b/gcc/config/pa/pa32-linux.h index 63abba26deb..187ae62b0f8 100644 --- a/gcc/config/pa/pa32-linux.h +++ b/gcc/config/pa/pa32-linux.h @@ -68,6 +68,11 @@ call_ ## FUNC (void) \ #undef WCHAR_TYPE_SIZE #define WCHAR_TYPE_SIZE BITS_PER_WORD +/* POSIX types such as pthread_mutex_t require 16-byte alignment to retain + layout compatibility with the original linux thread implementation. */ +#undef MALLOC_ABI_ALIGNMENT +#define MALLOC_ABI_ALIGNMENT 128 + /* Place jump tables in the text section except when generating non-PIC code. When generating non-PIC code, the relocations needed to load the address of the jump table result in a text label in the final executable
[gcc r11-11555] hppa: Fix ICE caused by mismatched predicate and constraint in xmpyu patterns
https://gcc.gnu.org/g:ce713016fb50796e906e39ba4244fbaf47ae77a9 commit r11-11555-gce713016fb50796e906e39ba4244fbaf47ae77a9 Author: John David Anglin Date: Sun Jun 30 09:48:21 2024 -0400 hppa: Fix ICE caused by mismatched predicate and constraint in xmpyu patterns 2024-06-30 John David Anglin gcc/ChangeLog: PR target/115691 * config/pa/pa.md: Remove incorrect xmpyu patterns. Diff: --- gcc/config/pa/pa.md | 18 -- 1 file changed, 18 deletions(-) diff --git a/gcc/config/pa/pa.md b/gcc/config/pa/pa.md index b252486fa94..072e62455d8 100644 --- a/gcc/config/pa/pa.md +++ b/gcc/config/pa/pa.md @@ -5493,24 +5493,6 @@ [(set_attr "type" "fpmuldbl") (set_attr "length" "4")]) -(define_insn "" - [(set (match_operand:DI 0 "register_operand" "=f") - (mult:DI (zero_extend:DI (match_operand:SI 1 "register_operand" "f")) -(match_operand:DI 2 "uint32_operand" "f")))] - "TARGET_PA_11 && ! TARGET_SOFT_FLOAT && ! TARGET_SOFT_MULT && !TARGET_64BIT" - "xmpyu %1,%R2,%0" - [(set_attr "type" "fpmuldbl") - (set_attr "length" "4")]) - -(define_insn "" - [(set (match_operand:DI 0 "register_operand" "=f") - (mult:DI (zero_extend:DI (match_operand:SI 1 "register_operand" "f")) -(match_operand:DI 2 "uint32_operand" "f")))] - "TARGET_PA_11 && ! TARGET_SOFT_FLOAT && ! TARGET_SOFT_MULT && TARGET_64BIT" - "xmpyu %1,%2R,%0" - [(set_attr "type" "fpmuldbl") - (set_attr "length" "4")]) - (define_insn "" [(set (reg:SI 29) (mult:SI (reg:SI 26) (reg:SI 25))) (clobber (match_operand:SI 0 "register_operand" "=a"))
[gcc r12-10597] hppa: Fix ICE caused by mismatched predicate and constraint in xmpyu patterns
https://gcc.gnu.org/g:0c98d9479cec88148eb3be8d0098e36bce061cd6 commit r12-10597-g0c98d9479cec88148eb3be8d0098e36bce061cd6 Author: John David Anglin Date: Sun Jun 30 09:48:21 2024 -0400 hppa: Fix ICE caused by mismatched predicate and constraint in xmpyu patterns 2024-06-30 John David Anglin gcc/ChangeLog: PR target/115691 * config/pa/pa.md: Remove incorrect xmpyu patterns. Diff: --- gcc/config/pa/pa.md | 18 -- 1 file changed, 18 deletions(-) diff --git a/gcc/config/pa/pa.md b/gcc/config/pa/pa.md index d82f168c8a3..43241958722 100644 --- a/gcc/config/pa/pa.md +++ b/gcc/config/pa/pa.md @@ -5493,24 +5493,6 @@ [(set_attr "type" "fpmuldbl") (set_attr "length" "4")]) -(define_insn "" - [(set (match_operand:DI 0 "register_operand" "=f") - (mult:DI (zero_extend:DI (match_operand:SI 1 "register_operand" "f")) -(match_operand:DI 2 "uint32_operand" "f")))] - "TARGET_PA_11 && ! TARGET_SOFT_FLOAT && ! TARGET_SOFT_MULT && !TARGET_64BIT" - "xmpyu %1,%R2,%0" - [(set_attr "type" "fpmuldbl") - (set_attr "length" "4")]) - -(define_insn "" - [(set (match_operand:DI 0 "register_operand" "=f") - (mult:DI (zero_extend:DI (match_operand:SI 1 "register_operand" "f")) -(match_operand:DI 2 "uint32_operand" "f")))] - "TARGET_PA_11 && ! TARGET_SOFT_FLOAT && ! TARGET_SOFT_MULT && TARGET_64BIT" - "xmpyu %1,%2R,%0" - [(set_attr "type" "fpmuldbl") - (set_attr "length" "4")]) - (define_insn "" [(set (reg:SI 29) (mult:SI (reg:SI 26) (reg:SI 25))) (clobber (match_operand:SI 0 "register_operand" "=a"))
[gcc r13-8888] hppa: Fix ICE caused by mismatched predicate and constraint in xmpyu patterns
https://gcc.gnu.org/g:ecd6ebe5fb0151f9649705a5798325032bbc811a commit r13--gecd6ebe5fb0151f9649705a5798325032bbc811a Author: John David Anglin Date: Sun Jun 30 09:48:21 2024 -0400 hppa: Fix ICE caused by mismatched predicate and constraint in xmpyu patterns 2024-06-30 John David Anglin gcc/ChangeLog: PR target/115691 * config/pa/pa.md: Remove incorrect xmpyu patterns. Diff: --- gcc/config/pa/pa.md | 18 -- 1 file changed, 18 deletions(-) diff --git a/gcc/config/pa/pa.md b/gcc/config/pa/pa.md index 36d20576102..d832a29683c 100644 --- a/gcc/config/pa/pa.md +++ b/gcc/config/pa/pa.md @@ -5493,24 +5493,6 @@ [(set_attr "type" "fpmuldbl") (set_attr "length" "4")]) -(define_insn "" - [(set (match_operand:DI 0 "register_operand" "=f") - (mult:DI (zero_extend:DI (match_operand:SI 1 "register_operand" "f")) -(match_operand:DI 2 "uint32_operand" "f")))] - "TARGET_PA_11 && ! TARGET_SOFT_FLOAT && ! TARGET_SOFT_MULT && !TARGET_64BIT" - "xmpyu %1,%R2,%0" - [(set_attr "type" "fpmuldbl") - (set_attr "length" "4")]) - -(define_insn "" - [(set (match_operand:DI 0 "register_operand" "=f") - (mult:DI (zero_extend:DI (match_operand:SI 1 "register_operand" "f")) -(match_operand:DI 2 "uint32_operand" "f")))] - "TARGET_PA_11 && ! TARGET_SOFT_FLOAT && ! TARGET_SOFT_MULT && TARGET_64BIT" - "xmpyu %1,%2R,%0" - [(set_attr "type" "fpmuldbl") - (set_attr "length" "4")]) - (define_insn "" [(set (reg:SI 29) (mult:SI (reg:SI 26) (reg:SI 25))) (clobber (match_operand:SI 0 "register_operand" "=a"))
[gcc r14-10375] hppa: Fix ICE caused by mismatched predicate and constraint in xmpyu patterns
https://gcc.gnu.org/g:acde9f81da39450b90e12ccf937d35aa8da1b478 commit r14-10375-gacde9f81da39450b90e12ccf937d35aa8da1b478 Author: John David Anglin Date: Sun Jun 30 09:48:21 2024 -0400 hppa: Fix ICE caused by mismatched predicate and constraint in xmpyu patterns 2024-06-30 John David Anglin gcc/ChangeLog: PR target/115691 * config/pa/pa.md: Remove incorrect xmpyu patterns. Diff: --- gcc/config/pa/pa.md | 18 -- 1 file changed, 18 deletions(-) diff --git a/gcc/config/pa/pa.md b/gcc/config/pa/pa.md index b0f29a44bae..9e410f43052 100644 --- a/gcc/config/pa/pa.md +++ b/gcc/config/pa/pa.md @@ -5503,24 +5503,6 @@ [(set_attr "type" "fpmuldbl") (set_attr "length" "4")]) -(define_insn "" - [(set (match_operand:DI 0 "register_operand" "=f") - (mult:DI (zero_extend:DI (match_operand:SI 1 "register_operand" "f")) -(match_operand:DI 2 "uint32_operand" "f")))] - "TARGET_PA_11 && ! TARGET_SOFT_FLOAT && ! TARGET_SOFT_MULT && !TARGET_64BIT" - "xmpyu %1,%R2,%0" - [(set_attr "type" "fpmuldbl") - (set_attr "length" "4")]) - -(define_insn "" - [(set (match_operand:DI 0 "register_operand" "=f") - (mult:DI (zero_extend:DI (match_operand:SI 1 "register_operand" "f")) -(match_operand:DI 2 "uint32_operand" "f")))] - "TARGET_PA_11 && ! TARGET_SOFT_FLOAT && ! TARGET_SOFT_MULT && TARGET_64BIT" - "xmpyu %1,%2R,%0" - [(set_attr "type" "fpmuldbl") - (set_attr "length" "4")]) - (define_insn "" [(set (reg:SI 29) (mult:SI (reg:SI 26) (reg:SI 25))) (clobber (match_operand:SI 0 "register_operand" "=a"))
[gcc r15-1731] hppa: Fix ICE caused by mismatched predicate and constraint in xmpyu patterns
https://gcc.gnu.org/g:30ad2fafa9ab2497cc12df62a3240cff6ef25d00 commit r15-1731-g30ad2fafa9ab2497cc12df62a3240cff6ef25d00 Author: John David Anglin Date: Sun Jun 30 09:48:21 2024 -0400 hppa: Fix ICE caused by mismatched predicate and constraint in xmpyu patterns 2024-06-30 John David Anglin gcc/ChangeLog: PR target/115691 * config/pa/pa.md: Remove incorrect xmpyu patterns. Diff: --- gcc/config/pa/pa.md | 18 -- 1 file changed, 18 deletions(-) diff --git a/gcc/config/pa/pa.md b/gcc/config/pa/pa.md index b0f29a44bae..9e410f43052 100644 --- a/gcc/config/pa/pa.md +++ b/gcc/config/pa/pa.md @@ -5503,24 +5503,6 @@ [(set_attr "type" "fpmuldbl") (set_attr "length" "4")]) -(define_insn "" - [(set (match_operand:DI 0 "register_operand" "=f") - (mult:DI (zero_extend:DI (match_operand:SI 1 "register_operand" "f")) -(match_operand:DI 2 "uint32_operand" "f")))] - "TARGET_PA_11 && ! TARGET_SOFT_FLOAT && ! TARGET_SOFT_MULT && !TARGET_64BIT" - "xmpyu %1,%R2,%0" - [(set_attr "type" "fpmuldbl") - (set_attr "length" "4")]) - -(define_insn "" - [(set (match_operand:DI 0 "register_operand" "=f") - (mult:DI (zero_extend:DI (match_operand:SI 1 "register_operand" "f")) -(match_operand:DI 2 "uint32_operand" "f")))] - "TARGET_PA_11 && ! TARGET_SOFT_FLOAT && ! TARGET_SOFT_MULT && TARGET_64BIT" - "xmpyu %1,%2R,%0" - [(set_attr "type" "fpmuldbl") - (set_attr "length" "4")]) - (define_insn "" [(set (reg:SI 29) (mult:SI (reg:SI 26) (reg:SI 25))) (clobber (match_operand:SI 0 "register_operand" "=a"))
[gcc r14-9714] Fix failure of c-c++-common/analyzer/stdarg-pr111289-int.c on hpux
https://gcc.gnu.org/g:86b0b1bec6790f84b7a56fcef2a0a6c8cd91ffef commit r14-9714-g86b0b1bec6790f84b7a56fcef2a0a6c8cd91ffef Author: John David Anglin Date: Thu Mar 28 18:32:12 2024 + Fix failure of c-c++-common/analyzer/stdarg-pr111289-int.c on hpux 2024-03-28 John David Anglin gcc/testsuite/ChangeLog: PR analyzer/111289 * c-c++-common/analyzer/stdarg-pr111289-int.c: Don't include . Diff: --- gcc/testsuite/c-c++-common/analyzer/stdarg-pr111289-int.c | 1 - 1 file changed, 1 deletion(-) diff --git a/gcc/testsuite/c-c++-common/analyzer/stdarg-pr111289-int.c b/gcc/testsuite/c-c++-common/analyzer/stdarg-pr111289-int.c index 33d83169c3e..8faa58c9480 100644 --- a/gcc/testsuite/c-c++-common/analyzer/stdarg-pr111289-int.c +++ b/gcc/testsuite/c-c++-common/analyzer/stdarg-pr111289-int.c @@ -1,6 +1,5 @@ #include #include -#include typedef unsigned int mode_t;
[gcc r14-9645] hppa: Fix LO_SUM DLTIND14R address support in PRINT_OPERAND_ADDRESS
https://gcc.gnu.org/g:2e4b3374cb7af10e188bb5100526ad3150b9b272
commit r14-9645-g2e4b3374cb7af10e188bb5100526ad3150b9b272
Author: John David Anglin
Date: Sat Mar 23 13:47:31 2024 +
hppa: Fix LO_SUM DLTIND14R address support in PRINT_OPERAND_ADDRESS
This bug was hidden since LO_SUM DLTIND14R addresses are normally
handled by the A constraint in the move patterns.
2024-03-23 John David Anglin
gcc/ChangeLog:
* config/pa/pa.cc (pa_output_global_address): Handle
UNSPEC_DLTIND14R addresses.
* config/pa/pa.h (PRINT_OPERAND_ADDRESS): Output "RT'" for
UNSPEC_DLTIND14R address.
Diff:
---
gcc/config/pa/pa.cc | 7 ++-
gcc/config/pa/pa.h | 7 +--
2 files changed, 11 insertions(+), 3 deletions(-)
diff --git a/gcc/config/pa/pa.cc b/gcc/config/pa/pa.cc
index d7666103de8..a7af6b8c121 100644
--- a/gcc/config/pa/pa.cc
+++ b/gcc/config/pa/pa.cc
@@ -5784,7 +5784,12 @@ pa_output_global_address (FILE *file, rtx x, int
round_constant)
if (GET_CODE (x) == HIGH)
x = XEXP (x, 0);
- if (GET_CODE (x) == SYMBOL_REF && read_only_operand (x, VOIDmode))
+ if (GET_CODE (x) == UNSPEC && XINT (x, 1) == UNSPEC_DLTIND14R)
+{
+ x = XVECEXP (x, 0, 0);
+ output_addr_const (file, x);
+}
+ else if (GET_CODE (x) == SYMBOL_REF && read_only_operand (x, VOIDmode))
output_addr_const (file, x);
else if (GET_CODE (x) == SYMBOL_REF && !flag_pic)
{
diff --git a/gcc/config/pa/pa.h b/gcc/config/pa/pa.h
index 403f16c5cb5..127a0d1966d 100644
--- a/gcc/config/pa/pa.h
+++ b/gcc/config/pa/pa.h
@@ -1247,12 +1247,15 @@ do {
\
reg_names [REGNO (XEXP (addr, 0))]); \
break; \
case LO_SUM: \
- if (!symbolic_operand (XEXP (addr, 1), VOIDmode))
\
+ if (GET_CODE (XEXP (addr, 1)) == UNSPEC \
+ && XINT (XEXP (addr, 1), 1) == UNSPEC_DLTIND14R) \
+ fputs ("RT'", FILE);\
+ else if (!symbolic_operand (XEXP (addr, 1), VOIDmode)) \
fputs ("R'", FILE); \
else if (flag_pic == 0) \
fputs ("RR'", FILE);\
else \
- fputs ("RT'", FILE);\
+ gcc_unreachable (); \
pa_output_global_address (FILE, XEXP (addr, 1), 0); \
fputs ("(", FILE); \
output_operand (XEXP (addr, 0), 0); \
[gcc r14-9511] hppa: Improve handling of REG+D addresses when generating PA 2.0 code
https://gcc.gnu.org/g:f0fda1aff0b752e4182c009c5526b9306bd35f7c
commit r14-9511-gf0fda1aff0b752e4182c009c5526b9306bd35f7c
Author: John David Anglin
Date: Mon Mar 18 00:19:36 2024 +
hppa: Improve handling of REG+D addresses when generating PA 2.0 code
In looking at PR 112415, it became clear that improvements could be
made in the handling of loads and stores using REG+D addresses. A
change in 2002 conflated two issues:
1) We can't generate insns with 14-bit displacements before reload
completes when generating PA 1.x code since floating-point loads and
stores only support 5-bit offsets in PA 1.x.
2) The GNU ELF 32-bit linker lacks relocation support for PA 2.0
floating point instructions with 14-bit displacements. These
relocations affect instructions with symbolic references.
The result of the change was to block creation of PA 2.0 instructions
with 14-bit REG_D displacements for SImode, DImode, SFmode and DFmode
on the GNU linux target before reload. This was unnecessary as these
instructions don't need relocation.
This change revises the INT14_OK_STRICT define to allow creation
of instructions with 14-bit REG+D addresses before reload when
generating PA 2.0 code.
2024-03-17 John David Anglin
gcc/ChangeLog:
PR rtl-optimization/112415
* config/pa/pa.cc (pa_emit_move_sequence): Revise condition
for symbolic memory operands.
(pa_legitimate_address_p): Revise LO_SUM condition.
* config/pa/pa.h (INT14_OK_STRICT): Revise define. Move
comment about GNU linker to predicates.md.
* config/pa/predicates.md (floating_point_store_memory_operand):
Revise condition for symbolic memory operands. Update
comment.
Diff:
---
gcc/config/pa/pa.cc | 18 --
gcc/config/pa/pa.h | 15 ++-
gcc/config/pa/predicates.md | 17 +++--
3 files changed, 25 insertions(+), 25 deletions(-)
diff --git a/gcc/config/pa/pa.cc b/gcc/config/pa/pa.cc
index 5ab9eff4b5e..d7666103de8 100644
--- a/gcc/config/pa/pa.cc
+++ b/gcc/config/pa/pa.cc
@@ -2039,7 +2039,8 @@ pa_emit_move_sequence (rtx *operands, machine_mode mode,
rtx scratch_reg)
op1 = replace_equiv_address (op1, scratch_reg);
}
}
- else if ((!INT14_OK_STRICT && symbolic_memory_operand (op1, VOIDmode))
+ else if (((TARGET_ELF32 || !TARGET_PA_20)
+ && symbolic_memory_operand (op1, VOIDmode))
|| IS_LO_SUM_DLT_ADDR_P (XEXP (op1, 0))
|| IS_INDEX_ADDR_P (XEXP (op1, 0)))
{
@@ -2088,7 +2089,8 @@ pa_emit_move_sequence (rtx *operands, machine_mode mode,
rtx scratch_reg)
op0 = replace_equiv_address (op0, scratch_reg);
}
}
- else if ((!INT14_OK_STRICT && symbolic_memory_operand (op0, VOIDmode))
+ else if (((TARGET_ELF32 || !TARGET_PA_20)
+ && symbolic_memory_operand (op0, VOIDmode))
|| IS_LO_SUM_DLT_ADDR_P (XEXP (op0, 0))
|| IS_INDEX_ADDR_P (XEXP (op0, 0)))
{
@@ -11038,18 +11040,22 @@ pa_legitimate_address_p (machine_mode mode, rtx x,
bool strict, code_helper)
&& (strict ? STRICT_REG_OK_FOR_BASE_P (y)
: REG_OK_FOR_BASE_P (y)))
{
+ y = XEXP (x, 1);
+
/* Needed for -fPIC */
if (mode == Pmode
- && GET_CODE (XEXP (x, 1)) == UNSPEC)
+ && GET_CODE (y) == UNSPEC)
return true;
- if (!INT14_OK_STRICT
- && (strict || !(reload_in_progress || reload_completed))
+ /* Before reload, we need support for 14-bit floating
+point loads and stores, and associated relocations. */
+ if ((TARGET_ELF32 || !INT14_OK_STRICT)
+ && !reload_completed
&& mode != QImode
&& mode != HImode)
return false;
- if (CONSTANT_P (XEXP (x, 1)))
+ if (CONSTANT_P (y))
return true;
}
return false;
diff --git a/gcc/config/pa/pa.h b/gcc/config/pa/pa.h
index 7abaeae269e..403f16c5cb5 100644
--- a/gcc/config/pa/pa.h
+++ b/gcc/config/pa/pa.h
@@ -828,19 +828,8 @@ extern int may_call_alloca;
/* Nonzero if 14-bit offsets can be used for all loads and stores.
This is not possible when generating PA 1.x code as floating point
- accesses only support 5-bit offsets. Note that we do not forbid
- the use of 14-bit offsets prior to reload. Instead, we use secondary
- reloads to fix REG+D memory addresses for floating-point accesses.
-
- FIXME: the GNU ELF linker clobbers the LSB of the FP register number
- in PA 2.0 floating-point insns with long displacements. This is
- because R_PARISC_DPREL14WR and other relocations like it are not
- yet supported by GNU ld. For now, we reject long displacements
- on this
[gcc r14-9508] hppa: Fix complaint about non-delegitimized UNSPEC UNSPEC_TP
https://gcc.gnu.org/g:8064107535328717aeb78418edf778559cd5c3ac
commit r14-9508-g8064107535328717aeb78418edf778559cd5c3ac
Author: John David Anglin
Date: Sun Mar 17 16:38:48 2024 +
hppa: Fix complaint about non-delegitimized UNSPEC UNSPEC_TP
2024-03-17 John David Anglin
gcc/ChangeLog:
* config/pa/pa.cc (pa_delegitimize_address): Delegitimize UNSPEC_TP.
Diff:
---
gcc/config/pa/pa.cc | 8 +++-
1 file changed, 7 insertions(+), 1 deletion(-)
diff --git a/gcc/config/pa/pa.cc b/gcc/config/pa/pa.cc
index 129289f8e62..5ab9eff4b5e 100644
--- a/gcc/config/pa/pa.cc
+++ b/gcc/config/pa/pa.cc
@@ -10707,7 +10707,13 @@ pa_trampoline_adjust_address (rtx addr)
static rtx
pa_delegitimize_address (rtx orig_x)
{
- rtx x = delegitimize_mem_from_attrs (orig_x);
+ rtx x;
+
+ if (GET_CODE (orig_x) == UNSPEC
+ && XINT (orig_x, 1) == UNSPEC_TP)
+orig_x = XVECEXP (orig_x, 0, 0);
+
+ x = delegitimize_mem_from_attrs (orig_x);
if (GET_CODE (x) == LO_SUM
&& GET_CODE (XEXP (x, 1)) == UNSPEC
[gcc r14-9482] hppa: Fix REG+D address support before reload
https://gcc.gnu.org/g:53fd0f5b1fd737a208c12909fa1188281cb370a3 commit r14-9482-g53fd0f5b1fd737a208c12909fa1188281cb370a3 Author: John David Anglin Date: Thu Mar 14 18:32:56 2024 + hppa: Fix REG+D address support before reload When generating PA 1.x code or code for GNU ld, floating-point accesses only support 5-bit displacements but integer accesses support 14-bit displacements. I mistakenly assumed reload could fix an invalid 14-bit displacement in a floating-point access but this is not the case. 2024-03-14 John David Anglin gcc/ChangeLog: PR target/114288 * config/pa/pa.cc (pa_legitimate_address_p): Don't allow 14-bit displacements before reload for modes that may use a floating-point load or store. Diff: --- gcc/config/pa/pa.cc | 15 +-- 1 file changed, 5 insertions(+), 10 deletions(-) diff --git a/gcc/config/pa/pa.cc b/gcc/config/pa/pa.cc index 694123e37c9..129289f8e62 100644 --- a/gcc/config/pa/pa.cc +++ b/gcc/config/pa/pa.cc @@ -10968,20 +10968,15 @@ pa_legitimate_address_p (machine_mode mode, rtx x, bool strict, code_helper) /* Long 14-bit displacements always okay for these cases. */ if (INT14_OK_STRICT + || reload_completed || mode == QImode || mode == HImode) return true; - /* A secondary reload may be needed to adjust the displacement -of floating-point accesses when STRICT is nonzero. */ - if (strict) - return false; - - /* We get significantly better code if we allow long displacements -before reload for all accesses. Instructions must satisfy their -constraints after reload, so we must have an integer access. -Return true for both cases. */ - return true; + /* We have to limit displacements to those supported by +both floating-point and integer accesses as reload can't +fix invalid displacements. See PR114288. */ + return false; } if (!TARGET_DISABLE_INDEXING
[gcc r14-9342] Revert "Set num_threads to 50 on 32-bit hppa in two libgomp loop tests"
https://gcc.gnu.org/g:49c3f24552ee550f78416b6470b22af9be8bea72
commit r14-9342-g49c3f24552ee550f78416b6470b22af9be8bea72
Author: John David Anglin
Date: Wed Mar 6 17:01:59 2024 +
Revert "Set num_threads to 50 on 32-bit hppa in two libgomp loop tests"
This reverts commit b14209715e659f6d3ca0f9eef9a4851e7bd6e373.
Diff:
---
libgomp/testsuite/libgomp.c++/loop-3.C | 8 +---
libgomp/testsuite/libgomp.c/omp-loop03.c | 8 +---
2 files changed, 2 insertions(+), 14 deletions(-)
diff --git a/libgomp/testsuite/libgomp.c++/loop-3.C
b/libgomp/testsuite/libgomp.c++/loop-3.C
index 3f460f114bf..fa50f099f3f 100644
--- a/libgomp/testsuite/libgomp.c++/loop-3.C
+++ b/libgomp/testsuite/libgomp.c++/loop-3.C
@@ -1,9 +1,3 @@
-#if defined(__hppa__) && !defined(__LP64__)
-#define NUM_THREADS 50
-#else
-#define NUM_THREADS 64
-#endif
-
extern "C" void abort (void);
int a;
@@ -25,7 +19,7 @@ foo ()
int
main (void)
{
-#pragma omp parallel num_threads (NUM_THREADS)
+#pragma omp parallel num_threads (64)
foo ();
return 0;
diff --git a/libgomp/testsuite/libgomp.c/omp-loop03.c
b/libgomp/testsuite/libgomp.c/omp-loop03.c
index 9879981cf4a..7bb9a194331 100644
--- a/libgomp/testsuite/libgomp.c/omp-loop03.c
+++ b/libgomp/testsuite/libgomp.c/omp-loop03.c
@@ -1,9 +1,3 @@
-#if defined(__hppa__) && !defined(__LP64__)
-#define NUM_THREADS 50
-#else
-#define NUM_THREADS 64
-#endif
-
extern void abort (void);
int a;
@@ -25,7 +19,7 @@ foo ()
int
main (void)
{
-#pragma omp parallel num_threads (NUM_THREADS)
+#pragma omp parallel num_threads (64)
foo ();
return 0;
