[gcc(refs/vendors/riscv/heads/gcc-14-with-riscv-opts)] RISC-V: Introduce -mvector-strict-align.
https://gcc.gnu.org/g:0e0b666a30f53364292432903b68febd85a3e114
commit 0e0b666a30f53364292432903b68febd85a3e114
Author: Robin Dapp
Date: Tue May 28 21:19:26 2024 +0200
RISC-V: Introduce -mvector-strict-align.
this patch disables movmisalign by default and introduces
the -mno-vector-strict-align option to override it and re-enable
movmisalign. For now, generic-ooo is the only uarch that supports
misaligned vector access.
The patch also adds a check_effective_target_riscv_v_misalign_ok to
the testsuite which enables or disables the vector misalignment tests
depending on whether the target under test can execute a misaligned
vle32.
Changes from v3:
- Adressed Kito's comments.
- Made -mscalar-strict-align a real alias.
gcc/ChangeLog:
* config/riscv/riscv-opts.h (TARGET_VECTOR_MISALIGN_SUPPORTED):
Move from here...
* config/riscv/riscv.h (TARGET_VECTOR_MISALIGN_SUPPORTED):
...to here and map to riscv_vector_unaligned_access_p.
* config/riscv/riscv.opt: Add -mvector-strict-align.
* config/riscv/riscv.cc (struct riscv_tune_param): Add
vector_unaligned_access.
(riscv_override_options_internal): Set
riscv_vector_unaligned_access_p.
* doc/invoke.texi: Document -mvector-strict-align.
gcc/testsuite/ChangeLog:
* lib/target-supports.exp: Add
check_effective_target_riscv_v_misalign_ok.
* gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul2-7.c: Add
-mno-vector-strict-align.
* gcc.dg/vect/costmodel/riscv/rvv/vla_vs_vls-10.c: Ditto.
* gcc.dg/vect/costmodel/riscv/rvv/vla_vs_vls-11.c: Ditto.
* gcc.dg/vect/costmodel/riscv/rvv/vla_vs_vls-12.c: Ditto.
* gcc.dg/vect/costmodel/riscv/rvv/vla_vs_vls-8.c: Ditto.
* gcc.dg/vect/costmodel/riscv/rvv/vla_vs_vls-9.c: Ditto.
* gcc.target/riscv/rvv/autovec/vls/misalign-1.c: Ditto.
(cherry picked from commit 68b0742a49de7122d5023f0bf46460ff2fb3e3dd)
Diff:
---
gcc/config/riscv/riscv-opts.h | 3 --
gcc/config/riscv/riscv.cc | 19
gcc/config/riscv/riscv.h | 5
gcc/config/riscv/riscv.opt | 8 +
gcc/doc/invoke.texi| 16 ++
.../vect/costmodel/riscv/rvv/dynamic-lmul2-7.c | 2 +-
.../vect/costmodel/riscv/rvv/vla_vs_vls-10.c | 2 +-
.../vect/costmodel/riscv/rvv/vla_vs_vls-11.c | 2 +-
.../vect/costmodel/riscv/rvv/vla_vs_vls-12.c | 2 +-
.../gcc.dg/vect/costmodel/riscv/rvv/vla_vs_vls-8.c | 2 +-
.../gcc.dg/vect/costmodel/riscv/rvv/vla_vs_vls-9.c | 2 +-
.../gcc.target/riscv/rvv/autovec/vls/misalign-1.c | 2 +-
gcc/testsuite/lib/target-supports.exp | 35 --
13 files changed, 88 insertions(+), 12 deletions(-)
diff --git a/gcc/config/riscv/riscv-opts.h b/gcc/config/riscv/riscv-opts.h
index 1b2dd5757a8..f58a07abffc 100644
--- a/gcc/config/riscv/riscv-opts.h
+++ b/gcc/config/riscv/riscv-opts.h
@@ -147,9 +147,6 @@ enum rvv_vector_bits_enum {
? 0
\
: 32 << (__builtin_popcount (opts->x_riscv_zvl_flags) - 1))
-/* TODO: Enable RVV movmisalign by default for now. */
-#define TARGET_VECTOR_MISALIGN_SUPPORTED 1
-
/* The maximmum LMUL according to user configuration. */
#define TARGET_MAX_LMUL
\
(int) (rvv_max_lmul == RVV_DYNAMIC ? RVV_M8 : rvv_max_lmul)
diff --git a/gcc/config/riscv/riscv.cc b/gcc/config/riscv/riscv.cc
index c5c4c777349..9704ff9c6a0 100644
--- a/gcc/config/riscv/riscv.cc
+++ b/gcc/config/riscv/riscv.cc
@@ -288,6 +288,7 @@ struct riscv_tune_param
unsigned short memory_cost;
unsigned short fmv_cost;
bool slow_unaligned_access;
+ bool vector_unaligned_access;
bool use_divmod_expansion;
bool overlap_op_by_pieces;
unsigned int fusible_ops;
@@ -300,6 +301,10 @@ struct riscv_tune_param
/* Whether unaligned accesses execute very slowly. */
bool riscv_slow_unaligned_access_p;
+/* Whether misaligned vector accesses are supported (i.e. do not
+ throw an exception). */
+bool riscv_vector_unaligned_access_p;
+
/* Whether user explicitly passed -mstrict-align. */
bool riscv_user_wants_strict_align;
@@ -442,6 +447,7 @@ static const struct riscv_tune_param rocket_tune_info = {
5, /* memory_cost */
8, /* fmv_cost */
true,/*
slow_unaligned_access */
+ false, /* vector_unaligned_access */
false, /* use_divmod_expansion */
false,
[gcc(refs/vendors/riscv/heads/gcc-14-with-riscv-opts)] RISC-V: Introduce -mvector-strict-align.
https://gcc.gnu.org/g:8f726cf36944bb69a86553c3b21847e2da797586
commit 8f726cf36944bb69a86553c3b21847e2da797586
Author: Robin Dapp
Date: Tue May 28 21:19:26 2024 +0200
RISC-V: Introduce -mvector-strict-align.
this patch disables movmisalign by default and introduces
the -mno-vector-strict-align option to override it and re-enable
movmisalign. For now, generic-ooo is the only uarch that supports
misaligned vector access.
The patch also adds a check_effective_target_riscv_v_misalign_ok to
the testsuite which enables or disables the vector misalignment tests
depending on whether the target under test can execute a misaligned
vle32.
Changes from v3:
- Adressed Kito's comments.
- Made -mscalar-strict-align a real alias.
gcc/ChangeLog:
* config/riscv/riscv-opts.h (TARGET_VECTOR_MISALIGN_SUPPORTED):
Move from here...
* config/riscv/riscv.h (TARGET_VECTOR_MISALIGN_SUPPORTED):
...to here and map to riscv_vector_unaligned_access_p.
* config/riscv/riscv.opt: Add -mvector-strict-align.
* config/riscv/riscv.cc (struct riscv_tune_param): Add
vector_unaligned_access.
(riscv_override_options_internal): Set
riscv_vector_unaligned_access_p.
* doc/invoke.texi: Document -mvector-strict-align.
gcc/testsuite/ChangeLog:
* lib/target-supports.exp: Add
check_effective_target_riscv_v_misalign_ok.
* gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul2-7.c: Add
-mno-vector-strict-align.
* gcc.dg/vect/costmodel/riscv/rvv/vla_vs_vls-10.c: Ditto.
* gcc.dg/vect/costmodel/riscv/rvv/vla_vs_vls-11.c: Ditto.
* gcc.dg/vect/costmodel/riscv/rvv/vla_vs_vls-12.c: Ditto.
* gcc.dg/vect/costmodel/riscv/rvv/vla_vs_vls-8.c: Ditto.
* gcc.dg/vect/costmodel/riscv/rvv/vla_vs_vls-9.c: Ditto.
* gcc.target/riscv/rvv/autovec/vls/misalign-1.c: Ditto.
(cherry picked from commit 68b0742a49de7122d5023f0bf46460ff2fb3e3dd)
Diff:
---
gcc/config/riscv/riscv-opts.h | 3 --
gcc/config/riscv/riscv.cc | 19
gcc/config/riscv/riscv.h | 5
gcc/config/riscv/riscv.opt | 8 +
gcc/doc/invoke.texi| 16 ++
.../vect/costmodel/riscv/rvv/dynamic-lmul2-7.c | 2 +-
.../vect/costmodel/riscv/rvv/vla_vs_vls-10.c | 2 +-
.../vect/costmodel/riscv/rvv/vla_vs_vls-11.c | 2 +-
.../vect/costmodel/riscv/rvv/vla_vs_vls-12.c | 2 +-
.../gcc.dg/vect/costmodel/riscv/rvv/vla_vs_vls-8.c | 2 +-
.../gcc.dg/vect/costmodel/riscv/rvv/vla_vs_vls-9.c | 2 +-
.../gcc.target/riscv/rvv/autovec/vls/misalign-1.c | 2 +-
gcc/testsuite/lib/target-supports.exp | 35 --
13 files changed, 88 insertions(+), 12 deletions(-)
diff --git a/gcc/config/riscv/riscv-opts.h b/gcc/config/riscv/riscv-opts.h
index 1b2dd5757a8..f58a07abffc 100644
--- a/gcc/config/riscv/riscv-opts.h
+++ b/gcc/config/riscv/riscv-opts.h
@@ -147,9 +147,6 @@ enum rvv_vector_bits_enum {
? 0
\
: 32 << (__builtin_popcount (opts->x_riscv_zvl_flags) - 1))
-/* TODO: Enable RVV movmisalign by default for now. */
-#define TARGET_VECTOR_MISALIGN_SUPPORTED 1
-
/* The maximmum LMUL according to user configuration. */
#define TARGET_MAX_LMUL
\
(int) (rvv_max_lmul == RVV_DYNAMIC ? RVV_M8 : rvv_max_lmul)
diff --git a/gcc/config/riscv/riscv.cc b/gcc/config/riscv/riscv.cc
index a4ea594394d..89fda6b9753 100644
--- a/gcc/config/riscv/riscv.cc
+++ b/gcc/config/riscv/riscv.cc
@@ -288,6 +288,7 @@ struct riscv_tune_param
unsigned short memory_cost;
unsigned short fmv_cost;
bool slow_unaligned_access;
+ bool vector_unaligned_access;
bool use_divmod_expansion;
bool overlap_op_by_pieces;
unsigned int fusible_ops;
@@ -300,6 +301,10 @@ struct riscv_tune_param
/* Whether unaligned accesses execute very slowly. */
bool riscv_slow_unaligned_access_p;
+/* Whether misaligned vector accesses are supported (i.e. do not
+ throw an exception). */
+bool riscv_vector_unaligned_access_p;
+
/* Whether user explicitly passed -mstrict-align. */
bool riscv_user_wants_strict_align;
@@ -442,6 +447,7 @@ static const struct riscv_tune_param rocket_tune_info = {
5, /* memory_cost */
8, /* fmv_cost */
true,/*
slow_unaligned_access */
+ false, /* vector_unaligned_access */
false, /* use_divmod_expansion */
false,
