https://gcc.gnu.org/g:b694bf417cdd7d0a4d78e9927bab6bc202b7df6c
commit r15-1606-gb694bf417cdd7d0a4d78e9927bab6bc202b7df6c
Author: Richard Sandiford <richard.sandif...@arm.com>
Date: Tue Jun 25 09:41:21 2024 +0100
Revert one of the force_subreg changes
One of the changes in g:d4047da6a070175aae7121c739d1cad6b08ff4b2
caused a regression in ft32-elf; see:
https://gcc.gnu.org/pipermail/gcc-patches/2024-June/655418.html
for details. This change was different from the others in that the
original call was to simplify_subreg rather than simplify_lowpart_subreg.
The old code would therefore go on to do the force_reg for more cases
than the new code would.
gcc/
* expmed.cc (store_bit_field_using_insv): Revert earlier change
to use force_subreg instead of simplify_gen_subreg.
Diff:
---
gcc/expmed.cc | 8 +++++++-
1 file changed, 7 insertions(+), 1 deletion(-)
diff --git a/gcc/expmed.cc b/gcc/expmed.cc
index 3b9475f5aa0..8bbbc94a98c 100644
--- a/gcc/expmed.cc
+++ b/gcc/expmed.cc
@@ -695,7 +695,13 @@ store_bit_field_using_insv (const extraction_insn *insv,
rtx op0,
if we must narrow it, be sure we do it correctly. */
if (GET_MODE_SIZE (value_mode) < GET_MODE_SIZE (op_mode))
- tmp = force_subreg (op_mode, value1, value_mode, 0);
+ {
+ tmp = simplify_subreg (op_mode, value1, value_mode, 0);
+ if (! tmp)
+ tmp = simplify_gen_subreg (op_mode,
+ force_reg (value_mode, value1),
+ value_mode, 0);
+ }
else
{
if (targetm.mode_rep_extended (op_mode, value_mode) != UNKNOWN)
