Re: cxx-mem-model merge [3 of 9] doc
On 11/03/2011 08:04 PM, Joseph S. Myers wrote:
On Thu, 3 Nov 2011, Andrew MacLeod wrote:
Index: doc/extend.texi
Generally watch the line lengths in this patch - you should rewrap the
paragraphs to a width of about 70 characters (no more than 80) before
putting them on trunk. @item, @deftypefn etc. lines that can't be wrapped
may be longer - but paragraphs of text should have line lengths no more
than 80 characters.
how very 80's! To be honest, I didn't realize I had full length
paragraphs. I would have sworn i had taken care of 80 column issues...
Done.
+ @section Built-in functions for memory model aware atomic operations.
No "." at the end of a section name. There should be a corresponding
@node as well (normally have a one-to-one correspondence between nodes and
the structure of the printed manual). Don't try to put a section inside a
table (you can probably use @heading, but I'd still recommend keeping this
outside the section about __sync functions - or using @subsection to have
subsections for the __sync and __atomic cases).
section inside a table? yoinks. that wasn't obvious to me at all. oops.
I make no pretences to understand .texi stuff :-P but that was a clear
oversight.
+ The following builtins approximately match the requirements for
+ C++11 memory model. Many are similar to the ``__sync'' prefixed builtins, but
+ all also have a memory model parameter. These are all identified by being
+ prefixed with ``__atomic'', and most are overloaded such that they work
+ with multiple types.
@samp{__sync}, @samp{__atomic}, generally use @samp or @code for anything
that is quoting source code text (this includes type names such as size_t,
bits of function names such as compare_exchange, etc.). Not listed
separately below.
OK, I think I covered those.
+ @item @var{type} __atomic_load_n (@var{type} *ptr, int memmodel)
+ @findex __atomic_load_n
As noted I think putting this inside the existing table is a mistake. The
preferred approach for new documentation is definitely to use @deftypefn
for functions - although converting the __sync_* documentation would be a
separate matter for anyone wishing to do so.
I clearly missed something here... I didnt even realize I was in a table
:-P odd tho, because the output looked decent enough that I never
noticed I was doing something whacky.. converted to @deftypefn
+ This builtin implements the generic version of __atomic_compare_exchange. The
function is virtually identical to __atomic_compare_exchange_n, except the
desired value is also a pointer.
The noun used in documentation is "built-in function" not "builtin". See
codingconventions.html. Likewise in several other places in this patch.
Done.
So here is the updated patch. Given my vast and deep knowledge of tex,
I expect a few iterations :-) It seems OK when I look at it, of course,
it did before too :-P
Oh, and changes to md.texi as well.
Andrew
* extend.texi: Document __atomic built-in functions.
* invoke.texi: Document data race parameters.
* md.texi: Document atomic patterns.
Index: extend.texi
===
*** extend.texi (revision 180839)
--- extend.texi (working copy)
*** extensions, accepted by GCC in C90 mode
*** 79,85
* Return Address:: Getting the return or frame address of a function.
* Vector Extensions:: Using vector instructions through built-in functions.
* Offsetof::Special syntax for implementing @code{offsetof}.
! * Atomic Builtins:: Built-in functions for atomic memory access.
* Object Size Checking:: Built-in functions for limited buffer overflow
checking.
* Other Builtins:: Other built-in functions.
--- 79,86
* Return Address:: Getting the return or frame address of a function.
* Vector Extensions:: Using vector instructions through built-in functions.
* Offsetof::Special syntax for implementing @code{offsetof}.
! * __sync Builtins:: Legacy built-in functions for atomic memory access.
! * __atomic Builtins:: Atomic built-in functions with memory model.
* Object Size Checking:: Built-in functions for limited buffer overflow
checking.
* Other Builtins:: Other built-in functions.
*** is a suitable definition of the @code{of
*** 6682,6689
may be dependent. In either case, @var{member} may consist of a single
identifier, or a sequence of member accesses and array references.
! @node Atomic Builtins
! @section Built-in functions for atomic memory access
The following builtins are intended to be compatible with those described
in the @cite{Intel Itanium Processor-specific Application Binary Interface},
--- 6683,6690
may be dependent. In either case, @var{member} may consist of a single
identifier, or a sequence of member accesses and array references.
! @node __
Re: [Patch]: Fix PR rtl-optimization/50448
On 11/03/2011 10:21 PM, Eric Botcazou wrote: PR rtl-optimization/50448 >* cprop.c (try_replace_reg): Try to simplify SET_SRC given the >substitution. The whole patch is about SET_DEST though, so I'm a little confused. Yes, the changelog is wrong indeed. Registers in a SET_DEST memory are uses, so they are like SET_SRC in this context which is why I think the patch does belong in try_replace_reg. Georg, what do you think of a changelog like this: Also try to replace uses of FROM that appear in SET_DEST. And the head comment of try_replace_reg reads: /* Try to replace all non-SET_DEST occurrences of FROM in INSN with TO. Returns nonzero is successful. */ I agree; like above, the patch should also change the head comment like this: /* Try to replace all uses of FROM in INSN with TO. Returns nonzero is successful. */ Paolo
Re: cxx-mem-model merge [4 of 9] c-family
On 11/03/2011 08:20 PM, Joseph S. Myers wrote:
On Thu, 3 Nov 2011, Andrew MacLeod wrote:
+ if (VEC_length (tree, params) != n_param)
+ {
+ error ("Incorrect number of arguments to function %qE", function);
Diagnostics start with lowercase letters. The functions such as "error"
that implicitly use input_location are deprecated - all the new functions
producing diagnostics should take location_t parameters that they pass to
error_at. (If a location isn't readily available in the caller then you
might make the caller pass input_location - but you still shouldn't
introduce a new function like this with several calls to plain "error".)
OK.
+ type_0 = TREE_TYPE (VEC_index (tree, params, 0));
+ if (TREE_CODE (type_0) != POINTER_TYPE)
+ {
+ error ("argument 0 of %qE must be a pointer type", function);
Arguments are numbered from 1 in existing diagnostics, not 0. The
diagnostics here need to be fixed to match that.
Done.
+ /* Check memory model parameters for validity. */
+ for (x = n_param - n_model ; x< n_param; x++)
+ {
+ tree p = VEC_index (tree, params, x);
+ if (TREE_CODE (p) == INTEGER_CST)
+ {
+ int i = tree_low_cst (p, 1);
+ if (i< 0 || i>= MEMMODEL_LAST)
+ {
+ error ("invalid memory model argument %d of %qE", x, function);
Given that C and C++ allow variable arguments to the standard type-generic
macros/functions, it is also presumably OK - only undefined at runtime -
for a constant memory model argument of the correct type to have a value
representable in that type that isn't actually a valid memory model. And
so this should generate a warning, not an error (ideally generating a trap
and an informative note that such a trap has been generated - remember
that the side-effects of the function arguments must be evaluated before
the trap, in case an argument exits the program, as in
gcc.c-torture/execute/{call-trap-1.c,va-arg-trap-1.c}).
I don't think I agree. All the __atomic operations are noexcept, so
they can't throw. We currently default unknown runtime values to
seq-cst for inlined atomics, and presumably the library will also
implement any unknown value as seq-cst. There are very explicit
enumerated types to be used, and I do not think its unreasonable to
issue an error if someone provides an out of range value which can be
determined at compile time.
And on a personal note, I will reiterate my annoyance that a
non-constant is even allowed for this parameter :-) But I'm over that.
Mostly. :-)
New patch attached. I'll work on the updated changelogs tomorrow.
well, later today :-P
Andrew
2011-10-27 Richard Henderson
* c-cppbuiltin.c (c_cpp_builtins): Test both atomic and sync patterns.
2011-10-25 Andrew MacLeod
* c-common.c (get_atomic_generic_size): New. Find size of generic
atomic function parameters and do typechecking.
(add_atomic_size_parameter): New. Insert size into parameter list.
(resolve_overloaded_atomic_exchange): Restructure __atomic_exchange to
either __atomic_exchange_n or external library call.
(resolve_overloaded_atomic_compare_exchange): Restructure
__atomic_compare_exchange to either _n variant or external library call.
(resolve_overloaded_atomic_load): Restructure __atomic_load to either
__atomic_load_n or an external library call.
(resolve_overloaded_atomic_store): Restructure __atomic_store to either
__atomic_store_n or an external library call.
(resolve_overloaded_builtin): Handle 4 generic __atomic calls.
2011-10-20 Andrew MacLeod
* c-common.c (resolve_overloaded_builtin): Don't try to process a
return value with an error mark.
2011-10-17 Andrew MacLeod
* c-common.c: Rename __sync_mem to __atomic.
2011-09-16 Andrew MacLeod
* c-common.c (sync_resolve_params, sync_resolve_return): Only tweak
parameters that are the same type size.
(resolve_overloaded_builtin): Use new param for __sync_mem builtins.
Support new NAND builtins.
2011-08-13 Andrew MacLeod
* c-common.c (resolve_overloaded_builtin): Handle new __SYNC_MEM
builtins.
2011-07-27 Andrew Macleod
* c-common.c (resolve_overloaded_builtin): Handle BUILT_IN_SYNC_MEM_*
types.
2011-06-23 Andrew Macleod
* c-common.c (resolve_overloaded_builtin): Add BUILT_IN_SYNC_MEM_LOAD_N.
2011-06-21 Andrew Macleod
Aldy Hernandez
* c-common.c (BUILT_IN_SYNC_MEM_EXCHANGE_N): Add case.
Index: c-common.c
===
*** c-common.c (revision 180839)
--- c-common.c (working copy)
*** sync_resolve_size (tree function, VEC(tr
*** 9020,9026
was encountered; true on success. */
static bool
! sync_resolve_params (tree orig_function, tree function, VEC(tree, gc)
Re: [patch] Rewrite SLP analysis towards support of operations with any number of operands
On Thu, Nov 03, 2011 at 10:47:32AM +0200, Ira Rosen wrote:
> On 1 November 2011 11:35, Ira Rosen wrote:
> > At the moment SLP allows only unary and binary operations building SLP
> > instance as a binary tree. This patch rewrites the analysis and SLP
> > tree creation to support any number of operands. A node in SLP tree
> > now has a VEC of children nodes - a node for each operand defined in
> > the loop/basic block.
> > This patch doesn't remove the unary/binary operation constraint yet.
> >
> > Bootstrapped and tested on powerpc64-suse-linux.
> > Comments are welcome.
>
> I committed the attached patch after testing it also on i486-linux-gnu.
> It fixes PR 50912 as well.
The Changelog entry doesn't mention tree-vect-data-refs.c at all, yet
the patch modifies it and the commit too.
To me it looks like you've reverted the tree-vect-data-refs.c part
of your PR50730
http://gcc.gnu.org/viewcvs?root=gcc&view=rev&rev=180367
change and as can be seen on gcc-testresults, the testcase now fails
FAIL: gcc.dg/vect/no-tree-sra-bb-slp-pr50730.c scan-tree-dump-times slp "not
vectorized: more than one data ref in stmt" 0
Was it intentional?
> > ChangeLog:
> >
> > * tree-vectorizer.h (slp_void_p): New.
> > (struct _slp_tree): Replace left and right with children. Update
> > documentation.
> > (struct _slp_oprnd_info): New.
> > (vect_get_vec_defs): Declare.
> > (vect_get_slp_defs): Update arguments.
> > * tree-vect-loop.c (vect_create_epilog_for_reduction): Call
> > vect_get_vec_defs instead of vect_get_slp_defs.
> > (vectorizable_reduction): Likewise.
> > * tree-vect-stmts.c (vect_get_vec_defs): Remove static, add argument.
> > Update call to vect_get_slp_defs.
> > (vectorizable_conversion): Update call to vect_get_vec_defs.
> > (vectorizable_assignment, vectorizable_shift,
> > vectorizable_operation): Likewise.
> > (vectorizable_type_demotion): Call vect_get_vec_defs instead of
> > vect_get_slp_defs.
> > (vectorizable_type_promotion, vectorizable_store): Likewise.
> > (vect_analyze_stmt): Fix typo.
> > * tree-vect-slp.c (vect_free_slp_tree): Update SLP tree traversal.
> > (vect_print_slp_tree, vect_mark_slp_stmts,
> > vect_mark_slp_stmts_relevant, vect_slp_rearrange_stmts,
> > vect_detect_hybrid_slp_stmts, vect_slp_analyze_node_operations,
> > vect_schedule_slp_instance): Likewise.
> > (vect_create_new_slp_node): New.
> > (vect_create_oprnd_info, vect_free_oprnd_info): Likewise.
> > (vect_get_and_check_slp_defs): Pass information about defs using
> > oprnds_info, allow any number of operands.
> > (vect_build_slp_tree): Likewise. Update calls to
> > vect_get_and_check_slp_defs. Fix comments.
> > (vect_analyze_slp_instance): Move node creation to
> > vect_create_new_slp_node.
> > (vect_get_slp_defs): Allow any number of operands.
> >
> --- tree-vect-data-refs.c (revision 180818)
> +++ tree-vect-data-refs.c (working copy)
> @@ -2524,7 +2524,7 @@ vect_analyze_data_refs (loop_vec_info loop_vinfo,
>VEC (data_reference_p, heap) *datarefs;
>struct data_reference *dr;
>tree scalar_type;
> - bool res, stop_bb_analysis = false;
> + bool res;
>
>if (vect_print_dump_info (REPORT_DETAILS))
> fprintf (vect_dump, "=== vect_analyze_data_refs ===\n");
> @@ -2586,12 +2586,6 @@ vect_analyze_data_refs (loop_vec_info loop_vinfo,
>stmt = DR_STMT (dr);
>stmt_info = vinfo_for_stmt (stmt);
>
> - if (stop_bb_analysis)
> -{
> - STMT_VINFO_VECTORIZABLE (stmt_info) = false;
> - continue;
> -}
> -
>/* Check that analysis of the data-ref succeeded. */
>if (!DR_BASE_ADDRESS (dr) || !DR_OFFSET (dr) || !DR_INIT (dr)
>|| !DR_STEP (dr))
> @@ -2602,13 +2596,6 @@ vect_analyze_data_refs (loop_vec_info loop_vinfo,
>print_gimple_stmt (vect_dump, stmt, 0, TDF_SLIM);
> }
>
> - if (bb_vinfo)
> -{
> - STMT_VINFO_VECTORIZABLE (stmt_info) = false;
> - stop_bb_analysis = true;
> - continue;
> -}
> -
>return false;
> }
>
> @@ -2617,15 +2604,7 @@ vect_analyze_data_refs (loop_vec_info loop_vinfo,
>if (vect_print_dump_info (REPORT_UNVECTORIZED_LOCATIONS))
> fprintf (vect_dump, "not vectorized: base addr of dr is a "
> "constant");
> -
> - if (bb_vinfo)
> -{
> - STMT_VINFO_VECTORIZABLE (stmt_info) = false;
> - stop_bb_analysis = true;
> - continue;
> -}
> -
> - return false;
> + return false;
> }
>
>if (TREE_THIS_VOLATILE (DR_REF (dr)))
> @@ -2635,14 +2614,6 @@ vect_analyze_data_refs (loop_vec_info loop_vinfo,
>fprintf (vect_dump, "
[Patch] ARM multilib changes for RTEMS
Hello,
please have a look at the attached patch. It is intended for inclusion in the
GCC 4.7 branch. The embedded brains GmbH has a copyright assignment with the FSF.
Kind regards,
Sebastian
--
Sebastian Huber, embedded brains GmbH
Address : Obere Lagerstr. 30, D-82178 Puchheim, Germany
Phone : +49 89 18 90 80 79-6
Fax : +49 89 18 90 80 79-9
E-Mail : sebastian.hu...@embedded-brains.de
PGP : Public key available on request.
Diese Nachricht ist keine geschäftliche Mitteilung im Sinne des EHUG.
2011-11-04 Thomas Dörfler
* config/arm/rtems-elf.h, config/arm/t-rtems: Add optional
support for VFP floating point model.
diff --git a/gcc/config/arm/rtems-elf.h b/gcc/config/arm/rtems-elf.h
index 8d5a1d7..d9d24a7 100644
--- a/gcc/config/arm/rtems-elf.h
+++ b/gcc/config/arm/rtems-elf.h
@@ -35,7 +35,7 @@
*/
#undef SUBTARGET_EXTRA_ASM_SPEC
#define SUBTARGET_EXTRA_ASM_SPEC "\
- %{!mfloat-abi=hard: %{!mfloat-abi=soft:-mfpu=softfpa}}"
+ %{!mfloat-abi=hard: %{!mfpu=vfp: %{!mfloat-abi=soft:-mfpu=softfpa}}}"
/*
* The default includes --start-group and --end-group which conflicts
diff --git a/gcc/config/arm/t-rtems b/gcc/config/arm/t-rtems
index f12387f..48c463a 100644
--- a/gcc/config/arm/t-rtems
+++ b/gcc/config/arm/t-rtems
@@ -3,8 +3,30 @@
MULTILIB_OPTIONS = marm/mthumb
MULTILIB_DIRNAMES= arm thumb
MULTILIB_EXCEPTIONS =
-MULTILIB_MATCHES = marm=mno-thumb
-MULTILIB_OPTIONS+= mfloat-abi=soft/mfloat-abi=hard
-MULTILIB_DIRNAMES += soft fpu
-MULTILIB_EXCEPTIONS += *mthumb/*mfloat-abi=hard*
+MULTILIB_OPTIONS+= mfloat-abi=hard/mfloat-abi=softfp
+MULTILIB_DIRNAMES += fpu softfp
+MULTILIB_EXCEPTIONS += *mthumb*/*mfloat-abi=hard* *mthumb*/*mfloat-abi=softfp*
+
+MULTILIB_OPTIONS+= mfpu=vfp
+MULTILIB_DIRNAMES += vfp
+MULTILIB_EXCEPTIONS += *mfloat-abi=hard*/*mfpu=vfp* *marm*/*mfloat-abi=softfp*/*mfpu=fpa*
+MULTILIB_EXCLUSIONS += !mthumb/mfloat-abi=softfp/!mfpu=vfp
+
+# default float model is fpa, so don't create a explicit copy of it
+MULTILIB_EXCEPTIONS += *marm*/*mfpa*
+
+# permutations of the options which are useful (+) or make no sense (-),
+# defaults are in brackets:
+# + (arm/soft/fpa)
+# + (arm/soft)/vfp
+# - (arm)/softfp(/fpa)
+# + (arm)/softfp/vfp
+# + (arm)/float-abi=hard(/fpa)
+# - (arm)/float-abi=hard/vfp
+# + thumb/(soft/fpa)
+# + thumb/(soft/)vfp
+# - thumb/softfp/fpa
+# - thumb/softfp/vfp
+# - thumb/float-abi=hard/fpa
+# - thumb/float-abi=hard/vfp
Re: [Patch]: Fix PR rtl-optimization/50448
> Yes, the changelog is wrong indeed. Registers in a SET_DEST memory are > uses, so they are like SET_SRC in this context which is why I think the > patch does belong in try_replace_reg. Georg, what do you think of a > changelog like this: > >Also try to replace uses of FROM that appear in SET_DEST. OK, this makes sense. validate_replace_src_group actually does this too. > I agree; like above, the patch should also change the head comment like > this: > > /* Try to replace all uses of FROM in INSN with TO. Returns > nonzero is successful. */ No 's' in "Returns". Note that the comment is also off: + /* If above failed and this is a single set, try to simplify the source of + the set given our substitution. We could perhaps try this for multiple + SETs, but it probably won't buy us anything. */ +rtx addr = simplify_replace_rtx (SET_DEST (set), from, to); What does "If above failed" refer to? Again "source" instead of "destination". -- Eric Botcazou
Re: [alpha-vms] simplify the generation of VMS linkages
On Nov 3, 2011, at 4:42 PM, Richard Henderson wrote: > On 11/03/2011 08:35 AM, Tristan Gingold wrote: >> Do you have any objections ? > > Nope. Thanks, committed. Tristan.
Re: cxx-mem-model merge [0 of 9]
On Fri, Nov 4, 2011 at 1:02 AM, Andrew Pinski wrote: > On Thu, Nov 3, 2011 at 4:59 PM, Andrew MacLeod wrote: >> wow, that could be a lot of work. Is that really what every branch merge >> does? > > Yes, I did just that for the pointer plus merge and Daniel did it for > the DF merge (which was much bigger). Same for the mem-ref branch merge and even the gimple-tuples branch merge IIRC. Richard. > Thanks, > Andrew Pinski >
Re: [Patch, fortran] [00/66] PR fortran/43829 Inline sum and product (AKA scalarization of reductions)
On Fri, Nov 4, 2011 at 2:02 AM, Mikael Morin wrote: > On Tuesday 01 November 2011 22:07:48 Paul Richard Thomas wrote: >> The only, slight worry that I have is that it is going to make Richi's >> middle end scalarization nearly impossible to use for gfortran. >> However, the enhanced capability that this patch brings makes it a >> worthy addition to gfortran. >> > I think that Richi's middle-end arrays and gfortran's scalarizer are more or > less incompatible, regardless of this patch. And if they are made to coexist > side by side at some point, this patch won't make it either better/easier or > worse/harder IMHO. Indeed. In the ideal form the current scalarizer could defer scalarizing innermost loop (nests) to the middle-end, my hackish patches from earlier this year of course were just hacks (to eventually get some interest from you folks). But of course not even the middle-end parts are completely ready (partly also due to lack of good test coverage possibility - a chicken and egg problem :/). So I think improving the Fortran scalarizer is time that is very well spent. Thanks, Richard. > >> OK for trunk. >> > Thanks for the review! > Committed as follows. > > Mikael > > patch revision > > 01 180842 > 02 180843 > 03 180844 > 04 180846 > 05 180847 > 06 180848 > 08 180849 > 07 180850 > 09 180851 > 10 180852 > 11 180853 > 12 180855 > 13 180856 > 14 180857 > 15 180858 > 16 180859 > 17 180860 > 18 180861 > 19 180862 > 20 180864 > 21 180865 > 22 180866 > 23 180867 > 24 180868 > 25 180869 > 26 180870 > 27 180872 > 28 180873 > 29 180875 > 30 180877 > 31 180880 > 32 180881 > 33 180882 > 34 180883 > 35 180884 > 36 180885 > 37 180886 > 38 180887 > 39 180888 > 40 180889 > 41 180890 > 42 180891 > 43 480892 > 44 180893 > 45 180894 > 46 180895 > 47 180897 > 48 180898 > 49 180899 > 50 180900 > 51 180901 > 52 180902 > 53 180903 > 54 180904 > 55 180905 > 56 180906 > 57 180907 > 58 180908 > 59 180909 > 60 180910 > 61 180911 > 62 180913 > 63 180917 > 64 180918 > 65 180919 > 66 180920 > tests 180922 >
[committed] Fix vms-ia64 bootstrap issue
Hi, fde-vms.c is not the right place to include the unwinder fallback. Fixed by this patch. Tristan. libgcc/ 2011-11-04 Tristan Gingold * config/ia64/fde-vms.c: Do not include md-unwind-support.h Index: config/ia64/fde-vms.c === --- config/ia64/fde-vms.c (revision 180927) +++ config/ia64/fde-vms.c (working copy) @@ -33,7 +33,6 @@ #include #include #include -#include "md-unwind-support.h" #include "unwind-ia64.h" #define __int64 long
Re: RFA: Add Epiphany port
Joern Rennecke writes:
> Index: libgcc/config.host
> ===
> --- libgcc/config.host(revision 180924)
> +++ libgcc/config.host(working copy)
> @@ -433,6 +433,10 @@
> cris-*-linux* | crisv32-*-linux*)
> tmake_file="$tmake_file cris/t-cris t-fdpbit cris/t-linux"
> ;;
> +epiphany-*-elf*)
> + tmake_file="epiphany/t-epiphany t-fdpbit epiphany/t-custom-eqsf"
> + extra_parts="crti.o crtint.o crtrunc.o crtm1reg-r43.o crtm1reg-r63.o
> crtbegin.o crtend.o crtn.o"
> + ;;
No need for crtbegin.o and crtend.o, just add to the *-*-elf extra_parts
instead.
> Index: gcc/testsuite/gcc.dg/weak/typeof-2.c
> ===
> --- gcc/testsuite/gcc.dg/weak/typeof-2.c (revision 180924)
> +++ gcc/testsuite/gcc.dg/weak/typeof-2.c (working copy)
> @@ -5,6 +5,9 @@
> /* { dg-require-weak "" } */
> /* { dg-require-alias "" } */
> /* { dg-options "-O2" } */
> +/* Using -mshort-calls avoids loading the function addresses in
> + registers and thus getting the counts wrong. */
> +/* { dg-options "-O2 -mshort-calls" { target epiphany-*-* } } */
You should consider using dg-additional-options here, rather than
repeating the dg-options default (and in several other tests).
Thanks.
Rainer
--
-
Rainer Orth, Center for Biotechnology, Bielefeld University
[Patch] ARM EABI support for RTEMS
Hello,
please have a look at the attached patch. It is intended for inclusion in the
GCC 4.7 branch. The embedded brains GmbH has a copyright assignment with the FSF.
I was not able to test this patch with the latest snapshot due to this:
/home/sh/archive/gcc-4.7-20111029/libgcc/unwind-dw2.c: In function
'init_dwarf_reg_size_table':
/home/sh/archive/gcc-4.7-20111029/libgcc/unwind-dw2.c:1482:39: internal
compiler error: in arm_dbx_register_number, at config/arm/arm.c:23536
Kind regards,
Sebastian
--
Sebastian Huber, embedded brains GmbH
Address : Obere Lagerstr. 30, D-82178 Puchheim, Germany
Phone : +49 89 18 90 80 79-6
Fax : +49 89 18 90 80 79-9
E-Mail : sebastian.hu...@embedded-brains.de
PGP : Public key available on request.
Diese Nachricht ist keine geschäftliche Mitteilung im Sinne des EHUG.
2011-11-04 Sebastian Huber
* config.gcc (arm*-*-rtemseabi*): New target.
* config/arm/rtems-eabi.h: New.
* config/arm/t-rtems-eabi: New.
diff --git a/gcc/config.gcc b/gcc/config.gcc
index 2c18655..6bdc025 100644
--- a/gcc/config.gcc
+++ b/gcc/config.gcc
@@ -904,7 +904,7 @@ arm*-*-ecos-elf)
tm_file="dbxelf.h elfos.h newlib-stdint.h arm/unknown-elf.h arm/elf.h arm/aout.h arm/arm.h arm/ecos-elf.h"
tmake_file="arm/t-arm arm/t-arm-elf"
;;
-arm*-*-eabi* | arm*-*-symbianelf* )
+arm*-*-eabi* | arm*-*-symbianelf* | arm*-*-rtemseabi* )
# The BPABI long long divmod functions return a 128-bit value in
# registers r0-r3. Correctly modeling that requires the use of
# TImode.
@@ -919,6 +919,10 @@ arm*-*-eabi* | arm*-*-symbianelf* )
tmake_file="${tmake_file} arm/t-bpabi"
use_gcc_stdint=wrap
;;
+ arm*-*-rtemseabi*)
+ tm_file="${tm_file} rtems.h arm/rtems-eabi.h newlib-stdint.h"
+ tmake_file="${tmake_file} arm/t-bpabi arm/t-rtems-eabi"
+ ;;
arm*-*-symbianelf*)
tm_file="${tm_file} arm/symbian.h"
libgcc_tm_file="$libgcc_tm_file arm/symbian-lib.h"
diff --git a/gcc/config/arm/rtems-eabi.h b/gcc/config/arm/rtems-eabi.h
new file mode 100644
index 000..ced98a9
--- /dev/null
+++ b/gcc/config/arm/rtems-eabi.h
@@ -0,0 +1,29 @@
+/* Definitions for RTEMS based ARM systems using EABI.
+ Copyright (C) 2011 Free Software Foundation, Inc.
+
+ This file is part of GCC.
+
+ GCC is free software; you can redistribute it and/or modify it
+ under the terms of the GNU General Public License as published
+ by the Free Software Foundation; either version 3, or (at your
+ option) any later version.
+
+ GCC is distributed in the hope that it will be useful, but WITHOUT
+ ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+ or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
+ License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with GCC; see the file COPYING3. If not see
+
Re: [Patch]: Fix PR rtl-optimization/50448
On 11/04/2011 09:50 AM, Eric Botcazou wrote: + /* If above failed and this is a single set, try to simplify the source of + the set given our substitution. We could perhaps try this for multiple + SETs, but it probably won't buy us anything. */ +rtx addr = simplify_replace_rtx (SET_DEST (set), from, to); What does "If above failed" refer to? Again "source" instead of "destination". What about /* Registers can also appear as uses in SET_DEST if it is a MEM. We could perhaps try this for multiple SETs, but it probably won't buy us anything. */ ? Georg, can you put it all together into a v2? Paolo
[ping] Fix PR c++/50608
This is a regression present on mainline and 4.6 branch: http://gcc.gnu.org/ml/gcc-patches/2011-10/msg01124.html Thanks in advance. -- Eric Botcazou
Re: [Patch]: Fix PR rtl-optimization/50448
> What about > > /* Registers can also appear as uses in SET_DEST if it is a MEM. We >could perhaps try this for multiple SETs, but it probably won't >buy us anything. */ > > ? Fine with me, thanks. -- Eric Botcazou
Re: Patch ping
On Wed, 2 Nov 2011, Jakub Jelinek wrote:
> Hi!
>
> - Gather vectorization patch + incremental patches
> http://gcc.gnu.org/ml/gcc-patches/2011-10/msg02411.html
I'm not sure I like using new builtins for gather representation
on the tree level too much, given that we are now moving
towards using tree codes for suffle. Thus, how complicated
would it be to have a gather tree code and optab and to
handle the mixed size index issue in the expander?
I realize this would be quite some reorg to the patchset ...
so, why did you choose builtins over a more generic approach?
> http://gcc.gnu.org/ml/gcc-patches/2011-10/msg02846.html
+ if (TREE_CODE (base) == MEM_REF)
{
- off = TREE_OPERAND (base, 1);
+ if (!integer_zerop (TREE_OPERAND (base, 1)))
+ {
+ if (off == NULL_TREE)
+ {
+ double_int moff = mem_ref_offset (base);
+ off = double_int_to_tree (sizetype, moff);
+ }
+ else
+ off = size_binop (PLUS_EXPR, off, TREE_OPERAND (base, 1));
that's not safe, TREE_OPEAND (base, 1) is of pointer type, so
you unconditionally need to do the conversion to sizetype of
TREE_OPEAND (base, 1).
The routine lacks comments - it's got quite big and fails to
state any reason for its complexity. I'm also not sure why
DR would include any loop invariant parts of the SCEV - doesn't
it instantiate just for the loop in question?
Thanks,
Richard.
[Ada] Add new Assign and Copy operations to unbounded containers
The new operations Assign and Copy have been added to the (already-existing) unbounded containers, to achieve parity with the same operations in the newer bounded forms, described in AI05-0001. This facilitates changing one container form to the other during program maintenance. The text of AI05-0001.txt can be found here: http://www.ada-auth.org/cgi-bin/cvsweb.cgi/ai05s/ai05-0001-1.txt Tested on x86_64-pc-linux-gnu, committed on trunk 2011-11-04 Matthew Heaney * a-cdlili.ad[sb], a-cidlli.ad[sb], a-coorse.ad[sb], a-ciorse.ad[sb], a-coorma.ad[sb], a-ciorma.ad[sb], a-coormu.ad[sb], a-ciormu.ad[sb], a-cohama.ad[sb], a-cihama.ad[sb], a-cohase.ad[sb], a-cihase.ad[sb], a-convec.ad[sb], a-coinve.ad[sb] (Assign, Copy): New operations added to package. Index: a-cdlili.adb === --- a-cdlili.adb(revision 180929) +++ a-cdlili.adb(working copy) @@ -146,6 +146,27 @@ Insert (Container, No_Element, New_Item, Count); end Append; + + -- Assign -- + + + procedure Assign (Target : in out List; Source : List) is + Node : Node_Access; + + begin + if Target'Address = Source'Address then + return; + end if; + + Target.Clear; + + Node := Source.First; + while Node /= null loop + Target.Append (Node.Element); + Node := Node.Next; + end loop; + end Assign; + --- -- Clear -- --- @@ -206,6 +227,17 @@ return Find (Container, Item) /= No_Element; end Contains; + -- + -- Copy -- + -- + + function Copy (Source : List) return List is + begin + return Target : List do + Target.Assign (Source); + end return; + end Copy; + -- Delete -- Index: a-cdlili.ads === --- a-cdlili.ads(revision 180929) +++ a-cdlili.ads(working copy) @@ -90,6 +90,10 @@ Position : Cursor; Process : not null access procedure (Element : in out Element_Type)); + procedure Assign (Target : in out List; Source : List); + + function Copy (Source : List) return List; + procedure Move (Target : in out List; Source : in out List); Index: a-cihama.adb === --- a-cihama.adb(revision 180929) +++ a-cihama.adb(working copy) @@ -35,6 +35,8 @@ with Ada.Unchecked_Deallocation; +with System; use type System.Address; + package body Ada.Containers.Indefinite_Hashed_Maps is procedure Free_Key is @@ -132,6 +134,41 @@ HT_Ops.Adjust (Container.HT); end Adjust; + + -- Assign -- + + + procedure Assign (Target : in out Map; Source : Map) is + procedure Insert_Item (Node : Node_Access); + pragma Inline (Insert_Item); + + procedure Insert_Items is new HT_Ops.Generic_Iteration (Insert_Item); + + - + -- Insert_Item -- + - + + procedure Insert_Item (Node : Node_Access) is + begin + Target.Insert (Key => Node.Key.all, New_Item => Node.Element.all); + end Insert_Item; + + -- Start of processing for Assign + + begin + if Target'Address = Source'Address then + return; + end if; + + Target.Clear; + + if Target.Capacity < Source.Length then + Target.Reserve_Capacity (Source.Length); + end if; + + Insert_Items (Target.HT); + end Assign; + -- -- Capacity -- -- @@ -159,6 +196,34 @@ return Find (Container, Key) /= No_Element; end Contains; + -- + -- Copy -- + -- + + function Copy + (Source : Map; + Capacity : Count_Type := 0) return Map + is + C : Count_Type; + + begin + if Capacity = 0 then + C := Source.Length; + + elsif Capacity >= Source.Length then + C := Capacity; + + else + raise Capacity_Error + with "Requested capacity is less than Source length"; + end if; + + return Target : Map do + Target.Reserve_Capacity (C); + Target.Assign (Source); + end return; + end Copy; + --- -- Copy_Node -- --- Index: a-cihama.ads === --- a-cihama.ads(revision 180929) +++ a-cihama.ads(working copy) @@ -134,6 +134,10 @@ -- Calls Process with the key (with only a constant view) and element (with -- a variable view) of the node designed by the cursor. + procedure Assign (Target : in out Map; Source : Map); + + function Copy (Source : Map; Capacity : Count_Type := 0) return Map; + procedure Move (Target : in out Map; Source : in out Map); -- Clears Target (if it's not empty
Re: RFA: Fix dse / postreload not to bypass add expanders
On 11/03/2011 08:01 PM, Eric Botcazou wrote:
+ info.insert_before = insn;
+ info.first = new_insn;
+ info.fixed_regs_live = insn_info->fixed_regs_live;
+ info.failure = false;
+ for (cur = new_insn; cur; cur = NEXT_INSN (cur))
+{
+ info.current = cur;
+ note_stores (PATTERN (cur), note_add_store,&info);
+}
Unless I'm missing something, this is going all the way down to the end
of the function, bypassing the CFG, so it is neither efficient nor correct.
For DSE you should set up backwards liveness simulation, and use that
instead of note_stores and insn scanning. I don't know postreload well
enough, but liveness simulation might work there too.
Paolo
Re: RFA: Fix dse / postreload not to bypass add expanders
> Unless I'm missing something, this is going all the way down to the end > of the function, bypassing the CFG, so it is neither efficient nor correct. No, gen_ functions doesn't emit the instructions. > For DSE you should set up backwards liveness simulation, and use that > instead of note_stores and insn scanning. DSE already does this sort of insn scanning. -- Eric Botcazou
Re: Patch ping
On Fri, Nov 04, 2011 at 10:52:44AM +0100, Richard Guenther wrote:
> > - Gather vectorization patch + incremental patches
> > http://gcc.gnu.org/ml/gcc-patches/2011-10/msg02411.html
>
> I'm not sure I like using new builtins for gather representation
> on the tree level too much, given that we are now moving
> towards using tree codes for suffle. Thus, how complicated
> would it be to have a gather tree code and optab and to
> handle the mixed size index issue in the expander?
>
> I realize this would be quite some reorg to the patchset ...
> so, why did you choose builtins over a more generic approach?
Because while permutations etc. are common to most targets,
currently gather is very specialized, specific to one target,
with lots of details how it must look like (e.g. the mask stuff where
we currently don't even have tree code for conditional loads or conditional
stores), and additionally unlike VEC_PERM_EXPR etc. which are normal
expressions this one is a reference (and conditional one too), so
I'm afraid I'd need to touch huge amounts of code (most places that
currently handle MEM_REF/TARGET_MEM_REF would need to handle
VEC_GATHER_MEM_REF too, as it is a memory read (well, set of conditional
memory reads). The i?86 backend already has (except 4) all the needed
builtins anyway and handles expanding them too, the 4 ones are just
to cope with the weirdo definition of some of them (half sized vectors).
And when it is represented as builtin, the side-effects are handled by
all optimization passes automatically, similarly how e.g. atomic builtins
are right now builtins and not expressions.
So I thought it is better to use builtins right now, then when we in 4.8+
hopefully do something about conditional loads/stores and their
vectorization and if we introduce for that some new GIMPLE representation,
this could be done on top of that.
> > http://gcc.gnu.org/ml/gcc-patches/2011-10/msg02846.html
>
> + if (TREE_CODE (base) == MEM_REF)
> {
> - off = TREE_OPERAND (base, 1);
> + if (!integer_zerop (TREE_OPERAND (base, 1)))
> + {
> + if (off == NULL_TREE)
> + {
> + double_int moff = mem_ref_offset (base);
> + off = double_int_to_tree (sizetype, moff);
> + }
> + else
> + off = size_binop (PLUS_EXPR, off, TREE_OPERAND (base, 1));
>
> that's not safe, TREE_OPEAND (base, 1) is of pointer type, so
> you unconditionally need to do the conversion to sizetype of
> TREE_OPEAND (base, 1).
Ok, will fix.
> The routine lacks comments - it's got quite big and fails to
And add the comments.
> state any reason for its complexity. I'm also not sure why
> DR would include any loop invariant parts of the SCEV - doesn't
> it instantiate just for the loop in question?
I'm not sure I understand your question. With the incremental
patch I'm not using any DR info appart from DR_REF to determine
what is loop invariant part of the address and what is not.
The reason for that is that split_constant_offset turns the GIMPLE
code into a sometimes big tree, which actually may contain a mixture
of loop invariants/constants and SSA_NAMEs defined in the loop,
that all with casts, multiplications/additions/subtractions.
For gather I need to split it into a single loop invariant
argument (which can be computed before the loop as loop invariant
and thus can be arbitrary tree expression that is just gimplified
there) and another SSA_NAME defined into the loop which can be
vectorized which is perhaps sign-extended and multiplied by 1/2/4/8.
With the approach the incremental patch does I just
walk what split_constant_offset during DR walks and peel off
loop invariants until I have something that should be used as the
vectorized index.
Jakub
[Ada] Internal error on private type with -gnatct
This is an internal error on the type of an argument that isn't elaborated
early enough in -gnatct mode, because it is the private derivation of a
private type. In this mode, the compiler doesn't generate code and gigi is
invoked only to lay out types and back-annotate type information.
Fixed by lifting the assertion in -gnatct mode, as this corner case doesn't
seem to warrant a significant change either in gigi or the front-end proper.
Tested on i586-suse-linux, applied on the mainline.
2011-11-04 Eric Botcazou
* gcc-interface/decl.c (gnat_to_gnu_entity) : Do not assert
that the type of the parameters isn't dummy in type_annotate_only mode.
2011-11-04 Eric Botcazou
* gnat.dg/specs/private1[-sub].ads: New test.
--
Eric Botcazou
Index: gcc-interface/decl.c
===
--- gcc-interface/decl.c (revision 180818)
+++ gcc-interface/decl.c (working copy)
@@ -4185,7 +4185,8 @@ gnat_to_gnu_entity (Entity_Id gnat_entit
/* The failure of this assertion will very likely come from an
order of elaboration issue for the type of the parameter. */
gcc_assert (kind == E_Subprogram_Type
- || !TYPE_IS_DUMMY_P (gnu_param_type));
+ || !TYPE_IS_DUMMY_P (gnu_param_type)
+ || type_annotate_only);
if (gnu_param)
{
package Private1 is
type T is private;
private
type T is new Boolean;
end Private1;
-- { dg-do compile }
-- { dg-options "-gnatct" }
package Private1.Sub is
package Nested is
type T is limited private;
function "=" (X, Y : T) return Boolean;
private
type T is new Private1.T;
end Nested;
end Private1.Sub;
Re: RFA: Fix dse / postreload not to bypass add expanders
Quoting Paolo Bonzini : Unless I'm missing something, this is going all the way down to the end of the function, bypassing the CFG, so it is neither efficient nor correct. new_insn hasn't been emitted yet, hence it is a single insn or a short chain of insn to implement a no-op move (for a post-modify with zero offset) or, more likely, a two-address add.
Re: [PATCH] [Annotalysis] Fix ICE caused by ipa-sra optimization.
Hi,
On Thu, Nov 03, 2011 at 09:09:24AM -0700, Delesley Hutchins wrote:
> Let's try this again; perhaps I should learn to use e-mail. :-)
>
> This patch fixes an ICE caused when the ipa-sra optimization deletes
> function arguments that are referenced from within a thread safety
> attribute. It will attempt to detect this situation and recover
> gracefully. Since a graceful recovery is not always possible, an
> optional warning (-Wwarn-thread-optimization) can be turned on to
> inform the user that certain attributes have been removed by
> optimization.
I know basically nothing about the analysis (what it does, at what
point it runs) but from looking at the patch, it seems you're
basically running into problems when you don't have the parameters you
expect from annotations in the function declaration. Have you
considered examining DECL_ABSTRACT_ORIGIN? If non-NULL, the function
you are looking at is some sort of a clone (created by ipa-sra, ipa-cp
or ipa-split and others may follow) and DECL_ABSTRACT_ORIGIN is the
original declaration with the original PARM_DECLs and stuff that might
help you not only recover but perhaps even perform what you want to?
(Of course, ipa-sra removes scalar parameters only when they are not
used in the first place and so there should be nothing to analyze.)
Martin
>
> Bootstrapped and passed gcc regression testsuite on
> x86_64-unknown-linux-gnu. Okay for google/gcc-4_6?
>
> -DeLesley
>
> Changelog.google-4_6:
> 2011-11-02 DeLesley Hutchins
> * tree-threadsafe-analyze.c:
> Ignores invalid attributes, issues a warning, recovers gracefully.
>* common.opt:
> Adds new thread safety warning.
>
> testsuite/Changelog.google-4_6:
> 2011-11-02 DeLesley Hutchins
> * g++.dg/thread-ann/thread_annot_lock-82.C:
> Expanded regression test
>
> --
> DeLesley Hutchins | Software Engineer | deles...@google.com | 505-206-0315
> Index: testsuite/g++.dg/thread-ann/thread_annot_lock-82.C
> ===
> --- testsuite/g++.dg/thread-ann/thread_annot_lock-82.C(revision
> 180716)
> +++ testsuite/g++.dg/thread-ann/thread_annot_lock-82.C(working copy)
> @@ -1,7 +1,7 @@
> -// Test template methods in the presence of cloned constructors.
> -// Regression test for bugfix.
> +// Regression tests: fix ICE issues when IPA-SRA deletes formal
> +// function parameters.
> // { dg-do compile }
> -// { dg-options "-Wthread-safety -O3" }
> +// { dg-options "-Wthread-safety -Wthread-warn-optimization -O3" }
>
> #include "thread_annot_common.h"
>
> @@ -10,6 +10,7 @@ void do_something(void* a);
>
> class Foo {
>Mutex mu_;
> + int a GUARDED_BY(mu_);
>
>// with optimization turned on, ipa-sra should eliminate the hidden
>// "this" argument, thus invalidating EXCLUSIVE_LOCKS_REQUIRED.
> @@ -18,6 +19,7 @@ class Foo {
>}
>
>void foo(Foo* f);
> + void bar();
> };
>
> void Foo::foo(Foo* f) {
> @@ -28,3 +30,17 @@ void Foo::foo(Foo* f) {
>mu_.Unlock();
> }
>
> +
> +class SCOPED_LOCKABLE DummyMutexLock {
> +public:
> + // IPA-SRA should kill the parameters to these functions
> + explicit DummyMutexLock(Mutex* mutex) EXCLUSIVE_LOCK_FUNCTION(mutex) {}
> + ~DummyMutexLock() UNLOCK_FUNCTION() {}
> +};
> +
> +
> +void Foo::bar() {
> + // Matches two warnings:
> + DummyMutexLock dlock(&mu_); // { dg-warning "attribute has been removed
> by optimization." }
> + a = 1; // warning here should be suppressed, due to errors handling dlock
> +}
> Index: common.opt
> ===
> --- common.opt(revision 180716)
> +++ common.opt(working copy)
> @@ -680,6 +680,10 @@ Wthread-attr-bind-param
> Common Var(warn_thread_attr_bind_param) Init(1) Warning
> Make the thread safety analysis try to bind the function parameters used in
> the attributes
>
> +Wthread-warn-optimization
> +Common Var(warn_thread_optimization) Init(0) Warning
> +Warn when optimizations invalidate the thread safety analysis.
> +
> Wtype-limits
> Common Var(warn_type_limits) Init(-1) Warning
> Warn if a comparison is always true or always false due to the limited range
> of the data type
> Index: tree-threadsafe-analyze.c
> ===
> --- tree-threadsafe-analyze.c (revision 180716)
> +++ tree-threadsafe-analyze.c (working copy)
> @@ -1594,7 +1594,10 @@ get_actual_argument_from_position (gimple call, tr
>
>lock_pos = TREE_INT_CST_LOW (pos_arg);
>
> - gcc_assert (lock_pos >= 1 && lock_pos <= num_args);
> + /* The ipa-sra optimization can occasionally delete arguments, thus
> + invalidating the index. */
> + if (lock_pos < 1 || lock_pos > num_args)
> +return NULL_TREE;
>
>/* The lock position specified in the attributes is 1-based, so we need to
> subtract 1 from it when accessing the call arguments. */
> @@ -1734,7 +1737,27 @@ handl
Re: [PATCH] Fix up floatunsv{4,8}siv{4,8}sf2
On Thu, Nov 03, 2011 at 08:01:21PM +0100, Uros Bizjak wrote:
> On Thu, Nov 3, 2011 at 6:54 PM, Jakub Jelinek wrote:
> > So, what do you prefer and do you want the expander to be moved into
> > i386.c or kept like this? Do we perhaps want for -ffast-math
> > keep the slightly faster, but imprecise version (I'd prefer not to)?
>
> IMO, let's go with the fastest solution (X313c), but please move
> expander to i386.c.
Here is what I've committed after bootstrapping/regtesting it on
x86_64-linux and i686-linux again.
2011-11-04 Jakub Jelinek
* config/i386/i386.c (ix86_expand_vector_convert_uns_vsivsf): New
function.
* config/i386/i386-protos.h (ix86_expand_vector_convert_uns_vsivsf):
New prototype.
* config/i386/sse.md (floatuns2): Use it.
For floatunsv8siv8sf2 require TARGET_AVX2.
* gcc.dg/torture/vec-cvt-1.c: Enable commented out inttoflttestui
test.
--- gcc/config/i386/i386.c.jj 2011-11-04 07:55:07.0 +0100
+++ gcc/config/i386/i386.c 2011-11-04 08:10:24.0 +0100
@@ -17016,6 +17016,43 @@ ix86_expand_convert_uns_sisf_sse (rtx ta
emit_move_insn (target, fp_hi);
}
+/* floatunsv{4,8}siv{4,8}sf2 expander. Expand code to convert
+ a vector of unsigned ints VAL to vector of floats TARGET. */
+
+void
+ix86_expand_vector_convert_uns_vsivsf (rtx target, rtx val)
+{
+ rtx tmp[8];
+ REAL_VALUE_TYPE TWO16r;
+ enum machine_mode intmode = GET_MODE (val);
+ enum machine_mode fltmode = GET_MODE (target);
+ rtx (*cvt) (rtx, rtx);
+
+ if (intmode == V4SImode)
+cvt = gen_floatv4siv4sf2;
+ else
+cvt = gen_floatv8siv8sf2;
+ tmp[0] = ix86_build_const_vector (intmode, 1, GEN_INT (0x));
+ tmp[0] = force_reg (intmode, tmp[0]);
+ tmp[1] = expand_simple_binop (intmode, AND, val, tmp[0], NULL_RTX, 1,
+ OPTAB_DIRECT);
+ tmp[2] = expand_simple_binop (intmode, LSHIFTRT, val, GEN_INT (16),
+ NULL_RTX, 1, OPTAB_DIRECT);
+ tmp[3] = gen_reg_rtx (fltmode);
+ emit_insn (cvt (tmp[3], tmp[1]));
+ tmp[4] = gen_reg_rtx (fltmode);
+ emit_insn (cvt (tmp[4], tmp[2]));
+ real_ldexp (&TWO16r, &dconst1, 16);
+ tmp[5] = const_double_from_real_value (TWO16r, SFmode);
+ tmp[5] = force_reg (fltmode, ix86_build_const_vector (fltmode, 1, tmp[5]));
+ tmp[6] = expand_simple_binop (fltmode, MULT, tmp[4], tmp[5], NULL_RTX, 1,
+ OPTAB_DIRECT);
+ tmp[7] = expand_simple_binop (fltmode, PLUS, tmp[3], tmp[6], target, 1,
+ OPTAB_DIRECT);
+ if (tmp[7] != target)
+emit_move_insn (target, tmp[7]);
+}
+
/* Adjust a V*SFmode/V*DFmode value VAL so that *sfix_trunc* resp. fix_trunc*
pattern can be used on it instead of *ufix_trunc* resp. fixuns_trunc*.
This is done by doing just signed conversion if < 0x1p31, and otherwise by
--- gcc/config/i386/i386-protos.h.jj2011-11-04 07:55:07.0 +0100
+++ gcc/config/i386/i386-protos.h 2011-11-04 08:10:34.0 +0100
@@ -109,6 +109,7 @@ extern void ix86_expand_convert_uns_sixf
extern void ix86_expand_convert_uns_sidf_sse (rtx, rtx);
extern void ix86_expand_convert_uns_sisf_sse (rtx, rtx);
extern void ix86_expand_convert_sign_didf_sse (rtx, rtx);
+extern void ix86_expand_vector_convert_uns_vsivsf (rtx, rtx);
extern rtx ix86_expand_adjust_ufix_to_sfix_si (rtx, rtx *);
extern enum ix86_fpcmp_strategy ix86_fp_comparison_strategy (enum rtx_code);
extern void ix86_expand_fp_absneg_operator (enum rtx_code, enum machine_mode,
--- gcc/config/i386/sse.md.jj 2011-11-04 07:55:07.0 +0100
+++ gcc/config/i386/sse.md 2011-11-04 08:10:46.0 +0100
@@ -2242,30 +2242,12 @@ (define_insn "float<
(set_attr "mode" "")])
(define_expand "floatuns2"
- [(set (match_dup 5)
- (float:VF1
- (match_operand: 1 "nonimmediate_operand" "")))
- (set (match_dup 6)
- (lt:VF1 (match_dup 5) (match_dup 3)))
- (set (match_dup 7)
- (and:VF1 (match_dup 6) (match_dup 4)))
- (set (match_operand:VF1 0 "register_operand" "")
- (plus:VF1 (match_dup 5) (match_dup 7)))]
- "TARGET_SSE2"
+ [(match_operand:VF1 0 "register_operand" "")
+ (match_operand: 1 "register_operand" "")]
+ "TARGET_SSE2 && (mode == V4SFmode || TARGET_AVX2)"
{
- REAL_VALUE_TYPE TWO32r;
- rtx x;
- int i;
-
- real_ldexp (&TWO32r, &dconst1, 32);
- x = const_double_from_real_value (TWO32r, SFmode);
-
- operands[3] = force_reg (mode, CONST0_RTX (mode));
- operands[4] = force_reg (mode,
- ix86_build_const_vector (mode, 1, x));
-
- for (i = 5; i < 8; i++)
-operands[i] = gen_reg_rtx (mode);
+ ix86_expand_vector_convert_uns_vsivsf (operands[0], operands[1]);
+ DONE;
})
(define_insn "avx_cvtps2dq256"
--- gcc/testsuite/gcc.dg/torture/vec-cvt-1.c.jj 2011-11-04 07:55:07.0
+0100
+++ gcc/testsuite/gcc.dg/torture/vec-cvt-1.c2011-11-04 07:56:30.0
+0100
@@ -205,7 +205,7 @@ main ()
inttoflttestsl ();
intto
Re: [patch] Rewrite SLP analysis towards support of operations with any number of operands
On 4 November 2011 09:50, Jakub Jelinek wrote:
> The Changelog entry doesn't mention tree-vect-data-refs.c at all, yet
> the patch modifies it and the commit too.
> To me it looks like you've reverted the tree-vect-data-refs.c part
> of your PR50730
> http://gcc.gnu.org/viewcvs?root=gcc&view=rev&rev=180367
> change and as can be seen on gcc-testresults, the testcase now fails
> FAIL: gcc.dg/vect/no-tree-sra-bb-slp-pr50730.c scan-tree-dump-times slp "not
> vectorized: more than one data ref in stmt" 0
>
> Was it intentional?
No, I don't understand how it happened. Thanks for noticing!
I'll unrevert it after testing on powerpc64-suse-linux.
Thanks,
Ira
>
>
> Jakub
>
Index: ChangeLog
===
--- ChangeLog (revision 180930)
+++ ChangeLog (working copy)
@@ -1,3 +1,12 @@
+2011-11-04 Ira Rosen
+
+ Unrevert:
+ 2011-10-24 Ira Rosen
+
+ PR tree-optimization/50730
+ * tree-vect-data-refs.c (vect_analyze_data_refs): Stop basic block
+ analysis if encountered unsupported data-ref.
+
2011-11-04 Tristan Gingold
* config/alpha/alpha.c (alpha_write_linkage): Remove fundecl
Index: tree-vect-data-refs.c
===
--- tree-vect-data-refs.c (revision 180930)
+++ tree-vect-data-refs.c (working copy)
@@ -2524,7 +2524,7 @@ vect_analyze_data_refs (loop_vec_info loop_vinfo,
VEC (data_reference_p, heap) *datarefs;
struct data_reference *dr;
tree scalar_type;
- bool res;
+ bool res, stop_bb_analysis = false;
if (vect_print_dump_info (REPORT_DETAILS))
fprintf (vect_dump, "=== vect_analyze_data_refs ===\n");
@@ -2586,6 +2586,12 @@ vect_analyze_data_refs (loop_vec_info loop_vinfo,
stmt = DR_STMT (dr);
stmt_info = vinfo_for_stmt (stmt);
+ if (stop_bb_analysis)
+{
+ STMT_VINFO_VECTORIZABLE (stmt_info) = false;
+ continue;
+}
+
/* Check that analysis of the data-ref succeeded. */
if (!DR_BASE_ADDRESS (dr) || !DR_OFFSET (dr) || !DR_INIT (dr)
|| !DR_STEP (dr))
@@ -2596,6 +2602,13 @@ vect_analyze_data_refs (loop_vec_info loop_vinfo,
print_gimple_stmt (vect_dump, stmt, 0, TDF_SLIM);
}
+ if (bb_vinfo)
+{
+ STMT_VINFO_VECTORIZABLE (stmt_info) = false;
+ stop_bb_analysis = true;
+ continue;
+}
+
return false;
}
@@ -2604,7 +2617,15 @@ vect_analyze_data_refs (loop_vec_info loop_vinfo,
if (vect_print_dump_info (REPORT_UNVECTORIZED_LOCATIONS))
fprintf (vect_dump, "not vectorized: base addr of dr is a "
"constant");
- return false;
+
+ if (bb_vinfo)
+{
+ STMT_VINFO_VECTORIZABLE (stmt_info) = false;
+ stop_bb_analysis = true;
+ continue;
+}
+
+ return false;
}
if (TREE_THIS_VOLATILE (DR_REF (dr)))
@@ -2614,6 +2635,14 @@ vect_analyze_data_refs (loop_vec_info loop_vinfo,
fprintf (vect_dump, "not vectorized: volatile type ");
print_gimple_stmt (vect_dump, stmt, 0, TDF_SLIM);
}
+
+ if (bb_vinfo)
+{
+ STMT_VINFO_VECTORIZABLE (stmt_info) = false;
+ stop_bb_analysis = true;
+ continue;
+}
+
return false;
}
@@ -2629,6 +2658,14 @@ vect_analyze_data_refs (loop_vec_info loop_vinfo,
"exception ");
print_gimple_stmt (vect_dump, stmt, 0, TDF_SLIM);
}
+
+ if (bb_vinfo)
+{
+ STMT_VINFO_VECTORIZABLE (stmt_info) = false;
+ stop_bb_analysis = true;
+ continue;
+}
+
return false;
}
@@ -2746,6 +2783,14 @@ vect_analyze_data_refs (loop_vec_info loop_vinfo,
"not vectorized: more than one data ref in stmt: ");
print_gimple_stmt (vect_dump, stmt, 0, TDF_SLIM);
}
+
+ if (bb_vinfo)
+{
+ STMT_VINFO_VECTORIZABLE (stmt_info) = false;
+ stop_bb_analysis = true;
+ continue;
+}
+
return false;
}
@@ -2770,6 +2815,7 @@ vect_analyze_data_refs (loop_vec_info loop_vinfo,
{
/* Mark the statement as not vectorizable. */
STMT_VINFO_VECTORIZABLE (stmt_info) = false;
+ stop_bb_analysis = true;
continue;
}
else
[Ada] Detect more cases of Long_Float inconsistencies at compile time
This patch causes more cases of inconsistent use of pragma Long_Float to
be caught at compile time. This gives better messages earlier, and also
avoids some blowups due to inconsistent usage.
The following is pkg1.adb compiled with -gnatdm -gnatld7 -gnatj60
Compiling: pkg1.adb
1. package body Pkg1 is
2.procedure Sep is separate;
3. end Pkg1;
Compiling: pkg1.ads
1. package Pkg1 is
2.F1 : Float := 12.5;
3.
4.procedure Sep;
5. end Pkg1;
Compiling: pkg1-sep.adb
1. with Ada.Text_IO; use Ada.Text_IO;
2. with T1;
3.
4. separate (Pkg1)
5. procedure Sep is
6. begin
7.Put_Line (Float'Image (T1.F2));
8. end Sep;
9.
==Error messages for source file: t1.ads
1. pragma Long_Float(G_Float);
|
>>> main unit not compiled with pragma Long_Float
(G_Float), pragma "Long_Float" must be used
consistently for whole partition
The source file t1.ads is:
1. pragma Long_Float(G_Float);
2.
3. package T1 is
4.subtype F is Float;
5.
6.F2 : F := 4.5;
7. end T1;
Tested on x86_64-pc-linux-gnu, committed on trunk
2011-11-04 Robert Dewar
* sem_prag.adb: Detect more cases of Long_Float inconsistencies at
compile time.
Index: sem_prag.adb
===
--- sem_prag.adb(revision 180929)
+++ sem_prag.adb(working copy)
@@ -10952,7 +10952,8 @@
-- pragma Long_Float (D_Float | G_Float);
- when Pragma_Long_Float =>
+ when Pragma_Long_Float => Long_Float : declare
+ begin
GNAT_Pragma;
Check_Valid_Configuration_Pragma;
Check_Arg_Count (1);
@@ -10967,22 +10968,42 @@
if Chars (Get_Pragma_Arg (Arg1)) = Name_D_Float then
if Opt.Float_Format_Long = 'G' then
- Error_Pragma ("G_Float previously specified");
+ Error_Pragma_Arg
+("G_Float previously specified", Arg1);
+
+ elsif Current_Sem_Unit /= Main_Unit
+ and then Opt.Float_Format_Long /= 'D'
+ then
+ Error_Pragma_Arg
+("main unit not compiled with pragma Long_Float (D_Float)",
+ "\pragma% must be used consistently for whole partition",
+ Arg1);
+
+ else
+ Opt.Float_Format_Long := 'D';
end if;
- Opt.Float_Format_Long := 'D';
-
-- G_Float case (this is the default, does not need overriding)
else
if Opt.Float_Format_Long = 'D' then
Error_Pragma ("D_Float previously specified");
+
+ elsif Current_Sem_Unit /= Main_Unit
+ and then Opt.Float_Format_Long /= 'G'
+ then
+ Error_Pragma_Arg
+("main unit not compiled with pragma Long_Float (G_Float)",
+ "\pragma% must be used consistently for whole partition",
+ Arg1);
+
+ else
+ Opt.Float_Format_Long := 'G';
end if;
-
- Opt.Float_Format_Long := 'G';
end if;
Set_Standard_Fpt_Formats;
+ end Long_Float;
---
-- Machine_Attribute --
[Ada] Add case-insensitive string operations
Ada 2012 added case-insensitive string operations for hashing
(Hash_Case_Insensitive), tests for equality (Equal_Case_Insensitive), and tests
for lexicographical order (Less_Case_Insensitive), per AI05-0001.
The text of AI05-0001 can be found here:
http://www.ada-auth.org/cgi-bin/cvsweb.cgi/ai05s/ai05-0001-1.txt
Tested on x86_64-pc-linux-gnu, committed on trunk
2011-11-04 Matthew Heaney
* Makefile.rtl, impunit.adb: Added a-sfecin.ads,
* a-sfhcin.ads, a-sflcin.ads, a-sbecin.ad[sb], a-sbhcin.ad[sb],
a-sblcin.ad[sb], a-suecin.ad[sb], a-suhcin.ad[sb], a-sulcin.ad[sb]
* a-sfecin.ads, a-sfhcin.ads, a-sflcin.ads, a-sbecin.ad[sb],
a-sbhcin.ad[sb], a-sblcin.ad[sb], a-suecin.ad[sb], a-suhcin.ad[sb],
a-sulcin.ad[sb]: New files.
Index: impunit.adb
===
--- impunit.adb (revision 180929)
+++ impunit.adb (working copy)
@@ -487,9 +487,6 @@
("a-ciormu", F), -- Ada.Containers.Indefinite_Ordered_Multisets
("a-coormu", F), -- Ada.Containers.Ordered_Multisets
("a-crdlli", F), -- Ada.Containers.Restricted_Doubly_Linked_Lists
-("a-secain", F), -- Ada.Strings.Equal_Case_Insensitive
-("a-shcain", F), -- Ada.Strings.Hash_Case_Insensitive
-("a-slcain", F), -- Ada.Strings.Less_Case_Insensitive
("a-szuzti", F), -- Ada.Strings.Wide_Wide_Unbounded.Wide_Wide_Text_IO
("a-zchuni", F), -- Ada.Wide_Wide_Characters.Unicode
("a-ztcstr", F), -- Ada.Wide_Wide_Text_IO.C_Streams
@@ -497,6 +494,18 @@
-- Note: strictly the following should be Ada 2012 units, but it seems
-- harmless (and useful) to make then available in Ada 2005 mode.
+("a-secain", T), -- Ada.Strings.Equal_Case_Insensitive
+("a-shcain", T), -- Ada.Strings.Hash_Case_Insensitive
+("a-slcain", T), -- Ada.Strings.Less_Case_Insensitive
+("a-sfecin", T), -- Ada.Strings.Fixed.Equal_Case_Insensitive
+("a-sfhcin", T), -- Ada.Strings.Fixed.Hash_Case_Insensitive
+("a-sflcin", T), -- Ada.Strings.Fixed.Less_Case_Insensitive
+("a-sbecin", T), -- Ada.Strings.Bounded.Equal_Case_Insensitive
+("a-sbhcin", T), -- Ada.Strings.Bounded.Hash_Case_Insensitive
+("a-sblcin", T), -- Ada.Strings.Bounded.Less_Case_Insensitive
+("a-suecin", T), -- Ada.Strings.Unbounded.Equal_Case_Insensitive
+("a-suhcin", T), -- Ada.Strings.Unbounded.Hash_Case_Insensitive
+("a-sulcin", T), -- Ada.Strings.Unbounded.Less_Case_Insensitive
("a-suezst", T), -- Ada.Strings.UTF_Encoding.Wide_Wide_Strings
---
Index: a-sbhcin.adb
===
--- a-sbhcin.adb(revision 0)
+++ a-sbhcin.adb(revision 0)
@@ -0,0 +1,38 @@
+--
+-- --
+-- GNAT LIBRARY COMPONENTS --
+-- --
+-- ADA.STRINGS.BOUNDED.HASH_CASE_INSENSITIVE--
+-- --
+--B o d y --
+-- --
+--Copyright (C) 2011, Free Software Foundation, Inc.--
+-- --
+-- GNAT is free software; you can redistribute it and/or modify it under --
+-- terms of the GNU General Public License as published by the Free Soft- --
+-- ware Foundation; either version 3, or (at your option) any later ver- --
+-- sion. GNAT is distributed in the hope that it will be useful, but WITH- --
+-- OUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY --
+-- or FITNESS FOR A PARTICULAR PURPOSE. --
+-- --
+-- As a special exception under Section 7 of GPL version 3, you are granted --
+-- additional permissions described in the GCC Runtime Library Exception, --
+-- version 3.1, as published by the Free Software Foundation. --
+-- --
+-- You should have received a copy of the GNU General Public License and--
+-- a copy of the GCC Runtime Library Exception along with this program; --
+-- see the files COPYING3 and COPYING.RUNTIME respectively. If not, see--
+--
[PATCH] Optimize v*gather* with masks with all high bits set
Hi!
This patch on top of the vgather* vectorization patch optimizes
what has been discussed in:
http://gcc.gnu.org/ml/gcc/2011-11/msg00078.html
2011-11-04 Jakub Jelinek
* config/i386/i386.c (ix86_expand_builtin): If gather mask
argument is known to have all high bits set, pass pc_rtx as
second argument to the expander instead of op0.
* config/i386/sse.md (*avx2_gathersi_2,
*avx2_gatherdi_2): New patterns.
* config/i386/avx2intrin.h (_mm256_i32gather_pd,
_mm256_i64gather_pd, _mm256_i32gather_ps): Set mask using
_mm256_cmp_pd with zero vector arguments and _CMP_EQ_OQ instead of
_mm256_set1_pd.
--- gcc/config/i386/i386.c.jj 2011-11-04 08:53:13.0 +0100
+++ gcc/config/i386/i386.c 2011-11-04 09:57:29.0 +0100
@@ -29002,6 +29002,71 @@ rdrand_step:
error ("last argument must be scale 1, 2, 4, 8");
return const0_rtx;
}
+
+ /* Optimize. If mask is known to have all high bits set,
+replace op0 with pc_rtx to signal that the instruction
+overwrites the whole destination and doesn't use its
+previous contents. */
+ if (optimize)
+ {
+ if (TREE_CODE (arg3) == VECTOR_CST)
+ {
+ tree elt;
+ unsigned int negative = 0;
+ for (elt = TREE_VECTOR_CST_ELTS (arg3);
+ elt; elt = TREE_CHAIN (elt))
+ {
+ tree cst = TREE_VALUE (elt);
+ if (TREE_CODE (cst) == INTEGER_CST
+ && tree_int_cst_sign_bit (cst))
+ negative++;
+ else if (TREE_CODE (cst) == REAL_CST
+ && REAL_VALUE_NEGATIVE (TREE_REAL_CST (cst)))
+ negative++;
+ }
+ if (negative == TYPE_VECTOR_SUBPARTS (TREE_TYPE (arg3)))
+ op0 = pc_rtx;
+ }
+ else if (TREE_CODE (arg3) == SSA_NAME)
+ {
+ /* Recognize also when mask is like:
+__v2df src = _mm_setzero_pd ();
+__v2df mask = _mm_cmpeq_pd (src, src);
+or
+__v8sf src = _mm256_setzero_ps ();
+__v8sf mask = _mm256_cmp_ps (src, src, _CMP_EQ_OQ);
+as that is a cheaper way to load all ones into
+a register than having to load a constant from
+memory. */
+ gimple def_stmt = SSA_NAME_DEF_STMT (arg3);
+ if (is_gimple_call (def_stmt))
+ {
+ tree fndecl = gimple_call_fndecl (def_stmt);
+ if (fndecl
+ && DECL_BUILT_IN_CLASS (fndecl) == BUILT_IN_MD)
+ switch ((unsigned int) DECL_FUNCTION_CODE (fndecl))
+ {
+ case IX86_BUILTIN_CMPPD:
+ case IX86_BUILTIN_CMPPS:
+ case IX86_BUILTIN_CMPPD256:
+ case IX86_BUILTIN_CMPPS256:
+ if (!integer_zerop (gimple_call_arg (def_stmt, 2)))
+ break;
+ /* FALLTHRU */
+ case IX86_BUILTIN_CMPEQPD:
+ case IX86_BUILTIN_CMPEQPS:
+ if (initializer_zerop (gimple_call_arg (def_stmt, 0))
+ && initializer_zerop (gimple_call_arg (def_stmt,
+ 1)))
+ op0 = pc_rtx;
+ break;
+ default:
+ break;
+ }
+ }
+ }
+ }
+
pat = GEN_FCN (icode) (subtarget, op0, op1, op2, op3, op4);
if (! pat)
return const0_rtx;
--- gcc/config/i386/sse.md.jj 2011-11-04 08:53:13.0 +0100
+++ gcc/config/i386/sse.md 2011-11-04 10:20:55.0 +0100
@@ -12565,6 +12565,26 @@ (define_insn "*avx2_gathersi"
(set_attr "prefix" "vex")
(set_attr "mode" "")])
+(define_insn "*avx2_gathersi_2"
+ [(set (match_operand:VEC_GATHER_MODE 0 "register_operand" "=&x")
+ (unspec:VEC_GATHER_MODE
+ [(pc)
+ (match_operator: 6 "vsib_mem_operator"
+[(unspec:P
+ [(match_operand:P 2 "vsib_address_operand" "p")
+(match_operand: 3 "register_operand" "x")
+(match_operand:SI 5 "const1248_operand" "n")]
+ UNSPEC_VSIBADDR)])
+ (mem:BLK (scratch))
+ (match_operand:VEC_GATHER_MODE 4 "register_operand" "1")]
+ UNSPEC_GATHER))
+ (clobber (match_scratch:VEC_GATHER_MODE 1 "=&x"))]
+ "TARGET_AVX2"
+ "vgatherd\t{%1, %6, %0|%0, %6, %1}"
+ [(set_attr "type" "ssemov")
+ (set_attr "prefix" "vex")
+ (set_attr "mode" "")])
+
(define_expand "avx2_gatherdi"
[(parallel [(set (match_operand:VEC_GATHER_MODE 0 "register_operand" "")
(unspec:VEC_GATHER_MODE
@@ -12606,3 +12626
Re: [patch] 3/n: trans-mem: runtime
On Thu, 2011-11-03 at 23:24 +, Joseph S. Myers wrote: > On Thu, 3 Nov 2011, Torvald Riegel wrote: > > > On Thu, 2011-11-03 at 16:18 -0500, Aldy Hernandez wrote: > > > On 11/03/11 15:42, Joseph S. Myers wrote: > > > > Also, you should actually remove the gpl.texi and funding.texi includes > > > > as > > > > part of removing the Invariant Sections. > > > > > > > > > > Torvald, similarly here. Please wait for Joseph's approval of your > > > patch, and then commit. > > > > Joseph, > > > > is this what you had in mind? OK for branch? > > Yes, this looks right to me. OK. > Committed to branch.
[Ada] Atomic_Synchronization applies to types as well as variables
This patch corrects an oversight in the previous checkin for handling
Atomic_Synchronization. This applies to types as well as to variables.
1. pragma Disable_Atomic_Synchronization;
2. procedure AtSyncT is
3.type Int is new Integer;
4.pragma Atomic (Int);
5.X : Int := 1;
6.Y : Int := 1;
7.
8.pragma Enable_Atomic_Synchronization (Int);
9.
10. begin
11.X := Y;
12
>>> info: atomic synchronization set for "X"
>>> info: atomic synchronization set for "Y"
12.AtSyncT.Y := AtSyncT.X;
12
>>> info: atomic synchronization set for "Y"
>>> info: atomic synchronization set for "X"
13.
14.declare
15. pragma Disable_Atomic_Synchronization (Int);
16.begin
17. X := Y;
18.end;
19.
20.X := Y;
12
>>> info: atomic synchronization set for "X"
>>> info: atomic synchronization set for "Y"
21. end;
Tested on x86_64-pc-linux-gnu, committed on trunk
2011-11-04 Robert Dewar
* exp_ch2.adb (Expand_Entity_Reference): Extend handling of
atomic sync to type case.
* sem_prag.adb (Process_Suppress_Unsuppress): Atomic Sync can
apply to types.
Index: sem_prag.adb
===
--- sem_prag.adb(revision 180935)
+++ sem_prag.adb(working copy)
@@ -5465,7 +5465,7 @@
and then not Is_Atomic (E)
then
Error_Msg_N
- ("pragma & requires atomic variable",
+ ("pragma & requires atomic type or variable",
Pragma_Identifier (Original_Node (N)));
end if;
Index: exp_ch2.adb
===
--- exp_ch2.adb (revision 180934)
+++ exp_ch2.adb (working copy)
@@ -401,7 +401,9 @@
-- Set Atomic_Sync_Required if necessary for atomic variable
- if Is_Atomic (E) then
+ if Nkind_In (N, N_Identifier, N_Expanded_Name)
+and then (Is_Atomic (E) or else Is_Atomic (Etype (E)))
+ then
declare
Set : Boolean;
MLoc : Node_Id;
@@ -417,10 +419,25 @@
elsif Debug_Flag_Dot_D then
Set := False;
--- Otherwise setting comes from Atomic_Synchronization state
+-- If variable is atomic, but type is not, setting depends on
+-- disable/enable state for the variable.
+elsif Is_Atomic (E) and then not Is_Atomic (Etype (E)) then
+ Set := not Atomic_Synchronization_Disabled (E);
+
+-- If variable is not atomic, but its type is atomic, setting
+-- depends on disable/enable state for the type.
+
+elsif not Is_Atomic (E) and then Is_Atomic (Etype (E)) then
+ Set := not Atomic_Synchronization_Disabled (Etype (E));
+
+-- Else both variable and type are atomic (see outer if), and we
+-- disable if either variable or its type have sync disabled.
+
else
- Set := not Atomic_Synchronization_Disabled (E);
+ Set := (not Atomic_Synchronization_Disabled (E))
+and then
+ (not Atomic_Synchronization_Disabled (Etype (E)));
end if;
-- Set flag if required
Re: [patch] 19/n: trans-mem: middle end/misc patches (LAST PATCH)
On Thu, Nov 3, 2011 at 8:32 PM, Aldy Hernandez wrote:
> This is everything else that doesn't fit neatly into any other category.
> Here are the middle end changes, as well as pass ordering code, along with
> varasm and a potpourri of other small changes.
>
> This is the last patch. Please let me know if there is anything else
> (reasonable) you would like me to post.
>
> Index: gcc/cgraph.h
> ===
> --- gcc/cgraph.h (.../trunk) (revision 180744)
> +++ gcc/cgraph.h (.../branches/transactional-memory) (revision
> 180773)
> @@ -98,6 +98,9 @@ struct GTY(()) cgraph_local_info {
> /* True when the function has been originally extern inline, but it is
> redefined now. */
> unsigned redefined_extern_inline : 1;
> +
> + /* True if the function may enter serial irrevocable mode. */
> + unsigned tm_may_enter_irr : 1;
> };
>
> /* Information about the function that needs to be computed globally
> @@ -565,6 +568,8 @@ void verify_cgraph_node (struct cgraph_n
> void cgraph_build_static_cdtor (char which, tree body, int priority);
> void cgraph_reset_static_var_maps (void);
> void init_cgraph (void);
> +struct cgraph_node * cgraph_copy_node_for_versioning (struct cgraph_node *,
> + tree, VEC(cgraph_edge_p,heap)*, bitmap);
> struct cgraph_node *cgraph_function_versioning (struct cgraph_node *,
> VEC(cgraph_edge_p,heap)*,
> VEC(ipa_replace_map_p,gc)*,
> Index: gcc/tree-pass.h
> ===
> --- gcc/tree-pass.h (.../trunk) (revision 180744)
> +++ gcc/tree-pass.h (.../branches/transactional-memory) (revision
> 180773)
> @@ -447,6 +447,12 @@ extern struct gimple_opt_pass pass_build
> extern struct gimple_opt_pass pass_local_pure_const;
> extern struct gimple_opt_pass pass_tracer;
> extern struct gimple_opt_pass pass_warn_unused_result;
> +extern struct gimple_opt_pass pass_diagnose_tm_blocks;
> +extern struct gimple_opt_pass pass_lower_tm;
> +extern struct gimple_opt_pass pass_tm_init;
> +extern struct gimple_opt_pass pass_tm_mark;
> +extern struct gimple_opt_pass pass_tm_memopt;
> +extern struct gimple_opt_pass pass_tm_edges;
> extern struct gimple_opt_pass pass_split_functions;
> extern struct gimple_opt_pass pass_feedback_split_functions;
>
> @@ -469,6 +475,7 @@ extern struct ipa_opt_pass_d pass_ipa_pu
> extern struct simple_ipa_opt_pass pass_ipa_pta;
> extern struct ipa_opt_pass_d pass_ipa_lto_wpa_fixup;
> extern struct ipa_opt_pass_d pass_ipa_lto_finish_out;
> +extern struct simple_ipa_opt_pass pass_ipa_tm;
> extern struct ipa_opt_pass_d pass_ipa_profile;
> extern struct ipa_opt_pass_d pass_ipa_cdtor_merge;
>
> Index: gcc/rtlanal.c
> ===
> --- gcc/rtlanal.c (.../trunk) (revision 180744)
> +++ gcc/rtlanal.c (.../branches/transactional-memory) (revision
> 180773)
> @@ -1918,6 +1918,7 @@ alloc_reg_note (enum reg_note kind, rtx
> case REG_CC_USER:
> case REG_LABEL_TARGET:
> case REG_LABEL_OPERAND:
> + case REG_TM:
> /* These types of register notes use an INSN_LIST rather than an
> EXPR_LIST, so that copying is done right and dumps look
> better. */
> Index: gcc/omp-low.c
> ===
> --- gcc/omp-low.c (.../trunk) (revision 180744)
> +++ gcc/omp-low.c (.../branches/transactional-memory) (revision
> 180773)
> @@ -139,6 +139,7 @@ static tree scan_omp_1_op (tree *, int *
> case GIMPLE_TRY: \
> case GIMPLE_CATCH: \
> case GIMPLE_EH_FILTER: \
> + case GIMPLE_TRANSACTION: \
> /* The sub-statements for these should be walked. */ \
> *handled_ops_p = false; \
> break;
> Index: gcc/toplev.c
> ===
> --- gcc/toplev.c (.../trunk) (revision 180744)
> +++ gcc/toplev.c (.../branches/transactional-memory) (revision
> 180773)
> @@ -599,6 +599,7 @@ compile_file (void)
>
> output_shared_constant_pool ();
> output_object_blocks ();
> + finish_tm_clone_pairs ();
> /* Write out any pending weak symbol declarations. */
> weak_finish ();
> Index: gcc/cgraphunit.c
> ===
> --- gcc/cgraphunit.c (.../trunk) (revision 180744)
> +++ gcc/cgraphunit.c (.../branches/transactional-memory) (revision
> 180773)
> @@ -2272,7 +2272,7 @@ update_call_expr (struct cgraph_node *ne
> was copied to prevent duplications of calls that are dead
> in the clone. */
>
> -static struct cgraph_node *
> +struct cgraph_node *
> cgraph_copy_node_for_versioning (struct cgraph_node *old_version,
> tree new_decl,
>
Re: [Patch,AVR]: Tweak division
2011/11/3 Georg-Johann Lay :
> This is a tweak for signed 16- and 32-bit division routines.
> The old code called subroutine __divmod{si|hi}4_neg1 and returned if T-flag is
> not set. This is costly. By shuffling the instructions the test can be moved
> up without increasing the code size but saving calls here and there.
>
> The speed gain is 1..17 ticks for ATmega88 which is a speed-up of up to 7% for
> 16-bit division (formerly about 230-240 ticks). For 16-bit division the
> absolute speed gain is the same.
>
> Moreover, addqi3 can handle +/-2 now which saves reload if the constant in
> non-d register. The new *negqihi2 insn is for code like
>
> int minus (char a)
> {
> return -a;
> }
>
> that compiled to
>
> minus:
> clr r25 ; 6 extendqihi2/1 [length = 3]
> sbrc r24,7
> com r25
> com r25 ; 7 neghi2/1 [length = 3]
> neg r24
> sbci r25,lo8(-1)
> ret ; 25 return [length = 1]
>
> and now is compiled to a shorter, faster sequence without need of d-register:
>
> minus:
> clr r25 ; 7 *negqihi2 [length = 4]
> neg r24
> brge .+2
> com r25
> ret ; 25 return [length = 1]
>
> Tested without regressions. Moreover, the new sequences are tested
> individually
> against the old code.
>
> The patch is against the old infrastructure but the changelog is already for
> the new libgcc layout.
>
> Ok for trunk?
>
> Johann
>
> gcc/
> * config/avr/constraints.md (Cm2): New constraint for int -2.
> * config/avr/avr.md (addqi3): Use it. New alternatives for +/-2.
> (*negqihi2): New insn.
> libgcc/
> * config/avr/lib1funcs.S (__divmodhi4, __divmodsi4): Tweak speed.
>
Approved.
Denis.
Re: [Patch,AVR]: Implement PR50931 (24-bit integers) (divmod) [2/n]
2011/11/2 Georg-Johann Lay : > Georg-Johann Lay wrote: >> To support the upcoming named address space support in avr, a 24-bit pointer >> type is needed. This patch adds respective support of a 24-bit integer mode >> called PSI. >> >> The patch supports more than is actually needed for a pointer-only >> implementation: is supplies almost all needed insns to render the new mode >> efficient for use in arithmetic. >> >> The impact on already existing code for non-PSI part of the backend is very >> small and just a handfull of lines: >> >> - avr_out_plus_1, output_reload_in_const and avr_simplify_comparison_p >> can handle 3-byte types now. >> >> - avr_libcall_value: 3-byte values will be passed in even registers. >> >> - TARGET_SCALAR_MODE_SUPPORTED_P reports PSI as supported scalar >> >> - avr_init_builtins exposes the new mode to user land as new >> build-in types __int24_t and __uint24_t. >> >> - avr_cpu_cpp_builtins adds build-in macros >> __INT24_MAX__, __INT24_MIN__ and __UINT24_MAX__ so that user can test >> if the new mode is available for arithmetic. >> >> The rest of the patch is PSI-specific: >> >> Routines for comparison, addition, rotation, and, or, xor were already >> generic >> enough to support the new type without effort. >> >> Shifts and load/store/move are a bit lengthy routines as it is the case with >> SI, too. >> >> There are some parts missing and are planned to supply them in separate >> patches: >> >> - Documentation >> - Test cases >> - libgcc support of __[u]divmodpsi4 >> - Perhaps more efficient MUL. At the moment, multiplication is extended to >> 32 bits. This leads to suboptimal code because of 32-bit arithmetic and >> more SUBREGs than with a native mulpsi3 support. >> >> Patch is lightly tested and passes the test suites. >> >> Ok for trunk? >> >> Johann >> PR target/50931 >> * config/avr/avr-modes.def: New file defining PSImode. >> * config/avr/avr-c.c (__INT24_MAX__, __INT24_MIN__, >> __UINT24_MAX__): New built-in defines. >> * config/avr/avr.md (adjust_len): Add tstpsi, mov24, reload_in24, >> ashlpsi, ashrpsi, lshrpsi. >> (HISI, HIDI, MPUSH, rotx, rotsmode): Add PSI. >> (MOVMODE): New mode iterator. >> (movpsi): New expander. >> (movqi, movhi, movsi, movsf, movpsi): Write as one using MOVMODE. >> (*reload_inpsi, *movpsi): New insns. >> (*reload_inpsi): New RTL peephole. >> (addpsi3, *addpsi3_zero_extend.qi, *addpsi3_zero_extend.hi, >> *addpsi3_sign_extend.hi): New insns. >> (subpsi3, *subpsi3_zero_extend.qi, *subpsi3_zero_extend.hi, >> *subpsi3_sign_extend.hi): New insns. >> (divmodpsi4, udivmodpsi4): New define insn-and-split. >> (*divmodpsi4_call, *udivmodpsi4_call): New insns. >> (andpsi3, iorpsi3, xorpsi3): New insns. >> (*rotlpsi2.1, *rotlpsi2.23): New insns. >> (*rotw): Insn condition only allow even-sized modes. >> (*rotb): Insn condition allows odd-sized modes. >> (ashlpsi3, ashrpsi3, lshrpsi3): New insns. >> (negpsi2, one_cmplpsi2): New insns. >> (extendqipsi2, extendhipsi2, extendpsisi2): New insns. >> (zero_extendqipsi2, zero_extendhipsi2, zero_extendpsisi2): New >> insn-and-splits. >> (*cmppsi, *negated_tstpsi, *reversed_tstpsi): New insns. >> (cbranchpsi4): New expander. >> * config/avr/constraints.md (Ca3, Co3, Cx3): New constraints. >> * config/avr/avr-protos.h (avr_out_tstpsi, avr_out_movpsi, >> avr_out_ashlpsi3, avr_out_ashrpsi3, avr_out_lshrpsi3, >> avr_out_reload_inpsi): New prototypes. >> * config/avr/avr.c (TARGET_SCALAR_MODE_SUPPORTED_P): Define to... >> (avr_scalar_mode_supported_p): ...this new static function. >> (avr_asm_len): Always return "". >> (avr_out_load_psi, avr_out_store_psi): New static functions. >> (avr_out_movpsi, avr_out_reload_inpsi): New functions. >> (avr_out_tstpsi): New function. >> (avr_out_ashlpsi3, avr_out_ashrpsi3, avr_out_lshrpsi3): New functions. >> (avr_out_plus_1, output_reload_in_const): Handle 3-byte types. >> (avr_simplify_comparison_p): Ditto. >> (adjust_insn_length): Handle ADJUST_LEN_RELOAD_IN24, >> ADJUST_LEN_MOV24, ADJUST_LEN_TSTPSI, ADJUST_LEN_ASHLPSI, >> ADJUST_LEN_ASHRPSI, ADJUST_LEN_LSHRPSI. >> (avr_rtx_costs_1): Report PSI costs. >> (avr_libcall_value): Handle odd-sized parameters. >> (avr_init_int24): New static function. >> (avr_init_builtins): Use it. > > This patch is the div/mod support for libgcc. > > With this patch, 24-bit integers are fully supported for integer arithmetic. > > During the implementation it turned out that the register footprint is smaller > than that of SImode: PSI need 3 registers less so that the representation in > avr.md needs adjustment like so: > > > @@ -2199,6 +2294,66 @@ (define_insn "*udivmodhi4_call" > [(set_attr "type" "xcall") > (set_attr "cc" "clobber")]) > > +;;
Re: Patch ping
On Fri, 4 Nov 2011, Jakub Jelinek wrote:
> On Fri, Nov 04, 2011 at 10:52:44AM +0100, Richard Guenther wrote:
> > > - Gather vectorization patch + incremental patches
> > > http://gcc.gnu.org/ml/gcc-patches/2011-10/msg02411.html
> >
> > I'm not sure I like using new builtins for gather representation
> > on the tree level too much, given that we are now moving
> > towards using tree codes for suffle. Thus, how complicated
> > would it be to have a gather tree code and optab and to
> > handle the mixed size index issue in the expander?
> >
> > I realize this would be quite some reorg to the patchset ...
> > so, why did you choose builtins over a more generic approach?
>
> Because while permutations etc. are common to most targets,
> currently gather is very specialized, specific to one target,
> with lots of details how it must look like (e.g. the mask stuff where
> we currently don't even have tree code for conditional loads or conditional
> stores), and additionally unlike VEC_PERM_EXPR etc. which are normal
> expressions this one is a reference (and conditional one too), so
> I'm afraid I'd need to touch huge amounts of code (most places that
> currently handle MEM_REF/TARGET_MEM_REF would need to handle
> VEC_GATHER_MEM_REF too, as it is a memory read (well, set of conditional
> memory reads). The i?86 backend already has (except 4) all the needed
> builtins anyway and handles expanding them too, the 4 ones are just
> to cope with the weirdo definition of some of them (half sized vectors).
> And when it is represented as builtin, the side-effects are handled by
> all optimization passes automatically, similarly how e.g. atomic builtins
> are right now builtins and not expressions.
>
> So I thought it is better to use builtins right now, then when we in 4.8+
> hopefully do something about conditional loads/stores and their
> vectorization and if we introduce for that some new GIMPLE representation,
> this could be done on top of that.
Ok. I guess it's ok to use builtins for now - I didn't think of
the memory reference issue ;)
> > > http://gcc.gnu.org/ml/gcc-patches/2011-10/msg02846.html
> >
> > + if (TREE_CODE (base) == MEM_REF)
> > {
> > - off = TREE_OPERAND (base, 1);
> > + if (!integer_zerop (TREE_OPERAND (base, 1)))
> > + {
> > + if (off == NULL_TREE)
> > + {
> > + double_int moff = mem_ref_offset (base);
> > + off = double_int_to_tree (sizetype, moff);
> > + }
> > + else
> > + off = size_binop (PLUS_EXPR, off, TREE_OPERAND (base, 1));
> >
> > that's not safe, TREE_OPEAND (base, 1) is of pointer type, so
> > you unconditionally need to do the conversion to sizetype of
> > TREE_OPEAND (base, 1).
>
> Ok, will fix.
>
> > The routine lacks comments - it's got quite big and fails to
>
> And add the comments.
>
> > state any reason for its complexity. I'm also not sure why
> > DR would include any loop invariant parts of the SCEV - doesn't
> > it instantiate just for the loop in question?
>
> I'm not sure I understand your question. With the incremental
> patch I'm not using any DR info appart from DR_REF to determine
> what is loop invariant part of the address and what is not.
> The reason for that is that split_constant_offset turns the GIMPLE
> code into a sometimes big tree, which actually may contain a mixture
> of loop invariants/constants and SSA_NAMEs defined in the loop,
> that all with casts, multiplications/additions/subtractions.
> For gather I need to split it into a single loop invariant
> argument (which can be computed before the loop as loop invariant
> and thus can be arbitrary tree expression that is just gimplified
> there) and another SSA_NAME defined into the loop which can be
> vectorized which is perhaps sign-extended and multiplied by 1/2/4/8.
>
> With the approach the incremental patch does I just
> walk what split_constant_offset during DR walks and peel off
> loop invariants until I have something that should be used as the
> vectorized index.
It looks like split_constant_offset walks def stmts in an unbound
fashion. That's surely a bad idea - SCEV should already have
expanded everything non-loop-invariant, thus it should at most
look through DEFs that trivially add to the constant offset,
not through others.
Richard.
Re: Massive breakage with your libgcc patches
On 11/03/11 20:20, Rainer Orth wrote: > Here's the patch I've come up with. Should I commit it now or would you > like to do a full testsuite run first? Please commit, thanks. Bernd
Re: Mark objects death at end of scope
On Thu, Nov 03, 2011 at 02:07:31PM +0100, Michael Matz wrote:
> In this specific case we could notice that resx1 actually is the outermost
> resume, hence only will leave the function and therefore the clobber is
> useless (as in, moving them down actually removes them from the function
> body). But suppose the whole code above would itself be contained in some
> other region to which the resx1 would lead. We could move the clobber
> there (and to the fall thru path that skips that region, which is the case
> with catch region), that it safe (outer cleanup regions are always outer
> or following scopes, and moving clobber outwards or lower is
> conservatively correct), but extends the life area of the variables in
> question.
Well, for just the clobber stmts followed by resx that isn't caught in the
function at least we definitely shouldn't catch it, do nothing and rethrow.
struct POD { char a[10]; };
extern void bar (POD *);
extern void baz ();
void
foo (bool cond)
{
if (cond)
{
POD pod;
bar (&pod);
}
baz ();
}
I'd certainly hope we don't generate here any catch/rethrow (similarly for
non-PODs with trivial dtors).
> The other possibility would be removing the clobbers (all of them) right
> before ehcleanup2 (shortly before expand) and somehow remember the edges
> over which the variables die. That seems a bit fragile as there are some
> more passes between them that fiddle with edges.
Can't you, if you detect only clobber stmts followed up by rethrow, just
move the clobber stmts to where the throw would be caught resp. remove if
not caught?
Jakub
Re: [Patch] ARM EABI support for RTEMS
> /home/sh/archive/gcc-4.7-20111029/libgcc/unwind-dw2.c: In function > 'init_dwarf_reg_size_table': > /home/sh/archive/gcc-4.7-20111029/libgcc/unwind-dw2.c:1482:39: internal > compiler error: in arm_dbx_register_number, at config/arm/arm.c:23536 Your original post in this thread suggested that you wanted to switch the rtems port to use the AAPCS http://gcc.gnu.org/ml/gcc/2011-04/msg00100.html . If the above is what was intended this is not the right way of achieving it because you are missing an include of bpabi.h which sets ARM_DEFAULT_ABI to ARM_ABI_AAPCS and a raft of other pre-processor defines that you need to get the backend in the right form for using the AAPCS implementation. The other problem is that you aren't using the right unwind info which is why you are hitting this issue because it just uses the standard eh_frame implementation .Look at how this is done in libgcc/config.host. Therefore no - if this is intended to switch rtems to ABI_AAPCS completely I don't think this is the right way of doing this. cheers Ramana
Re: Mark objects death at end of scope
On Fri, Nov 04, 2011 at 12:39:47PM +0100, Jakub Jelinek wrote: > Well, for just the clobber stmts followed by resx that isn't caught in the > function at least we definitely shouldn't catch it, do nothing and rethrow. Forgot to mention, I'm not opposing the inclusion of your patch at this point until something is done about it, I just hope that something will be done about it during stage3. After all, if the extra rethrow pads will be emitted somewhere, it will be a regression and thus it will be possible to fix it. Jakub
Re: RFA: Add Epiphany port
On Fri, 4 Nov 2011, Joern Rennecke wrote:
> :@item
> :Normally, one or more maintainers of that target listed in
> :@file{MAINTAINERS}. Some existing architectures may be unmaintained,
> :but it would be unusual to add support for a target that does not have
> :a maintainer when support is added.
> :@end itemize
>
> Doesn't this have to go through the Steering Commitee first?
Yes, all new port submissions should also have a separate message sent to
the gcc@ list, for the attention of the SC, requesting the appointment of
a maintainer (and proposing who that should be).
> +@item Cm1
> +A signed 11-bit constant added to -1
@minus{}1. Likewise elsewhere.
> +Can only match when epiphany_m1reg is valid.
This doesn't make sense to me in the context of a user manual describing
what can be used in inline asm.
> +Can only match when epiphany_m1reg is valid.
Likewise.
> +@item Csy
> +symbolic constant for call/jump instruction
Consistently start each of these items with a capital letter and end with
".".
> +Constant suitable for the addsi3_r pattern. This is a valid offset
"addsi3_r" also seems inappropriate for the user manual.
Any constraints not for use in asms can be put inside @ifset INTERNALS
here - though really it's just those that can be used in asms that it's
important to document here.
--
Joseph S. Myers
jos...@codesourcery.com
Re: [trans-mem][build] Hack around top-level Makefile libstdc++ breakage
On Thu, 3 Nov 2011, Richard Henderson wrote: > I've worked for 2 days to try to work out what our Makefile does. It > seems completely and totally broken to me. I can't imagine there's a > quick fix, but I'd be delighted to be proven wrong. It would be fixed by staged install (install into a temporary directory within the build tree, run the compilers from there relying on relocatability so that only the install to the staging directory and nothing else needs to know how to put pieces together from their build tree locations), but that is anything but a quick fix (probably months of work) -- Joseph S. Myers jos...@codesourcery.com
Re: [trans-mem][build] Hack around top-level Makefile libstdc++ breakage
On Nov 4, 2011, Richard Henderson wrote: > I can't imagine there's a quick fix, but I'd be delighted to be proven > wrong. I don't have a patch yet, but IMHO the correct and quick-ish fix would be in config-ml.in: get it to apply the same transformation to CC et al that it applies at configure time in the multi-do: fragment it adds to the Makefile. I'm not quite sure how to introduce that yet, but that's what I'm trying to figure out now. -- Alexandre Oliva, freedom fighterhttp://FSFLA.org/~lxoliva/ You must be the change you wish to see in the world. -- Gandhi Be Free! -- http://FSFLA.org/ FSF Latin America board member Free Software Evangelist Red Hat Brazil Compiler Engineer
Re: cxx-mem-model merge [4 of 9] c-family
On Fri, 4 Nov 2011, Andrew MacLeod wrote:
> > Given that C and C++ allow variable arguments to the standard type-generic
> > macros/functions, it is also presumably OK - only undefined at runtime -
> > for a constant memory model argument of the correct type to have a value
> > representable in that type that isn't actually a valid memory model. And
> > so this should generate a warning, not an error (ideally generating a trap
> > and an informative note that such a trap has been generated - remember
> > that the side-effects of the function arguments must be evaluated before
> > the trap, in case an argument exits the program, as in
> > gcc.c-torture/execute/{call-trap-1.c,va-arg-trap-1.c}).
> >
> I don't think I agree. All the __atomic operations are noexcept, so they
> can't throw. We currently default unknown runtime values to seq-cst for
That they can't throw is true but irrelevant (the arguments to them -
addresses of objects being operated on - can throw while being evaluated,
and one of my points was that if you do generate a trap for execution-time
undefined behavior that therefore needs to come after argument
evaluation).
> inlined atomics, and presumably the library will also implement any unknown
> value as seq-cst. There are very explicit enumerated types to be used, and I
> do not think its unreasonable to issue an error if someone provides an out of
> range value which can be determined at compile time.
It seems clear to me that
if (0) call-with-non-const-argument ();
and
if (0) call-with-const-argument ();
are exactly the same, supposing the arguments have the same types, and
given that the first is valid (without depending on whether the compiler
can work out the argument with constant propagation), the second is also
valid if the argument has the right enum type even if the value is not one
of the valid values (recall that for C an enum may have any value of the
underlying integer type, typically unsigned int; for C++ it may at least
have any value that can be represented with the bits set in any of the
enumeration constants). This is just the same as
if (0) va_arg (ap, float);
being valid, though an execution of such a va_arg call will result in
undefined behavior - and
va_arg (*(exit (0), &ap), float);
also being valid on execution - exiting before the undefined behavior
would otherwise occur.
DR#109 applies: "A conforming implementation must not fail to translate a
strictly conforming program simply because some possible execution of that
program would result in undefined behavior.". The value of a function
parameter (that has the right type) is a property of the execution of the
program and undefined behavior occurs when the call is executed, after its
arguments have been evaluated.
Generating a warning instead of an error and changing the constant to a
valid one is probably the simplest fix (although generating a trap as
well, after the arguments are evaluated, would be existing practice in
GCC).
--
Joseph S. Myers
jos...@codesourcery.com
Re: [Patch] ARM EABI support for RTEMS
Hello Ramana,
thanks for the quick review.
On 11/04/2011 12:43 PM, Ramana Radhakrishnan wrote:
/home/sh/archive/gcc-4.7-20111029/libgcc/unwind-dw2.c: In function
'init_dwarf_reg_size_table':
/home/sh/archive/gcc-4.7-20111029/libgcc/unwind-dw2.c:1482:39: internal
compiler error: in arm_dbx_register_number, at config/arm/arm.c:23536
Your original post in this thread suggested that you wanted to switch
the rtems port to use the AAPCS
http://gcc.gnu.org/ml/gcc/2011-04/msg00100.html .
If the above is what was intended this is not the right way of
achieving it because you are missing an include of bpabi.h which sets
ARM_DEFAULT_ABI to ARM_ABI_AAPCS and a raft of other pre-processor
defines that you need to get the backend in the right form for using
the AAPCS implementation.
Yes, the above is what was intended. The bpabi.h is provided by the common
EABI part in the gcc/config.gcc section.
The other problem is that you aren't using
the right unwind info which is why you are hitting this issue because
it just uses the standard eh_frame implementation .Look at how this is
done in libgcc/config.host.
Thanks for the hint. This libgcc/config.host part seems to be new in GCC 4.7.
Attached is a new patch. It builds well and the test suite runs currently.
Kind regards,
Sebastian
--
Sebastian Huber, embedded brains GmbH
Address : Obere Lagerstr. 30, D-82178 Puchheim, Germany
Phone : +49 89 18 90 80 79-6
Fax : +49 89 18 90 80 79-9
E-Mail : sebastian.hu...@embedded-brains.de
PGP : Public key available on request.
Diese Nachricht ist keine geschäftliche Mitteilung im Sinne des EHUG.
2011-11-04 Sebastian Huber
* gcc/config.gcc (arm*-*-rtemseabi*): New target.
* gcc/config/arm/rtems-eabi.h: New.
* gcc/config/arm/t-rtems-eabi: New.
* libgcc/config.host (arm*-*-rtemseabi*): New target.
diff --git a/gcc/config.gcc b/gcc/config.gcc
index 2c18655..a1e7a6d 100644
--- a/gcc/config.gcc
+++ b/gcc/config.gcc
@@ -904,7 +904,7 @@ arm*-*-ecos-elf)
tm_file="dbxelf.h elfos.h newlib-stdint.h arm/unknown-elf.h arm/elf.h arm/aout.h arm/arm.h arm/ecos-elf.h"
tmake_file="arm/t-arm arm/t-arm-elf"
;;
-arm*-*-eabi* | arm*-*-symbianelf* )
+arm*-*-eabi* | arm*-*-symbianelf* | arm*-*-rtemseabi*)
# The BPABI long long divmod functions return a 128-bit value in
# registers r0-r3. Correctly modeling that requires the use of
# TImode.
@@ -919,6 +919,10 @@ arm*-*-eabi* | arm*-*-symbianelf* )
tmake_file="${tmake_file} arm/t-bpabi"
use_gcc_stdint=wrap
;;
+ arm*-*-rtemseabi*)
+ tm_file="${tm_file} rtems.h arm/rtems-eabi.h newlib-stdint.h"
+ tmake_file="${tmake_file} arm/t-bpabi t-rtems arm/t-rtems-eabi"
+ ;;
arm*-*-symbianelf*)
tm_file="${tm_file} arm/symbian.h"
libgcc_tm_file="$libgcc_tm_file arm/symbian-lib.h"
diff --git a/gcc/config/arm/rtems-eabi.h b/gcc/config/arm/rtems-eabi.h
new file mode 100644
index 000..ced98a9
--- /dev/null
+++ b/gcc/config/arm/rtems-eabi.h
@@ -0,0 +1,29 @@
+/* Definitions for RTEMS based ARM systems using EABI.
+ Copyright (C) 2011 Free Software Foundation, Inc.
+
+ This file is part of GCC.
+
+ GCC is free software; you can redistribute it and/or modify it
+ under the terms of the GNU General Public License as published
+ by the Free Software Foundation; either version 3, or (at your
+ option) any later version.
+
+ GCC is distributed in the hope that it will be useful, but WITHOUT
+ ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+ or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
+ License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with GCC; see the file COPYING3. If not see
+
[rs6000] Fix PR 50906, eh_frame and other woes
Lots of bugs here. Most of them in TARGET_SPE_ABI code, but some also
for other ABIs.
1) Marking an instruction setting up r11 for use by _save64gpr_* as
frame-related results in r11 being set as the cfa for the rest of the
function. That's bad when r11 gets used for other things later.
Even worse, the offset given was wrong. This bug was likely the
primary cause for the segfault reported in the PR.
2) RTL emitted to describe the _save64gpr_* used wrong offsets.
Harmless at the moment, I think, but still incorrect. Ditto for the
epilogue _rest64gpr_* RTL. eg. _save64gpr_24 rtl said the store for
r24 happened at 0(11), but see e500crtsav64gpr.S.
3) The .cfi_offset values given for the SPE _save64gpr_* reg saves
were wrong.
4) sp_offset was not set correctly in a number of places where
out-of-line save and restore functions were used, possibly leading to
incorrect code later in the prologue/epilogue. For instance in this
code:
+ emit_insn (gen_add3_insn (src_reg, frame_reg_rtx,
GEN_INT (sp_offset - info->fp_size)));
- if (REGNO (frame_reg_rtx) == 11)
- sp_offset += info->fp_size;
+ if (REGNO (frame_reg_rtx) == REGNO (src_reg))
+ sp_offset = info->fp_size;
src_reg can be r12, so testing for r11 as frame_reg_rtx is wrong. You
want to update sp_offset when frame_reg_rtx changes. Also, adding
info->fp_size to sp_offset is obviously wrong when you've just added
(sp_offset - info->fp_size) to frame_reg_rtx. Clearly you want to
subtract (sp_offset - info->fp_size) from sp_offset, to keep the
invariant that frame_reg_rtx + sp_offset points to top of frame.
Really, sp_offset should be renamed to frame_offset.
5) The wrong register mode was used in a number of places for address
calculations. A nitpick, but reg_mode is for data, Pmode for addresses.
6) The epilogue _rest64gpr_* r11 wasn't always set up.
7) Not fixed by this patch, but many instances of rs6000_frame_related
and emit_frame_save pass frame_ptr_rtx for the reg to replace with
sp+offset in the cfi expression, when frame_ptr_rtx is not the reg
being used in the memory access. That means we're relying on the
generic dwarf code tracking registers for us. Which does seem to
work. However, it's confusing to have calls to rs6000_frame_related
that really don't do anything.
Bootstrapped and regression tested powerpc-linux, with standard
BOOT_CFLAGS, with BOOT_CFLAGS="-g -Os" (tends to test just out-of-line
restore), and with BOOT_CFLAGS="-g -Os -mno-multiple" (test
out-of-line save and restore). The PR reporter is running SPE
bootstrap and regression tests. Incidentally, I had to use
--disable-werror as we run into some bogus warnings when trying to
bootstrap with -Os.
gcc/calls.c: In function 'rtx_def* expand_call(tree, rtx, int)':
gcc/calls.c:1098:52: warning: 'base' may be used uninitialized in this function
[-Wmaybe-uninitialized]
gcc/calls.c:1079:9: note: 'base' was declared here
OK to apply? gcc-4.6 branch too?
PR target/50906
* config/rs6000/rs6000.c (rs6000_emit_prologue ):
Do not mark r11 setup as frame-related. Pass correct offset to
rs6000_emit_savres_rtx. Correct out-of-line rs6000_frame_related
arguments. Correct sp_offset. Remove "offset" fudge from
in-line rs6000_frame_related call. Rename misleading variable.
Fix comments and whitespace. Tidy some expressions.
(rs6000_emit_epilogue ): Always set frame_reg_rtx
to r11 in out-of-line case. Correct sp_offset. Pass correct
offset to rs6000_emit_savres_rtx. Rename misleading variable.
Fix comments and whitespace. Tidy some expressions.
(rs6000_emit_epilogue ): Add sp_offset
adjustment when !saving_GPRs_inline. Correct register mode
used in address calcs.
(rs6000_emit_epilogue ): Similarly when
!restoring_GPRs_inline.
Index: gcc/config/rs6000/rs6000.c
===
--- gcc/config/rs6000/rs6000.c (revision 180867)
+++ gcc/config/rs6000/rs6000.c (working copy)
@@ -20089,56 +20115,52 @@ rs6000_emit_prologue (void)
{
int i;
rtx spe_save_area_ptr;
-
+ int save_ptr_to_sp;
+ int ool_adjust = 0;
+
/* Determine whether we can address all of the registers that need
-to be saved with an offset from the stack pointer that fits in
+to be saved with an offset from frame_reg_rtx that fits in
the small const field for SPE memory instructions. */
- int spe_regs_addressable_via_sp
- = (SPE_CONST_OFFSET_OK(info->spe_gp_save_offset + sp_offset
- + (32 - info->first_gp_reg_save - 1) * reg_size)
+ int spe_regs_addressable
+ = (SPE_CONST_OFFSET_OK (info->spe_gp_save_offset + sp_offset
+ + reg_size * (32 - info->first_gp_reg_save - 1))
&& saving_GPRs_inline);
int spe
[PATCH] Gather vectorization (PR tree-optimization/50789, take 2)
Hi!
On Fri, Nov 04, 2011 at 12:21:49PM +0100, Richard Guenther wrote:
> Ok. I guess it's ok to use builtins for now - I didn't think of
> the memory reference issue ;)
Based on IRC discussion I'm posting an updated patch (both former
patches (base and incremental) in one).
I'm now using expr_invariant_in_loop_p instead of chrec_contains*,
which nicely handles also the is_gimple_min_invariant case,
and I've added several comments and fixed the MEM_REF offset
folding. Smoke tested on the *gather* testcases, will do full
bootstrap/regtest soon.
2011-11-04 Jakub Jelinek
PR tree-optimization/50789
* tree-vect-stmts.c (process_use): Add force argument, avoid
exist_non_indexing_operands_for_use_p check if true.
(vect_mark_stmts_to_be_vectorized): Adjust callers. Handle
STMT_VINFO_GATHER_P.
(gen_perm_mask): New function.
(perm_mask_for_reverse): Use it.
(reverse_vec_element): Rename to...
(permute_vec_elements): ... this. Add Y and MASK_VEC arguments,
generalize for any permutations.
(vectorizable_load): Adjust caller. Handle STMT_VINFO_GATHER_P.
* target.def (TARGET_VECTORIZE_BUILTIN_GATHER): New hook.
* doc/tm.texi.in (TARGET_VECTORIZE_BUILTIN_GATHER): Document it.
* doc/tm.texi: Regenerate.
* tree-data-ref.c (initialize_data_dependence_relation,
compute_self_dependence): No longer static.
* tree-data-ref.h (initialize_data_dependence_relation,
compute_self_dependence): New prototypes.
* tree-vect-data-refs.c (vect_check_gather): New function.
(vect_analyze_data_refs): Detect possible gather load data
refs.
* tree-vectorizer.h (struct _stmt_vec_info): Add gather_p field.
(STMT_VINFO_GATHER_P): Define.
(vect_check_gather): New prototype.
* config/i386/i386-builtin-types.def: Add types for alternate
gather builtins.
* config/i386/sse.md (AVXMODE48P_DI): Remove.
(VEC_GATHER_MODE): Rename mode_attr to...
(VEC_GATHER_IDXSI): ... this.
(VEC_GATHER_IDXDI, VEC_GATHER_SRCDI): New mode_attrs.
(avx2_gathersi, *avx2_gathersi): Use
instead of .
(avx2_gatherdi): Use instead of
< and instead of VEC_GATHER_MODE
on src and mask operands.
(*avx2_gatherdi): Likewise. Use VEC_GATHER_MODE iterator
instead of AVXMODE48P_DI.
(avx2_gatherdi256, *avx2_gatherdi256): Removed.
* config/i386/i386.c (enum ix86_builtins): Add
IX86_BUILTIN_GATHERALTSIV4DF, IX86_BUILTIN_GATHERALTDIV8SF,
IX86_BUILTIN_GATHERALTSIV4DI and IX86_BUILTIN_GATHERALTDIV8SI.
(ix86_init_mmx_sse_builtins): Create those builtins.
(ix86_expand_builtin): Handle those builtins and adjust expansions
of other gather builtins.
(ix86_vectorize_builtin_gather): New function.
(TARGET_VECTORIZE_BUILTIN_GATHER): Define.
* gcc.target/i386/avx2-gather-1.c: New test.
* gcc.target/i386/avx2-gather-2.c: New test.
* gcc.target/i386/avx2-gather-3.c: New test.
* gcc.target/i386/avx2-gather-4.c: New test.
--- gcc/tree-vect-stmts.c.jj2011-11-04 08:52:19.0 +0100
+++ gcc/tree-vect-stmts.c 2011-11-04 08:54:11.0 +0100
@@ -332,6 +332,8 @@ exist_non_indexing_operands_for_use_p (t
- LIVE_P, RELEVANT - enum values to be set in the STMT_VINFO of the stmt
that defined USE. This is done by calling mark_relevant and passing it
the WORKLIST (to add DEF_STMT to the WORKLIST in case it is relevant).
+ - FORCE is true if exist_non_indexing_operands_for_use_p check shouldn't
+ be performed.
Outputs:
Generally, LIVE_P and RELEVANT are used to define the liveness and
@@ -351,7 +353,8 @@ exist_non_indexing_operands_for_use_p (t
static bool
process_use (gimple stmt, tree use, loop_vec_info loop_vinfo, bool live_p,
-enum vect_relevant relevant, VEC(gimple,heap) **worklist)
+enum vect_relevant relevant, VEC(gimple,heap) **worklist,
+bool force)
{
struct loop *loop = LOOP_VINFO_LOOP (loop_vinfo);
stmt_vec_info stmt_vinfo = vinfo_for_stmt (stmt);
@@ -363,7 +366,7 @@ process_use (gimple stmt, tree use, loop
/* case 1: we are only interested in uses that need to be vectorized. Uses
that are used for address computation are not considered relevant. */
- if (!exist_non_indexing_operands_for_use_p (use, stmt))
+ if (!force && !exist_non_indexing_operands_for_use_p (use, stmt))
return true;
if (!vect_is_simple_use (use, loop_vinfo, NULL, &def_stmt, &def, &dt))
@@ -646,7 +649,7 @@ vect_mark_stmts_to_be_vectorized (loop_v
break;
}
- if (is_pattern_stmt_p (vinfo_for_stmt (stmt)))
+ if (is_pattern_stmt_p (stmt_vinfo))
{
/* Pattern statements are not inserted into the code, so
FOR_EACH_PHI_OR_STMT_USE optimizes their opera
Re: Re: [Ping] RE: CR16 Port addition
Ping 5: For review Can someone please review the modified patch: http://gcc.gnu.org/ml/gcc-patches/2011-10/msg01985.html Most of the suggestions made by Richard have been accommodated in the modified patch. Richard's suggestions can be referred at: http://gcc.gnu.org/ml/gcc-patches/2011-10/msg00287.html Thanks and Regards, Jayant Sonar [KPIT Cummins, Pune]
Re: CFT: [build] Move crtstuff support to toplevel libgcc
On 11/02/2011 01:37 PM, Rainer Orth wrote: > 2011-07-15 Rainer Orth > > gcc: > * config.gcc (extra_parts): Remove. > (*-*-freebsd*): Remove extra_parts. > (*-*-linux*, frv-*-*linux*, *-*-kfreebsd*-gnu, *-*-knetbsd*-gnu, > *-*-gnu*, *-*-kopensolaris*-gnu): Likewise. > (*-*-netbsd*): Remove t-libc-ok, t-netbsd from tmake_file. > Remove extra_parts for *-*-netbsd*1.[7-9]*, *-*-netbsd[2-9]*, > *-*-netbsdelf[2-9]*. > (*-*-openbsd*): Remove t-libc-ok from tmake_file. > (alpha*-*-linux*): Remove extra_parts. ... This appears to break bootstrap on s390x: /home/andreas/regtest/gcc-bisect-build/./gcc/crtbeginS.o: In function `__do_global_dtors_aux': crtstuff.c:(.text+0x28): relocation truncated to fit: R_390_GOT12 against symbol `__cxa_finalize@@GLIBC_2.2' defined in .text section in /lib64/libc.so.6 /home/andreas/regtest/gcc-bisect-build/./gcc/crtbeginS.o: In function `frame_dummy': crtstuff.c:(.text+0x78): relocation truncated to fit: R_390_GOT12 against undefined symbol `_Jv_RegisterClasses' collect2: error: ld returned 1 exit status make[5]: *** [libstdc++.la] Error 1 make[5]: Leaving directory `/home/andreas/regtest/gcc-bisect-build/s390x-ibm-linux-gnu/libstdc++-v3/src' make[4]: *** [all-recursive] Error 1 make[4]: Leaving directory `/home/andreas/regtest/gcc-bisect-build/s390x-ibm-linux-gnu/libstdc++-v3' make[3]: *** [all] Error 2 make[3]: Leaving directory `/home/andreas/regtest/gcc-bisect-build/s390x-ibm-linux-gnu/libstdc++-v3' make[2]: *** [all-stage1-target-libstdc++-v3] Error 2 make[2]: Leaving directory `/home/andreas/regtest/gcc-bisect-build' make[1]: *** [stage1-bubble] Error 2 make[1]: Leaving directory `/home/andreas/regtest/gcc-bisect-build' make: *** [all] Error 2
Re: Reload related segfaults
Ping http://gcc.gnu.org/ml/gcc-patches/2011-10/msg02429.html Eric fixed the bootstrap breakage by another patch, but there is a fairly obvious bug in gen_reload fixed by my patch. I gave enough contect in the diff that you don't even need to look at the file. :) -- Alan Modra Australia Development Lab, IBM
[Ada] Extend atomic synchronization handling to selections
This patch extends atomic synchronization to selected components and
explicit dereferences when the result is a type for which atomic sync
is enabled. Also it handles the case of an indexed selection from an
array with atomic components.
Tested on x86_64-pc-linux-gnu, committed on trunk
2011-11-04 Robert Dewar
* exp_ch2.adb (Expand_Entity_Reference): Do not set
Atomic_Sync_Required for the case of a prefix of an attribute.
* exp_ch4.adb (Expand_N_Explicit_Dereference): May require
atomic synchronization
(Expand_N_Indexed_Component): Ditto.
(Expand_B_Selected_Component): Ditto.
* sem_prag.adb (Process_Suppress_Unsuppress):
Disable/Enable_Atomic_Synchronization can now occur for array
types with pragma Atomic_Components.
* sinfo.ads, sinfo.adb (Atomic_Sync_Required): Can now occur on
N_Explicit_Dereference nodes and on N_Indexed_Component nodes.
Index: sinfo.adb
===
--- sinfo.adb (revision 180934)
+++ sinfo.adb (working copy)
@@ -254,7 +254,9 @@
begin
pragma Assert (False
or else NT (N).Nkind = N_Expanded_Name
-or else NT (N).Nkind = N_Identifier);
+or else NT (N).Nkind = N_Explicit_Dereference
+or else NT (N).Nkind = N_Identifier
+or else NT (N).Nkind = N_Indexed_Component);
return Flag14 (N);
end Atomic_Sync_Required;
@@ -3323,7 +3325,9 @@
begin
pragma Assert (False
or else NT (N).Nkind = N_Expanded_Name
-or else NT (N).Nkind = N_Identifier);
+or else NT (N).Nkind = N_Explicit_Dereference
+or else NT (N).Nkind = N_Identifier
+or else NT (N).Nkind = N_Indexed_Component);
Set_Flag14 (N, Val);
end Set_Atomic_Sync_Required;
Index: sinfo.ads
===
--- sinfo.ads (revision 180934)
+++ sinfo.ads (working copy)
@@ -609,7 +609,13 @@
--This flag is set in an identifier or expanded name node if the
--corresponding reference (or assignment when on the left side of
--an assignment) requires atomic synchronization, as a result of
- --Atomic_Synchronization being enabled for the corresponding entity.
+ --Atomic_Synchronization being enabled for the corresponding entity
+ --or its type. Also set for Selector_Name of an N_Selected Component
+ --node if the type is atomic and requires atomic synchronization.
+ --Also set on an N_Explicit Dereference node if the resulting type
+ --is atomic and requires atomic synchronization. Finally it is set
+ --on an N_Indexed_Component node if the resulting type is Atomic, or
+ --if the array type or the array has pragma Atomic_Components set.
-- At_End_Proc (Node1)
--This field is present in an N_Handled_Sequence_Of_Statements node.
@@ -3175,6 +3181,7 @@
-- Sloc points to ALL
-- Prefix (Node3)
-- Actual_Designated_Subtype (Node4-Sem)
+ -- Atomic_Sync_Required (Flag14-Sem)
-- plus fields for expression
---
@@ -3197,6 +3204,7 @@
-- Sloc contains a copy of the Sloc value of the Prefix
-- Prefix (Node3)
-- Expressions (List1)
+ -- Atomic_Sync_Required (Flag14-Sem)
-- plus fields for expression
-- Note: if any of the subscripts requires a range check, then the
Index: sem_prag.adb
===
--- sem_prag.adb(revision 180939)
+++ sem_prag.adb(working copy)
@@ -5462,7 +5462,7 @@
-- a non-atomic variable.
if C = Atomic_Synchronization
- and then not Is_Atomic (E)
+ and then not (Is_Atomic (E) or else Has_Atomic_Components (E))
then
Error_Msg_N
("pragma & requires atomic type or variable",
Index: exp_ch2.adb
===
--- exp_ch2.adb (revision 180939)
+++ exp_ch2.adb (working copy)
@@ -404,6 +404,15 @@
if Nkind_In (N, N_Identifier, N_Expanded_Name)
and then Ekind (E) = E_Variable
and then (Is_Atomic (E) or else Is_Atomic (Etype (E)))
+
+ -- Don't go setting the flag for the prefix of an attribute because
+ -- we don't want atomic sync for X'Size, X'Access etc.
+
+ -- Is this right in all cases of attributes???
+ -- Are there other exemptions required ???
+
+and then (Nkind (Parent (N)) /= N_Attribute_Reference
+or else Prefix (Parent (N)) /= N)
then
declare
Set : Boolean;
@@ -444,6 +453,7 @@
-- Set flag if required
if Set then
+ Set_Atomic_Sync_Required (N);
-- Generate info message if requested
@@ -457,8 +467,6 @@
[committed]: alpha-vms: fix ASM_OUTPUT_DEF
Hi,
silently switching section without calling switch_to_section is evil, and even
more when this is not necessary.
Fixed by this patch.
Tristan.
2011-11-04 Tristan Gingold
* config/alpha/vms.h (ASM_OUTPUT_DEF): Do not switch section.
Index: config/alpha/vms.h
===
--- config/alpha/vms.h (revision 180946)
+++ config/alpha/vms.h (working copy)
@@ -236,15 +236,16 @@
/* Switch into a generic section. */
#define TARGET_ASM_NAMED_SECTION vms_asm_named_section
-#define ASM_OUTPUT_DEF(FILE,LABEL1,LABEL2) \
- do { fprintf ((FILE), "\t.literals\n"); \
- in_section = NULL; \
- fprintf ((FILE), "\t"); \
- assemble_name (FILE, LABEL1); \
- fprintf (FILE, " = "); \
- assemble_name (FILE, LABEL2); \
- fprintf (FILE, "\n"); \
- } while (0)
+#define ASM_OUTPUT_DEF(FILE,LABEL1,LABEL2) \
+ do\
+{ \
+ fprintf ((FILE), "\t"); \
+ assemble_name (FILE, LABEL1); \
+ fprintf (FILE, " = ");\
+ assemble_name (FILE, LABEL2); \
+ fprintf (FILE, "\n"); \
+} \
+ while (0)
#undef PREFERRED_DEBUGGING_TYPE
#define PREFERRED_DEBUGGING_TYPE VMS_AND_DWARF2_DEBUG
[rs6000] fix PR 30282, load from stack moved past stack update
This patch fixes PR30282, caused by instructions being scheduled over
the stack reset. Note that only for ABI_V4 do we currently have
frame_reg_rtx != sp_reg_rtx in rs6000_emit_stack_reset, so the patch
doesn't emit *less* blockages. I did benchmark this change and saw
nothing but the usual benchmake noise.
Bootstrapped etc. powerpc-linux. OK to apply?
* config/rs6000/rs6000.c (rs6000_emit_stack_reset): Always emit
blockage for ABI_V4.
Index: gcc/config/rs6000/rs6000.c
===
--- gcc/config/rs6000/rs6000.c (revision 177309)
+++ gcc/config/rs6000/rs6000.c (working copy)
@@ -19689,7 +19689,7 @@ rs6000_emit_stack_reset (rs6000_stack_t
{
/* This blockage is needed so that sched doesn't decide to move
the sp change before the register restores. */
- if (frame_reg_rtx != sp_reg_rtx
+ if (DEFAULT_ABI == ABI_V4
|| (TARGET_SPE_ABI
&& info->spe_64bit_regs_used != 0
&& info->first_gp_reg_save != 32))
--
Alan Modra
Australia Development Lab, IBM
[Ada] Semantically analyze source aspect in ASIS mode
In ASIS mode, the source aspect for Pre/Post/Test_Case should be semantically analyzed, as this is the node that is read by ASIS tools. This does not occur in normal compilation mode, as the source aspect is first rewritten in a pragma, and the pragma is analyzed instead. Now, the source aspect is also analyzed in ASIS mode. Tested on x86_64-pc-linux-gnu, committed on trunk 2011-11-04 Yannick Moy * atree.adb, atree.ads (Set_Original_Node): New set procedure. * sem_ch13.adb (Analyze_Aspect_Specifications/Pre_Post_Aspects): In ASIS mode, no splitting of aspects between conjuncts. (Analyze_Aspect_Specifications/Aspect_Test_Case): Make pragma expressions refer to the original aspect expressions through the Original_Node link. This is used in semantic analysis for ASIS mode, so that the original expression also gets analyzed. * sem_prag.adb (Preanalyze_TC_Args, Check_Precondition_Postcondition, Analyze_Pragma/Pragma_Test_Case): In ASIS mode, for a pragma generated from a source aspect, also analyze the original aspect expression. (Check_Expr_Is_Static_Expression): New procedure similar to existing procedure Check_Arg_Is_Static_Expression, except called on expression inside pragma. Index: sem_prag.adb === --- sem_prag.adb(revision 180943) +++ sem_prag.adb(working copy) @@ -181,7 +181,7 @@ -- original one, following the renaming chain) is returned. Otherwise the -- entity is returned unchanged. Should be in Einfo??? - procedure Preanalyze_TC_Args (Arg_Req, Arg_Ens : Node_Id); + procedure Preanalyze_TC_Args (N, Arg_Req, Arg_Ens : Node_Id); -- Preanalyze the boolean expressions in the Requires and Ensures arguments -- of a Test_Case pragma if present (possibly Empty). We treat these as -- spec expressions (i.e. similar to a default expression). @@ -260,9 +260,18 @@ -- Preanalyze the boolean expression, we treat this as a spec expression -- (i.e. similar to a default expression). - Preanalyze_Spec_Expression -(Get_Pragma_Arg (Arg1), Standard_Boolean); + Preanalyze_Spec_Expression (Get_Pragma_Arg (Arg1), Standard_Boolean); + -- In ASIS mode, for a pragma generated from a source aspect, also + -- analyze the original aspect expression. + + if ASIS_Mode +and then Present (Corresponding_Aspect (N)) + then + Preanalyze_Spec_Expression + (Expression (Corresponding_Aspect (N)), Standard_Boolean); + end if; + -- For a class-wide condition, a reference to a controlling formal must -- be interpreted as having the class-wide type (or an access to such) -- so that the inherited condition can be properly applied to any @@ -518,6 +527,15 @@ -- This procedure checks for possible duplications if this is the export -- case, and if found, issues an appropriate error message. + procedure Check_Expr_Is_Static_Expression +(Argx : Node_Id; + Typ : Entity_Id := Empty); + -- Check the specified expression Argx to make sure that it is a static + -- expression of the given type (i.e. it will be analyzed and resolved + -- using this type, which can be any valid argument to Resolve, e.g. + -- Any_Integer is OK). If not, given error and raise Pragma_Exit. If + -- Typ is left Empty, then any static expression is allowed. + procedure Check_First_Subtype (Arg : Node_Id); -- Checks that Arg, whose expression is an entity name, references a -- first subtype. @@ -1197,55 +1215,9 @@ procedure Check_Arg_Is_Static_Expression (Arg : Node_Id; - Typ : Entity_Id := Empty) - is - Argx : constant Node_Id := Get_Pragma_Arg (Arg); - + Typ : Entity_Id := Empty) is begin - if Present (Typ) then -Analyze_And_Resolve (Argx, Typ); - else -Analyze_And_Resolve (Argx); - end if; - - if Is_OK_Static_Expression (Argx) then -return; - - elsif Etype (Argx) = Any_Type then -raise Pragma_Exit; - - -- An interesting special case, if we have a string literal and we - -- are in Ada 83 mode, then we allow it even though it will not be - -- flagged as static. This allows the use of Ada 95 pragmas like - -- Import in Ada 83 mode. They will of course be flagged with - -- warnings as usual, but will not cause errors. - - elsif Ada_Version = Ada_83 - and then Nkind (Argx) = N_String_Literal - then -return; - - -- Static expression that raises Constraint_Error. This has already - -- been flagged, so just exit from pragma processing. - - elsif Is_Static_Expression (Argx) then -raise Pragma_
[Ada] Create the Find_Name_In_Path helper
This is a preliminary work.
Add a subprogram in the Prj.Env package so that it is possible to search in
a project path.
No functional change.
Tested on x86_64-pc-linux-gnu, committed on trunk
2011-11-04 Tristan Gingold
* prj-env.adb, prj-env.ads (Find_Name_In_Path): New function, from
Find_Project.Try_Path_Name.
(Find_Project): Use Find_Name_In_Path to implement Try_Path_Name.
Index: prj-env.adb
===
--- prj-env.adb (revision 180934)
+++ prj-env.adb (working copy)
@@ -2058,91 +2058,92 @@
Projects_Paths.Reset (Self.Cache);
end Set_Path;
- --
- -- Find_Project --
- --
+ ---
+ -- Find_Name_In_Path --
+ ---
- procedure Find_Project
- (Self : in out Project_Search_Path;
- Project_File_Name : String;
- Directory : String;
- Path : out Namet.Path_Name_Type)
- is
- File : constant String := Project_File_Name;
- -- Have to do a copy, in case the parameter is Name_Buffer, which we
- -- modify below
+ function Find_Name_In_Path (Self : Project_Search_Path;
+ Path : String) return String_Access is
+ First : Natural;
+ Last : Natural;
- function Try_Path_Name (Path : String) return String_Access;
- pragma Inline (Try_Path_Name);
- -- Try the specified Path
+ begin
+ if Current_Verbosity = High then
+ Debug_Output ("Trying " & Path);
+ end if;
- ---
- -- Try_Path_Name --
- ---
+ if Is_Absolute_Path (Path) then
+ if Check_Filename (Path) then
+return new String'(Path);
+ else
+return null;
+ end if;
- function Try_Path_Name (Path : String) return String_Access is
- First : Natural;
- Last : Natural;
- Result : String_Access := null;
+ else
+ -- Because we don't want to resolve symbolic links, we cannot use
+ -- Locate_Regular_File. So, we try each possible path
+ -- successively.
- begin
- if Current_Verbosity = High then
-Debug_Output ("Trying " & Path);
- end if;
+ First := Self.Path'First;
+ while First <= Self.Path'Last loop
+while First <= Self.Path'Last
+ and then Self.Path (First) = Path_Separator
+loop
+ First := First + 1;
+end loop;
- if Is_Absolute_Path (Path) then
-if Is_Regular_File (Path) then
- Result := new String'(Path);
-end if;
+exit when First > Self.Path'Last;
- else
--- Because we don't want to resolve symbolic links, we cannot use
--- Locate_Regular_File. So, we try each possible path
--- successively.
+Last := First;
+while Last < Self.Path'Last
+ and then Self.Path (Last + 1) /= Path_Separator
+loop
+ Last := Last + 1;
+end loop;
-First := Self.Path'First;
-while First <= Self.Path'Last loop
- while First <= Self.Path'Last
- and then Self.Path (First) = Path_Separator
- loop
- First := First + 1;
- end loop;
+Name_Len := 0;
- exit when First > Self.Path'Last;
+if not Is_Absolute_Path (Self.Path (First .. Last)) then
+ Add_Str_To_Name_Buffer (Get_Current_Dir); -- ??? System call
+ Add_Char_To_Name_Buffer (Directory_Separator);
+end if;
- Last := First;
- while Last < Self.Path'Last
- and then Self.Path (Last + 1) /= Path_Separator
- loop
- Last := Last + 1;
- end loop;
+Add_Str_To_Name_Buffer (Self.Path (First .. Last));
+Add_Char_To_Name_Buffer (Directory_Separator);
+Add_Str_To_Name_Buffer (Path);
- Name_Len := 0;
+if Current_Verbosity = High then
+ Debug_Output ("Testing file " & Name_Buffer (1 .. Name_Len));
+end if;
- if not Is_Absolute_Path (Self.Path (First .. Last)) then
- Add_Str_To_Name_Buffer (Get_Current_Dir); -- ??? System call
- Add_Char_To_Name_Buffer (Directory_Separator);
- end if;
+if Check_Filename (Name_Buffer (1 .. Name_Len)) then
+ return new String'(Name_Buffer (1 .. Name_Len));
+end if;
- Add_Str_To_Name_Buffer (Self.Path (First .. Last));
- Add_Char_To_Name_Buffer (Directory_Separator);
- Add_Str_To_Name_Buffer (Path);
+First := Last + 1;
+ end loop
[Ada] Add Generic_Sort operation to standard library
Ada 2012 added a generic operation for sorting an anonymous array (or
array-like container), named Ada.Containers.Generic_Sort, per AI05-0001.
The text of AI05-0001 can be found here:
http://www.ada-auth.org/cgi-bin/cvsweb.cgi/ai05s/ai05-0001-1.txt
Tested on x86_64-pc-linux-gnu, committed on trunk
2011-11-04 Matthew Heaney
* Makefile.rtl, impunit.adb: Added a-cogeso.ad[sb]
* a-cgaaso.adb: Replaced implementation with instantiation
of Generic_Sort.
* a-cogeso.ad[sb] This is the new Ada 2012 unit
Ada.Containers.Generic_Sort
Index: impunit.adb
===
--- impunit.adb (revision 180935)
+++ impunit.adb (working copy)
@@ -494,6 +494,7 @@
-- Note: strictly the following should be Ada 2012 units, but it seems
-- harmless (and useful) to make then available in Ada 2005 mode.
+("a-cogeso", T), -- Ada.Containers.Generic_Sort
("a-secain", T), -- Ada.Strings.Equal_Case_Insensitive
("a-shcain", T), -- Ada.Strings.Hash_Case_Insensitive
("a-slcain", T), -- Ada.Strings.Less_Case_Insensitive
Index: a-cgaaso.adb
===
--- a-cgaaso.adb(revision 180934)
+++ a-cgaaso.adb(working copy)
@@ -6,7 +6,7 @@
-- --
-- B o d y --
-- --
--- Copyright (C) 2004-2009, Free Software Foundation, Inc. --
+-- Copyright (C) 2004-2011, Free Software Foundation, Inc. --
-- --
-- GNAT is free software; you can redistribute it and/or modify it under --
-- terms of the GNU General Public License as published by the Free Soft- --
@@ -27,103 +27,21 @@
-- This unit was originally developed by Matthew J Heaney. --
--
--- This algorithm was adapted from GNAT.Heap_Sort (see g-heasor.ad[sb])
+-- This unit was originally a GNAT-specific addition to Ada 2005. A unit
+-- providing the same feature, Ada.Containers.Generic_Sort, was defined for
+-- Ada 2012. We retain Generic_Anonymous_Array_Sort for compatibility, but
+-- implement it in terms of the official unit, Generic_Sort.
-with System;
+with Ada.Containers.Generic_Sort;
procedure Ada.Containers.Generic_Anonymous_Array_Sort
(First, Last : Index_Type'Base)
is
- type T is range System.Min_Int .. System.Max_Int;
+ procedure Sort is new Ada.Containers.Generic_Sort
+ (Index_Type => Index_Type,
+ Before => Less,
+ Swap => Swap);
- function To_Index (J : T) return Index_Type;
- pragma Inline (To_Index);
-
- function Lt (J, K : T) return Boolean;
- pragma Inline (Lt);
-
- procedure Xchg (J, K : T);
- pragma Inline (Xchg);
-
- procedure Sift (S : T);
-
- --
- -- To_Index --
- --
-
- function To_Index (J : T) return Index_Type is
- K : constant T'Base := Index_Type'Pos (First) + J - T'(1);
- begin
- return Index_Type'Val (K);
- end To_Index;
-
-
- -- Lt --
-
-
- function Lt (J, K : T) return Boolean is
- begin
- return Less (To_Index (J), To_Index (K));
- end Lt;
-
- --
- -- Xchg --
- --
-
- procedure Xchg (J, K : T) is
- begin
- Swap (To_Index (J), To_Index (K));
- end Xchg;
-
- Max : T := Index_Type'Pos (Last) - Index_Type'Pos (First) + T'(1);
-
- --
- -- Sift --
- --
-
- procedure Sift (S : T) is
- C : T := S;
- Son: T;
- Father : T;
-
- begin
- loop
- Son := C + C;
-
- if Son < Max then
-if Lt (Son, Son + 1) then
- Son := Son + 1;
-end if;
- elsif Son > Max then
-exit;
- end if;
-
- Xchg (Son, C);
- C := Son;
- end loop;
-
- while C /= S loop
- Father := C / 2;
-
- if Lt (Father, C) then
-Xchg (Father, C);
-C := Father;
- else
-exit;
- end if;
- end loop;
- end Sift;
-
--- Start of processing for Generic_Anonymous_Array_Sort
-
begin
- for J in reverse 1 .. Max / 2 loop
- Sift (J);
- end loop;
-
- while Max > 1 loop
- Xchg (1, Max);
- Max := Max - 1;
- Sift (1);
- end loop;
+ Sort (First, Last);
end Ada.Containers.Generic_Anonymous_Array_Sort;
Index: Makefile.rtl
===
--- Makefile.rtl(revision 180935)
+++ Makefile.rtl(working copy)
@@ -122,6 +122,7 @@
a-ciormu$(objext) \
a-ciorse$(objext) \
a-clrefi$(objext) \
+ a-cogeso$(objext) \
a-cohama$(ob
ping*2: [RFA:] testsuite infrastructure for options implied by dg-final methods
Ping again, CC:ing testsuite maintainers.
Honza thought this was a good idea, if that helps.
> From: Hans-Peter Nilsson
> Date: Fri, 28 Oct 2011 16:34:07 +0200
> Subject changed from '[RFA:] fix breakage with "Update testsuite
> to run with slim LTO"' except it doesn't fix *all* breakage
> introduced by that patch, only the one I observed and intended
> to fix.
>
> > Date: Fri, 21 Oct 2011 04:29:20 +0200
> > From: Hans-Peter Nilsson
>
> > > Date: Fri, 21 Oct 2011 00:19:32 +0200
> > > From: Jan Hubicka
> > > Yes, if we scan assembler, we likely want -fno-fat-lto-objects.
> >
> > > > then IIUC you need to patch *all* torture tests that use
> > > > scan-assembler and scan-assembler-not. Alternatively, patch
> > > > somewhere else, like not passing it if certain directives are
> > > > used, like scan-assembler{,-not}. And either way, is it safe to
> > > > add that option always, not just when also passing "-flto" or
> > > > something?
> > >
> > > Hmm, some of assembler scans still works because they check for
> > > presence of symbols we output anyway, but indeed, it would make more
> > > sense to automatically imply -ffat-lto-object when scan-assembler
> > > is used. I am not sure if my dejagnu skill as on par here however.
> >
> > Maybe you could make amends ;) by testing the following, which
> > seems to work at least for dg-torture.exp and cris-elf/cris-sim,
> > in which -ffat-lto-object is automatically added for each
> > scan-assembler and scan-assembler-not test, extensible for other
> > dg-final actions without polluting with checking LTO options and
> > whatnot across the files. I checked (and corrected) so it also
> > works when !check_effective_target_lto by commenting out the
> > setting in the second chunk.
> >
> > gcc/testsuite:
> >
> > * lib/gcc-dg.exp (gcc_force_conventional_output): New global
> > variable, default empty, -ffat-lto-objects for effective_target_lto.
> > (gcc-dg-test-1): Add options from dg-final methods.
> > * lib/scanasm.exp (scan-assembler_required_options)
> > (scan-assembler-not_required_options): New procs.
>
>
> Ok to commit?
>
> brgds, H-P
>
[Ada] Further refinement to Atomic_Synchronization handling
This patch cleans up and reorganizes the handling of atomic sync, and
fixes some inconsistencies, e.g. an attribute reference was properly
excluded for an identifier, but not for a selected component. Also the
flag Atomic_Sync_Required is now on the selected component node itself
not the selector name identifier, which is more consistent.
Tested on x86_64-pc-linux-gnu, committed on trunk
2011-11-04 Robert Dewar
* checks.adb (Atomic_Synchronization_Disabled): Check -gnatd.d
and -gnatd.e here
* exp_ch2.adb (Expand_Entity_Reference): Use
Activate_Atomic_Synchronization
* exp_ch4.adb (Expand_N_Explicit_Dereference): Use
Activate_Atomic_Synchronization (Expand_N_Indexed_Compoonent):
Activate_Atomic_Synchronization (Expand_N_Selected_Component):
Use Activate_Atomic_Synchronization
* exp_util.ads, exp_util.adb (Activate_Atomic_Synchronization): New
procedure.
* sinfo.ads, sinfo.adb (Atomic_Sync_Required): Can now apply to
N_Selected_Component node
Index: exp_util.adb
===
--- exp_util.adb(revision 180934)
+++ exp_util.adb(working copy)
@@ -160,6 +160,53 @@
-- or body. Flag Nested_Constructs should be set when any nested packages
-- declared in L must be processed.
+ -
+ -- Activate_Atomic_Synchronization --
+ -
+
+ procedure Activate_Atomic_Synchronization (N : Node_Id) is
+ Msg_Node : Node_Id;
+
+ begin
+ -- Nothing to do if we are the prefix of an attribute, since we do not
+ -- want an atomic sync operation for things like A'Adress or A'Size).
+
+ if Nkind (Parent (N)) = N_Attribute_Reference
+and then Prefix (Parent (N)) = N
+ then
+ return;
+ end if;
+
+ -- Go ahead and set the flag
+
+ Set_Atomic_Sync_Required (N);
+
+ -- Generate info message if requested
+
+ if Warn_On_Atomic_Synchronization then
+ case Nkind (N) is
+when N_Identifier =>
+ Msg_Node := N;
+
+when N_Selected_Component | N_Expanded_Name =>
+ Msg_Node := Selector_Name (N);
+
+when N_Explicit_Dereference | N_Indexed_Component =>
+ Msg_Node := Empty;
+
+when others =>
+ pragma Assert (False);
+ return;
+ end case;
+
+ if Present (Msg_Node) then
+Error_Msg_N ("?info: atomic synchronization set for &", Msg_Node);
+ else
+Error_Msg_N ("?info: atomic synchronization set", N);
+ end if;
+ end if;
+ end Activate_Atomic_Synchronization;
+
--
-- Adjust_Condition --
--
Index: exp_util.ads
===
--- exp_util.ads(revision 180934)
+++ exp_util.ads(working copy)
@@ -149,6 +149,14 @@
-- Other Subprograms --
---
+ procedure Activate_Atomic_Synchronization (N : Node_Id);
+ -- N is a node for which atomic synchronization may be required (it is
+ -- either an identifier, expanded name, or selected/indexed component or
+ -- an explicit dereference). The caller has checked the basic conditions
+ -- (atomic variable appearing and Atomic_Sync not disabled). This function
+ -- checks if atomic synchronization is required and if so sets the flag
+ -- and if appropriate generates a warning (in -gnatw.n mode).
+
procedure Adjust_Condition (N : Node_Id);
-- The node N is an expression whose root-type is Boolean, and which
-- represents a boolean value used as a condition (i.e. a True/False
Index: sinfo.adb
===
--- sinfo.adb (revision 180943)
+++ sinfo.adb (working copy)
@@ -256,7 +256,8 @@
or else NT (N).Nkind = N_Expanded_Name
or else NT (N).Nkind = N_Explicit_Dereference
or else NT (N).Nkind = N_Identifier
-or else NT (N).Nkind = N_Indexed_Component);
+or else NT (N).Nkind = N_Indexed_Component
+or else NT (N).Nkind = N_Selected_Component);
return Flag14 (N);
end Atomic_Sync_Required;
@@ -3327,7 +3328,8 @@
or else NT (N).Nkind = N_Expanded_Name
or else NT (N).Nkind = N_Explicit_Dereference
or else NT (N).Nkind = N_Identifier
-or else NT (N).Nkind = N_Indexed_Component);
+or else NT (N).Nkind = N_Indexed_Component
+or else NT (N).Nkind = N_Selected_Component);
Set_Flag14 (N, Val);
end Set_Atomic_Sync_Required;
Index: sinfo.ads
===
--- sinfo.ads (revision 180943)
+++ sinfo.ads (working copy)
@@ -606,16 +606,8 @@
--harmless.
-- Atomic_Sync_Required (Flag14-Sem)
- --This flag is
Re: [PATCH] Straight-line strength reduction, stage 1
On Sun, Oct 30, 2011 at 5:10 PM, William J. Schmidt wrote: > Greetings, > > IVOPTS handles strength reduction of induction variables, but GCC does > not currently perform strength reduction in straight-line code. This > has been noted before in PR22586 and PR35308. PR46556 is also a case > that could be handled with strength reduction. This patch adds a pass > to perform strength reduction along dominator paths on the easiest > cases, where replacements are obviously profitable. > > My intent is to add subsequent installments to handle more involved > cases, as described in the code commentary. The cases not yet covered > will require target-specific cost analysis to determine profitability. > It is likely that this will leverage some of the cost function > infrastructure in tree-ssa-loop-ivopts.c. > > I've bootstrapped and tested the code on powerpc64-linux with no > regressions. I've also run SPEC CPU2006 to compare results. 32-bit > PowerPC gains about 1% on integer code. Other results are in the noise > range. 64-bit integer code would have also shown gains, except for one > bad result (400.perlbench degraded 4%). Initial analysis shows that > very different control flow is created for regmatch with the patch than > without. I will be investigating further this week, but presumably some > touchy threshold was no longer met for a downstream optimization -- > probably an indirect effect. > > My hope is to commit this first stage as part of 4.7, with the remainder > to follow in 4.8. > > Thanks for your consideration, I've had a quick look for now and noted two things 1) you try to handle casting already - for the specific patterns, it seems the constraints are the same as for detecting when using a widening multiplication/add is possible? I think we should have some common code for the legality checks. 2) you do not handle POINTER_PLUS_EXPR - which looks most interesting for the pure pointer arithmetic case. (and you do not treat PLUS_EXPR as commutative, thus a + b*c you handle but not b*c + a(?), for a*b + c*d we'd have two candidates) I'm not sure I follow the dominance checks - usually instead of + || !dominated_by_p (CDI_DOMINATORS, + gimple_bb (c->cand_stmt), + gimple_bb (use_stmt))) you'd special case gimple_bb (c->cand_stmt) == gimple_bb (use_stmt) and have stmt uids to resolve dominance inside a basic block. For the overall structure I see you are matching the MULT_EXPRs and are looking at all immediate uses of it for candidates with +-. I'd have expected you walk the BBs in dominator order, visiting statements and looking for the +- instead. That would avoid any issue about dominance (because you walk BBs properly) and wouldn't require immediate use walks either (I couldn't convince myself 100% you are not visiting stmts multiple times that way...) But maybe I missed sth in my quick look. Most interesting (and one reason why strength reduction from PRE didn't work out) is the from a A + B*C stmt lookup all candidates for computing the value in a more efficient way. You do not seem to transform stmts on-the-fly, so for a1 = c + d; a2 = c + 2*d; a3 = c + 3*d; are you able to generate a1 = c + d; a2 = a1 + d; a3 = a2 + d; ? On-the-fly operation would also handle this if the candidate info for a2 is kept as c + 2*d. Though it's probably worth lookign at a1 = c + d; a2 = a1 + d; a3 = c + 3*d; and see if that still figures out that a3 = a2 + d (thus, do you, when you find the candidate a1 + 1 * d, fold in candidate information for a1? thus, try to reduce it to an ultimate base?) Thanks, Richard. > Bill > > > 2011-10-30 Bill Schmidt > > gcc: > > * tree-pass.h (pass_strength_reduction): New declaration. > * timevar.def (TV_TREE_SLSR): New time-var. > * tree-ssa-strength-reduction.c: New file. > * Makefile.in: New dependences. > * passes.c (init_optimization_passes): Add new pass. > > gcc/testsuite: > > * gcc.dg/tree-ssa/slsr-1.c: New test case. > * gcc.dg/tree-ssa/slsr-2.c: New test case. > * gcc.dg/tree-ssa/slsr-3.c: New test case. > * gcc.dg/tree-ssa/slsr-4.c: New test case. > > > Index: gcc/tree-pass.h > === > --- gcc/tree-pass.h (revision 180617) > +++ gcc/tree-pass.h (working copy) > @@ -449,6 +449,7 @@ extern struct gimple_opt_pass pass_tracer; > extern struct gimple_opt_pass pass_warn_unused_result; > extern struct gimple_opt_pass pass_split_functions; > extern struct gimple_opt_pass pass_feedback_split_functions; > +extern struct gimple_opt_pass pass_strength_reduction; > > /* IPA Passes */ > extern struct simple_ipa_opt_pass pass_ipa_lower_emutls; > Index: gcc/testsuite/gcc.dg/tree-ssa/slsr-1.c > === > --- gcc/testsuite/gcc.dg/tree-ssa/slsr-1.c (revision 0) > +++ gcc/testsuite/gcc.dg/tree
[Ada] Further work on atomic synchronization
This makes the compiler detect one more case needing atomic synchronization, namely a pragma Atomic on a component with a predefined type. And this also excludes a few more cases not needing it. The compiler should issue the warning with -gnatw.n -gnatld7 -gnatj60 on: procedure Synccomp is type R is record I : Integer; pragma Atomic (I); end record; Rec : R; begin Rec.I := 1; end; for Rec.I in the assignment. Tested on x86_64-pc-linux-gnu, committed on trunk 2011-11-04 Eric Botcazou * exp_ch4.adb (Expand_N_Selected_Component): Refine code setting the Atomic_Sync_Required flag to detect one more case. * exp_util.adb (Activate_Atomic_Synchronization): Refine code setting the Atomic_Sync_Required flag to exclude more cases, depending on the parent of the node to be examined. Index: exp_util.adb === --- exp_util.adb(revision 180951) +++ exp_util.adb(working copy) @@ -168,15 +168,31 @@ Msg_Node : Node_Id; begin - -- Nothing to do if we are the prefix of an attribute, since we do not - -- want an atomic sync operation for things like A'Adress or A'Size). - if Nkind (Parent (N)) = N_Attribute_Reference -and then Prefix (Parent (N)) = N - then - return; - end if; + case Nkind (Parent (N)) is + when N_Attribute_Reference | +-- Nothing to do if we are the prefix of an attribute, since we +-- do not want an atomic sync operation for things like 'Size. + + N_Reference | + +-- Likewise for a mere reference + + N_Indexed_Component | + N_Selected_Component | + N_Slice => + +-- The C.6(15) clause says that only reads and updates of the +-- object as a whole require atomic synchronization. + +if Prefix (Parent (N)) = N then + return; +end if; + + when others => null; + end case; + -- Go ahead and set the flag Set_Atomic_Sync_Required (N); Index: exp_ch4.adb === --- exp_ch4.adb (revision 180950) +++ exp_ch4.adb (working copy) @@ -8196,15 +8196,44 @@ Analyze (N); end if; - -- If we still have a selected component, and the type is an Atomic - -- type for which Atomic_Sync is enabled, then we set the atomic sync - -- flag on the selector. + -- Set Atomic_Sync_Required if necessary for atomic component - if Nkind (N) = N_Selected_Component -and then Is_Atomic (Etype (N)) -and then not Atomic_Synchronization_Disabled (Etype (N)) - then - Activate_Atomic_Synchronization (N); + if Nkind (N) = N_Selected_Component then + declare +E : constant Entity_Id := Entity (Selector_Name (N)); +Set : Boolean; + + begin +-- If component is atomic, but type is not, setting depends on +-- disable/enable state for the component. + +if Is_Atomic (E) and then not Is_Atomic (Etype (E)) then + Set := not Atomic_Synchronization_Disabled (E); + +-- If component is not atomic, but its type is atomic, setting +-- depends on disable/enable state for the type. + +elsif not Is_Atomic (E) and then Is_Atomic (Etype (E)) then + Set := not Atomic_Synchronization_Disabled (Etype (E)); + +-- If both component and type are atomic, we disable if either +-- component or its type have sync disabled. + +elsif Is_Atomic (E) and then Is_Atomic (Etype (E)) then + Set := (not Atomic_Synchronization_Disabled (E)) +and then + (not Atomic_Synchronization_Disabled (Etype (E))); + +else + Set := False; +end if; + +-- Set flag if required + +if Set then + Activate_Atomic_Synchronization (N); +end if; + end; end if; end Expand_N_Selected_Component;
Re: [build] Restore arm-eabi bootstrap (PR target/50978)
On 11/03/2011 12:50 PM, Rainer Orth wrote: > This patch restores arm-none-eabi bootstrap, which had been broken by my > libgcc patches. They accidentally removed arm/t-bpabi in gcc/config.gcc > while the file is still needed for its addition to EXTRA_HEADERS. > > Matt confirmed in the PR that it restored bootstrap for him. > > Ok for mainline? > > Rainer > > > 2011-11-03 Rainer Orth > > PR target/50978 > * config/arm/t-bpabi: New file. > * config.gcc (arm*-*-linux*): Add arm/t-bpabi to tmake_file for > arm*-*-linux-*eabi. > (arm*-*-uclinux*): Add arm/t-bpabi to tmake_file for > arm*-*-uclinux*eabi. > (arm*-*-eabi*, arm*-*-symbianelf*): Add arm/t-bpabi to tmake_file > for arm*-*-eabi*. still fails to build on arm-linux-gnueabi, configured with --with-arch=armv7-a --with-float=hard --with-fpu=vfpv3-d16 --with-mode=thumb /usr/bin/ld: emutls_s.o: relocation R_ARM_THM_MOVW_ABS_NC against `pthread_cancel' can not be used when making a shared object; recompile with -fPIC emutls_s.o: could not read symbols: Bad value collect2: error: ld returned 1 exit status make[5]: *** [libgcc_s.so] Error 1 make[5]: *** Waiting for unfinished jobs ranlib libgcc.a make[5]: Leaving directory `/home/doko/gcc-snapshot-2003/build/arm-linux-gnueabihf/libgcc' make[4]: *** [all-stage1-target-libgcc] Error 2 emutls_s.o indeed isn't built with -fPIC (it is on the 4.6 branch); PICFLAG in libgcc/Makefile is set but apparently not used. Matthias
Re: cxx-mem-model merge [4 of 9] c-family
On 11/04/2011 08:51 AM, Joseph S. Myers wrote:
DR#109 applies: "A conforming implementation must not fail to translate a
strictly conforming program simply because some possible execution of that
program would result in undefined behavior.". The value of a function
parameter (that has the right type) is a property of the execution of the
program and undefined behavior occurs when the call is executed, after its
arguments have been evaluated.
Generating a warning instead of an error and changing the constant to a
valid one is probably the simplest fix (although generating a trap as
well, after the arguments are evaluated, would be existing practice in
GCC).
Fair enough, Im sold.
Here's the updated c-family file (with an updated changelog as well). I
added a warning to common.c and updated builtins.c::get_memmodel where
the same error was issued. That is changed to a warning as well. I
also added an entry in the testsuite to check for the warning.
The common.opt entry looks like:
Index: common.opt
===
*** common.opt (revision 180839)
--- common.opt (working copy)
*** Winline
*** 551,556
--- 551,560
Common Var(warn_inline) Warning
Warn when an inlined function cannot be inlined
+ Winvalid-memory-model
+ Common Var(warn_invalid_memory_model) Init(1) Warning
+ Warn when an atomic memory model parameter is known to be outside the valid
range.
+
Wlarger-than-
Common RejectNegative Joined Warning Undocumented Alias(Wlarger-than=)
And the c-family patch:
2011-11-06 Richard Henderson
* c-cppbuiltin.c (c_cpp_builtins): Test both atomic and sync patterns.
2011-11-06 Andrew MacLeod
* c-common.c (sync_resolve_params, sync_resolve_return): Only tweak
parameters that are the same type size.
(get_atomic_generic_size): New. Find size of generic
atomic function parameters and do typechecking.
(add_atomic_size_parameter): New. Insert size into parameter list.
(resolve_overloaded_atomic_exchange): Restructure __atomic_exchange to
either __atomic_exchange_n or external library call.
(resolve_overloaded_atomic_compare_exchange): Restructure
__atomic_compare_exchange to either _n variant or external library call.
(resolve_overloaded_atomic_load): Restructure __atomic_load to either
__atomic_load_n or an external library call.
(resolve_overloaded_atomic_store): Restructure __atomic_store to either
__atomic_store_n or an external library call.
(resolve_overloaded_builtin): Handle new __atomic builtins.
Index: c-common.c
===
*** c-common.c (revision 180839)
--- c-common.c (working copy)
*** sync_resolve_size (tree function, VEC(tr
*** 9020,9026
was encountered; true on success. */
static bool
! sync_resolve_params (tree orig_function, tree function, VEC(tree, gc) *params)
{
function_args_iterator iter;
tree ptype;
--- 9020,9027
was encountered; true on success. */
static bool
! sync_resolve_params (location_t loc, tree orig_function, tree function,
!VEC(tree, gc) *params, bool orig_format)
{
function_args_iterator iter;
tree ptype;
*** sync_resolve_params (tree orig_function,
*** 9048,9068
++parmnum;
if (VEC_length (tree, params) <= parmnum)
{
! error ("too few arguments to function %qE", orig_function);
return false;
}
! /* ??? Ideally for the first conversion we'd use convert_for_assignment
!so that we get warnings for anything that doesn't match the pointer
!type. This isn't portable across the C and C++ front ends atm. */
! val = VEC_index (tree, params, parmnum);
! val = convert (ptype, val);
! val = convert (arg_type, val);
! VEC_replace (tree, params, parmnum, val);
function_args_iter_next (&iter);
}
/* The definition of these primitives is variadic, with the remaining
being "an optional list of variables protected by the memory barrier".
No clue what that's supposed to mean, precisely, but we consider all
--- 9049,9082
++parmnum;
if (VEC_length (tree, params) <= parmnum)
{
! error_at (loc, "too few arguments to function %qE", orig_function);
return false;
}
! /* Only convert parameters if the size is appropriate with new format
!sync routines. */
! if (orig_format ||
! tree_int_cst_equal (TYPE_SIZE (ptype), TYPE_SIZE (arg_type)))
! {
! /* Ideally for the first conversion we'd use convert_for_assignment
!so that we get warnings for anything that doesn't match the pointer
!type. This isn't portable across the C and C++ front ends atm. */
!
[Ada] Change semantics of Merge
The semantics of Merge changed slightly per AI05-0021. It was originally the case that if Target and Source denoted the same container object, then the GNAT implementation of Merge did nothing. However, it was argued that RM05 did not precisely specify the semantics for this corner case. The decision of the ARG was that if Target and Source denote the same non-empty container object, then Program_Error is raised. The text of AI05-0021 can be found here: http://www.ada-auth.org/cgi-bin/cvsweb.cgi/ai05s/ai05-0021-1.txt Tested on x86_64-pc-linux-gnu, committed on trunk 2011-11-04 Matthew Heaney * a-convec.adb, a-coinve.adb, a-cobove.adb (Merge): Raise PE when Target and Source denote same non-empty object * a-cdlili.adb, a-cidlli.adb, a-cbdlli.adb (Merge): Ditto Index: a-cdlili.adb === --- a-cdlili.adb(revision 180934) +++ a-cdlili.adb(working copy) @@ -515,10 +515,24 @@ LI, RI : Cursor; begin - if Target'Address = Source'Address then + + -- The semantics of Merge changed slightly per AI05-0021. It was + -- originally the case that if Target and Source denoted the same + -- container object, then the GNAT implementation of Merge did + -- nothing. However, it was argued that RM05 did not precisely + -- specify the semantics for this corner case. The decision of the + -- ARG was that if Target and Source denote the same non-empty + -- container object, then Program_Error is raised. + + if Source.Is_Empty then return; end if; + if Target'Address = Source'Address then +raise Program_Error with + "Target and Source denote same non-empty container"; + end if; + if Target.Busy > 0 then raise Program_Error with "attempt to tamper with cursors of Target (list is busy)"; Index: a-coinve.adb === --- a-coinve.adb(revision 180934) +++ a-coinve.adb(working copy) @@ -1268,16 +1268,26 @@ I, J : Index_Type'Base; begin - if Target.Last < Index_Type'First then -Move (Target => Target, Source => Source); + + -- The semantics of Merge changed slightly per AI05-0021. It was + -- originally the case that if Target and Source denoted the same + -- container object, then the GNAT implementation of Merge did + -- nothing. However, it was argued that RM05 did not precisely + -- specify the semantics for this corner case. The decision of the + -- ARG was that if Target and Source denote the same non-empty + -- container object, then Program_Error is raised. + + if Source.Last < Index_Type'First then -- Source is empty return; end if; if Target'Address = Source'Address then -return; +raise Program_Error with + "Target and Source denote same non-empty container"; end if; - if Source.Last < Index_Type'First then + if Target.Last < Index_Type'First then -- Target is empty +Move (Target => Target, Source => Source); return; end if; Index: a-cidlli.adb === --- a-cidlli.adb(revision 180934) +++ a-cidlli.adb(working copy) @@ -563,10 +563,24 @@ LI, RI : Cursor; begin - if Target'Address = Source'Address then + + -- The semantics of Merge changed slightly per AI05-0021. It was + -- originally the case that if Target and Source denoted the same + -- container object, then the GNAT implementation of Merge did + -- nothing. However, it was argued that RM05 did not precisely + -- specify the semantics for this corner case. The decision of the + -- ARG was that if Target and Source denote the same non-empty + -- container object, then Program_Error is raised. + + if Source.Is_Empty then return; end if; + if Target'Address = Source'Address then +raise Program_Error with + "Target and Source denote same non-empty container"; + end if; + if Target.Busy > 0 then raise Program_Error with "attempt to tamper with cursors of Target (list is busy)"; Index: a-cobove.adb === --- a-cobove.adb(revision 180934) +++ a-cobove.adb(working copy) @@ -788,16 +788,26 @@ I, J : Count_Type; begin - if Target.Is_Empty then -Move (Target => Target, Source => Source); + + -- The semantics of Merge changed slightly per AI05-0021. It was +
Re: Patch ping
Hi, On Fri, 4 Nov 2011, Richard Guenther wrote: > > With the approach the incremental patch does I just walk what > > split_constant_offset during DR walks and peel off loop invariants > > until I have something that should be used as the vectorized index. > > It looks like split_constant_offset walks def stmts in an unbound > fashion. That's surely a bad idea - SCEV should already have expanded > everything non-loop-invariant, thus it should at most look through DEFs > that trivially add to the constant offset, not through others. split_constant_offset is also used for canonicalization, to increase chances of finding the same base in two data refs to be able to use offset based disambiguation. For that it sometimes has to look also through loop invariant parts. Ciao, Michael.
[Ada] Message on rewriting loops is now an info message
This patch changes the message for rewriting loops into an info
message (really no reason to give a warning!). The following test
was compiled with -gnatld7 -gnatj60
1. procedure SCOGoto is
2.X : Integer;
3. begin
4.X := 1;
5.<>
|
>>> info: code between label and backwards goto
rewritten as loop
6. X := X + 1;
7. goto LUPE;
8. end SCOGoto;
Tested on x86_64-pc-linux-gnu, committed on trunk
2011-11-04 Robert Dewar
* par-labl.adb (Rewrite_As_Loop): Generate info msg rather than
warning message.
Index: par-labl.adb
===
--- par-labl.adb(revision 180934)
+++ par-labl.adb(working copy)
@@ -6,7 +6,7 @@
-- --
-- B o d y --
-- --
--- Copyright (C) 1992-2010, Free Software Foundation, Inc. --
+-- Copyright (C) 1992-2011, Free Software Foundation, Inc. --
-- --
-- GNAT is free software; you can redistribute it and/or modify it under --
-- terms of the GNU General Public License as published by the Free Soft- --
@@ -340,6 +340,7 @@
New_Node (N_Loop_Statement, Sloc (Loop_Header));
Stat : Node_Id;
Next_Stat : Node_Id;
+
begin
Stat := Next (Loop_Header);
while Stat /= Loop_End loop
@@ -355,7 +356,7 @@
Remove (Loop_Header);
Rewrite (Loop_End, Loop_Stmt);
Error_Msg_N
- ("code between label and backwards goto rewritten as loop?",
+ ("info: code between label and backwards goto rewritten as loop?",
Loop_End);
end Rewrite_As_Loop;
[Ada] Cleanup -gnatG output for machine code
This patch cleans up a minor glitch of outputting an extra
semicolon after the code statement appearing as the expression
of an Asm construct when using machine code.
The following is compiled on an x86 with -gnatG
1. with system.machine_code; use system.machine_code;
2. procedure repro is
3. c : integer := -1;
4. r : integer;
5. begin
6. asm ("nop", integer'asm_output ("=m", r),
7.integer'asm_input("r", c));
8. if r /= 0 then
9. raise program_error;
10. end if;
11. end;
and the output is:
Source recreated from tree for repro (body)
---
with system;
with system.system__machine_code;
use system.system__machine_code;
with system.system__machine_code;
procedure repro is
c : integer := -1;
r : integer;
begin
system__machine_code__asm_insn'(
system__machine_code__asm__4 ("nop", integer'asm_output("=m", r),
integer'asm_input("r", c), clobber => "", volatile => false));
if r /= 0 then
[program_error "explicit raise"]
end if;
return;
end repro;
There used to be an extra semicolon "false););" in the output
Tested on x86_64-pc-linux-gnu, committed on trunk
2011-11-04 Robert Dewar
* sprint.adb (Sprint_Node_Actual, case Qualified_Expression):
Avoid junk semicolon after argument of machine code Asm operand.
Index: sprint.adb
===
--- sprint.adb (revision 180934)
+++ sprint.adb (working copy)
@@ -2694,9 +2694,19 @@
if Paren_Count (Expression (Node)) /= 0 then
Sprint_Node (Expression (Node));
+
else
Write_Char ('(');
Sprint_Node (Expression (Node));
+
+ -- Odd case, for the qualified expressions used in machine
+ -- code the argument may be a procedure call, resulting in
+ -- a junk semicolon before the right parent, get rid of it.
+
+ Write_Erase_Char (';');
+
+ -- Now we can add the terminating right paren
+
Write_Char (')');
end if;
[Ada] Inhibit exception push/pop when not needed
This patch inhibits the generation of exception push/pop nodes if restriction No_Exception_Handlers is active (when they are always useless), or in CodePeer mode (where they are never needed and can intefere with the analysis). The following program 1. pragma Restrictions (No_Exception_Propagation); 2. pragma Restrictions (No_Exception_Handlers); 3. function NoPush (X : Integer) return Integer is 4. begin 5.return 10 / X; 6. end; should generate the following -gnatG output: Source recreated from tree for Nopush (body) pragma restrictions (no_exception_propagation); pragma restrictions (no_exception_handlers); function nopush (x : integer) return integer is begin [constraint_error when x = 0 "divide by zero"] return integer(10 / x); end nopush; Tested on x86_64-pc-linux-gnu, committed on trunk 2011-11-04 Robert Dewar * exp_ch11.adb (Generate_Push_Pop): Inhibit push/pop nodes in CodePeer mode or if restriction No_Exception_Handlers is present. * exp_ch6.adb (Expand_N_Subprogram_Body): (Inhibit push/pop nodes in CodePeer mode or if restriction No_Exception_Handlers is present. Index: exp_ch11.adb === --- exp_ch11.adb(revision 180934) +++ exp_ch11.adb(working copy) @@ -334,7 +334,7 @@ -- raise statements into gotos, e.g. all N_Raise_xxx_Error nodes are -- left unchanged and passed to the back end. - -- Instead, the front end generates two nodes + -- Instead, the front end generates three nodes -- N_Push_Constraint_Error_Label -- N_Push_Program_Error_Label @@ -356,6 +356,10 @@ -- field in the Push node will be empty signifying that for this region -- of code, no optimization is possible. + -- These Push/Pop nodes are inhibited if No_Exception_Handlers is set + -- since they are useless in this case, and in CodePeer mode, where + -- they serve no purpose and can intefere with the analysis. + -- The back end must maintain three stacks, one for each exception case, -- the Push node pushes an entry onto the corresponding stack, and Pop -- node pops off the entry. Then instead of calling Rcheck_nn, if the @@ -503,6 +507,12 @@ procedure Generate_Push_Pop (H : Node_Id) is begin +if Restriction_Active (No_Exception_Handlers) + or else CodePeer_Mode +then + return; +end if; + if Exc_Locally_Handled then return; else Index: exp_ch6.adb === --- exp_ch6.adb (revision 180934) +++ exp_ch6.adb (working copy) @@ -5679,10 +5679,14 @@ end if; -- If local-exception-to-goto optimization active, insert dummy push - -- statements at start, and dummy pop statements at end. + -- statements at start, and dummy pop statements at end, but inhibit + -- this if we have No_Exception_Handlers, since they are useless and + -- intefere with analysis, e.g. by codepeer. if (Debug_Flag_Dot_G or else Restriction_Active (No_Exception_Propagation)) +and then not Restriction_Active (No_Exception_Handlers) +and then not CodePeer_Mode and then Is_Non_Empty_List (L) then declare
Re: CFT: [build] Move crtstuff support to toplevel libgcc
Andreas Krebbel writes: > This appears to break bootstrap on s390x: > > /home/andreas/regtest/gcc-bisect-build/./gcc/crtbeginS.o: In function > `__do_global_dtors_aux': > crtstuff.c:(.text+0x28): relocation truncated to fit: R_390_GOT12 against > symbol > `__cxa_finalize@@GLIBC_2.2' defined in .text section in /lib64/libc.so.6 > /home/andreas/regtest/gcc-bisect-build/./gcc/crtbeginS.o: In function > `frame_dummy': > crtstuff.c:(.text+0x78): relocation truncated to fit: R_390_GOT12 against > undefined symbol What's the exact command line? I suppose the file is compiled with -fpic. All *-*-linux* targets use config/t-crtstuff-pic, with PICFLAG from toplevel config/picflag.m4. If the (non-default) -fpic there is wrong for your target, it should be enough to remove the s390*-*-* case (-fPIC is the default) and rebuild the affected configure files (libgcc/configure, libada/configure, and libiberty/configure). Rainer -- - Rainer Orth, Center for Biotechnology, Bielefeld University
Re: CFT: [build] Move crtstuff support to toplevel libgcc
On 11/04/2011 02:17 PM, Andreas Krebbel wrote: > This appears to break bootstrap on s390x: > > /home/andreas/regtest/gcc-bisect-build/./gcc/crtbeginS.o: In function > `__do_global_dtors_aux': > crtstuff.c:(.text+0x28): relocation truncated to fit: R_390_GOT12 against > symbol > `__cxa_finalize@@GLIBC_2.2' defined in .text section in /lib64/libc.so.6 > /home/andreas/regtest/gcc-bisect-build/./gcc/crtbeginS.o: In function > `frame_dummy': > crtstuff.c:(.text+0x78): relocation truncated to fit: R_390_GOT12 against > undefined symbol > `_Jv_RegisterClasses' > collect2: error: ld returned 1 exit status > make[5]: *** [libstdc++.la] Error 1 > make[5]: Leaving directory > `/home/andreas/regtest/gcc-bisect-build/s390x-ibm-linux-gnu/libstdc++-v3/src' > make[4]: *** [all-recursive] Error 1 > make[4]: Leaving directory > `/home/andreas/regtest/gcc-bisect-build/s390x-ibm-linux-gnu/libstdc++-v3' > make[3]: *** [all] Error 2 > make[3]: Leaving directory > `/home/andreas/regtest/gcc-bisect-build/s390x-ibm-linux-gnu/libstdc++-v3' > make[2]: *** [all-stage1-target-libstdc++-v3] Error 2 > make[2]: Leaving directory `/home/andreas/regtest/gcc-bisect-build' > make[1]: *** [stage1-bubble] Error 2 > make[1]: Leaving directory `/home/andreas/regtest/gcc-bisect-build' > make: *** [all] Error 2 This is caused by changing t-crtstuff-pic from: CRTSTUFF_T_CFLAGS_S = $(CRTSTUFF_T_CFLAGS) -fPIC to: CRTSTUFF_T_CFLAGS_S = $(CRTSTUFF_T_CFLAGS) $(PICFLAG) With that change the crtbeginS file is built with -fpic instead of -fPIC and therefore the relocation above fails due to a GOT overflow. -fPIC compared to -fpic causes a small overhead in the generated code so I'm not sure if that should be changed in config/picflag.m4. I think I would prefer to go back to the old t-crtstuff-pic instead. Bye, -Andreas-
Re: [Patch] ARM EABI support for RTEMS
On 11/04/2011 01:57 PM, Sebastian Huber wrote: It builds well and the test suite runs currently. http://gcc.gnu.org/ml/gcc-testresults/2011-11/msg00407.html -- Sebastian Huber, embedded brains GmbH Address : Obere Lagerstr. 30, D-82178 Puchheim, Germany Phone : +49 89 18 90 80 79-6 Fax : +49 89 18 90 80 79-9 E-Mail : sebastian.hu...@embedded-brains.de PGP : Public key available on request. Diese Nachricht ist keine geschäftliche Mitteilung im Sinne des EHUG.
Re: [patch] 9/n: trans-mem: compiler ChangeLog entries
Hi, On Thu, 3 Nov 2011, Aldy Hernandez wrote: > +2010-05-28 Aldy Hernandez > + > + * target-def.h (TARGET_VECTORIZE_BUILTIN_TM_LOAD): Define. > + (TARGET_VECTORIZE_BUILTIN_TM_STORE): Same. > + (TARGET_VECTORIZE): Add TM callbacks. This actually meanwhile is in target.def, you don't change target-def.h anymore. Ciao, Michael.
Re: [patch] 15/n: trans-mem: compiler C++ changes
Hi,
On Thu, 3 Nov 2011, Aldy Hernandez wrote:
> +++ gcc/cp/parser.c (.../branches/transactional-memory) (revision
> 180773)
> @@ -172,6 +172,10 @@ typedef enum required_token {
>RT_JUMP, /* jump-statement */
>RT_CLASS_KEY, /* class-key */
>RT_CLASS_TYPENAME_TEMPLATE /* class, typename, or template */
> +
> + , RT_TRANSACTION_ATOMIC, /* __transaction_atomic */
> + RT_TRANSACTION_RELAXED, /* __transaction_relaxed */
> + RT_TRANSACTION_CANCEL /* __transaction_cancel */
comma placement.
Ciao,
Michael.
Re: [C/C++] Fix PR c++/50608
OK. Jason
Re: CFT: [build] Move crtstuff support to toplevel libgcc
Andreas Krebbel writes: > This is caused by changing t-crtstuff-pic from: > CRTSTUFF_T_CFLAGS_S = $(CRTSTUFF_T_CFLAGS) -fPIC > to: > CRTSTUFF_T_CFLAGS_S = $(CRTSTUFF_T_CFLAGS) $(PICFLAG) > > With that change the crtbeginS file is built with -fpic instead of -fPIC and > therefore the > relocation above fails due to a GOT overflow. > > -fPIC compared to -fpic causes a small overhead in the generated code so I'm > not sure if > that should be changed in config/picflag.m4. I think I would prefer to go > back to the old > t-crtstuff-pic instead. The -fpic came from libiberty/configure.ac, with no explanation. Since the PICFLAG setting is supposed to be generically usable, I'd suggest to remove the -fpic setting in picflag.m4 instead. If you still prefer to stay with that value, please change s390/t-crtstuff instead of the shared t-crtstuff-pic, with a comment giving the rationale. Thanks. Rainer -- - Rainer Orth, Center for Biotechnology, Bielefeld University
Re: [build] Restore arm-eabi bootstrap (PR target/50978)
Matthias Klose writes: > still fails to build on arm-linux-gnueabi, configured with > --with-arch=armv7-a > --with-float=hard > --with-fpu=vfpv3-d16 > --with-mode=thumb > > /usr/bin/ld: emutls_s.o: relocation R_ARM_THM_MOVW_ABS_NC against > `pthread_cancel' can not be used when making a shared object; recompile with > -fPIC > emutls_s.o: could not read symbols: Bad value > collect2: error: ld returned 1 exit status > make[5]: *** [libgcc_s.so] Error 1 > make[5]: *** Waiting for unfinished jobs > ranlib libgcc.a > make[5]: Leaving directory > `/home/doko/gcc-snapshot-2003/build/arm-linux-gnueabihf/libgcc' > make[4]: *** [all-stage1-target-libgcc] Error 2 > > emutls_s.o indeed isn't built with -fPIC (it is on the 4.6 branch); PICFLAG in > libgcc/Makefile is set but apparently not used. Could you provide the exact command line (and perhaps an earlier 4.7 one, if that fails one from 4.6)? Thanks. Rainer -- - Rainer Orth, Center for Biotechnology, Bielefeld University
[Patch] alpha: add support for -fsection-anchors
Hi,
the alpha/vms ABI uses a per-function TOC/GOT, not unlike AIX. As a
consequence, -fsection-anchors really reduce the size of the TOC and even of
the code.
This patch adds support of -fsection-anchors on alpha, and enable by default on
Alpha/VMA (although it is still off at -O0). This is a port of a similar patch
we had for gcc 4.5
Tested on trunk by building alpha64-dec-vms and alpha-linux.
Richard, as it impacts all alpha targets, do you have any objection ?
Tristan.
2011-11-04 Tristan Gingold
* common/config/alpha/alpha-common.c (alpha_option_init_struct):
New function.
(TARGET_OPTION_INIT_STRUCT): Define.
* config/alpha/alpha.c (TARGET_MIN_ANCHOR_OFFSET)
(TARGET_MAX_ANCHOR_OFFSET)
(TARGET_USE_BLOCKS_FOR_CONSTANT_P): Redefine.
index fcf5369..8a366b6 100644
--- a/gcc/common/config/alpha/alpha-common.c
+++ b/gcc/common/config/alpha/alpha-common.c
@@ -36,6 +36,17 @@ static const struct default_options
alpha_option_optimization_table[] =
{ OPT_LEVELS_NONE, 0, NULL, 0 }
};
+/* Implement TARGET_OPTION_INIT_STRUCT. */
+
+static void
+alpha_option_init_struct (struct gcc_options *opts ATTRIBUTE_UNUSED)
+{
+#if TARGET_ABI_OPEN_VMS
+ /* Enable section anchors by default. */
+ opts->x_flag_section_anchors = 1;
+#endif
+}
+
/* Implement TARGET_HANDLE_OPTION. */
static bool
@@ -75,6 +86,9 @@ alpha_handle_option (struct gcc_options *opts,
#undef TARGET_HANDLE_OPTION
#define TARGET_HANDLE_OPTION alpha_handle_option
+#undef TARGET_OPTION_INIT_STRUCT
+#define TARGET_OPTION_INIT_STRUCT alpha_option_init_struct
+
#undef TARGET_OPTION_OPTIMIZATION_TABLE
#define TARGET_OPTION_OPTIMIZATION_TABLE alpha_option_optimization_table
diff --git a/gcc/config/alpha/alpha.c b/gcc/config/alpha/alpha.c
index 682e5be..9a43f80 100644
--- a/gcc/config/alpha/alpha.c
+++ b/gcc/config/alpha/alpha.c
@@ -9643,6 +9643,14 @@ alpha_conditional_register_usage (void)
#define TARGET_STDARG_OPTIMIZE_HOOK alpha_stdarg_optimize_hook
#endif
+/* Use 16-bits anchor. */
+#undef TARGET_MIN_ANCHOR_OFFSET
+#define TARGET_MIN_ANCHOR_OFFSET -0x7fff - 1
+#undef TARGET_MAX_ANCHOR_OFFSET
+#define TARGET_MAX_ANCHOR_OFFSET 0x7fff
+#undef TARGET_USE_BLOCKS_FOR_CONSTANT_P
+#define TARGET_USE_BLOCKS_FOR_CONSTANT_P hook_bool_mode_const_rtx_true
+
#undef TARGET_RTX_COSTS
#define TARGET_RTX_COSTS alpha_rtx_costs
#undef TARGET_ADDRESS_COST
Re: [patch] 15/n: trans-mem: compiler C++ changes
comma placement.
Ciao,
Michael.
Committed.
Thanks
cp/parser.c (enum required_token): Fix comma.
Index: parser.c
===
--- parser.c(revision 180772)
+++ parser.c(working copy)
@@ -171,9 +171,8 @@ typedef enum required_token {
RT_INTERATION, /* iteration-statement */
RT_JUMP, /* jump-statement */
RT_CLASS_KEY, /* class-key */
- RT_CLASS_TYPENAME_TEMPLATE /* class, typename, or template */
-
- , RT_TRANSACTION_ATOMIC, /* __transaction_atomic */
+ RT_CLASS_TYPENAME_TEMPLATE, /* class, typename, or template */
+ RT_TRANSACTION_ATOMIC, /* __transaction_atomic */
RT_TRANSACTION_RELAXED, /* __transaction_relaxed */
RT_TRANSACTION_CANCEL /* __transaction_cancel */
} required_token;
Re: [Patch] ARM multilib changes for RTEMS
On 11/04/2011 09:34 AM, Sebastian Huber wrote: Hello, please have a look at the attached patch. It is intended for inclusion in the GCC 4.7 branch. The embedded brains GmbH has a copyright assignment with the FSF. This patch is OK with me. Ralf
Re: [build] Restore arm-eabi bootstrap (PR target/50978)
Matthias Klose writes: > emutls_s.o indeed isn't built with -fPIC (it is on the 4.6 branch); PICFLAG in > libgcc/Makefile is set but apparently not used. I think I see what's going on: config/arm/t-elf (and config/arm/t-strongarm-elf) override HOST_LIBGCC2_CFLAGS instead of appending to it. This way, we loose PICFLAG from config/t-libgcc-pic. Could you try that change? Thanks. Rainer -- - Rainer Orth, Center for Biotechnology, Bielefeld University
Re: [patch] 14/n: trans-mem: compiler documentation
Hi,
On Thu, 3 Nov 2011, Aldy Hernandez wrote:
> Index: gcc/doc/tm.texi
> ===
> --- gcc/doc/tm.texi (.../trunk) (revision 180744)
> +++ gcc/doc/tm.texi (.../branches/transactional-memory) (revision
> 180773)
> @@ -5758,6 +5758,16 @@ mode returned by @code{TARGET_VECTORIZE_
> The default is zero which means to not iterate over other vector sizes.
> @end deftypefn
>
> +@deftypefn {Target Hook} tree TARGET_VECTORIZE_BUILTIN_TM_LOAD (tree)
> +This hook should return the built-in decl needed to load a vector of
> +the given type.
> +@end deftypefn
> +
> +@deftypefn {Target Hook} tree TARGET_VECTORIZE_BUILTIN_TM_STORE (tree)
> +This hook should return the built-in decl needed to store a vector of
> +the given type.
> +@end deftypefn
Somehow this docu should mention transactional memory (apart from the _TM
in the name :) ), otherwise it reads as if these hooks are to be used for
all vector loads/stores.
Ciao,
Michael.
Re: [PATCH] [Annotalysis] Fix ICE caused by ipa-sra optimization.
Thanks for the suggestion. Unfortunately, knowing the original
declaration doesn't help me; I also need to know the original
arguments that were passed at the call site, before those arguments
were removed by ipa-sra.
> (Of course, ipa-sra removes scalar parameters only when they are not
> used in the first place and so there should be nothing to analyze.)
The problem is that the static analysis may be using the parameters,
even if those parameters are not used in the body of the function.
For example:
void dummyLock (Mutex* mu) EXCLUSIVE_LOCK_FUNCTION(mu) { }
void dummyUnlock(Mutex* mu) UNLOCK_FUNCTION(mu) { }
Mutex* mutex;
int a GUARDED_BY(mutex);
void foo() {
// add mutex to set of held locks
dummyLock(mutex); // gets rewritten by ipa-sra to dummyLock(). Oops!
// okay to modify a, because we've "locked" mutex
a = 0;
// remove mutex from set of held locks
dummyUnlock(mutex); // gets rewritten by ipa-sra to dummyUnlock(). Oops!
}
The annotations here tell the static analyzer to treat dummyLock and
dummyUnlock as valid lock functions, even though they don't
technically do anything. Such a pattern is not quite as deranged as
it may at first appear -- it is used, for example, when creating a
template class that may choose to either acquire a lock, or not,
depending on its template parameter. Ipa-sra kills the arguments, so
I no longer know which mutex was locked.
-DeLesley
> Martin
>
>
>>
>> Bootstrapped and passed gcc regression testsuite on
>> x86_64-unknown-linux-gnu. Okay for google/gcc-4_6?
>>
>> -DeLesley
>>
>> Changelog.google-4_6:
>> 2011-11-02 DeLesley Hutchins
>> * tree-threadsafe-analyze.c:
>> Ignores invalid attributes, issues a warning, recovers gracefully.
>> * common.opt:
>> Adds new thread safety warning.
>>
>> testsuite/Changelog.google-4_6:
>> 2011-11-02 DeLesley Hutchins
>> * g++.dg/thread-ann/thread_annot_lock-82.C:
>> Expanded regression test
>>
>> --
>> DeLesley Hutchins | Software Engineer | deles...@google.com | 505-206-0315
>
>> Index: testsuite/g++.dg/thread-ann/thread_annot_lock-82.C
>> ===
>> --- testsuite/g++.dg/thread-ann/thread_annot_lock-82.C (revision
>> 180716)
>> +++ testsuite/g++.dg/thread-ann/thread_annot_lock-82.C (working copy)
>> @@ -1,7 +1,7 @@
>> -// Test template methods in the presence of cloned constructors.
>> -// Regression test for bugfix.
>> +// Regression tests: fix ICE issues when IPA-SRA deletes formal
>> +// function parameters.
>> // { dg-do compile }
>> -// { dg-options "-Wthread-safety -O3" }
>> +// { dg-options "-Wthread-safety -Wthread-warn-optimization -O3" }
>>
>> #include "thread_annot_common.h"
>>
>> @@ -10,6 +10,7 @@ void do_something(void* a);
>>
>> class Foo {
>> Mutex mu_;
>> + int a GUARDED_BY(mu_);
>>
>> // with optimization turned on, ipa-sra should eliminate the hidden
>> // "this" argument, thus invalidating EXCLUSIVE_LOCKS_REQUIRED.
>> @@ -18,6 +19,7 @@ class Foo {
>> }
>>
>> void foo(Foo* f);
>> + void bar();
>> };
>>
>> void Foo::foo(Foo* f) {
>> @@ -28,3 +30,17 @@ void Foo::foo(Foo* f) {
>> mu_.Unlock();
>> }
>>
>> +
>> +class SCOPED_LOCKABLE DummyMutexLock {
>> +public:
>> + // IPA-SRA should kill the parameters to these functions
>> + explicit DummyMutexLock(Mutex* mutex) EXCLUSIVE_LOCK_FUNCTION(mutex) {}
>> + ~DummyMutexLock() UNLOCK_FUNCTION() {}
>> +};
>> +
>> +
>> +void Foo::bar() {
>> + // Matches two warnings:
>> + DummyMutexLock dlock(&mu_); // { dg-warning "attribute has been removed
>> by optimization." }
>> + a = 1; // warning here should be suppressed, due to errors handling dlock
>> +}
>> Index: common.opt
>> ===
>> --- common.opt (revision 180716)
>> +++ common.opt (working copy)
>> @@ -680,6 +680,10 @@ Wthread-attr-bind-param
>> Common Var(warn_thread_attr_bind_param) Init(1) Warning
>> Make the thread safety analysis try to bind the function parameters used in
>> the attributes
>>
>> +Wthread-warn-optimization
>> +Common Var(warn_thread_optimization) Init(0) Warning
>> +Warn when optimizations invalidate the thread safety analysis.
>> +
>> Wtype-limits
>> Common Var(warn_type_limits) Init(-1) Warning
>> Warn if a comparison is always true or always false due to the limited
>> range of the data type
>> Index: tree-threadsafe-analyze.c
>> ===
>> --- tree-threadsafe-analyze.c (revision 180716)
>> +++ tree-threadsafe-analyze.c (working copy)
>> @@ -1594,7 +1594,10 @@ get_actual_argument_from_position (gimple call, tr
>>
>> lock_pos = TREE_INT_CST_LOW (pos_arg);
>>
>> - gcc_assert (lock_pos >= 1 && lock_pos <= num_args);
>> + /* The ipa-sra optimization can occasionally delete arguments, thus
>> + invalidating the index. */
>> + if (lock_pos < 1 || lock_pos > num_args)
>> + return NULL_
Re: [Ada] Inhibit exception push/pop when not needed
On 4 Nov 2011, at 14:09, Arnaud Charlet wrote: This patch inhibits the generation of exception push/pop nodes if restriction No_Exception_Handlers is active (when they are always useless), or in CodePeer mode (where they are never needed and can intefere with the analysis). this latest series breaks bootstrap on at least i686-darwin9. at 180951 (I'll need to wind backwards to find which particular patch - unless it's obvious to you). -- is a follow-up planned? Iain exp_alfa.adb:37:06: "Sem_Util (spec)" depends on "Nmake (body)" exp_alfa.adb:37:06: "Nmake (body)" depends on "Nmake (spec)" exp_alfa.adb:37:06: file "nmake.ads" not found exp_alfa.adb:37:06: "Exp_Alfa (body)" depends on "Sem_Util (spec)" exp_alfa.adb:37:06: "Sem_Util (spec)" depends on "Nmake (spec)" make[3]: *** [ada/exp_alfa.o] Error 1
Re: [Patch] alpha: add support for -fsection-anchors
On 11/04/2011 07:52 AM, Tristan Gingold wrote: > Richard, as it impacts all alpha targets, do you have any objection ? I suspect not. We might even see what we can do about enabling it by default for all alpha targets... r~
Re: [patch] 19/n: trans-mem: compiler tree/gimple stuff
Hi,
On Thu, 3 Nov 2011, Aldy Hernandez wrote:
> +/* GIMPLE_EH_ELSE must be the sole contents of
> + a GIMPLE_TRY_FINALLY node. For all normal exits from the try block,
> + we N_BODY is run; for all exception exits from the try block,
s/we //
> +++ gcc/calls.c (.../branches/transactional-memory) (revision
> 180773)
> @@ -496,7 +496,60 @@ emit_call_1 (rtx funexp, tree fntree ATT
> static int
> special_function_p (const_tree fndecl, int flags)
> {
> + case BUILT_IN_TM_IRREVOCABLE:
> + case BUILT_IN_TM_GETTMCLONE_IRR:
> + case BUILT_IN_TM_MEMCPY:
> + case BUILT_IN_TM_MEMMOVE:
> +case BUILT_IN_TM_MEMSET:
Whitespace.
> @@ -1751,6 +1787,8 @@ walk_gimple_stmt (gimple_stmt_iterator *
>gcc_assert (tree_ret == NULL);
>
>/* Re-read stmt in case the callback changed it. */
> + if (wi && wi->removed_stmt)
> + return NULL;
>stmt = gsi_stmt (*gsi);
Comment belongs to the stmt assignment, not to the new if/return.
> @@ -3085,6 +3153,8 @@ get_call_expr_in (tree t)
> t = TREE_OPERAND (t, 1);
>if (TREE_CODE (t) == WITH_SIZE_EXPR)
> t = TREE_OPERAND (t, 0);
> + if (TREE_CODE (t) == VIEW_CONVERT_EXPR)
> +t = TREE_OPERAND (t, 0);
>if (TREE_CODE (t) == CALL_EXPR)
> return t;
The function get_call_expr_in is unused in our compiler (and you don't
introduce a new use), so instead of amending it, just remove it.
> Index: gcc/gimple.h
> ===
> --- gcc/gimple.h (.../trunk) (revision 180744)
> +++ gcc/gimple.h (.../branches/transactional-memory) (revision
> 180773)
> @@ -105,6 +105,7 @@ enum gf_mask {
> GF_CALL_NOTHROW = 1 << 5,
> GF_CALL_ALLOCA_FOR_VAR = 1 << 6,
> GF_CALL_INTERNAL = 1 << 7,
> +GF_CALL_NOINLINE = 1 << 8,
> GF_OMP_PARALLEL_COMBINED = 1 << 0,
...
> +/* Return true if S is a noinline call. */
> +
> +static inline bool
> +gimple_call_noinline_p (gimple s)
> +{
> + GIMPLE_CHECK (s, GIMPLE_CALL);
> + return (s->gsbase.subcode & GF_CALL_NOINLINE) != 0;
> +}
> +
> +static inline void
> +gimple_call_set_noinline_p (gimple s)
> +{
> + GIMPLE_CHECK (s, GIMPLE_CALL);
> + s->gsbase.subcode |= GF_CALL_NOINLINE;
> +}
This flag is only used by the new accessors gimple_call_noinline_p and
gimple_call_set_noinline_p. The latter is used in
trans-mem.c:ipa_tm_insert_gettmclone_call, but marked as hack. The flag
isn't tested anywhere (i.e. no calls to gimple_call_noinline_p). Hence
this whole thing is unused, presumably the hack was transformed into a
real solution :) So, don't add the flag or the accessors, and remove the
call from trans-mem.c.
Ciao,
Michael.
Re: [Ada] Inhibit exception push/pop when not needed
>> This patch inhibits the generation of exception push/pop nodes if >> restriction No_Exception_Handlers is active (when they are always >> useless), or in CodePeer mode (where they are never needed and can >> intefere with the analysis). > > this latest series breaks bootstrap on at least i686-darwin9. > > at 180951 (I'll need to wind backwards to find which particular patch - > unless it's obvious to you). > > -- is a follow-up planned? It's an issue related to parallel builds (a missing dependency). I'll double check that and will fix shortly. Arno
[Ada] Update dependencies
Fixes the build failure reported by Iain Sandoe on parallel builds. * gcc-interface/Make-lang.in: Update dependencies. Index: gcc-interface/Make-lang.in === --- gcc-interface/Make-lang.in (revision 180935) +++ gcc-interface/Make-lang.in (working copy) @@ -1773,11 +1773,12 @@ ada/a-uncdea.ads ada/alloc.ads ada/aspects.ads ada/atree.ads \ ada/atree.adb ada/casing.ads ada/debug.ads ada/einfo.ads ada/einfo.adb \ ada/exp_alfa.ads ada/exp_alfa.adb ada/exp_attr.ads ada/exp_ch4.ads \ - ada/exp_ch6.ads ada/exp_dbug.ads ada/gnat.ads ada/g-htable.ads \ - ada/hostparm.ads ada/interfac.ads ada/namet.ads ada/namet.adb \ - ada/nlists.ads ada/nlists.adb ada/opt.ads ada/output.ads \ - ada/rtsfind.ads ada/sem_aux.ads ada/sem_aux.adb ada/sem_res.ads \ - ada/sinfo.ads ada/sinfo.adb ada/sinput.ads ada/snames.ads ada/stand.ads \ + ada/exp_ch6.ads ada/exp_ch8.ads ada/exp_dbug.ads ada/exp_tss.ads \ + ada/gnat.ads ada/g-htable.ads ada/hostparm.ads ada/interfac.ads \ + ada/namet.ads ada/namet.adb ada/nlists.ads ada/nlists.adb ada/nmake.ads \ + ada/opt.ads ada/output.ads ada/rtsfind.ads ada/sem_aux.ads \ + ada/sem_aux.adb ada/sem_res.ads ada/sem_util.ads ada/sinfo.ads \ + ada/sinfo.adb ada/sinput.ads ada/snames.ads ada/stand.ads \ ada/system.ads ada/s-exctab.ads ada/s-htable.ads ada/s-imenne.ads \ ada/s-memory.ads ada/s-os_lib.ads ada/s-parame.ads ada/s-secsta.ads \ ada/s-soflin.ads ada/s-stache.ads ada/s-stalib.ads ada/s-stoele.ads \
Re: cxx-mem-model merge [1 of 9] gcc-1
-BEGIN PGP SIGNED MESSAGE- Hash: SHA1 On 11/03/11 17:49, Andrew MacLeod wrote: > This is the first of 2 parts for the patches to the GCC directory, > it includes the changelog for parts 1 and 2 > > Primarily it is all the stuff required to create builtins. new > defs, support routines, config changes, etc. It also includes rth's > 386 port to the new builtins. > > The second part contains the actual built-in code in builtins.c > and optabs.c. The only comment I've got on this patch is wondering why the -f options are PARAMS. I thought PARAMS were used more to tune along a range of values -- recursive depth for inlining, # iterations of certain passes, clamp number of items on lists, etc. Unless I'm missing something the new -f options have a range [01] and could just as easily have been -f -fno- options. Am I missing something? Jeff -BEGIN PGP SIGNATURE- Version: GnuPG v1.4.11 (GNU/Linux) Comment: Using GnuPG with Mozilla - http://enigmail.mozdev.org/ iQEcBAEBAgAGBQJOtAc+AAoJEBRtltQi2kC7gI0H/iET5AvlvNoFa6+Vr9lbqxET jHa6lBmLZfPEOj72y6abgUZ1DZdMGTYH5/h8oReZGR5ngZsopNRu8ezNpjpofYZK D3vXghwCxpxi/RPGvn54FqHgzOkv5n5z3lqFEpr7uIfq00Dw8wZVtfBfU6FYsrWx Dfv8ptVJ5g2qKlDHzhYG5xOaXqCymNfab3TkJu92iZqHGu5H+0uHI65Nz3GU8o8Y nv7wcBMemR4YYphHt/MFd1WClxbP3EI/KBvZHu9EL9D8SOQC6CtkVS5avKEEiUcm vF0xkwkydqvdPc0cpGG/XDIoJFGYKW3FsgOWnTVHSErwUP0Q0Mbfq3Aywdtujj4= =9cU6 -END PGP SIGNATURE-
Re: cxx-mem-model merge [7 of 9] testsuite - functional verification
-BEGIN PGP SIGNED MESSAGE- Hash: SHA1 On 11/03/11 17:50, Andrew MacLeod wrote: > The testsuite changes are split into 3 parts. > > This part is all the new testsuite entries for testing the atomics > for functionality. ie, make sure they work as expected, and > generate errors when expected I spot checked various tests and it looks pretty good to me. Given the duplications in the the tests I wondered if we could play tricks with macros or something to simplify the testfiles, but I doubt it's worth the effort. Certainly not required. jeff -BEGIN PGP SIGNATURE- Version: GnuPG v1.4.11 (GNU/Linux) Comment: Using GnuPG with Mozilla - http://enigmail.mozdev.org/ iQEcBAEBAgAGBQJOtAlIAAoJEBRtltQi2kC7YPsH/j52LdFEhIjg0dOlisZRS7jE jQMtYHPaWfLK1fouOJskaBRBgjC/awOBYGvOt1CHGFHhzTcSrIsdIiL81EczgVxF qECV7RdRLJiwEwpP4fwJLqklGd51E2ObvJC65Qo3MWdhSIPBW0Rs/lE4my0vsown f7G+509c4+PBLnntM0I+Nm/Xe8hRKC4CKiDatwqPKvAA69ZtoxuSe9Eo6seFBiyu m/mZuWdLnKl0CFxfvXSwA9aop1gDEfEXvXhFsFeBRjL8qS8bJMxJMHYlw1E7XM+a Jm4T71BtNu5YlWgJanqTUQ1ER8J9R9jcFB7AyXMeZoUqVcB3vk4Kvqw6cpXCyOY= =xOh8 -END PGP SIGNATURE-
Re: [PATCH] Optimize v*gather* with masks with all high bits set
On 11/04/2011 03:57 AM, Jakub Jelinek wrote: > + /* Optimize. If mask is known to have all high bits set, > + replace op0 with pc_rtx to signal that the instruction > + overwrites the whole destination and doesn't use its > + previous contents. */ Why pass in PC, rather than nothing? r~
Re: cxx-mem-model merge [5 of 9] fortran
-BEGIN PGP SIGNED MESSAGE- Hash: SHA1 On 11/03/11 17:50, Andrew MacLeod wrote: > This patch simply mimics the builtin-types.def changes so that > fortran can build. Looks OK. I'd think the ChangeLog could be simplified to just note which new things were added -- I don't think we need the various twiddles that were done over time. jeff -BEGIN PGP SIGNATURE- Version: GnuPG v1.4.11 (GNU/Linux) Comment: Using GnuPG with Mozilla - http://enigmail.mozdev.org/ iQEcBAEBAgAGBQJOtAnPAAoJEBRtltQi2kC7INYIAIB1OIviiZGttmkNgg/4gDNP A61iK6pHg1eG+qV50eR81YJmMCMtocqH13l3P1STd7pvrLWQMoEfagbETk8FMrja rEqwR21a4Kgc2BRvxePj5FzMmMV0R5fY45YjWvH1jM6XL095/yFjdwrH8DwwhJzg fUHFj7C5rucH5BBruQAroHQyrEMpaAf1PGGDsY08Zp14+eYqSaQyFOD4uT3HxfU2 sBHqY+z9wvn6HI/U5oVXjAjfBGPpZE3+KPoXlPyBWfHjopKcABeOyQg4dU+FnAYw do6wi0Z/pM+e2nWCr7+M0QPoR3Ud/TPXMQ+xVQ5xU3RQ63a5wGHJNaLEfX9Ktdw= =9HFH -END PGP SIGNATURE-
Re: [patch] 15/n: trans-mem: compiler C++ changes
On 11/03/2011 02:53 PM, Aldy Hernandez wrote: + if (cp_lexer_next_token_is_not (parser->lexer, CPP_OPEN_SQUARE)) +return NULL_TREE; + cp_lexer_consume_token (parser->lexer); + if (!cp_parser_require (parser, CPP_OPEN_SQUARE, RT_OPEN_SQUARE)) +goto error1; Are you sure that [[attribute]] is the only way a [ can appear there? What about lambdas? Just return NULL_TREE here if you see one [ followed by something else. cp_lexer_peek_nth_token should be useful. Jason
Re: [trans-mem][build] Hack around top-level Makefile libstdc++ breakage
If libstdc++ has multilib-specific headers, which one gets installed? How will anything be able to use those headers from an installed tree?
Re: [PATCH] Optimize v*gather* with masks with all high bits set
On Fri, Nov 04, 2011 at 08:48:30AM -0700, Richard Henderson wrote: > On 11/04/2011 03:57 AM, Jakub Jelinek wrote: > > + /* Optimize. If mask is known to have all high bits set, > > +replace op0 with pc_rtx to signal that the instruction > > +overwrites the whole destination and doesn't use its > > +previous contents. */ > > Why pass in PC, rather than nothing? I wanted to avoid adding an extra set of expanders, if there is something, I can use the same expander and just different insns. There are currently 16 expanders, we'd need another 16 for that. Jakub
cxx-mem-model merge - Unified changelogs
OK, finally finished creating proper changelogs. I'll just throw all 8
of them in this one file if anyone wants to see then...
c-family
2011-11-06 Richard Henderson
* c-cppbuiltin.c (c_cpp_builtins): Test both atomic and sync patterns.
2011-11-06 Andrew MacLeod
* c-common.c (sync_resolve_params, sync_resolve_return): Only tweak
parameters that are the same type size.
(get_atomic_generic_size): New. Find size of generic
atomic function parameters and do typechecking.
(add_atomic_size_parameter): New. Insert size into parameter list.
(resolve_overloaded_atomic_exchange): Restructure __atomic_exchange to
either __atomic_exchange_n or external library call.
(resolve_overloaded_atomic_compare_exchange): Restructure
__atomic_compare_exchange to either _n variant or external library call.
(resolve_overloaded_atomic_load): Restructure __atomic_load to either
__atomic_load_n or an external library call.
(resolve_overloaded_atomic_store): Restructure __atomic_store to either
__atomic_store_n or an external library call.
(resolve_overloaded_builtin): Handle new __atomic builtins.
doc
===
2011-11-06 Andrew MacLeod
* extend.texi: Document __atomic built-in functions.
* invoke.texi: Document data race parameters.
* md.texi: Document atomic patterns.
fortran
===
2011-11-06 Andrew MacLeod
* types.def: (BT_SIZE, BT_CONST_VOLATILE_PTR, BT_FN_VOID_INT,
BT_FN_I{1,2,4,8,16}_CONST_VPTR_INT, BT_FN_VOID_VPTR_INT,
BT_FN_BOOL_VPTR_INT, BT_FN_BOOL_SIZE_CONST_VPTR,
BT_FN_VOID_VPTR_I{1,2,4,8,16}_INT, BT_FN_VOID_SIZE_VPTR_PTR_INT,
BT_FN_VOID_SIZE_CONST_VPTR_PTR_INT, BT_FN_VOID_SIZE_VPTR_PTR_PTR_INT,
BT_FN_BOOL_VPTR_PTR_I{1,2,4,8,16}_BOOL_INT_INT): New types.
2011-11-06 Andrew Macleod
Aldy Hernandez
* types.def (BT_FN_I{1,2,4,8,16}_VPTR_I{1,2,4,8,16}_INT): New.
gcc
===
2011-11-06 Andrew Macleod
* optabs.h (DOI_atomic_*): Define new atomics.
(atomic_*_optab): Define.
* genopinit,c (optabs): Add atomic direct optab handlers.
* sync-builtins.def (BUILT_IN_ATOMIC_*): New builtins.
* builtin-types.def (BT_CONST_VOLATILE_PTR,
BT_FN_I{1,2,4,8,16}_CONST_VPTR_INT, BT_FN_VOID_VPTR_INT,
BT_FN_BOOL_VPTR_INT, BT_FN_BOOL_SIZE_CONST_VPTR,
BT_FN_I{1,2,4,8,16}_VPTR_I{1,2,4,8,16}_INT,
BT_FN_VOID_VPTR_I{1,2,4,8,16}_INT, BT_FN_VOID_SIZE_VPTR_PTR_INT,
BT_FN_VOID_SIZE_CONST_VPTR_PTR_INT, BT_FN_VOID_SIZE_VPTR_PTR_PTR_INT,
BT_FN_BOOL_VPTR_PTR_I{1,2,4,8,16}_BOOL_INT_INT): New builtin types.
* expr.h (expand_atomic_*): Add prototypes.
* c-typeck.c (build_function_call_vec): Don't reprocess __atomic
parameters.
* common.opt (Winvalid-memory-model): New warning flag.
(finline-atomics): New. Flag to disable atomic inlining.
* builtins.c (is_builtin_name): Handle __atomic.
(expand_expr_force_mode): New. Factor out common code for ensuring an
integer argument is in the proper mode.
(expand_builtin_sync_operation): Remove ignore param. Always call
expand_atomic_fetch_op instead of the old expanders.
(expand_builtin_compare_and_swap,
expand_builtin_sync_lock_test_and_set): Use expand_expr_force_mode,
call atomic expanders instead of sync expanders.
(expand_builtin_sync_lock_release): Call atomic_store expander.
(expand_builtin_atomic_compare_exchange, expand_builtin_atomic_load,
expand_builtin_atomic_store, expand_builtin_atomic_fetch_op): New.
(fold_builtin_atomic_always_lock_free,
expand_builtin_atomic_always_lock_free,
fold_builtin_atomic_is_lock_free, expand_builtin_atomic_is_lock_free):
New.
(expand_builtin_mem_thread_fence, expand_builtin_atomic_thread_fence,
expand_builtin_atomic_signal_fence): New.
(expand_builtin): Add cases for BUILT_IN_ATOMIC_*.
(fold_builtin_2): Add cases for BUILT_IN_ATOMIC_{IS,ALWAYS}_LOCK_FREE.
* optabs.c (expand_sync_operation, expand_sync_fetch_operation): Remove.
(expand_sync_lock_test_and_set): Remove.
(expand_atomic_load, expand_atomic_store): New.
(maybe_emit_op): New. Try to emit a fetch op.
(expand_atomic_fetch_op): New.
2011-11-06 Andrew Macleod
Aldy Hernandez
* cppbuiltin.c (define__GNUC__): Define __ATOMIC memory models
* coretypes.h (enum memmodel): New. enumerated memory model type.
* builtins.c (get_memmodel): New. Extract memory model.
(expand_builtin_atomic_exchange): New.
(expand_builtin): Add cases for BUILT_IN_ATOMIC_EXCHANGE_*.
* Makefile.in (cppbuiltin.o) Add missing dependency on $(TREE_H)
* optabs.c (expand_atomic_exchange): New.
2011-11-06 Andrew M
Re: cxx-mem-model merge [7 of 9] testsuite - functional verification
On 11/04/2011 11:48 AM, Jeff Law wrote: -BEGIN PGP SIGNED MESSAGE- Hash: SHA1 On 11/03/11 17:50, Andrew MacLeod wrote: The testsuite changes are split into 3 parts. This part is all the new testsuite entries for testing the atomics for functionality. ie, make sure they work as expected, and generate errors when expected I spot checked various tests and it looks pretty good to me. Given the duplications in the the tests I wondered if we could play tricks with macros or something to simplify the testfiles, but I doubt it's worth the effort. Certainly not required. I originally did that, but then changed it and decided it was better this way. The point of tests is to help you figure out what has failed... With all the macro packing and compression, it took more effort to figure out what had gone wrong, and required multiple files. Now its a simple self contained testcase you just run. I figured once they are there they wont change much, so the duplication isn't really a maintainability issue. That was my logic :-)
Re: [build] Restore arm-eabi bootstrap (PR target/50978)
On 11/04/2011 10:58 AM, Rainer Orth wrote: > Matthias Klose writes: > >> emutls_s.o indeed isn't built with -fPIC (it is on the 4.6 branch); PICFLAG >> in >> libgcc/Makefile is set but apparently not used. > > I think I see what's going on: config/arm/t-elf (and > config/arm/t-strongarm-elf) override HOST_LIBGCC2_CFLAGS instead of > appending to it. This way, we loose PICFLAG from config/t-libgcc-pic. > > Could you try that change? yes, using += gets my behind this point, now in stage2. thanks, Matthias
Re: [trans-mem][build] Hack around top-level Makefile libstdc++ breakage
On 11/04/2011 05:32 AM, Joseph S. Myers wrote: > It would be fixed by staged install ... Yeah, I thought of that too. Maybe for 4.8... r~
Re: cxx-mem-model merge [1 of 9] gcc-1
On 11/04/2011 11:39 AM, Jeff Law wrote: On 11/03/11 17:49, Andrew MacLeod wrote: This is the first of 2 parts for the patches to the GCC directory, it includes the changelog for parts 1 and 2 Primarily it is all the stuff required to create builtins. new defs, support routines, config changes, etc. It also includes rth's 386 port to the new builtins. The second part contains the actual built-in code in builtins.c and optabs.c. The only comment I've got on this patch is wondering why the -f options are PARAMS. I thought PARAMS were used more to tune along a range of values -- recursive depth for inlining, # iterations of certain passes, clamp number of items on lists, etc. Unless I'm missing something the new -f options have a range [01] and could just as easily have been -f -fno- options. Am I missing something? Long drawn out discussion. It was -f initially, then it was requested to be changed to -param, and every once in a while, someone asks why it isn't -f :-) http://gcc.gnu.org/ml/gcc-patches/2011-07/msg02441.html Andrew
Re: cxx-mem-model merge [5 of 9] fortran
On 11/04/2011 11:50 AM, Jeff Law wrote: -BEGIN PGP SIGNED MESSAGE- Hash: SHA1 On 11/03/11 17:50, Andrew MacLeod wrote: This patch simply mimics the builtin-types.def changes so that fortran can build. Looks OK. I'd think the ChangeLog could be simplified to just note which new things were added -- I don't think we need the various twiddles that were done over time. Yeah, Ive been working on that all morning. I just posted the new changelogs in a message rather than 8 new postings. Andrew
Re: [PATCH] Optimize v*gather* with masks with all high bits set
On 11/04/2011 08:53 AM, Jakub Jelinek wrote: > On Fri, Nov 04, 2011 at 08:48:30AM -0700, Richard Henderson wrote: >> On 11/04/2011 03:57 AM, Jakub Jelinek wrote: >>> + /* Optimize. If mask is known to have all high bits set, >>> +replace op0 with pc_rtx to signal that the instruction >>> +overwrites the whole destination and doesn't use its >>> +previous contents. */ >> >> Why pass in PC, rather than nothing? > > I wanted to avoid adding an extra set of expanders, if there is something, > I can use the same expander and just different insns. There are currently > 16 expanders, we'd need another 16 for that. *shrug* Ok then. r~
Re: [trans-mem][build] Hack around top-level Makefile libstdc++ breakage
On Thu, Nov 3, 2011 at 10:57 PM, Richard Henderson wrote: > We currently have a problem building libitm because it uses the libstdc++ > header , and the toplevel Makefile passes a single set of > include paths for all multilibs. In the recent merges from mainline, we > brought in changes to that header that reference __int128_t. > > Building for x86_64, we detect that __int128_t is supported for the main > multilib, but when it comes to building the -m32 multilib we do not > support that type. With the incorrect include path, we read the wrong > file, which leads us to attempt to use __int128_t in > the -m32 libitm multlib, which of course fails. > I believe that C++ tests pick the correct bits/c++config for -m32. Can't libitm do something similar? -- H.J.
Re: [trans-mem][build] Hack around top-level Makefile libstdc++ breakage
> I believe that C++ tests pick the correct bits/c++config for > -m32. Can't libitm do something similar? The problem is that the -I for the build is chosen at the toplevel, *before* iterating over the multilibs, whereas the -I for testing is chosen in dejagnu, *after* iterating over the multilibs. This, despite the toplevel *build* flags coming from "libstdc++-v3/scripts/testsuite_flags" (which returns different results for each multilib).
