[patch i386]: RFC enable inlining for function with machine-attributes
Hi,
I am working right now on PR/56892, which is about missing
inline-optimization for dllexported classes. That's caused by the
default for TARGET_FUNCTION_ATTRIBUTE_INLINABLE_P hook, which
disallows inlining for any machine-attribute. By taking a closer look
to i386's attributes, I don't see a good reason why we disallow them
for machine-attributes listed in TARGET_ATTRIBUTE_TABLE.
In general this issue happens also for inline-functions in classes
which are prominent marked with a specific ABI, or calling-convention.
So I think this issue isn't windows targets specific. By
performance-tests it shows that by this missed optimization for
mingw/cygwin targets on dllexported-classes is causing about 4-times
speed-penalty in comparison to other target c++-compilers.
So I suggest the following patch:
ChangeLog
2013-06-17 Kai Tietz
PR target/56892
* config/i386/i386.c (ix86_function_attribute_inlinable_p): New local
function.
(TARGET_FUNCTION_ATTRIBUTE_INLINABLE_P): Define as
ix86_function_attribute_inlinable_p.
Tested for x86_64-w64-mingw32, i686-w64-mingw32, and x86_64-unknown-linux-gnu.
Ok for apply?
Index: i386.c
===
--- i386.c (Revision 200128)
+++ i386.c (Arbeitskopie)
@@ -38721,6 +38721,12 @@ static const struct attribute_spec ix86_attribute_
{ NULL,0, 0, false, false, false, NULL, false }
};
+static bool
+ix86_function_attribute_inlinable_p (const_tree fndecl ATTRIBUTE_UNUSED)
+{
+ return true;
+}
+
/* Implement targetm.vectorize.builtin_vectorization_cost. */
static int
ix86_builtin_vectorization_cost (enum vect_cost_for_stmt type_of_cost,
@@ -42700,6 +42706,8 @@ ix86_memmodel_check (unsigned HOST_WIDE_INT val)
#undef TARGET_ATTRIBUTE_TABLE
#define TARGET_ATTRIBUTE_TABLE ix86_attribute_table
+#undef TARGET_FUNCTION_ATTRIBUTE_INLINABLE_P
+#define TARGET_FUNCTION_ATTRIBUTE_INLINABLE_P
ix86_function_attribute_inlinable_p
#if TARGET_DLLIMPORT_DECL_ATTRIBUTES
# undef TARGET_MERGE_DECL_ATTRIBUTES
# define TARGET_MERGE_DECL_ATTRIBUTES merge_dllimport_decl_attributes
RE: [PATCH GCC]Fix PR57540, try to choose scaled_offset address mode when expanding array reference
> -Original Message-
> From: Eric Botcazou [mailto:ebotca...@adacore.com]
> Sent: Saturday, June 15, 2013 5:37 PM
> To: Bin Cheng
> Cc: gcc-patches@gcc.gnu.org
> Subject: Re: [PATCH GCC]Fix PR57540, try to choose scaled_offset address
mode
> when expanding array reference
>
> > As reported in pr57540, gcc chooses bad address mode, resulting in A)
> > invariant part of address expression is not kept or hoisted; b)
> > additional computation which should be encoded in address expression.
> > The reason is when gcc runs into "addr+offset" (which is invalid)
> > during expanding, it pre-computes the entire address and accesses memory
> unit using "MEM[reg]".
> > Yet we can force addr into register and try to generate "reg+offset"
> > which is valid for targets like ARM. By doing this, we can:
> > 1) keep addr in loop invariant form and hoist it later;
> > 2) saving additional computation by taking advantage of scaled
> > addressing mode;
>
> Does the invalid address not go through arm_legitimize_address from here?
>
> /* Perform machine-dependent transformations on X
>in certain cases. This is not necessary since the code
>below can handle all possible cases, but machine-dependent
>transformations can make better code. */
> {
> rtx orig_x = x;
> x = targetm.addr_space.legitimize_address (x, oldx, mode, as);
> if (orig_x != x && memory_address_addr_space_p (mode, x, as))
> goto done;
> }
>
Hi Eric,
The problem occurs when accessing local array element. For example,
# VUSE <.MEM_27>
k_8 = parent[k_29];
GCC calculates the address in three steps:
1) addr is calculated as "r105 + (-2064)".
2) offset is calculated as "r165*4".
3) calls offset_address to combine the address into "r105+ r165*4 +
(-2064)".
Since ADDR is valid and there is no call to memory_address_addr_space in
offset_address, the invalid address expression has no chance to go through
target dependent legitimization function. Even there is a chance, the
current implementation of memory_address_addr_space prevents the scaled
address expression from being generated because of below code:
if (! cse_not_expected && !REG_P (x))
x = break_out_memory_refs (x);
Thanks.
bin
[ping][PATCH][2 of 2] RTL expansion for zero sign extension elimination with VRP
Can you please help to review this patch? Richard reviewed the original
patch and asked it to be split into two parts. Also, he wanted a review
from RTL maintainers for the RTL changes.
Thanks,
Kugan
On 03/06/13 11:46, Kugan wrote:
Hi,
This patch removes some of the redundant sign/zero extensions using
value range information during RTL expansion.
When GIMPLE_ASSIGN stmts with LHS type smaller than word is expanded to
RTL, if we can prove that RHS expression value can always fit in LHS
type and there is no sign conversion, truncation and extension to fit
the type is redundant. For a SUBREG_PROMOTED_VAR_P, Subreg and Zero/sign
extensions are therefore redundant.
For example, when an expression is evaluated and it's value is assigned
to variable of type short, the generated RTL would look something like
the following.
(set (reg:SI 110)
(zero_extend:SI (subreg:HI (reg:SI 117) 0)))
However, if during value range propagation, if we can say for certain
that the value of the expression which is present in register 117 is
within the limits of short and there is no sign conversion, we do not
need to perform the subreg and zero_extend; instead we can generate the
following RTl.
(set (reg:SI 110)
(reg:SI 117)))
Same could be done for other assign statements.
This patch is based on the earlier attempt posted in
http://gcc.gnu.org/ml/gcc-patches/2013-05/msg00610.html and addresses
the review comments of Richard Biener. I am post-processing the
expand_expr_real_2 output in expand_gimple_stmt though. Reason for this
is that I would like to process all the possible assignment stmts, not
just CASE_CONVERT case and/or the REDUCE_BITFIELD.
This change along with expansion improve the geomean of spec2k int
benchmark with ref by about ~3.5% on an arm chromebook.
Tested on X86_64 and ARM.
I would like review comments on this.
Thanks,
Kugan
+2013-06-03 Kugan Vivekanandarajah
+
+* gcc/dojump.c (do_compare_and_jump): generates rtl without
+zero/sign extension if redundant.
+* gcc/cfgexpand.c (expand_gimple_stmt_1): Likewise.
+* gcc/gimple.c (gimple_assign_is_zero_sign_ext_redundant) : New
+function.
+* gcc/gimple.h (gimple_assign_is_zero_sign_ext_redundant) : New
+function definition.
+
diff --git a/gcc/cfgexpand.c b/gcc/cfgexpand.c
index c187273..ce980bc 100644
--- a/gcc/cfgexpand.c
+++ b/gcc/cfgexpand.c
@@ -2311,6 +2311,17 @@ expand_gimple_stmt_1 (gimple stmt)
if (temp == target)
;
+/* If the value in SUBREG of temp fits that SUBREG (does not
+ overflow) and is assigned to target SUBREG of the same mode
+ without sign convertion, we can skip the SUBREG
+ and extension. */
+else if (promoted
+ && gimple_assign_is_zero_sign_ext_redundant (stmt)
+ && (GET_CODE (temp) == SUBREG)
+ && (GET_MODE (target) == GET_MODE (temp))
+ && (GET_MODE (SUBREG_REG (target))
+ == GET_MODE (SUBREG_REG (temp
+ emit_move_insn (SUBREG_REG (target), SUBREG_REG (temp));
else if (promoted)
{
int unsignedp = SUBREG_PROMOTED_UNSIGNED_P (target);
diff --git a/gcc/dojump.c b/gcc/dojump.c
index 3f04eac..cb13f3a 100644
--- a/gcc/dojump.c
+++ b/gcc/dojump.c
@@ -34,6 +34,7 @@ along with GCC; see the file COPYING3. If not see
#include "ggc.h"
#include "basic-block.h"
#include "tm_p.h"
+#include "gimple.h"
static bool prefer_and_bit_test (enum machine_mode, int);
static void do_jump_by_parts_greater (tree, tree, int, rtx, rtx, int);
@@ -1108,6 +1109,60 @@ do_compare_and_jump (tree treeop0, tree treeop1, enum rtx_code signed_code,
type = TREE_TYPE (treeop0);
mode = TYPE_MODE (type);
+
+ /* Is zero/sign extension redundant as per VRP. */
+ bool op0_ext_redundant = false;
+ bool op1_ext_redundant = false;
+
+ /* If promoted and the value in SUBREG of op0 fits (does not overflow),
+ it is a candidate for extension elimination. */
+ if (GET_CODE (op0) == SUBREG && SUBREG_PROMOTED_VAR_P (op0))
+op0_ext_redundant =
+ gimple_assign_is_zero_sign_ext_redundant (SSA_NAME_DEF_STMT (treeop0));
+
+ /* If promoted and the value in SUBREG of op1 fits (does not overflow),
+ it is a candidate for extension elimination. */
+ if (GET_CODE (op1) == SUBREG && SUBREG_PROMOTED_VAR_P (op1))
+op1_ext_redundant =
+ gimple_assign_is_zero_sign_ext_redundant (SSA_NAME_DEF_STMT (treeop1));
+
+ /* If zero/sign extension is redundant, generate RTL
+ for operands without zero/sign extension. */
+ if ((op0_ext_redundant || TREE_CODE (treeop0) == INTEGER_CST)
+ && (op1_ext_redundant || TREE_CODE (treeop1) == INTEGER_CST))
+{
+ if (TREE_CODE (treeop1) == INTEGER_CST)
+{
+ /* First operand is constant. */
+ rtx new_op0 = gen_reg_rtx (GET_MODE (SUBREG_REG (op0)));
+
+ emit_move_insn (new_o
[ping][PATCH][1 of 2] Add value range info to SSA_NAME for zero sign extension elimination in RTL
Can you please help to review this patch? Richard reviewed the original
patch and asked it to be split into two parts. Also, he wanted a review
from RTL maintainer for the RTL changes.
Thanks,
Kugan
On 03/06/13 11:43, Kugan wrote:
Hi,
This patch adds value range information to tree SSA_NAME during Value
Range Propagation (VRP) pass in preparation to removes some of the
redundant sign/zero extensions during RTL expansion.
This is based on the original patch posted in
http://gcc.gnu.org/ml/gcc-patches/2013-05/msg00610.html and addresses
the review comments of Richard Biener.
Tested on X86_64 and ARM.
I would like review comments on this.
Thanks,
Kugan
+2013-06-03 Kugan Vivekanandarajah
+
+* gcc/gcc/tree-flow.h: Declared structure range_info_def and function
+definition for mark_range_info_unknown.
+* gcc/tree-ssa-alias.c (dump_alias_info) : Check pointer type
+* gcc/tree-ssanames.c (make_ssa_name_fn) : Check pointer type in
+initialize.
+* (mark_range_info_unknown) : New function.
+* (duplicate_ssa_name_range_info) : Likewise.
+* (duplicate_ssa_name_fn) : Check pointer type and call correct
+duplicate function.
+* gcc/tree-vrp.c (extract_exp_value_range): New function.
+* (simplify_stmt_using_ranges): Call extract_exp_value_range and
+tree_ssa_set_value_range.
+* gcc/tree.c (tree_ssa_set_value_range): New function.
+* gcc/tree.h (SSA_NAME_PTR_INFO) : changed to access via union
+* gcc/tree.h (SSA_NAME_RANGE_INFO) : New macro
+
diff --git a/gcc/tree-flow.h b/gcc/tree-flow.h
index 24fcfbf..dd4e2f5 100644
--- a/gcc/tree-flow.h
+++ b/gcc/tree-flow.h
@@ -147,6 +147,19 @@ struct GTY(()) ptr_info_def
unsigned int misalign;
};
+/* Value range information for SSA_NAMEs representing non-pointer variables. */
+
+struct GTY (()) range_info_def {
+ /* Set to true if VR_RANGE and false if VR_ANTI_RANGE. */
+ bool vr_range;
+ /* Minmum for value range. */
+ double_int min;
+ /* Maximum for value range. */
+ double_int max;
+ /* Set to true if range is valid. */
+ bool valid;
+};
+
/* It is advantageous to avoid things like life analysis for variables which
do not need PHI nodes. This enum describes whether or not a particular
@@ -532,6 +545,7 @@ extern void replace_ssa_name_symbol (tree, tree);
extern bool get_ptr_info_alignment (struct ptr_info_def *, unsigned int *,
unsigned int *);
extern void mark_ptr_info_alignment_unknown (struct ptr_info_def *);
+extern void mark_range_info_unknown (struct range_info_def *);
extern void set_ptr_info_alignment (struct ptr_info_def *, unsigned int,
unsigned int);
extern void adjust_ptr_info_misalignment (struct ptr_info_def *,
diff --git a/gcc/tree-ssa-alias.c b/gcc/tree-ssa-alias.c
index 2ecd139..8ccecb5 100644
--- a/gcc/tree-ssa-alias.c
+++ b/gcc/tree-ssa-alias.c
@@ -404,6 +404,7 @@ dump_alias_info (FILE *file)
struct ptr_info_def *pi;
if (ptr == NULL_TREE
+ || !POINTER_TYPE_P (TREE_TYPE (ptr))
|| SSA_NAME_IN_FREE_LIST (ptr))
continue;
diff --git a/gcc/tree-ssanames.c b/gcc/tree-ssanames.c
index 0a405ce..420ae00 100644
--- a/gcc/tree-ssanames.c
+++ b/gcc/tree-ssanames.c
@@ -151,7 +151,11 @@ make_ssa_name_fn (struct function *fn, tree var, gimple stmt)
SET_SSA_NAME_VAR_OR_IDENTIFIER (t, var);
}
SSA_NAME_DEF_STMT (t) = stmt;
- SSA_NAME_PTR_INFO (t) = NULL;
+ if (POINTER_TYPE_P (TREE_TYPE (t)))
+SSA_NAME_PTR_INFO (t) = NULL;
+ else
+SSA_NAME_RANGE_INFO (t) = NULL;
+
SSA_NAME_IN_FREE_LIST (t) = 0;
SSA_NAME_IS_DEFAULT_DEF (t) = 0;
imm = &(SSA_NAME_IMM_USE_NODE (t));
@@ -266,6 +270,14 @@ mark_ptr_info_alignment_unknown (struct ptr_info_def *pi)
pi->misalign = 0;
}
+/* Set the range described by RI has invalid values. */
+
+void
+mark_range_info_unknown (struct range_info_def *ri)
+{
+ ri->valid = false;
+}
+
/* Store the the power-of-two byte alignment and the deviation from that
alignment of pointer described by PI to ALIOGN and MISALIGN
respectively. */
@@ -359,6 +371,26 @@ duplicate_ssa_name_ptr_info (tree name, struct ptr_info_def *ptr_info)
SSA_NAME_PTR_INFO (name) = new_ptr_info;
}
+/* Creates a duplicate of the range_info_def at RANGE_INFO for use by
+ the SSA name NAME. */
+void
+duplicate_ssa_name_range_info (tree name, struct range_info_def *range_info)
+{
+ struct range_info_def *new_range_info;
+
+ gcc_assert (!POINTER_TYPE_P (TREE_TYPE (name)));
+ gcc_assert (!SSA_NAME_RANGE_INFO (name));
+
+ if (!range_info)
+return;
+
+ new_range_info = ggc_alloc_range_info_def ();
+ *new_range_info = *range_info;
+
+ SSA_NAME_RANGE_INFO (name) = new_range_info;
+}
+
+
/* Creates a duplicate of a ssa name NAME tobe defined by statement STMT
in function FN. */
@@ -367,10 +399,20 @@ tree
duplicate_ssa_name_fn (struct function *fn, tree name, gimple stmt)
{
tree new_name = copy_ssa_name_fn (fn, name, stmt);
- struct ptr_info_def *old_ptr_info =
[PATCH] fixed a minor bug in array notation test case
Hello Everyone, I found a minor bug in one of the array notation test case. I accidentally put the minus for length instead of stride. I have committed this patch as obvious. 2013-06-16 Balaji V. Iyer * c-c++-common/cilk-plus/AN/if_test.c (main2): Fixed a bug of accidentally placing minus sign for length instead of stride. diff --git a/gcc/testsuite/c-c++-common/cilk-plus/AN/if_test.c b/gcc/testsuite/c-c++-common/cilk-plus/AN/if_test.c index 5544d45..4e5b158 100644 --- a/gcc/testsuite/c-c++-common/cilk-plus/AN/if_test.c +++ b/gcc/testsuite/c-c++-common/cilk-plus/AN/if_test.c @@ -269,7 +269,7 @@ int main2 (char **argv) /* atoi(argv[1]) == 10, so it will convert all 10's to 5's */ if (FourDArray[0:10:1][0:5:2][9:10:-1][x:y:z] + - FourDArray[0:10:1][0:5:2][9:-10:1][x:y:z] != 20) + FourDArray[0:10:1][0:5:2][9:10:-1][x:y:z] != 20) array4[0:10:1][0:5:2][9:10:-1][x:y:z] = 10; else array4[0:10][0:5:2][9:10:-1][x:y:z] = 5; Thanks, Balaji V. Iyer.
Re: [PATCH] Proof of concept: multiple gc heaps
On Sun, 2013-06-16 at 11:18 +0200, Basile Starynkevitch wrote: > On Fri, Jun 14, 2013 at 11:21:06PM -0400, David Malcolm wrote: > > I'm hoping that gcc 4.9 can support multiple "parallel universes" of gcc > > state within one process, to ultimately support gcc usage as a library, > > where multiple client threads can each have their own gcc context (or > > "universe"). > > > > One issue with the above is the garbage collector. > > > > I think there are two possible ways in which "universe instances" could > > interact with the GC: > > > > (a) have the universe instances be GC-managed: all parallel universes > > share the same heap, requiring a rewrite of the GC code to be > > thread-safe, > > > > or > > > > (b) have the "universe instance"/context manage GC, so that the state of > > GC is per-universe: each universe has its own GC heap, entirely > > independent of each other universe's GC heap. You can't share GC > > pointers between universes. > > > > I don't think (a) is feasible. > > > I agree, but what would be the purpose to run many threads of GCC in parallel > which don't share anything? I'm thinking of the "embedding GCC as a shared library" case. Consider a web browser, where each tab or window can have multiple threads, say, a thread to render HTML, a thread to run JavaScript, etc. The JavaScript code is to be compiled to machine code to get maximum speed. How is each tab to do this? The author of the web browser needs to be able to embed a compiler into the process, where each thread might want to do some compiling, each independently of the other threads. The compilation will involve some optimization passes - some of them the ones already implemented in GCC, but maybe some extra ones that are specific to the JavaScript implementation. > At the very least, I would expect predefined global trees to be common to all > of them. > I'm thinking at least of The global_trees array. In theory these could be shared between threads, but to me it feels like a premature optimization - once you start sharing GC-managed objects between threads, you have to somehow ensure that the threads don't stomp on each other's data (what happens if two threads try to collect at the same time? how atomic are the "mark" operations? etc etc). Also: the global_trees array is affected by options: char_type_node and double_type_node are affected by flags (for signedness and precision respectively). Some threads in a process might want one set of flags, and some another. It seems much simpler to me to declare that every compilation context is its own island, waste a little RAM on having separate copies of things, and avoid having interactions between garbage-collectors running in different threads. > And don't forget plugins, which can (and do, for MELT) run the Ggc collector, > and use the > PLUGIN_GGC_START, PLUGIN_GGC_MARKING, PLUGIN_GGC_END Good point. If we have multiple contexts (or "universes"), then when GCC calls into a plugin, the plugin could somehow be told which context/universe is calling it. We could do this either by adding an extra argument to the callback function, or by having a thread-local variable containing a (context*). We're probably going to need the latter for other reasons, so perhaps that's the way to go. It has the nice property that nothing changes for plugins for the classic "GCC as a suite of binaries" case. > I do think that making (in the long term) GCC usable as a library (like LLVM > is) is a > worthwhile goal, but I don't think that aiming that future library to be > multi-threadable > (or thread-friendly) is very realistic. At least, we should make the two > goals separate: > first, make GCC a library, then (and later) make that library thread friendly. There are various issues with GCC as a library: * the simple mechanics of building with -fPIC/-fpic, and generating .so files rather than .a files. The former gives a performance hit, so we'd also want a configure-time switch to enable it, so that the classic "GCC as a suite of mononlithic binaries" use-case doesn't get slower. * having a stable API that people can write to. * how does someone embed the code in their program in a way that's sane? They can't just call toplev_main. * global state: I've been looking at state within GCC, and there's a lot of "global state" i.e. state that persists during the lifetime of the process. If GCC is to be usable as a library, I think we need to fix that state, otherwise you can't sanely run the compiler more than once within the lifetime of one process. Thread-safety is a cousin to this problem: I think that if we fix global state, the fix for thread-safety is also doable. FWIW, as mentioned in another reply on this thread, I've been writing up some notes that I hope can form a plan for removing global state from GCC; I hope to post it soon (though it's gotten *very* long). > > > So I might not be very happy of your patch > > Regards.
[C++ Patch] PR 16128
Hi,
this is another bug essentially already fixed. However, in the audit
trail Giovanni Bajo noticed that for the local declarations case we also
emit those annoying:
16128.C:16:7: error: expected ‘;’ before ‘a’
and likewise for 'b'. By checking the return value of
cp_parser_expression at the beginning of cp_parser_expression_statement
we can avoid those and many more in existing testcases (see patch).
Tested x86_64-linux.
Thanks,
Paolo.
/cp
2013-06-18 Paolo Carlini
PR c++/16128
* parser.c (cp_parser_expression_statement): Check whether
cp_parser_expression returns error_mark_node.
/testsuite
2013-06-18 Paolo Carlini
PR c++/16128
* g++.dg/template/error52.C: New.
* g++.dg/lookup/friend15.C: Update.
* g++.dg/parse/error11.C: Likewise.
* g++.dg/parse/error14.C: Likewise.
* g++.dg/parse/parser-pr28152-2.C: Likewise.
* g++.dg/parse/template25.C: Likewise.
* g++.old-deja/g++.jason/cond.C: Likewise.
* g++.old-deja/g++.mike/for2.C: Likewise.
* g++.old-deja/g++.robertl/eb125.C: Likewise.
Index: cp/parser.c
===
--- cp/parser.c (revision 200134)
+++ cp/parser.c (working copy)
@@ -9264,7 +9264,15 @@ cp_parser_expression_statement (cp_parser* parser,
/* If the next token is a ';', then there is no expression
statement. */
if (cp_lexer_next_token_is_not (parser->lexer, CPP_SEMICOLON))
-statement = cp_parser_expression (parser, /*cast_p=*/false, NULL);
+{
+ statement = cp_parser_expression (parser, /*cast_p=*/false, NULL);
+ if (statement == error_mark_node
+ && !cp_parser_uncommitted_to_tentative_parse_p (parser))
+ {
+ cp_parser_skip_to_end_of_block_or_statement (parser);
+ return error_mark_node;
+ }
+}
/* Give a helpful message for "A::type t;" and the like. */
if (cp_lexer_next_token_is_not (parser->lexer, CPP_SEMICOLON)
Index: testsuite/g++.dg/lookup/friend15.C
===
--- testsuite/g++.dg/lookup/friend15.C (revision 200141)
+++ testsuite/g++.dg/lookup/friend15.C (working copy)
@@ -8,5 +8,4 @@ void foo()
friend class B;
};
B::B() {} // { dg-error "has not been declared" }
-// { dg-error "expected" "expected" { target *-*-* } 10 }
}
Index: testsuite/g++.dg/parse/error11.C
===
--- testsuite/g++.dg/parse/error11.C(revision 200131)
+++ testsuite/g++.dg/parse/error11.C(working copy)
@@ -53,18 +53,16 @@ void func(void)
// { dg-error "6:missing template arguments before" "template" { target *-*-*
} { 51 } }
// { dg-error "9:expected primary-expression before ':' token" "primary" {
target *-*-* } 51 }
// { dg-error "9:expected '\]' before ':' token" "backslash" { target *-*-* }
51 }
-// { dg-error "9:expected ';' before ':' token" "semicolon" { target *-*-* }
51 }
// { dg-error "6:missing template arguments before" "template" { target *-*-*
} 52 }
// { dg-error "7:expected primary-expression before ':' token" "primary" {
target *-*-* } 52 }
// { dg-error "7:expected '\]' before ':' token" "backslash" { target *-*-* }
52 }
-// { dg-error "7:expected ';' before ':' token" "semicolon" { target *-*-* }
52 }
//
int Foo[2];
Foo[::value] = 0;
}
template struct Foo<::B>; // { dg-error "20:'<::' cannot begin" "begin" {
target c++98 } }
-// { dg-message "20:is an alternate" "alt" { target c++98 } 66 }
+// { dg-message "20:is an alternate" "alt" { target c++98 } 64 }
// On the first error message, an additional note about the use of
// -fpermissive should be present
Index: testsuite/g++.dg/parse/error14.C
===
--- testsuite/g++.dg/parse/error14.C(revision 200131)
+++ testsuite/g++.dg/parse/error14.C(working copy)
@@ -22,5 +22,3 @@ struct X
}; // { dg-error "2:expected '.' at end of input" "at end of input" }
// { dg-error "1:expected primary-expression before '.' token" "primary" {
target *-*-* } 22 }
// { dg-error "1:expected unqualified-id" "unqualified-id" { target *-*-* }
22 }
- // { dg-error "1:expected ';' before '.' token" "function" { target *-*-* }
22 }
-
Index: testsuite/g++.dg/parse/parser-pr28152-2.C
===
--- testsuite/g++.dg/parse/parser-pr28152-2.C (revision 200131)
+++ testsuite/g++.dg/parse/parser-pr28152-2.C (working copy)
@@ -7,7 +7,5 @@ main (void)
__complex__ float z;
z = __complex__ (1.9007326203904e+19, 0.0); // { dg-error "expected
primary-expression before '__complex__'" "primary-expression" }
- // { dg-error "expected .;. before .__complex__." "semicolon" { target *-*-*
} 9 }
z = __complex__ (1.0e+0, 0.0) / z;// { dg-error "expected
primary-expression before '__complex
Re: [patch] C++14: N3671 Making non-modifying sequence operations more robust
On 15 June 2013 16:48, Jonathan Wakely wrote:
> On 11 June 2013 00:11, Jonathan Wakely wrote:
>> On 10 June 2013 23:08, Chris Jefferson wrote:
>>> After we are in the 'if(__ra_iters)' case, and checked that __d1==__d2,
>>> could dispatch to old-fashioned equal(__first1, __last1, __first2,
>>> __binary_pred). This has the advantage that it saves repeatedly checking
>>> __first2 != __last2 unnessasairly, and I suspect only having one loop
>>> condition to check will give the compiler a better shot at optimising /
>>> unrolling (although, I haven't checked that I will admit).
>>
>> Good idea, thanks, I'll make that change too.
>
> How's this? I made both the new std::equal() overloads defer to the
> old ones when both sets of iterators are random access. That means
> there's no need for the __equal2 class template, the memcmp special
> case for pointers is handled by the old std::equal().
I'm committing the attached, which also fixes some silly typos in the
new is_permutation overloads.
Tested x86_64-linux.
2013-06-17 Jonathan Wakely
Chris Jefferson
* include/bits/stl_algobase.h (equal): Make C++14 overloads from N3671
dispatch to traditional std::equal for random-access iterators.
(__equal2_aux, __equal2): Remove.
(__equal::equal): Remove unused overloads.
* include/bits/stl_algo.h (is_permutation): Fix typos.
commit 0bf845495124778bad276447cd2ce12cb888f921
Author: Jonathan Wakely
Date: Mon Jun 17 01:30:37 2013 +0100
2013-06-17 Jonathan Wakely
Chris Jefferson
* include/bits/stl_algobase.h (equal): Make C++14 overloads from N3671
dispatch to traditional std::equal for random-access iterators.
(__equal2_aux, __equal2): Remove.
(__equal::equal): Remove unused overloads.
* include/bits/stl_algo.h (is_permutation): Fix typos.
diff --git a/libstdc++-v3/include/bits/stl_algo.h
b/libstdc++-v3/include/bits/stl_algo.h
index e61f22b..9d6b466 100644
--- a/libstdc++-v3/include/bits/stl_algo.h
+++ b/libstdc++-v3/include/bits/stl_algo.h
@@ -4396,7 +4396,7 @@ _GLIBCXX_BEGIN_NAMESPACE_VERSION
= typename iterator_traits<_ForwardIterator2>::iterator_category;
using _It1_is_RA = is_same<_Cat1, random_access_iterator_tag>;
using _It2_is_RA = is_same<_Cat2, random_access_iterator_tag>;
- if (_It1_is_RA() && _It1_is_RA())
+ if (_It1_is_RA() && _It2_is_RA())
{
auto __d1 = std::distance(__first1, __last1);
auto __d2 = std::distance(__first2, __last2);
@@ -4456,7 +4456,7 @@ _GLIBCXX_BEGIN_NAMESPACE_VERSION
= typename iterator_traits<_ForwardIterator2>::iterator_category;
using _It1_is_RA = is_same<_Cat1, random_access_iterator_tag>;
using _It2_is_RA = is_same<_Cat2, random_access_iterator_tag>;
- constexpr bool __ra_iters = _It1_is_RA() && _It1_is_RA();
+ constexpr bool __ra_iters = _It1_is_RA() && _It2_is_RA();
if (__ra_iters)
{
auto __d1 = std::distance(__first1, __last1);
diff --git a/libstdc++-v3/include/bits/stl_algobase.h
b/libstdc++-v3/include/bits/stl_algobase.h
index 67f859b..e1daac2 100644
--- a/libstdc++-v3/include/bits/stl_algobase.h
+++ b/libstdc++-v3/include/bits/stl_algobase.h
@@ -798,19 +798,6 @@ _GLIBCXX_BEGIN_NAMESPACE_VERSION
return false;
return true;
}
-
-#if __cplusplus > 201103L
- template
-static bool
-equal(_II1 __first1, _II1 __last1, _II2 __first2, _II2 __last2)
-{
- for (; __first1 != __last1 && __first2 != __last2;
- ++__first1, ++__first2)
- if (!(*__first1 == *__first2))
- return false;
- return true;
- }
-#endif
};
template<>
@@ -823,17 +810,6 @@ _GLIBCXX_BEGIN_NAMESPACE_VERSION
return !__builtin_memcmp(__first1, __first2, sizeof(_Tp)
* (__last1 - __first1));
}
-
-#if __cplusplus > 201103L
- template
-static bool
-equal(const _Tp* __first1, const _Tp* __last1, const _Tp* __first2,
- const _Tp* __last2)
-{
- return !__builtin_memcmp(__first1, __first2, sizeof(_Tp)
- * (__last1 - __first1));
- }
-#endif
};
template
@@ -851,66 +827,6 @@ _GLIBCXX_BEGIN_NAMESPACE_VERSION
return std::__equal<__simple>::equal(__first1, __last1, __first2);
}
-#if __cplusplus > 201103L
- template
-struct __equal2
-{
- template
- using _IterCat = typename iterator_traits<_It>::iterator_category;
- template
- using _IsRA = is_same<_IterCat<_It>, random_access_iterator_tag>;
-
- template
-static bool
-equal(_II1 __first1, _II1 __last1, _II2 __first2, _II2 __last2)
-{
- constexpr bool __ra_iters = _IsRA<_II1>() && _IsRA<_II2>();
- if (__ra_iters)
- {
- auto __d1 = std::distance(__first1, __last1);
-
Re: [PATCH] Proof of concept: multiple gc heaps
On Sat, 2013-06-15 at 12:09 -0700, Mike Stump wrote: > On Jun 14, 2013, at 8:21 PM, David Malcolm > wrote: [...snip discussion of approaches to GC and state...] > > I'm attaching a patch which converts all state within ggc into a > gc_heap > > class, so that you can have multiple instances of ggc heaps. For > now > > there's a singleton instance "the_heap", which is used implicitly in > a > > few places. > > I like the design. Thanks! > > I don't yet know to what extent this affects performance of the > garbage > > collector (extra register pressure from passing around "this", > > perhaps?). > > Would be nice to do a release style build (gcc trunk will default to > lots of extra checking, since it isn't a release) and gather > performance numbers for it. Thanks for the pointer: this is: --enable-checking=release right? > > Thoughts? > > I looked through the patch, and it looks reasonable to me (informal > code review). I think for formal review, the reviewer should see and > consider the performance impact. You can do something just a hair > wrong, and kill performance. So, a C++ generate a pch file, say of > 100,000 lines or typical C++ code, and see the time of an -O2 and a > -O0 build. -O0 influence the edit->debug cycle time. If performance > is more than 30% off, it would seem you should be able to regain that > by fixing your code. I'd hope than pch generation time is slower than > less than 3%, ideally, around 0.4%. Good to have some numbers to aim at. FWIW, this isn't the first discussion on this list about the possibly performance impact of introducing a singleton: we had a similar discussion in another thread about removing state from passes. One idea there was to introduce a macro to add "static" to all methods and fields when not building shared libraries, to lose the "this" pointers: http://gcc.gnu.org/ml/gcc-patches/2013-05/msg01351.html which might be applicable in this case. I think this issue will keep popping up. I've been writing up some notes that I hope can form a plan for removing global state from GCC; I hope to post it soon (though it's gotten *very* long). Thanks again for looking at the patch. Dave
Re: [patch] N3659: add C++14's
Fix a stupid bug in shared_lock.
Tested x86_64-linux, committed to trunk.
* include/std/shared_mutex (shared_lock::operator=): Add missing
return statement.
commit b177aa326855e5e27ab53427d5a02012ffb944a4
Author: Jonathan Wakely
Date: Sun Jun 16 21:27:55 2013 +0100
* include/std/shared_mutex (shared_lock::operator=): Add missing
return statement.
diff --git a/libstdc++-v3/include/std/shared_mutex
b/libstdc++-v3/include/std/shared_mutex
index f606282..39ab83a 100644
--- a/libstdc++-v3/include/std/shared_mutex
+++ b/libstdc++-v3/include/std/shared_mutex
@@ -339,7 +339,10 @@ _GLIBCXX_BEGIN_NAMESPACE_VERSION
shared_lock&
operator=(shared_lock&& __sl) noexcept
- { shared_lock(std::move(__sl)).swap(*this); }
+ {
+ shared_lock(std::move(__sl)).swap(*this);
+ return *this;
+ }
void
lock()
Re: [Patch, Fortran] Print floating-point exception status after STOP/ERROR STOP
Hello,
Le 16/06/2013 19:33, Tobias Burnus a écrit :
> * PING *
>
> Minor change: Jakub suggested to print no exception status with older
> gfortran programs. Hence, the library now defaults to 0. (Older programs
> do not pass this argument to the library.) - I also updated
> gfortran.texi for that change.
>
> Tobias
>
>
> On June 12, 2013 17:50, Tobias Burnus wrote:
>> Updated version:
>> * Uros suggestions are incorporated
>> * Changed from -f(no-)underflow-warning to
>> -ffpe-summary=[none,all,underflow,...]
>>
>> Tobias Burnus wrote:
>>> The attached patch causes gfortran-compiled programs to print
>>> warnings like
>> Note: The following floating-point exception are signalling:
>> IEEE_DIVIDE_BY_ZERO
>>> when STOP / ERROR STOP is invoked. That's required by Fortran 2008
>>> (8.4 STOP and ERROR STOP statements):
>>>
>>> "If any exception (14) is signaling on that image, the processor
>>> shall issue a warning indicating which exceptions are signaling; this
>>> warning shall be on the unit identified by the named constant ERROR
>>> UNIT (13.8.2.8)."
>>
>>> One surely could extend it to allow to completely disable the warning
>>> - or to make it more fine grained like "none", "all" plus all single
>>> flags (including underflow, denormal and inexact, where by default
>>> one leaves out inexact).
>>
>> Thinking about it, I think that's the better solution: It makes
>> (optionally) inexact available and also allows to fully disable the
>> feature. I am sure that there are users who would like to have that
>> choice. Hence, I update the argument handling and libgfortran's stop.c.
>>
>> Additions from the J3 list:
>> * IBM's "XLF compiler has an option to report fp exceptions including
>> underflow and inexact. It is default OFF."
>> (which matches ifort)
>>
>>> Build and regtested on x86-64-gnu-linux.
>>> OK for the trunk?
>>
>> Tobias
>>
>> PS: I filled PR 57598 to track the warning handling for coarrays.
>
Two nits below:
> @@ -515,17 +525,37 @@ gfc_handle_fpe_trap_option (const char *arg)
> pos++;
>
>result = 0;
> - for (n = 0; exception[n] != NULL; n++)
> + if (!trap && strncmp ("none", arg, pos) == 0)
> + {
> + gfc_option.fpe_summary = 0;
> + arg += pos;
> + pos = 0;
> + continue;
> + }
> + else if (!trap && strncmp ("all", arg, pos) == 0)
> {
> + gfc_option.fpe_summary = GFC_FPE_INVALID | GFC_FPE_DENORMAL
> +| GFC_FPE_ZERO | GFC_FPE_OVERFLOW
> +| GFC_FPE_UNDERFLOW | GFC_FPE_INEXACT;
> + arg += pos;
> + pos = 0;
> + continue;
> + }
> + else
> + for (n = 0; exception[n] != NULL; n++)
> + {
> if (exception[n] && strncmp (exception[n], arg, pos) == 0)
> {
> - gfc_option.fpe |= opt_exception[n];
> + if (trap)
> + gfc_option.fpe |= opt_exception[n];
> + else
> + gfc_option.fpe_summary |= opt_exception[n];
> arg += pos;
> pos = 0;
> result = 1;
> break;
> }
> - }
> + }
>if (!result)
> gfc_fatal_error ("Argument to -ffpe-trap is not valid: %s", arg);
-ffpe-trap and -ffpe-summary should better be distinguished here.
> }
> diff --git a/libgfortran/runtime/stop.c b/libgfortran/runtime/stop.c
> index 4805412..2d4fb62 100644
> --- a/libgfortran/runtime/stop.c
> +++ b/libgfortran/runtime/stop.c
> @@ -32,6 +32,55 @@ see the files COPYING3 and COPYING.RUNTIME respectively.
> If not, see
> #endif
>
>
> +/* Fortran 2008 demands: If any exception (14) is signaling on that image,
> the
> + processor shall issue a warning indicating which exceptions are signaling;
> + this warning shall be on the unit identified by the named constant
> + ERROR_UNIT (13.8.2.8). In line with other compilers, we do not report
> + inexact - and we optionally ignore underflow, cf. thread starting at
> + http://mailman.j3-fortran.org/pipermail/j3/2013-June/006452.html. */
> +
> +static void
> +report_exception (void)
> +{
> + int set_excepts;
> +
> + if (!compile_options.fpe_summary)
> +return;
> +
> + set_excepts = get_fpu_except_flags ();
> + if ((set_excepts & compile_options.fpe_summary) == 0)
> +return;
> +
> + estr_write ("Note: The following floating-point exceptions are
> signalling:");
> +
> + if ((compile_options.fpe_summary & GFC_FPE_INVALID)
> + && (set_excepts & GFC_FPE_INVALID))
> +estr_write (" IEEE INVALID FLAG");
Two underscores missing.
OK once fixed.
Thanks
Mikael
Re: Aw: Re: [PATCH] Basic support for MIPS r5900
"Jürgen Urban" writes: >> Does it still work with those changes, as below? If so, I'll check it in. > > I tested it. It is still working. So the patch is OK, please check it in. OK, I've applied this and the config.gcc patch. Thanks, Richard
Re: [patch 3/5] don't restrict bit range for -fstrict-volatile-bitfields
On Sun, Jun 16, 2013 at 01:08:12PM -0600, Sandra Loosemore wrote: > This patch fixes the PR23623 regression. In conjunction with part 2 > of the series, it also fixes the new volatile-bitfields-3.c test > case. > > As I noted in previous discussion, there might be a better place to > accomplish this effect, but hacking DECL_BIT_FIELD_REPRESENTATIVE > can't work because the volatile-ness may be coming from a qualifier > on the pointer or object from which the field is being extracted, > rather than from a volatile qualifier on the bit field decl. I > think the choices are to do it in get_bit_range (as in this patch), > in the callers of get_bit_range, or at the places where the bit > range information is being used. So does this means you just always violate C++11 memory model requirements with -fstrict-volatile-bitfields? That doesn't seem to be a good idea. > 2013-06-16 Sandra Loosemore > > PR middle-end/23623 > > gcc/ > * expr.c (get_bit_range): Handle flag_strict_volatile_bitfields. Jakub
[patch 5/5] new -fstrict-volatile-bitfields test cases
Here are the test cases for the bugs fixed by this patch series. See my
original posting of this patch set
http://gcc.gnu.org/ml/gcc-patches/2013-06/msg00750.html
for discussion of which test cases were previously failing on what targets.
-Sandra
2013-06-16 Sandra Loosemore
PR middle-end/23623
PR middle-end/48784
PR middle-end/56341
PR middle-end/56997
gcc/testsuite/
* gcc.dg/pr23623.c: New test.
* gcc.dg/pr48784-1.c: New test.
* gcc.dg/pr48784-2.c: New test.
* gcc.dg/pr56341-1.c: New test.
* gcc.dg/pr56341-2.c: New test.
* gcc.dg/pr56997-1.c: New test.
* gcc.dg/pr56997-2.c: New test.
* gcc.dg/pr56997-3.c: New test.
Index: gcc/testsuite/gcc.dg/pr23623.c
===
--- gcc/testsuite/gcc.dg/pr23623.c (revision 0)
+++ gcc/testsuite/gcc.dg/pr23623.c (revision 0)
@@ -0,0 +1,45 @@
+/* { dg-do compile } */
+/* { dg-options "-fstrict-volatile-bitfields -fdump-rtl-final" } */
+
+/* With -fstrict-volatile-bitfields, the volatile accesses to bf2.b
+ and bf3.b must do unsigned int reads/writes. The non-volatile
+ accesses to bf1.b are not so constrained. */
+
+extern struct
+{
+ unsigned int b : 1;
+} bf1;
+
+extern volatile struct
+{
+ unsigned int b : 1;
+} bf2;
+
+extern struct
+{
+ volatile unsigned int b : 1;
+} bf3;
+
+void writeb(void)
+{
+ bf1.b = 1;
+ bf2.b = 1; /* volatile read + volatile write */
+ bf3.b = 1; /* volatile read + volatile write */
+}
+
+extern unsigned int x1, x2, x3;
+
+void readb(void)
+{
+ x1 = bf1.b;
+ x2 = bf2.b; /* volatile write */
+ x3 = bf3.b; /* volatile write */
+}
+
+/* There should be 6 volatile MEMs total, but scan-rtl-dump-times counts
+ the number of match variables and not the number of matches. Since
+ the parenthesized subexpression in the regexp introduces an extra match
+ variable, we need to give a count of 12 instead of 6 here. */
+/* { dg-final { scan-rtl-dump-times "mem/v(/.)*:SI" 12 "final" } } */
+/* { dg-final { cleanup-rtl-dump "final" } } */
+
Index: gcc/testsuite/gcc.dg/pr48784-1.c
===
--- gcc/testsuite/gcc.dg/pr48784-1.c (revision 0)
+++ gcc/testsuite/gcc.dg/pr48784-1.c (revision 0)
@@ -0,0 +1,18 @@
+/* { dg-do run } */
+/* { dg-options "-fstrict-volatile-bitfields" } */
+
+#include
+
+#pragma pack(1)
+volatile struct S0 {
+ signed a : 7;
+ unsigned b : 28; /* b can't be fetched with an aligned 32-bit access, */
+ /* but it certainly can be fetched with an unaligned access */
+} g = {0,0xfff};
+
+int main() {
+ unsigned b = g.b;
+ if (b != 0xfff)
+abort ();
+ return 0;
+}
Index: gcc/testsuite/gcc.dg/pr48784-2.c
===
--- gcc/testsuite/gcc.dg/pr48784-2.c (revision 0)
+++ gcc/testsuite/gcc.dg/pr48784-2.c (revision 0)
@@ -0,0 +1,18 @@
+/* { dg-do run } */
+/* { dg-options "-fno-strict-volatile-bitfields" } */
+
+#include
+
+#pragma pack(1)
+volatile struct S0 {
+ signed a : 7;
+ unsigned b : 28; /* b can't be fetched with an aligned 32-bit access, */
+ /* but it certainly can be fetched with an unaligned access */
+} g = {0,0xfff};
+
+int main() {
+ unsigned b = g.b;
+ if (b != 0xfff)
+abort ();
+ return 0;
+}
Index: gcc/testsuite/gcc.dg/pr56341-1.c
===
--- gcc/testsuite/gcc.dg/pr56341-1.c (revision 0)
+++ gcc/testsuite/gcc.dg/pr56341-1.c (revision 0)
@@ -0,0 +1,41 @@
+/* { dg-do run } */
+/* { dg-options "-fstrict-volatile-bitfields" } */
+
+#include
+#include
+
+struct test0
+{
+ unsigned char b1[2];
+} __attribute__((packed, aligned(2)));
+
+struct test1
+{
+ volatile unsigned long a1;
+ unsigned char b1[4];
+} __attribute__((packed, aligned(2)));
+
+struct test2
+{
+ struct test0 t0;
+ struct test1 t1;
+ struct test0 t2;
+} __attribute__((packed, aligned(2)));
+
+struct test2 xx;
+struct test2 *x1 = &xx;
+
+#define MAGIC 0x12345678
+
+void test0 (struct test2* x1)
+{
+ x1->t1.a1 = MAGIC;
+}
+
+int main()
+{
+ test0 (x1);
+ if (xx.t1.a1 != MAGIC)
+abort ();
+ return 0;
+}
Index: gcc/testsuite/gcc.dg/pr56341-2.c
===
--- gcc/testsuite/gcc.dg/pr56341-2.c (revision 0)
+++ gcc/testsuite/gcc.dg/pr56341-2.c (revision 0)
@@ -0,0 +1,41 @@
+/* { dg-do run } */
+/* { dg-options "-fno-strict-volatile-bitfields" } */
+
+#include
+#include
+
+struct test0
+{
+ unsigned char b1[2];
+} __attribute__((packed, aligned(2)));
+
+struct test1
+{
+ volatile unsigned long a1;
+ unsigned char b1[4];
+} __attribute__((packed, aligned(2)));
+
+struct test2
+{
+ struct test0 t0;
+ struct test1 t1;
+ struct test0 t2;
+} __attribute__((packed, aligned(2)));
+
+struct test2 xx;
+struct test2 *x1 = &xx;
+
+#define MAGIC 0x12345678
+
+void test0 (struct test2* x1)
+{
+ x1->t1.a1 = MAGIC;
+}
+
+int main()
+{
+ test0 (x1);
+ if (xx
[patch 4/5] fix bugs with -fstrict-volatile-bitfields and packed structures
This part of the patch series fixes problems with bad code being emitted
for unaligned bitfield accesses, as reported in PRs 48784, 56341, and
56997. A secondary goal of this patch was making the bitfield store and
extract code follow similar logic, at least for the parts relating to
-fstrict-volatile-bitfield handling.
This patch is intended to be applied on top of part 1 (they both touch
some of the same code).
-Sandra
2013-06-16 Sandra Loosemore
PR middle-end/48784
PR middle-end/56341
PR middle-end/56997
gcc/
* expmed.c (store_fixed_bit_field): Adjust
flag_strict_volatile_bitfields handling and consolidate code
for the default case.
(extract_bit_field_1): Adjust flag_strict_volatile_bitfields
handling to match store_bit_field_1.
(extract_fixed_bit_field): Use get_best_mode and narrow_bit_field_mem
to match store_fixed_bit_field.
* doc/invoke.texi (Code Gen Options): Update documentation of
-fstrict-volatile-bitfields to reflect new behavior. Note
that AAPCS requires this.
Index: gcc/expmed.c
===
--- gcc/expmed.c (revision 199963)
+++ gcc/expmed.c (working copy)
@@ -933,19 +933,35 @@ store_fixed_bit_field (rtx op0, unsigned
a word, we won't be doing the extraction the normal way.
We don't want a mode bigger than the destination. */
- mode = GET_MODE (op0);
- if (GET_MODE_BITSIZE (mode) == 0
- || GET_MODE_BITSIZE (mode) > GET_MODE_BITSIZE (word_mode))
- mode = word_mode;
-
if (MEM_VOLATILE_P (op0)
&& GET_MODE_BITSIZE (GET_MODE (op0)) > 0
&& GET_MODE_BITSIZE (GET_MODE (op0)) <= maxbits
&& flag_strict_volatile_bitfields > 0)
- mode = GET_MODE (op0);
+ {
+ unsigned int modesize;
+
+ mode = GET_MODE (op0);
+
+ /* Check for oversized or unaligned field that we can't write
+ with a single access of the required type, and fall back to
+ the default behavior. */
+ modesize = GET_MODE_BITSIZE (mode);
+ if (bitnum % BITS_PER_UNIT + bitsize > modesize
+ || (STRICT_ALIGNMENT
+ && bitnum % GET_MODE_ALIGNMENT (mode) + bitsize > modesize))
+ mode = get_best_mode (bitsize, bitnum, 0, 0,
+ MEM_ALIGN (op0), word_mode, true);
+ }
else
- mode = get_best_mode (bitsize, bitnum, bitregion_start, bitregion_end,
- MEM_ALIGN (op0), mode, MEM_VOLATILE_P (op0));
+ {
+ mode = GET_MODE (op0);
+ if (GET_MODE_BITSIZE (mode) == 0
+ || GET_MODE_BITSIZE (mode) > GET_MODE_BITSIZE (word_mode))
+ mode = word_mode;
+
+ mode = get_best_mode (bitsize, bitnum, bitregion_start, bitregion_end,
+MEM_ALIGN (op0), mode, MEM_VOLATILE_P (op0));
+ }
if (mode == VOIDmode)
{
@@ -1429,24 +1445,35 @@ extract_bit_field_1 (rtx str_rtx, unsign
If that's wrong, the solution is to test for it and set TARGET to 0
if needed. */
- /* If the bitfield is volatile, we need to make sure the access
- remains on a type-aligned boundary. */
+ /* Get the mode of the field to use for atomic access or subreg
+ conversion. */
+ mode1 = mode;
+
+ /* For the -fstrict-volatile-bitfields case, we must use the mode of the
+ field instead. */
if (GET_CODE (op0) == MEM
&& MEM_VOLATILE_P (op0)
&& GET_MODE_BITSIZE (GET_MODE (op0)) > 0
&& flag_strict_volatile_bitfields > 0)
-goto no_subreg_mode_swap;
+{
+ if (GET_MODE_BITSIZE (GET_MODE (op0)) > 0)
+ mode1 = GET_MODE (op0);
+ else if (target && GET_MODE_BITSIZE (GET_MODE (target)) > 0)
+ mode1 = GET_MODE (target);
+ else
+ mode1 = tmode;
+}
/* Only scalar integer modes can be converted via subregs. There is an
additional problem for FP modes here in that they can have a precision
which is different from the size. mode_for_size uses precision, but
we want a mode based on the size, so we must avoid calling it for FP
modes. */
- mode1 = mode;
- if (SCALAR_INT_MODE_P (tmode))
+ else if (SCALAR_INT_MODE_P (tmode))
{
enum machine_mode try_mode = mode_for_size (bitsize,
GET_MODE_CLASS (tmode), 0);
+
if (try_mode != BLKmode)
mode1 = try_mode;
}
@@ -1474,8 +1501,6 @@ extract_bit_field_1 (rtx str_rtx, unsign
return convert_extracted_bit_field (op0, mode, tmode, unsignedp);
}
- no_subreg_mode_swap:
-
/* Handle fields bigger than a word. */
if (bitsize > BITS_PER_WORD)
@@ -1694,12 +1719,24 @@ extract_fixed_bit_field (enum machine_mo
if (MEM_VOLATILE_P (op0)
&& flag_strict_volatile_bitfields > 0)
{
+ unsigned int modesize;
+
if (GET_MODE_BITSIZE (GET_MODE (op0)) > 0)
mode = GET_MODE (op0);
else if (target && GET_MODE_BITSIZE (GET_MODE (target)) > 0)
mode = GET_MODE (target);
else
mode = tmode;
+
+ /* Check for oversized or unaligned field that we can't read
+ with a single access of the required type, and fall back to
+ the default behavior. */
+ modesize = GET_MODE_BITSIZE (mode);
+ if (b
[patch 3/5] don't restrict bit range for -fstrict-volatile-bitfields
This patch fixes the PR23623 regression. In conjunction with part 2 of
the series, it also fixes the new volatile-bitfields-3.c test case.
As I noted in previous discussion, there might be a better place to
accomplish this effect, but hacking DECL_BIT_FIELD_REPRESENTATIVE can't
work because the volatile-ness may be coming from a qualifier on the
pointer or object from which the field is being extracted, rather than
from a volatile qualifier on the bit field decl. I think the choices
are to do it in get_bit_range (as in this patch), in the callers of
get_bit_range, or at the places where the bit range information is being
used.
-Sandra
2013-06-16 Sandra Loosemore
PR middle-end/23623
gcc/
* expr.c (get_bit_range): Handle flag_strict_volatile_bitfields.
Index: gcc/expr.c
===
--- gcc/expr.c (revision 199963)
+++ gcc/expr.c (working copy)
@@ -4508,6 +4508,16 @@ get_bit_range (unsigned HOST_WIDE_INT *b
gcc_assert (TREE_CODE (exp) == COMPONENT_REF);
+ /* If -fstrict-volatile-bitfields was given and this is a volatile
+ access, then we must ignore any DECL_BIT_FIELD_REPRESENTATIVE and
+ do the access in the mode of the field. */
+ if (TREE_THIS_VOLATILE (exp)
+ && flag_strict_volatile_bitfields > 0)
+{
+ *bitstart = *bitend = 0;
+ return;
+}
+
field = TREE_OPERAND (exp, 1);
repr = DECL_BIT_FIELD_REPRESENTATIVE (field);
/* If we do not have a DECL_BIT_FIELD_REPRESENTATIVE there is no
[patch 2/5] hoist -fstrict-volatile-bitfields test
This patch makes parallel changes to store_bit_field_1 and
extract_bit_field_1 to skip some register shortcuts if
-fstrict-volatile-bitfields applies. By itself, it doesn't fix any of
the new test cases added in part 5, but it's required in conjunction
with part 3 to make the new volatile-bitfields-3.c test pass on some
targets (specifically, x86_64).
This part of the patch series has already been approved, but since it's
probably not useful without the other pieces, I'm deferring checking it
in for now.
-Sandra
2013-06-16 Sandra Loosemore
gcc/
* expmed.c (store_bit_field_1): Skip both cheap register alternatives
if -fstrict-volatile-bitfields applies, not just the first one.
(extract_bit_field_1): Likewise.
Index: gcc/expmed.c
===
--- gcc/expmed.c (revision 199963)
+++ gcc/expmed.c (working copy)
@@ -810,15 +810,15 @@ store_bit_field_1 (rtx str_rtx, unsigned
return true;
/* If OP0 is a memory, try copying it to a register and seeing if a
- cheap register alternative is available. */
- if (MEM_P (op0))
+ cheap register alternative is available. Do not try these tricks if
+ -fstrict-volatile-bitfields is in effect, since they may not respect
+ the mode of the access. */
+ if (MEM_P (op0)
+ && !(MEM_VOLATILE_P (op0)
+ && flag_strict_volatile_bitfields > 0))
{
- /* Do not use unaligned memory insvs for volatile bitfields when
- -fstrict-volatile-bitfields is in effect. */
- if (!(MEM_VOLATILE_P (op0)
- && flag_strict_volatile_bitfields > 0)
- && get_best_mem_extraction_insn (&insv, EP_insv, bitsize, bitnum,
- fieldmode)
+ if (get_best_mem_extraction_insn (&insv, EP_insv, bitsize, bitnum,
+ fieldmode)
&& store_bit_field_using_insv (&insv, op0, bitsize, bitnum, value))
return true;
@@ -1592,14 +1592,14 @@ extract_bit_field_1 (rtx str_rtx, unsign
}
/* If OP0 is a memory, try copying it to a register and seeing if a
- cheap register alternative is available. */
- if (MEM_P (op0))
+ cheap register alternative is available. Do not try these tricks if
+ -fstrict-volatile-bitfields is in effect, since they may not respect
+ the mode of the access. */
+ if (MEM_P (op0)
+ && !(MEM_VOLATILE_P (op0) && flag_strict_volatile_bitfields > 0))
{
- /* Do not use extv/extzv for volatile bitfields when
- -fstrict-volatile-bitfields is in effect. */
- if (!(MEM_VOLATILE_P (op0) && flag_strict_volatile_bitfields > 0)
- && get_best_mem_extraction_insn (&extv, pattern, bitsize, bitnum,
- tmode))
+ if (get_best_mem_extraction_insn (&extv, pattern, bitsize, bitnum,
+ tmode))
{
rtx result = extract_bit_field_using_extv (&extv, op0, bitsize,
bitnum, unsignedp,
[patch 1/5] remove -fstrict-volatile-bitfields warnings and packedp flag
This patch does not fix any bugs; it just removes code that everyone now
seems to agree was a bad idea.
These changes have already been approved, but I'm deferring checking in
the patch until we have some agreement on the other patch pieces that
actually do fix bugs.
-Sandra
2013-06-16 Sandra Loosemore
gcc/
* expr.h (extract_bit_field): Remove packedp parameter.
* expmed.c (extract_fixed_bit_field): Remove packedp parameter
from forward declaration.
(store_split_bit_field): Remove packedp arg from calls to
extract_fixed_bit_field.
(extract_bit_field_1): Remove packedp parameter and packedp
argument from recursive calls and calls to extract_fixed_bit_field.
(extract_bit_field): Remove packedp parameter and corresponding
arg to extract_bit_field_1.
(extract_fixed_bit_field): Remove packedp parameter. Remove code
to issue warnings.
(extract_split_bit_field): Remove packedp arg from call to
extract_fixed_bit_field.
* expr.c (emit_group_load_1): Adjust calls to extract_bit_field.
(copy_blkmode_from_reg): Likewise.
(copy_blkmode_to_reg): Likewise.
(read_complex_part): Likewise.
(store_field): Likewise.
(expand_expr_real_1): Likewise.
* calls.c (store_unaligned_arguments_into_pseudos): Adjust call
to extract_bit_field.
* config/tilegx/tilegx.c (tilegx_expand_unaligned_load): Adjust call
to extract_bit_field.
* config/tilepro/tilepro.c (tilepro_expand_unaligned_load): Adjust call
to extract_bit_field.
* doc/invoke.texi (Code Gen Options): Remove mention of warnings
and special packedp behavior from -fstrict-volatile-bitfields
documentation.
Index: gcc/expr.h
===
--- gcc/expr.h (revision 199963)
+++ gcc/expr.h (working copy)
@@ -704,7 +704,7 @@ extern void store_bit_field (rtx, unsign
unsigned HOST_WIDE_INT,
enum machine_mode, rtx);
extern rtx extract_bit_field (rtx, unsigned HOST_WIDE_INT,
- unsigned HOST_WIDE_INT, int, bool, rtx,
+ unsigned HOST_WIDE_INT, int, rtx,
enum machine_mode, enum machine_mode);
extern rtx extract_low_bits (enum machine_mode, enum machine_mode, rtx);
extern rtx expand_mult (enum machine_mode, rtx, rtx, rtx, int);
Index: gcc/expmed.c
===
--- gcc/expmed.c (revision 199963)
+++ gcc/expmed.c (working copy)
@@ -54,7 +54,7 @@ static void store_split_bit_field (rtx,
rtx);
static rtx extract_fixed_bit_field (enum machine_mode, rtx,
unsigned HOST_WIDE_INT,
-unsigned HOST_WIDE_INT, rtx, int, bool);
+unsigned HOST_WIDE_INT, rtx, int);
static rtx mask_rtx (enum machine_mode, int, int, int);
static rtx lshift_value (enum machine_mode, rtx, int, int);
static rtx extract_split_bit_field (rtx, unsigned HOST_WIDE_INT,
@@ -1128,7 +1128,7 @@ store_split_bit_field (rtx op0, unsigned
endianness compensation) to fetch the piece we want. */
part = extract_fixed_bit_field (word_mode, value, thissize,
total_bits - bitsize + bitsdone,
- NULL_RTX, 1, false);
+ NULL_RTX, 1);
}
}
else
@@ -1140,7 +1140,7 @@ store_split_bit_field (rtx op0, unsigned
& (((HOST_WIDE_INT) 1 << thissize) - 1));
else
part = extract_fixed_bit_field (word_mode, value, thissize,
- bitsdone, NULL_RTX, 1, false);
+ bitsdone, NULL_RTX, 1);
}
/* If OP0 is a register, then handle OFFSET here.
@@ -1301,8 +1301,7 @@ extract_bit_field_using_extv (const extr
static rtx
extract_bit_field_1 (rtx str_rtx, unsigned HOST_WIDE_INT bitsize,
- unsigned HOST_WIDE_INT bitnum,
- int unsignedp, bool packedp, rtx target,
+ unsigned HOST_WIDE_INT bitnum, int unsignedp, rtx target,
enum machine_mode mode, enum machine_mode tmode,
bool fallback_p)
{
@@ -1517,7 +1516,7 @@ extract_bit_field_1 (rtx str_rtx, unsign
rtx result_part
= extract_bit_field_1 (op0, MIN (BITS_PER_WORD,
bitsize - i * BITS_PER_WORD),
- bitnum + bit_offset, 1, false, target_part,
+ bitnum + bit_offset, 1, target_part,
mode, word_mode, fallback_p);
gcc_assert (target_part);
@@ -1621,7 +1620,7 @@ extract_bit_field_1 (rtx str_rtx, unsign
{
xop0 = copy_to_reg (xop0);
rtx result = extract_bit_field_1 (xop0, bitsize, bitpos,
- unsignedp, packedp, target,
+ unsignedp, target,
mode, tmode, false);
if (result)
return result;
@@ -1641,7 +1640,7 @@ extract_bit_field_1 (rtx str_rtx, unsign
gcc_assert (int_mode != BLKmode);
target = extract_fixed_bit_field (int_mode, op0, bitsize, bitnum,
-target, unsignedp, packedp);
+target, unsignedp);
return convert_extracted_bit_field (target, mode, tmode, unsignedp);
}
@@ -1652,7 +1651,6 @@ extract_bit_field_1 (rtx str_rtx, unsign
STR_RTX is the structure containing the byte (a REG or MEM).
UNSIGNEDP is nonzero if this is an unsigned bit field.
- PAC
[patch 0/5] reimplement -fstrict-volatile-bitfields
The following series of 5 patches is intended to be identical in terms of code changes to the version I posted last week: http://gcc.gnu.org/ml/gcc-patches/2013-06/msg00750.html I have just split it up into pieces to make it easier to review: 1 remove -fstrict-volatile-bitfields warnings and packedp flag 2 hoist -fstrict-volatile-bitfields test 3 don't restrict bit range for -fstrict-volatile-bitfields 4 fix bugs with -fstrict-volatile-bitfields and packed structures 5 new -fstrict-volatile-bitfields test cases I tested the pieces in various combinations on arm-none-eabi and x86_64-linux-gnu targets. -Sandra
Re: [Patch, Fortran] Print floating-point exception status after STOP/ERROR STOP
* PING *
Minor change: Jakub suggested to print no exception status with older
gfortran programs. Hence, the library now defaults to 0. (Older programs
do not pass this argument to the library.) - I also updated
gfortran.texi for that change.
Tobias
On June 12, 2013 17:50, Tobias Burnus wrote:
Updated version:
* Uros suggestions are incorporated
* Changed from -f(no-)underflow-warning to
-ffpe-summary=[none,all,underflow,...]
Tobias Burnus wrote:
The attached patch causes gfortran-compiled programs to print
warnings like
Note: The following floating-point exception are signalling:
IEEE_DIVIDE_BY_ZERO
when STOP / ERROR STOP is invoked. That's required by Fortran 2008
(8.4 STOP and ERROR STOP statements):
"If any exception (14) is signaling on that image, the processor
shall issue a warning indicating which exceptions are signaling; this
warning shall be on the unit identified by the named constant ERROR
UNIT (13.8.2.8)."
One surely could extend it to allow to completely disable the warning
- or to make it more fine grained like "none", "all" plus all single
flags (including underflow, denormal and inexact, where by default
one leaves out inexact).
Thinking about it, I think that's the better solution: It makes
(optionally) inexact available and also allows to fully disable the
feature. I am sure that there are users who would like to have that
choice. Hence, I update the argument handling and libgfortran's stop.c.
Additions from the J3 list:
* IBM's "XLF compiler has an option to report fp exceptions including
underflow and inexact. It is default OFF."
(which matches ifort)
Build and regtested on x86-64-gnu-linux.
OK for the trunk?
Tobias
PS: I filled PR 57598 to track the warning handling for coarrays.
2013-06-16 Tobias Burnus
* gfortran.h (gfc_option_t): Add fpe_summary.
* gfortran.texi (_gfortran_set_options): Update.
* invoke.texi (-ffpe-summary): Add doc.
* lang.opt (ffpe-summary): Add flag.
* options.c (gfc_init_options, gfc_handle_option): Handle it.
(gfc_handle_fpe_option): Renamed from gfc_handle_fpe_trap_option,
also handle fpe_summary.
* trans-decl.c (create_main_function): Update
_gfortran_set_options call.
2013-06-16 Tobias Burnus
* libgfortran.h (compile_options_t) Add fpe_summary.
(get_fpu_except_flags): New prototype.
* runtime/compile_options.c (set_options, init_compile_options):
Handle fpe_summary.
* runtime/stop.c (report_exception): New function.
(stop_numeric, stop_numeric_f08, stop_string, error_stop_string,
error_stop_numeric): Call it.
* config/fpu-387.h (get_fpu_except_flags): New function.
* config/fpu-aix.h (get_fpu_except_flags): New function.
* config/fpu-generic.h (get_fpu_except_flags): New function.
* config/fpu-glibc.h (get_fpu_except_flags): New function.
* config/fpu-glibc.h (get_fpu_except_flags): New function.
* configure.ac: Check for fpxcp.h.
* configure: Regenerate.
* config.h.in: Regenerate.
diff --git a/gcc/fortran/gfortran.h b/gcc/fortran/gfortran.h
index 14da0af..c11ffdd 100644
--- a/gcc/fortran/gfortran.h
+++ b/gcc/fortran/gfortran.h
@@ -2303,6 +2303,7 @@ typedef struct
int flag_frontend_optimize;
int fpe;
+ int fpe_summary;
int rtcheck;
gfc_fcoarray coarray;
diff --git a/gcc/fortran/gfortran.texi b/gcc/fortran/gfortran.texi
index 4a31a77..ad8cacc 100644
--- a/gcc/fortran/gfortran.texi
+++ b/gcc/fortran/gfortran.texi
@@ -2846,7 +2846,7 @@ standard error. Default: @code{GFC_STD_F95_DEL | GFC_STD_LEGACY}.
Default: off.
@item @var{option}[3] @tab Unused.
@item @var{option}[4] @tab If non zero, enable backtracing on run-time
-errors. Default: off.
+errors. Default: off. (Default in the compiler: on.)
Note: Installs a signal handler and requires command-line
initialization using @code{_gfortran_set_args}.
@item @var{option}[5] @tab If non zero, supports signed zeros.
@@ -2855,13 +2855,21 @@ Default: enabled.
are (bitwise or-ed): GFC_RTCHECK_BOUNDS (1), GFC_RTCHECK_ARRAY_TEMPS (2),
GFC_RTCHECK_RECURSION (4), GFC_RTCHECK_DO (16), GFC_RTCHECK_POINTER (32).
Default: disabled.
+@item @var{option}[7] @tab Unused.
+@item @var{option}[8] @tab Show a warning when invoking @code{STOP} and
+@code{ERROR STOP} if a floating-point exception occurred. Possible values
+are (bitwise or-ed) @code{GFC_FPE_INVALID} (1), @code{GFC_FPE_DENORMAL} (2),
+@code{GFC_FPE_ZERO} (4), @code{GFC_FPE_OVERFLOW} (8),
+@code{GFC_FPE_UNDERFLOW} (16), @code{GFC_FPE_INEXACT} (32). Default: None (0).
+(Default in the compiler: @code{GFC_FPE_INVALID | GFC_FPE_DENORMAL |
+GFC_FPE_ZERO | GFC_FPE_OVERFLOW | GFC_FPE_UNDERFLOW}.)
@end multitable
@item @emph{Example}:
@smallexample
- /* Use gfortran 4.8 default options. */
- static int options[] = @{68, 511, 0, 0, 1, 1, 0@};
- _gfortran_set_options (7, &options);
+ /* Use gfortran 4.9 default options. */
+ static int options[] = @{68, 511, 0, 0, 1, 1, 0, 0, 31@};
+ _gfortran_set_options (9, &options);
@end smallexample
@end table
diff --git a
[C++ Patch] Remove finish_stmt
Hi,
lately doesn't appear to accomplish much. Tested x86_64-linux.
Thanks,
Paolo.
2013-06-17 Paolo Carlini
* cp-tree.h (finish_stmt): Do not declare.
* decl.c (finish_stmt): Do not define.
* parser.c (cp_parser_expression_statement,
cp_parser_declaration_statement,
cp_parser_transaction_cancel): Don't call finish_stmt.
* semantics.c (finish_expr_stmt, finish_if_stmt,
finish_while_stmt, finish_do_stmt, finish_return_stmt,
finish_for_stmt, finish_switch_stmt, finish_compound_stmt,
finish_transaction_stmt): Likewise.
Index: cp-tree.h
===
--- cp-tree.h (revision 200134)
+++ cp-tree.h (working copy)
@@ -5212,7 +5212,6 @@ extern tree grokmethod
(cp_decl_specifier_seq *
extern void maybe_register_incomplete_var (tree);
extern void maybe_commonize_var(tree);
extern void complete_vars (tree);
-extern void finish_stmt(void);
extern tree static_fn_type (tree);
extern void revert_static_member_fn(tree);
extern void fixup_anonymous_aggr (tree);
Index: decl.c
===
--- decl.c (revision 200134)
+++ decl.c (working copy)
@@ -14273,13 +14273,6 @@ cxx_maybe_build_cleanup (tree decl, tsubst_flags_t
}
-/* When a stmt has been parsed, this function is called. */
-
-void
-finish_stmt (void)
-{
-}
-
/* Return the FUNCTION_TYPE that corresponds to MEMFNTYPE, which can be a
FUNCTION_DECL, METHOD_TYPE, FUNCTION_TYPE, pointer or reference to
METHOD_TYPE or FUNCTION_TYPE, or pointer to member function. */
Index: parser.c
===
--- parser.c(revision 200134)
+++ parser.c(working copy)
@@ -9295,8 +9295,6 @@ cp_parser_expression_statement (cp_parser* parser,
statement = finish_stmt_expr_expr (statement, in_statement_expr);
else if (statement)
statement = finish_expr_stmt (statement);
- else
-finish_stmt ();
return statement;
}
@@ -10351,9 +10349,6 @@ cp_parser_declaration_statement (cp_parser* parser
/* Free any declarators allocated. */
obstack_free (&declarator_obstack, p);
-
- /* Finish off the statement. */
- finish_stmt ();
}
/* Some dependent statements (like `if (cond) statement'), are
@@ -28410,7 +28405,6 @@ cp_parser_transaction_cancel (cp_parser *parser)
stmt = build_tm_abort_call (token->location, is_outer);
add_stmt (stmt);
- finish_stmt ();
return stmt;
}
Index: semantics.c
===
--- semantics.c (revision 200134)
+++ semantics.c (working copy)
@@ -630,8 +630,6 @@ finish_expr_stmt (tree expr)
r = add_stmt (expr);
}
- finish_stmt ();
-
return r;
}
@@ -696,7 +694,6 @@ finish_if_stmt (tree if_stmt)
tree scope = IF_SCOPE (if_stmt);
IF_SCOPE (if_stmt) = NULL;
add_stmt (do_poplevel (scope));
- finish_stmt ();
}
/* Begin a while-statement. Returns a newly created WHILE_STMT if
@@ -729,7 +726,6 @@ void
finish_while_stmt (tree while_stmt)
{
WHILE_BODY (while_stmt) = do_poplevel (WHILE_BODY (while_stmt));
- finish_stmt ();
}
/* Begin a do-statement. Returns a newly created DO_STMT if
@@ -767,7 +763,6 @@ finish_do_stmt (tree cond, tree do_stmt)
{
cond = maybe_convert_cond (cond);
DO_COND (do_stmt) = cond;
- finish_stmt ();
}
/* Finish a return-statement. The EXPRESSION returned, if any, is as
@@ -804,7 +799,6 @@ finish_return_stmt (tree expr)
TREE_NO_WARNING (r) |= no_warning;
r = maybe_cleanup_point_expr_void (r);
r = add_stmt (r);
- finish_stmt ();
return r;
}
@@ -930,8 +924,6 @@ finish_for_stmt (tree for_stmt)
*scope_ptr = NULL;
add_stmt (do_poplevel (scope));
}
-
- finish_stmt ();
}
/* Begin a range-for-statement. Returns a new RANGE_FOR_STMT.
@@ -1065,7 +1057,6 @@ finish_switch_stmt (tree switch_stmt)
SWITCH_STMT_BODY (switch_stmt) =
pop_stmt_list (SWITCH_STMT_BODY (switch_stmt));
pop_switch ();
- finish_stmt ();
scope = SWITCH_STMT_SCOPE (switch_stmt);
SWITCH_STMT_SCOPE (switch_stmt) = NULL;
@@ -1287,7 +1278,6 @@ finish_compound_stmt (tree stmt)
/* ??? See c_end_compound_stmt wrt statement expressions. */
add_stmt (stmt);
- finish_stmt ();
}
/* Finish an asm-statement, whose components are a STRING, some
@@ -5197,7 +5187,6 @@ finish_transaction_stmt (tree stmt, tree compound_
if (compound_stmt)
finish_compound_stmt (compound_stmt);
- finish_stmt ();
}
/* Build a __transaction_atomic or __transaction_relaxed expression. If
[patch] fix libstdc++/57263
PR libstdc++/57263
* include/bits/forward_list.h (_Fwd_list_base): Convert to/from
allocator's pointer type.
* include/bits/hashtable.h (_Hashtable): Likewise.
* testsuite/util/testsuite_allocator.h (CustomPointerAlloc): Add.
* testsuite/23_containers/forward_list/allocator/ext_ptr.cc: New.
* testsuite/23_containers/unordered_set/allocator/ext_ptr.cc: New.
* testsuite/23_containers/vector/allocator/ext_ptr.cc: New.
Tested x86_64-linux, committed to trunk.
commit b4514c0c6f530fbbcc66a478b5ef45263907f1d3
Author: Jonathan Wakely
Date: Wed May 15 01:10:22 2013 +0100
PR libstdc++/57263
* include/bits/forward_list.h (_Fwd_list_base): Convert to/from
allocator's pointer type.
* include/bits/hashtable.h (_Hashtable): Likewise.
* testsuite/util/testsuite_allocator.h (CustomPointerAlloc): Add.
* testsuite/23_containers/forward_list/allocator/ext_ptr.cc: New.
* testsuite/23_containers/unordered_set/allocator/ext_ptr.cc: New.
* testsuite/23_containers/vector/allocator/ext_ptr.cc: New.
diff --git a/libstdc++-v3/include/bits/forward_list.h
b/libstdc++-v3/include/bits/forward_list.h
index e7c4bdd..c3cee97 100644
--- a/libstdc++-v3/include/bits/forward_list.h
+++ b/libstdc++-v3/include/bits/forward_list.h
@@ -338,7 +338,10 @@ _GLIBCXX_BEGIN_NAMESPACE_CONTAINER
_Node*
_M_get_node()
- { return _Node_alloc_traits::allocate(_M_get_Node_allocator(), 1); }
+ {
+ auto __ptr = _Node_alloc_traits::allocate(_M_get_Node_allocator(), 1);
+ return std::__addressof(*__ptr);
+ }
template
_Node*
@@ -367,7 +370,11 @@ _GLIBCXX_BEGIN_NAMESPACE_CONTAINER
void
_M_put_node(_Node* __p)
- { _Node_alloc_traits::deallocate(_M_get_Node_allocator(), __p, 1); }
+ {
+ typedef typename _Node_alloc_traits::pointer _Ptr;
+ auto __ptr = std::pointer_traits<_Ptr>::pointer_to(*__p);
+ _Node_alloc_traits::deallocate(_M_get_Node_allocator(), __ptr, 1);
+ }
_Fwd_list_node_base*
_M_erase_after(_Fwd_list_node_base* __pos);
diff --git a/libstdc++-v3/include/bits/hashtable.h
b/libstdc++-v3/include/bits/hashtable.h
index 0ff6e13..8ce264e 100644
--- a/libstdc++-v3/include/bits/hashtable.h
+++ b/libstdc++-v3/include/bits/hashtable.h
@@ -775,7 +775,8 @@ _GLIBCXX_BEGIN_NAMESPACE_VERSION
_H1, _H2, _Hash, _RehashPolicy, _Traits>::
_M_allocate_node(_Args&&... __args)
{
- __node_type* __n = _Node_alloc_traits::allocate(_M_node_allocator(), 1);
+ auto __nptr = _Node_alloc_traits::allocate(_M_node_allocator(), 1);
+ __node_type* __n = std::__addressof(*__nptr);
__try
{
_Value_alloc_type __a(_M_node_allocator());
@@ -786,7 +787,7 @@ _GLIBCXX_BEGIN_NAMESPACE_VERSION
}
__catch(...)
{
- _Node_alloc_traits::deallocate(_M_node_allocator(), __n, 1);
+ _Node_alloc_traits::deallocate(_M_node_allocator(), __nptr, 1);
__throw_exception_again;
}
}
@@ -800,10 +801,12 @@ _GLIBCXX_BEGIN_NAMESPACE_VERSION
_H1, _H2, _Hash, _RehashPolicy, _Traits>::
_M_deallocate_node(__node_type* __n)
{
+ typedef typename _Node_alloc_traits::pointer _Ptr;
+ auto __ptr = std::pointer_traits<_Ptr>::pointer_to(*__n);
_Value_alloc_type __a(_M_node_allocator());
_Value_alloc_traits::destroy(__a, __n->_M_valptr());
__n->~__node_type();
- _Node_alloc_traits::deallocate(_M_node_allocator(), __n, 1);
+ _Node_alloc_traits::deallocate(_M_node_allocator(), __ptr, 1);
}
template::
_M_deallocate_buckets(__bucket_type* __bkts, size_type __n)
{
+ typedef typename _Bucket_alloc_traits::pointer _Ptr;
+ auto __ptr = std::pointer_traits<_Ptr>::pointer_to(*__bkts);
_Bucket_alloc_type __alloc(_M_node_allocator());
- _Bucket_alloc_traits::deallocate(__alloc, __bkts, __n);
+ _Bucket_alloc_traits::deallocate(__alloc, __ptr, __n);
}
templatehttp://www.gnu.org/licenses/>.
+
+// { dg-options "-std=gnu++11" }
+
+#include
+#include
+#include
+#include
+
+struct T { int i; };
+bool operator==(const T& l, const T& r) { return l.i == r.i; }
+bool operator<(const T& l, const T& r) { return l.i < r.i; }
+
+using __gnu_test::CustomPointerAlloc;
+
+template class std::forward_list>;
+
+void test01()
+{
+ bool test __attribute__((unused)) = true;
+ typedef CustomPointerAlloc alloc_type;
+ typedef std::forward_list test_type;
+ test_type v;
+ v.push_front(T());
+ VERIFY( ++v.begin() == v.end() );
+}
+
+int main()
+{
+ test01();
+}
diff --git
a/libstdc++-v3/testsuite/23_containers/unordered_set/allocator/ext_ptr.cc
b/libstdc++-v3/testsuite/23_containers/unordered_set/allocator/ext_ptr.cc
new file mode 100644
index 000..55d9af3
--- /dev/null
+++ b/libstdc++-v3/testsuite/23_containers/unordered_set/all
Re: [PATCH] MIPS r5900, --with-llsc=?
Hello Richard, > > > >> >> > How much other changes will be currently accepted here? There is other > >> >> > stuff which I want to prepare and submit here, e.g.: > > > >> >> > 3. fix use of ll/sc in libgomp, either increase mips ISA level or use > >> >> > syscall (which is broken in Linux 2.6.35.4). > > > > The attached patch fixes problem 3. libgomp was not the cause of the > > problem. When linux is detected in gcc/config.gcc, the variable > > "with_llsc" is set to "yes". This happens before the CPU is checked. I > > fixed this by storing the original parameter. I think this is better > > than moving the code up. > > I think this shows that the current mips*-linux* targets are setting > with_llsc in the wrong place. They should be doing it further down, > where other with_foo defaults are set. > > Also, I only just noticed that VxWorks and R5900 were setting with_arch > in the with_cpu block. --with-cpu isn't supported/meaningful for MIPS. > > Is the second patch below OK for your target? (Not yet applied.) > > > The patch for gcc/config/mips/mips.h fixes that ".set mips2" wasn't used > > when with_llsc=yes was configured. > > > > The patch for gcc/config/mips/mips.c gets lld and scd working. These > > instructions are normally not emulated by the Linux kernel and the > > syscall only supports 32 bit. So I changed my kernel to support lld and > > scd. > > Looks good, thanks. I tweaked the mips.c change to follow coding > conventions and kept !TARGET_MIPS16 last. Yes, the patch is OK. Checked, tested and working. Best regards Jürgen
Aw: Re: [PATCH] Basic support for MIPS r5900
Hello Richard, > > The code is now completely moved into libgcc/config/mips/t-mips and > > libgcc/config/mips/lib2funcs.c (new file). > > The code should now be easier to understand. > > I used the code from libgcc/config/m32c as example (e.g. same file name > > lib2funcs.c). I copied the file header (LGPL) from a file which I > > believed to be new and correct. > > Thanks, this looks very clean. It's good that the new file compiles > to nothing for ISA_HAS_DMULT/ISA_HAS_DDIV targets. In that case though, > I think it should be added to LIB2ADD_ST rather than LIB2ADD. > Objects from LIB2ADD are included in libgcc.so, which needs to have > a stable interface, whereas LIB2ADD_ST is purely for libgcc.a, > where this kind of variation is OK. Regarding LIB2ADD vs. LIB2ADD_ST: At the moment I can't run a test with shared libraries, but it seems to work when linking a program using shared libraries. There is no undefined reference to __muldi3 when linking shared and using the toolchain for r5900. > Putting them in one file means they'll either all be pulled in or none will, > but I doubt the size is going to matter in practice, right? Besides, > that kind of thing could easily be tweaked later if it shows up as a problem. > > Also, I see you changed the patch so that mul3 tests ISA_HAS_MULT > in the C body rather than in the condition. Was that in response to my > previous comment about define_expand conditions? Yes. > Your first version was > right because mul3 is a public pattern that's exposed to optabs > (insn-opinit.c tests HAVE_mul3). The other two define_expands > you mentioned are private to the MIPS port though and we never use > HAVE_* for them. We only use them from places where the insns are > already known to be valid. OK, now I know the missing details. > The ISA_HAS_DMUL3 part was redundant, sorry for not noticing it last time. Yes, I thought it must be changed, but you are right. > Does it still work with those changes, as below? If so, I'll check it in. I tested it. It is still working. So the patch is OK, please check it in. Best regards Jürgen
[patch] proposed fix for libstdc++/54352
In order to conform to [thread.condition.condvarany]/5 and fix this
PR we need an ABI change to std::condition_variable_any, so that its
internal mutex can outlive the condition_variable_any while there are
threads blocked on the mutex, which this patch does by using a
shared_ptr to hold the mutex and making waiting threads share
ownership of that mutex.
The ABI change is handled similarly to the recent chrono::steady_clock
changes, using an inline namespace for the new versions and continuing
to export the old version from the library for compatibility with old
code.
Any thoughts or suggestions on improving this before I commit it to trunk?
I can no longer reproduce the valgrind errors, except by hacking in
changes to std::mutex to cause races, so I haven't been able to write
a test case that fails without this change, but I believe it's still
necessary for correctness.
PR libstdc++/54352
* include/std/condition_variable (condition_variable_any): Move into
inline namespace _V2 and replace mutex member with shared_ptr.
* src/c++11/condition_variable.cc (condition_variable_any): Move
definitions to ...
* src/c++11/compatibility-condvar.cc (condition_variable_any): Here.
* src/Makefile.am: Add new source file.
* src/Makefile.in: Regenerate.
commit 60d115e1b9631adf1476a77c71224257a7c5ca7d
Author: Jonathan Wakely
Date: Sun Jun 16 12:38:32 2013 +0100
PR libstdc++/54352
* include/std/condition_variable (condition_variable_any): Move into
inline namespace _V2 and replace mutex member with shared_ptr.
* src/c++11/condition_variable.cc (condition_variable_any): Move
definitions to ...
* src/c++11/compatibility-condvar.cc (condition_variable_any): Here.
* src/Makefile.am: Add new source file.
* src/Makefile.in: Regenerate.
diff --git a/libstdc++-v3/include/std/condition_variable
b/libstdc++-v3/include/std/condition_variable
index 5284655..76a6e94 100644
--- a/libstdc++-v3/include/std/condition_variable
+++ b/libstdc++-v3/include/std/condition_variable
@@ -36,7 +36,12 @@
#else
#include
-#include // unique_lock
+#include
+#include
+#include
+#include
+#include
+#include
#if defined(_GLIBCXX_HAS_GTHREADS) && defined(_GLIBCXX_USE_C99_STDINT_TR1)
@@ -165,13 +170,15 @@ _GLIBCXX_BEGIN_NAMESPACE_VERSION
}
};
+ inline namespace _V2 {
+
/// condition_variable_any
// Like above, but mutex is not required to have try_lock.
class condition_variable_any
{
typedef chrono::system_clock __clock_t;
condition_variable _M_cond;
-mutex _M_mutex;
+shared_ptr _M_mutex;
// scoped unlock - unlocks in ctor, re-locks in dtor
template
@@ -194,9 +201,8 @@ _GLIBCXX_BEGIN_NAMESPACE_VERSION
};
public:
-
-condition_variable_any() noexcept;
-~condition_variable_any() noexcept;
+condition_variable_any() : _M_mutex(std::make_shared()) { }
+~condition_variable_any() = default;
condition_variable_any(const condition_variable_any&) = delete;
condition_variable_any& operator=(const condition_variable_any&) = delete;
@@ -204,14 +210,14 @@ _GLIBCXX_BEGIN_NAMESPACE_VERSION
void
notify_one() noexcept
{
- lock_guard __lock(_M_mutex);
+ lock_guard __lock(*_M_mutex);
_M_cond.notify_one();
}
void
notify_all() noexcept
{
- lock_guard __lock(_M_mutex);
+ lock_guard __lock(*_M_mutex);
_M_cond.notify_all();
}
@@ -219,10 +225,11 @@ _GLIBCXX_BEGIN_NAMESPACE_VERSION
void
wait(_Lock& __lock)
{
- unique_lock __my_lock(_M_mutex);
+ shared_ptr __mutex = _M_mutex;
+ unique_lock __my_lock(*__mutex);
_Unlock<_Lock> __unlock(__lock);
- // _M_mutex must be unlocked before re-locking __lock so move
- // ownership of _M_mutex lock to an object with shorter lifetime.
+ // *__mutex must be unlocked before re-locking __lock so move
+ // ownership of *__mutex lock to an object with shorter lifetime.
unique_lock __my_lock2(std::move(__my_lock));
_M_cond.wait(__my_lock2);
}
@@ -241,10 +248,11 @@ _GLIBCXX_BEGIN_NAMESPACE_VERSION
wait_until(_Lock& __lock,
const chrono::time_point<_Clock, _Duration>& __atime)
{
- unique_lock __my_lock(_M_mutex);
+ shared_ptr __mutex = _M_mutex;
+ unique_lock __my_lock(*__mutex);
_Unlock<_Lock> __unlock(__lock);
- // _M_mutex must be unlocked before re-locking __lock so move
- // ownership of _M_mutex lock to an object with shorter lifetime.
+ // *__mutex must be unlocked before re-locking __lock so move
+ // ownership of *__mutex lock to an object with shorter lifetime.
unique_lock __my_lock2(std::move(__my_lock));
return _M_cond.wait_until(__my_lock2, __atime);
}
@@ -275,
Re: RFA: Fix rtl-optimization/57425
Quoting Eric Botcazou :
Could you also check that your patch also fixes PR opt/57569 and, if so, add
the reference to the ChangeLog as well as the testcase?
Attached is what I'm currently testing. bootstrap on i686-pc-linux-gnu
finished, now regtesting.
On x86_64-pc-linux-gnu, bootstrap is still in progress & I also still have
to verify if the pr57569.c testcase FAILs/PASSes for unpatched/patched
svn trunk.
2013-06-15 Joern Rennecke
gcc:
PR rtl-optimization/57425
PR rtl-optimization/57569
* alias.c (write_dependence_p): Add new parameters mem_size,
canon_mem_addr and mem_canonicalized. Change type of writep to bool.
Changed all callers.
(canon_anti_dependence): New function.
* cse.c (check_dependence): Use canon_anti_dependence.
* cselib.c (cselib_invalidate_mem): Likewise.
* rtl.h (canon_anti_dependence): Declare.
gcc/testsuite:
PR rtl-optimization/57425
PR rtl-optimization/57569
* gcc.dg/torture/pr57425-1.c, gcc.dg/torture/pr57425-2.c: New files.
* gcc.dg/torture/pr57425-3.c, gcc.dg/torture/pr57569.c: Likewise.
Index: alias.c
===
--- alias.c (revision 200126)
+++ alias.c (working copy)
@@ -156,7 +156,8 @@ static int insert_subset_children (splay
static alias_set_entry get_alias_set_entry (alias_set_type);
static bool nonoverlapping_component_refs_p (const_rtx, const_rtx);
static tree decl_for_component_ref (tree);
-static int write_dependence_p (const_rtx, const_rtx, int);
+static int write_dependence_p (const_rtx, enum machine_mode, rtx, const_rtx,
+ bool, bool);
static void memory_modified_1 (rtx, const_rtx, void *);
@@ -2553,15 +2554,22 @@ canon_true_dependence (const_rtx mem, en
}
/* Returns nonzero if a write to X might alias a previous read from
- (or, if WRITEP is nonzero, a write to) MEM. */
+ (or, if WRITEP is true, a write to) MEM.
+ If MEM_CANONCALIZED is nonzero, CANON_MEM_ADDR is the canonicalized
+ address of MEM, and MEM_MODE the mode for that access. */
static int
-write_dependence_p (const_rtx mem, const_rtx x, int writep)
+write_dependence_p (const_rtx mem, enum machine_mode mem_mode,
+ rtx canon_mem_addr, const_rtx x,
+ bool mem_canonicalized, bool writep)
{
rtx x_addr, mem_addr;
rtx base;
int ret;
+ gcc_checking_assert (mem_canonicalized ? (canon_mem_addr != NULL_RTX)
+ : (canon_mem_addr == NULL_RTX && mem_mode == VOIDmode));
+
if (MEM_VOLATILE_P (x) && MEM_VOLATILE_P (mem))
return 1;
@@ -2612,9 +2620,15 @@ write_dependence_p (const_rtx mem, const
return 0;
x_addr = canon_rtx (x_addr);
- mem_addr = canon_rtx (mem_addr);
+ if (mem_canonicalized)
+mem_addr = canon_mem_addr;
+ else
+{
+ mem_addr = canon_rtx (mem_addr);
+ mem_mode = GET_MODE (mem);
+}
- if ((ret = memrefs_conflict_p (SIZE_FOR_MODE (mem), mem_addr,
+ if ((ret = memrefs_conflict_p (GET_MODE_SIZE (mem_mode), mem_addr,
SIZE_FOR_MODE (x), x_addr, 0)) != -1)
return ret;
@@ -2629,7 +2643,20 @@ write_dependence_p (const_rtx mem, const
int
anti_dependence (const_rtx mem, const_rtx x)
{
- return write_dependence_p (mem, x, /*writep=*/0);
+ return write_dependence_p (mem, VOIDmode, NULL_RTX, x,
+/*mem_canonicalized=*/false, /*writep=*/false);
+}
+
+/* Likewise, but we already have a canonicalized MEM_ADDR for MEM.
+ Also, consider MEM in MEM_MODE (which might be from an enclosing
+ STRICT_LOW_PART / ZERO_EXTRACT). */
+
+int
+canon_anti_dependence (const_rtx mem, enum machine_mode mem_mode,
+ rtx mem_addr, const_rtx x)
+{
+ return write_dependence_p (mem, mem_mode, mem_addr, x,
+/*mem_canonicalized=*/true, /*writep=*/false);
}
/* Output dependence: X is written after store in MEM takes place. */
@@ -2637,7 +2664,8 @@ anti_dependence (const_rtx mem, const_rt
int
output_dependence (const_rtx mem, const_rtx x)
{
- return write_dependence_p (mem, x, /*writep=*/1);
+ return write_dependence_p (mem, VOIDmode, NULL_RTX, x,
+/*mem_canonicalized=*/false, /*writep=*/true);
}
Index: cse.c
===
--- cse.c (revision 200126)
+++ cse.c (working copy)
@@ -1824,7 +1824,7 @@ flush_hash_table (void)
}
}
-/* Function called for each rtx to check whether true dependence exist. */
+/* Function called for each rtx to check whether an anti dependence exist. */
struct check_dependence_data
{
enum machine_mode mode;
@@ -1837,7 +1837,7 @@ check_dependence (rtx *x, void *data)
{
struct check_dependence_data *d = (struct check_dependence_data *) data;
if (*x && MEM_P (*x))
-return canon_true_dependence (d->exp, d->mode, d->addr, *x, NULL_RT
Re: RFA: Fix rtl-optimization/57425
Quoting Eric Botcazou : The patch is OK on principle but I think that we should use the same interface for write_dependence_p as for true_dependence_1, i.e. add a mem_mode parameter instead of a mem_size and add both mem_addr and mem_canonicalized (and since it doesn't seem that we need x_addr for now, let's set it aside). Btw I agree that the interface is probably not optimal, but it has been there for a while. Well, I see some merit in the way true_dependence_1 does it with regards to the opportunities that this allows function cloning / specialization, it just thought that the tiny speed benefit it could bring to write_dependence_p didn't justify the extra code and churn to have this - or an enum parameter to distinguish the three cases. Using DEP_ANTI / DEP_OUTPUT from sched-int.h would mean unwanted dependencies, so it'd be a new ad-hoc enum... . OK, so if we go with consistency with a bool mem_canonicalized, I suppose I should also make writep bool, i.e.: static int write_dependence_p (const_rtx mem, unsigned mem_size, rtx canon_mem_addr, const_rtx x, bool mem_canonicalized, bool writep)
Re: [patch] Improve debug info for small structures passed by reference
On Sun, Jun 16, 2013 at 12:51:25PM +0200, Eric Botcazou wrote: > the subject is slightly misleading since it's actually about structures with > integral modes which are passed by reference on some platforms, e.g. SPARC or > PowerPC 32-bit. There are 3 issues: > > 1. At -O0, the parameters of this kind are not homed on the stack, which > means that backtraces can display for them. > > 2. Since the fix for PR debug/48163, the locations emitted at -O1 and above > for them are totally bogus (there is a bogus additional dereference). > > 3. The location lists are quickly wrong for them because they fail to take > into account that the register parameter is clobbered. > > The attached patch addresses 1. and 2. fully and 3. partially (for now). It > has been tested on x86-64 and PowerPC/Linux. OK for the mainline? This really should come with testcases (e.g. guality ones). Jakub
Re: [PATCH 4/4] Fix leading spaces.
On Sat, Jun 15, 2013 at 05:13:31PM +0800, Chung-Ju Wu wrote: > 2013/6/14 Joseph S. Myers : > > On Thu, 13 Jun 2013, Richard Biener wrote: > > > >> Btw, rather than these kind of patches I'd appreciate if someone would look > >> at a simple pre(post?)-commit hook that enforces those whitespace rules. > > > > In the cpp testsuite we definitely want tests with bad whitespace (e.g. > > gcc.dg/cpp/backslash*.c) and generally I think it's wrong to be changing > > whitespace in the testsuite without an understanding of what the test is > > testing and how the whitespace is irrelevant to that (more generally, > > cleanups of compiler tests are suspect without such an understanding of > > what is or is not significant in a particular test). And so you need to > > allow addition of otherwise bad whitespace there. > > > > It's not obvious whether there might be other cases needing such > > whitespace as well. > > > >> Either by adjusting the committed content or by rejecting the commit(?) > > > > I don't think hooks adjusting committed content are likely to work at all. > > > > -- > > Joseph S. Myers > > jos...@codesourcery.com > > By having a look at Ondřej's patch, it is nice to fix existing > codes with proper whitespace/tab rules. > > But it covers too much under whole gcc source tree. > Like Joseph said, we may accidentally change the cases > that need bad whitespace. > > Perhaps we should gradually fix them? i.e. We can only fix > leading spaces for some obvious cases (gcc/*.c gcc/c-family/*.c ...), > leaving other source (gcc/testsuite/* gcc/config/* ...) untouched. > I uploaded new version that touches only gcc/*.[ch] gcc/c-family/*.[ch] to http://kam.mff.cuni.cz/~ondra/stylepp.tar.bz2 patches are also updated. Anyway what in gcc/config/*.c depends on leading/trailing spaces? To enable which directories it can touch use patch like following one. --- gcc/.indent.on |1 + gcc/c-family/.indent.on |1 + 2 files changed, 2 insertions(+) create mode 100644 gcc/.indent.on create mode 100644 gcc/c-family/.indent.on diff --git a/gcc/.indent.on b/gcc/.indent.on new file mode 100644 index 000..48cdce8 --- /dev/null +++ b/gcc/.indent.on @@ -0,0 +1 @@ +placeholder diff --git a/gcc/c-family/.indent.on b/gcc/c-family/.indent.on new file mode 100644 index 000..48cdce8 --- /dev/null +++ b/gcc/c-family/.indent.on @@ -0,0 +1 @@ +placeholder -- 1.7.10.4
[patch] Improve debug info for small structures passed by reference
Hi,
the subject is slightly misleading since it's actually about structures with
integral modes which are passed by reference on some platforms, e.g. SPARC or
PowerPC 32-bit. There are 3 issues:
1. At -O0, the parameters of this kind are not homed on the stack, which
means that backtraces can display for them.
2. Since the fix for PR debug/48163, the locations emitted at -O1 and above
for them are totally bogus (there is a bogus additional dereference).
3. The location lists are quickly wrong for them because they fail to take
into account that the register parameter is clobbered.
The attached patch addresses 1. and 2. fully and 3. partially (for now). It
has been tested on x86-64 and PowerPC/Linux. OK for the mainline?
2013-06-16 Eric Botcazou
* function.c (assign_parm_setup_reg): For a parameter passed by pointer
and which can live in a register, always retrieve the value on entry.
* var-tracking.c (add_stores): Treat the copy on entry for a parameter
passed by invisible reference specially.
(emit_notes_in_bb) : Emit notes before the instruction.
(vt_add_function_parameter): Correctly deal with a parameter passed by
invisible reference.
--
Eric BotcazouIndex: function.c
===
--- function.c (revision 200122)
+++ function.c (working copy)
@@ -3084,17 +3084,27 @@ assign_parm_setup_reg (struct assign_par
emit_move_insn (parmreg, validated_mem);
/* If we were passed a pointer but the actual value can safely live
- in a register, put it in one. */
- if (data->passed_pointer
- && TYPE_MODE (TREE_TYPE (parm)) != BLKmode
- /* If by-reference argument was promoted, demote it. */
- && (TYPE_MODE (TREE_TYPE (parm)) != GET_MODE (DECL_RTL (parm))
- || use_register_for_decl (parm)))
+ in a register, retrieve it and use it directly. */
+ if (data->passed_pointer && TYPE_MODE (TREE_TYPE (parm)) != BLKmode)
{
/* We can't use nominal_mode, because it will have been set to
Pmode above. We must use the actual mode of the parm. */
- parmreg = gen_reg_rtx (TYPE_MODE (TREE_TYPE (parm)));
- mark_user_reg (parmreg);
+ if (use_register_for_decl (parm))
+ {
+ parmreg = gen_reg_rtx (TYPE_MODE (TREE_TYPE (parm)));
+ mark_user_reg (parmreg);
+ }
+ else
+ {
+ int align = STACK_SLOT_ALIGNMENT (TREE_TYPE (parm),
+ TYPE_MODE (TREE_TYPE (parm)),
+ TYPE_ALIGN (TREE_TYPE (parm)));
+ parmreg
+ = assign_stack_local (TYPE_MODE (TREE_TYPE (parm)),
+ GET_MODE_SIZE (TYPE_MODE (TREE_TYPE (parm))),
+ align);
+ set_mem_attributes (parmreg, parm, 1);
+ }
if (GET_MODE (parmreg) != GET_MODE (DECL_RTL (parm)))
{
Index: var-tracking.c
===
--- var-tracking.c (revision 200122)
+++ var-tracking.c (working copy)
@@ -5836,7 +5836,24 @@ add_stores (rtx loc, const_rtx expr, voi
{
rtx xexpr = gen_rtx_SET (VOIDmode, loc, src);
if (same_variable_part_p (src, REG_EXPR (loc), REG_OFFSET (loc)))
- mo.type = MO_COPY;
+ {
+ /* If this is an instruction copying (part of) a parameter
+ passed by invisible reference to its register location,
+ pretend it's a SET so that the initial memory location
+ is discarded, as the parameter register can be reused
+ for other purposes and we do not track locations based
+ on generic registers. */
+ if (MEM_P (src)
+ && REG_EXPR (loc)
+ && TREE_CODE (REG_EXPR (loc)) == PARM_DECL
+ && DECL_MODE (REG_EXPR (loc)) != BLKmode
+ && MEM_P (DECL_INCOMING_RTL (REG_EXPR (loc)))
+ && XEXP (DECL_INCOMING_RTL (REG_EXPR (loc)), 0)
+ != arg_pointer_rtx)
+ mo.type = MO_SET;
+ else
+ mo.type = MO_COPY;
+ }
else
mo.type = MO_SET;
mo.u.loc = xexpr;
@@ -9086,7 +9103,7 @@ emit_notes_in_bb (basic_block bb, datafl
else
var_mem_set (set, loc, VAR_INIT_STATUS_UNINITIALIZED, NULL);
- emit_notes_for_changes (insn, EMIT_NOTE_AFTER_INSN, set->vars);
+ emit_notes_for_changes (insn, EMIT_NOTE_BEFORE_INSN, set->vars);
}
break;
@@ -9533,12 +9550,11 @@ vt_add_function_parameter (tree parm)
if (!vt_get_decl_and_offset (incoming, &decl, &offset))
{
- if (REG_P (incoming) || MEM_P (incoming))
+ if (MEM_P (incoming))
{
/* This means argument is passed by invisible reference. */
offset = 0;
decl = parm;
- incoming = gen_rtx_MEM (GET_MODE (decl_rtl), incoming);
}
else
{
Re: [PATCH 0/4] Fix leading and trailing whitespaces.
On Wed, Jun 12, 2013 at 10:30:40PM +0200, Marc Glisse wrote: > On Wed, 12 Jun 2013, Ondřej Bílka wrote: > > >I am writing a tool to fix common style issues. > > > >This is first part which deals with leading and trailing whitespaces. > >I can follow this up with other refactorings, for example rewriting > >K&R definitions. > > Bonus points for asking first ;-) > > >2013-06-12 OndÅej BÃlka > > > > * gcc/alias.c: Formatted by trailing_space. > > * gcc/asan.c: Likewise. > > No gcc/ before the file names. > > > * gcc/cp/call.c: Likewise. > > There is a separate ChangeLog for this directory (same for testsuite, etc). > I had several assumptions in generator. Fixed now.
Re: RFA: Fix rtl-optimization/57425
> Bootstrapped/regtested on i686-pc-linux-gnu. For the record, and as you diagnosed, the change proposed in http://gcc.gnu.org/ml/gcc-patches/2012-06/msg00367.html means that we must now be very careful with memory dependency checking in the various RTL optimization passes. Another example is PR rtl-opt/57569. The patch is OK on principle but I think that we should use the same interface for write_dependence_p as for true_dependence_1, i.e. add a mem_mode parameter instead of a mem_size and add both mem_addr and mem_canonicalized (and since it doesn't seem that we need x_addr for now, let's set it aside). Btw I agree that the interface is probably not optimal, but it has been there for a while. Could you also check that your patch also fixes PR opt/57569 and, if so, add the reference to the ChangeLog as well as the testcase? Thanks for working on this. -- Eric Botcazou
Re: [PATCH] MIPS r5900, --with-llsc=?
"Jürgen Urban" writes:
> Hello Richard,
>
>> >> > How much other changes will be currently accepted here? There is other
>> >> > stuff which I want to prepare and submit here, e.g.:
>
>> >> > 3. fix use of ll/sc in libgomp, either increase mips ISA level or use
>> >> > syscall (which is broken in Linux 2.6.35.4).
>
> The attached patch fixes problem 3. libgomp was not the cause of the
> problem. When linux is detected in gcc/config.gcc, the variable
> "with_llsc" is set to "yes". This happens before the CPU is checked. I
> fixed this by storing the original parameter. I think this is better
> than moving the code up.
I think this shows that the current mips*-linux* targets are setting
with_llsc in the wrong place. They should be doing it further down,
where other with_foo defaults are set.
Also, I only just noticed that VxWorks and R5900 were setting with_arch
in the with_cpu block. --with-cpu isn't supported/meaningful for MIPS.
Is the second patch below OK for your target? (Not yet applied.)
> The patch for gcc/config/mips/mips.h fixes that ".set mips2" wasn't used
> when with_llsc=yes was configured.
>
> The patch for gcc/config/mips/mips.c gets lld and scd working. These
> instructions are normally not emulated by the Linux kernel and the
> syscall only supports 32 bit. So I changed my kernel to support lld and
> scd.
Looks good, thanks. I tweaked the mips.c change to follow coding
conventions and kept !TARGET_MIPS16 last. Applied as follows.
Thanks,
Richard
[Applied patch]
gcc/
2013-06-16 Jürgen Urban
* config/mips/mips.h (ISA_HAS_LL_SC): Exclude TARGET_MIPS5900.
* config/mips/mips.c (mips_start_ll_sc_sync_block): Output
".set mips3" for 64-bit targets.
Index: gcc/config/mips/mips.h
===
--- gcc/config/mips/mips.h 2013-06-16 10:04:33.151622456 +0100
+++ gcc/config/mips/mips.h 2013-06-16 10:12:52.265346985 +0100
@@ -1063,7 +1063,7 @@ #define GENERATE_SYNC \
/* ISA includes ll and sc. Note that this implies ISA_HAS_SYNC
because the expanders use both ISA_HAS_SYNC and ISA_HAS_LL_SC
instructions. */
-#define ISA_HAS_LL_SC (mips_isa >= 2 && !TARGET_MIPS16)
+#define ISA_HAS_LL_SC (mips_isa >= 2 && !TARGET_MIPS5900 && !TARGET_MIPS16)
#define GENERATE_LL_SC \
(target_flags_explicit & MASK_LLSC \
? TARGET_LLSC && !TARGET_MIPS16 \
Index: gcc/config/mips/mips.c
===
--- gcc/config/mips/mips.c 2013-06-16 10:04:33.151622456 +0100
+++ gcc/config/mips/mips.c 2013-06-16 10:12:57.717387243 +0100
@@ -12463,7 +12463,10 @@ mips_start_ll_sc_sync_block (void)
if (!ISA_HAS_LL_SC)
{
output_asm_insn (".set\tpush", 0);
- output_asm_insn (".set\tmips2", 0);
+ if (TARGET_64BIT)
+ output_asm_insn (".set\tmips3", 0);
+ else
+ output_asm_insn (".set\tmips2", 0);
}
}
[Suggested config.gcc patch]
gcc/
* config.gcc (mips*-mti-linux*, mips64*-*-linux*, mipsisa64*-*-linux*)
(mips*-*-linux*): Move default with_llsc setting to where other
defaults are set.
(mips*-*-vxworks*): Move with_arch default from with_cpu block to
with_arch block.
(mips64r5900-*-*, mips64r5900el-*-*, mipsr5900-*-*, mipsr5900el-*-*):
Likewise. Remove default with_tune setting. Move default float
setting to its own block. Handle with_llsc in the same block as above.
Index: gcc/config.gcc
===
--- gcc/config.gcc 2013-06-16 09:41:57.518019616 +0100
+++ gcc/config.gcc 2013-06-16 09:59:57.660470388 +0100
@@ -1813,7 +1813,6 @@ mips*-mti-linux*)
tm_defines="${tm_defines} MIPS_ISA_DEFAULT=33 MIPS_ABI_DEFAULT=ABI_32"
gnu_ld=yes
gas=yes
- test x$with_llsc != x || with_llsc=yes
;;
mips64*-*-linux* | mipsisa64*-*-linux*)
tm_file="dbxelf.h elfos.h gnu-user.h linux.h glibc-stdint.h ${tm_file} mips/gnu-user.h mips/gnu-user64.h mips/linux64.h mips/linux-common.h"
@@ -1834,7 +1833,6 @@ mips64*-*-linux* | mipsisa64*-*-linux*)
esac
gnu_ld=yes
gas=yes
- test x$with_llsc != x || with_llsc=yes
;;
mips*-*-linux*)# Linux MIPS, either endian.
tm_file="dbxelf.h elfos.h gnu-user.h linux.h glibc-stdint.h ${tm_file} mips/gnu-user.h mips/linux.h"
@@ -1850,7 +1848,6 @@ mips*-*-linux*)# Linux MIPS, either
mipsisa32*)
tm_defines="${tm_defines} MIPS_ISA_DEFAULT=32"
esac
- test x$with_llsc != x || with_llsc=yes
;;
mips*-mti-elf*)
tm_file="elfos.h newlib-stdint.h ${tm_file} mips/elf.h mips/sde.h mips/mti-elf.h"
@@ -2982,22 +2979,6 @@ if test x$with_cpu = x ; then
;;
esac
;;
-mips64r5900-*-* | mips64r5900el-*-* | mipsr5900-*-* | mipsr5900el-*-*)
- with_arch=r5900
- with_tune=r5900
- if test x$with_llsc = x; then
- # r5900 doesn't support ll, sc, lld and scd instructions:
- with_ll
Re: [PATCH] Proof of concept: multiple gc heaps
On Fri, Jun 14, 2013 at 11:21:06PM -0400, David Malcolm wrote:
> I'm hoping that gcc 4.9 can support multiple "parallel universes" of gcc
> state within one process, to ultimately support gcc usage as a library,
> where multiple client threads can each have their own gcc context (or
> "universe").
>
> One issue with the above is the garbage collector.
>
> I think there are two possible ways in which "universe instances" could
> interact with the GC:
>
> (a) have the universe instances be GC-managed: all parallel universes
> share the same heap, requiring a rewrite of the GC code to be
> thread-safe,
>
> or
>
> (b) have the "universe instance"/context manage GC, so that the state of
> GC is per-universe: each universe has its own GC heap, entirely
> independent of each other universe's GC heap. You can't share GC
> pointers between universes.
>
> I don't think (a) is feasible.
I agree, but what would be the purpose to run many threads of GCC in parallel
which don't share anything?
At the very least, I would expect predefined global trees to be common to all
of them.
I'm thinking at least of The global_trees array.
And don't forget plugins, which can (and do, for MELT) run the Ggc collector,
and use the
PLUGIN_GGC_START, PLUGIN_GGC_MARKING, PLUGIN_GGC_END
I do think that making (in the long term) GCC usable as a library (like LLVM
is) is a
worthwhile goal, but I don't think that aiming that future library to be
multi-threadable
(or thread-friendly) is very realistic. At least, we should make the two goals
separate:
first, make GCC a library, then (and later) make that library thread friendly.
So I might not be very happy of your patch
Regards.
--
Basile STARYNKEVITCH http://starynkevitch.net/Basile/
email: basilestarynkevitchnet mobile: +33 6 8501 2359
8, rue de la Faiencerie, 92340 Bourg La Reine, France
*** opinions {are only mines, sont seulement les miennes} ***
