RE: [PATCH] Set default to -fomit-frame-pointer

2017-11-10 Thread James Bowman
Andreas Schwab wrote:
>> Joseph Myers wrote:
>>> On Fri, 3 Nov 2017, Wilco Dijkstra wrote:
>>>
>>> > Almost all targets add an explict -fomit-frame-pointer in the target 
>>> > specific
>>> > options.  Rather than doing this in a target-specific way, do this in the
>>>
>>> Which targets do not?  You should explicitly list them and CC their
>>> maintainers and seek confirmation that such a change is appropriate for
>>> them.
>>
>> The targets that don't explicitly enable -fomit-frame-pointer in the target
>> options or force it internally are bfin, ft32, h8300, m68k - I've CCd the
>> maintainers (it seems there is no-one for h8300).
>
>For m68k, adding -fomit-frame-pointer by default is ok.

For ft32, adding -fomit-frame-pointer by default is ok.

James.


Re: [PATCH, Fortran] Fix PR 82886 - ICE with -finit-derived in gfc_conv_expr

2017-11-10 Thread Fritz Reese
On Fri, Nov 10, 2017 at 6:40 PM, Steve Kargl
 wrote:
> On Fri, Nov 10, 2017 at 04:35:56PM -0500, Fritz Reese wrote:
>> My mistake, the patch file should not have the random changes to
>> libiberty/functions.texi. Not sure how that ended up there.
>> >
>> > PR fortran/82886
>> > gcc/fortran/
>> > * gfortran.h (gfc_build_init_expr): New prototype.
>> > * invoke.texi (finit-derived): Update documentation.
>> > * expr.c (gfc_build_init_expr): New, from 
>> > gfc_build_default_init_expr.
>> > (gfc_build_default_init_expr): Redirect to 
>> > gfc_build_init_expr(,,false)
>> > (component_initializer): Force building initializers using
>> > gfc_build_init_expr(,,true).
>> >
>> > PR fortran/82886
>> > * gcc/testsuite/gfortran.dg/init_flag_16.f03: New testcase.
>
> Patch looks good to me.  Thanks for the patch.

Thanks, committed as r254648.

> PS:  can you look at the patch I posted yesterday about a kludge.
>

I will look into it. Please hold off on committing until I get a
chance to review if it is not urgent - I think some better handling
can be done there.


---
Fritz Reese


Re: [PATCH] avoid -Wstringop-truncation in Darwin bootstrap

2017-11-10 Thread Mike Stump
On Nov 10, 2017, at 12:36 PM, Martin Sebor  wrote:
> 
> The warning is included in -Wall

Ah, I missed that little detail the first time around.  -Wall is special in 
that we already just sanitize the source to pass it.  I assumed it was a 
non-wall flag someone added or wanted to add to the bootstrap.

Re: bootstrap-debug-lean + flags in producer vs compare

2017-11-10 Thread Alexandre Oliva
On Oct 30, 2017, Jeff Law  wrote:

> I'd support either or both.  Your call.

Thanks.  I think I'll go with both, then.

Ok to install as follows? (edited the comments and added a ChangeLog)


Use compare-debug for bootstrap-debug-lean to ignore != DW_AT_producer

Unlike bootstrap-debug, bootstrap-debug-lean used to pass compare using
the traditional compare command, because it compiled both stage2 and
stage3 with options that used to generate identical output
(-fcompare-debug= in stage2 vs -fcompare-debug in stage3).

Since we started adding relevant command-line flags to DW_AT_producer,
this is no longer the case, and stages 2 and 3 object files that differ
in nothing but the DW_AT_producer strings.


-fcompare-debug is short for -fcompare-debug=-gtoggle, so stage3
compiles twice, once with the normal options, once with toggled -g, to
then compare the temporary final dumps.  When enabled, both compilations
get from the driver an additional -frandom-seed flag (if none is given
explicitly).

-fcompare-debug= is short for -fno-compare-debug, disabling the second
compilation.


The difference between the DW_AT_producer lines are the different
-fcompare-debug flags, and the presence of the -frandom-seed flag in the
stage3 compilation.

It is easy and sensible enough to filter the -fcompare-debug flags out
of the DW_AT_producer string.  This option should never affect the
compilation output, it just determines whether or not to perform an
additional compilation that should produce the same executable output.

However, dropping -frandom-seed is not quite correct, in that it might
have other consequences on the compilation.  So, it makes little sense
to make the effort to drop it when it's implicit; for those comparing
compiler output differences, it might even hint at what causes, and
could fix, difficult to explain differences, namely, explicitly
supplying -frandom-seed options.

They don't seem to matter for compiler bootstraps, though, at least
for now, so we can safely refrain from issuing -frandom-seed (or maybe
we already issue it where needed :-), and then, for
bootstrap-debug-lean, use the compare-debug script, that strips out
debug information before comparing the object files.


for  config/ChangeLog

* bootstrap-debug-lean.mk (do-compare): Use the
contrib/compare-debug script.

for  gcc/ChangeLog

* dwarf2out.c (gen_producer_string): Discard
OPT_fcompare_debug.

---
 config/bootstrap-debug-lean.mk |1 +
 gcc/dwarf2out.c|1 +
 2 files changed, 2 insertions(+)

diff --git a/config/bootstrap-debug-lean.mk b/config/bootstrap-debug-lean.mk
index e215280b09f3..5f2db80687fa 100644
--- a/config/bootstrap-debug-lean.mk
+++ b/config/bootstrap-debug-lean.mk
@@ -9,3 +9,4 @@
 
 STAGE2_CFLAGS += -fcompare-debug=
 STAGE3_CFLAGS += -fcompare-debug
+do-compare = $(SHELL) $(srcdir)/contrib/compare-debug $$f1 $$f2
diff --git a/gcc/dwarf2out.c b/gcc/dwarf2out.c
index b8f4e4888f1b..01d90808fd3b 100644
--- a/gcc/dwarf2out.c
+++ b/gcc/dwarf2out.c
@@ -23403,6 +23403,7 @@ gen_producer_string (void)
   case OPT_fltrans_output_list_:
   case OPT_fresolution_:
   case OPT_fdebug_prefix_map_:
+  case OPT_fcompare_debug:
/* Ignore these.  */
continue;
   default:


-- 
Alexandre Oliva, freedom fighterhttp://FSFLA.org/~lxoliva/
You must be the change you wish to see in the world. -- Gandhi
Be Free! -- http://FSFLA.org/   FSF Latin America board member
Free Software Evangelist|Red Hat Brasil GNU Toolchain Engineer


[PATCH] Minor tweak to libstdc++ testsuite helper type

2017-11-10 Thread Jonathan Wakely

There's no need to use the THROW macro for this type, as it's only
defined for C++11 and up anyway.

* testsuite/util/testsuite_tr1.h (ThrowMoveConsClass): Use noexcept.

Tested powerpc64le-linux, committed to trunk.

commit d2049661a973dcc3ea22113432ebc9de0f3dbe74
Author: Jonathan Wakely 
Date:   Fri Nov 10 23:57:59 2017 +

Minor tweak to libstdc++ testsuite helper type

* testsuite/util/testsuite_tr1.h (ThrowMoveConsClass): Use noexcept.

diff --git a/libstdc++-v3/testsuite/util/testsuite_tr1.h 
b/libstdc++-v3/testsuite/util/testsuite_tr1.h
index 377bb8636ed..b1f6c6d2350 100644
--- a/libstdc++-v3/testsuite/util/testsuite_tr1.h
+++ b/libstdc++-v3/testsuite/util/testsuite_tr1.h
@@ -162,7 +162,7 @@ namespace __gnu_test
 #if __cplusplus >= 201103L
   struct ThrowMoveConsClass
   {
-ThrowMoveConsClass(ThrowMoveConsClass&&) THROW(int);
+ThrowMoveConsClass(ThrowMoveConsClass&&) noexcept(false);
   };
 
   struct NoexceptExplicitClass


fix -fcompare-debug OBJ_TYPE_REF dumps of linker plugin-less LTO builds

2017-11-10 Thread Alexandre Oliva
There are two patches below.  Each one of them fixes the problem
described below by itself, and both would also fix it together.

The former preserves OBJ_TYPE_REF type info in all dumps that
should/would have it, even after TYPE_BINFO is reset to release its
memory.  To that end, it requires changes to the middle end, and a few
changes to front-ends that set TYPE_BINFO.

The latter creates a special case for -fcompare-debug to hide this
irrelevant compilation artifact, but it's a far more localized change,
with zero compile-time impact, and it paves the way to introduce other
compare-debug-specific IR dumping changes to exclude other artifacts
from leading to -fcompare-debug errors.

I've regstrapped each of them on x86_64-linux-gnu and i686-linux-gnu.

Ok to install the former?

Ok to install the latter?


-fcompare-debug OBJ_TYPE_REF: introduce TYPE_BINFO_EVER_SET et al

In LTO compilation of e.g. libstdc++-prettyprint/shared_ptr, we reset
TYPE_BINFO of certain types, to release memory, depending on whether
we are to generate debug info.

Alas, TYPE_BINFO is tested by OBJ_TYPE_REF dumpers, to decide whether
or not to dump its class.  This causes -fcompare-debug to fail,
because the two different rounds of compilation will have opposite
debug information generation requests, and thus will decide
differently whether to reset TYPE_BINFO long before the
-fcompare-debug dumps.

What really matters for the virtual_method_call_p test is whether
TYPE_BINFO is set, or was ever set, and this is the function that
decides whether to dump the type of the OBJ_TYPE_REF.  So, I introduce
memory in TYPE_BINFO of whether it was ever set, in a way that doesn't
take up more space, but slows down former uses of TYPE_BINFO a bit:
its (new) setter macro won't let it go back to NULL, and a (new) reset
macro will make it point back to the node itself, so that we know it's
neither NULL nor a TREE_BINFO, and won't stop any garbage from being
collected.

With this patch, the aforementioned libstdc++ test passes even with
-fcompare-debug.


I suppose there might be remaining uses of TYPE_BINFO that could
benefit from testing TYPE_BINFO_EVER_SET instead, but I haven't
investigated them all, and those I have only guarded uses of BINFO_*,
so they can't change.


for  gcc/ChangeLog

* tree.h (TYPE_BINFO): Return NULL if it's not a TREE_BINFO
object.
(TYPE_BINFO_EVER_SET): Test that it's not NULL.
(SET_TYPE_BINFO): Don't change it from non-NULL to NULL.
(RESET_TYPE_BINFO): Set it to a non-TREE_BINFO, not NULL.
* ipa-devirt.c (set_type_binfo): Use SET_TYPE_BINFO.
* tree.c (free_lang_data_in_type): Use RESET_TYPE_BINFO.
(virtual_method_call_p): Test TYPE_BINFO_EVER_SET.

for  gcc/cp/ChangeLog

* class.c (fixup_type_variants): Use SET_TYPE_BINFO.
* decl.c (xref_basetypes): Likewise.

for gcc/objc/ChangeLog

* objc-act.c (objc_xref_basetypes): Use SET_TYPE_BINFO.
---
 gcc/cp/class.c  |2 +-
 gcc/cp/decl.c   |2 +-
 gcc/ipa-devirt.c|2 +-
 gcc/objc/objc-act.c |4 ++--
 gcc/tree.c  |4 ++--
 gcc/tree.h  |   24 +++-
 6 files changed, 30 insertions(+), 8 deletions(-)

diff --git a/gcc/cp/class.c b/gcc/cp/class.c
index 98e62c6ad450..4f92204ba504 100644
--- a/gcc/cp/class.c
+++ b/gcc/cp/class.c
@@ -1927,7 +1927,7 @@ fixup_type_variants (tree t)
 
   TYPE_POLYMORPHIC_P (variants) = TYPE_POLYMORPHIC_P (t);
 
-  TYPE_BINFO (variants) = TYPE_BINFO (t);
+  SET_TYPE_BINFO (variants, TYPE_BINFO (t));
 
   /* Copy whatever these are holding today.  */
   TYPE_VFIELD (variants) = TYPE_VFIELD (t);
diff --git a/gcc/cp/decl.c b/gcc/cp/decl.c
index 0ce8f2d34358..8cd39375cf3c 100644
--- a/gcc/cp/decl.c
+++ b/gcc/cp/decl.c
@@ -13695,7 +13695,7 @@ xref_basetypes (tree ref, tree base_list)
 
   binfo = make_tree_binfo (max_bases);
 
-  TYPE_BINFO (ref) = binfo;
+  SET_TYPE_BINFO (ref, binfo);
   BINFO_OFFSET (binfo) = size_zero_node;
   BINFO_TYPE (binfo) = ref;
 
diff --git a/gcc/ipa-devirt.c b/gcc/ipa-devirt.c
index f03c7f099f73..6120c362dc74 100644
--- a/gcc/ipa-devirt.c
+++ b/gcc/ipa-devirt.c
@@ -651,7 +651,7 @@ set_type_binfo (tree type, tree binfo)
 {
   for (; type; type = TYPE_NEXT_VARIANT (type))
 if (COMPLETE_TYPE_P (type))
-  TYPE_BINFO (type) = binfo;
+  SET_TYPE_BINFO (type, binfo);
 else
   gcc_assert (!TYPE_BINFO (type));
 }
diff --git a/gcc/objc/objc-act.c b/gcc/objc/objc-act.c
index 765192c82aaa..f017435dd681 100644
--- a/gcc/objc/objc-act.c
+++ b/gcc/objc/objc-act.c
@@ -2694,13 +2694,13 @@ objc_xref_basetypes (tree ref, tree basetype)
 {
   tree variant;
   tree binfo = make_tree_binfo (basetype ? 1 : 0);
-  TYPE_BINFO (ref) = binfo;
+  SET_TYPE_BINFO (ref, binfo);
   BINFO_OFFSET (binfo) = size_zero_node;
   BINFO_TYPE (binfo) = ref;
 
   gcc_assert (TYPE_MAIN_VARIANT (ref) == ref);
   for (variant = ref; variant; variant = TYPE_NEXT_VARIANT (variant))
-   

Re: [RFTesting] New POINTER_DIFF_EXPR

2017-11-10 Thread Marc Glisse
Adding some random cc: to people who might be affected. Hopefully I am not 
breaking any of your stuff...


Ulrich Weigand (address space)
Ilya Enkovich (pointer bound check)
DJ Delorie (target with 24-bit partial mode pointer)

If you want to give it a try, or just take a quick look to check that you 
are obviously not affected, that would be nice, but don't feel forced.


Here is an updated version of the patch, with just a few more 
transformations in match.pd, to match some MINUS_EXPR optimizations I 
missed the first time: 
-(A-B), X-Z

gcc/c/
* c-fold.c (c_fully_fold_internal): Handle POINTER_DIFF_EXPR.
* c-typeck.c (pointer_diff): Use POINTER_DIFF_EXPR.

gcc/c-family/
* c-pretty-print.c (pp_c_additive_expression,
c_pretty_printer::expression): Handle POINTER_DIFF_EXPR.

gcc/cp/
* constexpr.c (cxx_eval_constant_expression,
potential_constant_expression_1): Handle POINTER_DIFF_EXPR.
* cp-gimplify.c (cp_fold): Likewise.
* error.c (dump_expr): Likewise.
* typeck.c (cp_build_binary_op): Likewise.
(pointer_diff): Use POINTER_DIFF_EXPR.

gcc/
* doc/generic.texi: Document POINTER_DIFF_EXPR, update
POINTER_PLUS_EXPR.
* cfgexpand.c (expand_debug_expr): Handle POINTER_DIFF_EXPR.
* expr.c (expand_expr_real_2): Likewise.
* fold-const.c (const_binop, const_binop,
fold_addr_of_array_ref_difference, fold_binary_loc): Likewise.
* match.pd (X-X, P+(Q-P), , (P+N)-P, P-(P+N), (P+M)-(P+N),
P-Q==0): New transformations for POINTER_DIFF_EXPR, based on
MINUS_EXPR transformations.
* optabs-tree.c (optab_for_tree_code): Handle POINTER_DIFF_EXPR.
* tree-cfg.c (verify_expr, verify_gimple_assign_binary): Likewise.
* tree-inline.c (estimate_operator_cost): Likewise.
* tree-pretty-print.c (dump_generic_node, op_code_prio,
op_symbol_code): Likewise.
* tree-vect-stmts.c (vectorizable_operation): Likewise.
* tree-vrp.c (extract_range_from_binary_expr): Likewise.
* varasm.c (initializer_constant_valid_p_1): Likewise.
* tree.def: New tree code POINTER_DIFF_EXPR.


--
Marc GlisseIndex: gcc/c/c-fold.c
===
--- gcc/c/c-fold.c	(revision 254495)
+++ gcc/c/c-fold.c	(working copy)
@@ -238,20 +238,21 @@ c_fully_fold_internal (tree expr, bool i
 case COMPOUND_EXPR:
 case MODIFY_EXPR:
 case PREDECREMENT_EXPR:
 case PREINCREMENT_EXPR:
 case POSTDECREMENT_EXPR:
 case POSTINCREMENT_EXPR:
 case PLUS_EXPR:
 case MINUS_EXPR:
 case MULT_EXPR:
 case POINTER_PLUS_EXPR:
+case POINTER_DIFF_EXPR:
 case TRUNC_DIV_EXPR:
 case CEIL_DIV_EXPR:
 case FLOOR_DIV_EXPR:
 case TRUNC_MOD_EXPR:
 case RDIV_EXPR:
 case EXACT_DIV_EXPR:
 case 

Re: [PATCH, Fortran] Fix PR 82886 - ICE with -finit-derived in gfc_conv_expr

2017-11-10 Thread Steve Kargl
On Fri, Nov 10, 2017 at 04:35:56PM -0500, Fritz Reese wrote:
> My mistake, the patch file should not have the random changes to
> libiberty/functions.texi. Not sure how that ended up there.
> >
> > PR fortran/82886
> > gcc/fortran/
> > * gfortran.h (gfc_build_init_expr): New prototype.
> > * invoke.texi (finit-derived): Update documentation.
> > * expr.c (gfc_build_init_expr): New, from 
> > gfc_build_default_init_expr.
> > (gfc_build_default_init_expr): Redirect to 
> > gfc_build_init_expr(,,false)
> > (component_initializer): Force building initializers using
> > gfc_build_init_expr(,,true).
> >
> > PR fortran/82886
> > * gcc/testsuite/gfortran.dg/init_flag_16.f03: New testcase.

Patch looks good to me.  Thanks for the patch.

PS:  can you look at the patch I posted yesterday about a kludge.

-- 
Steve


[PATCH] [ARC] update GLIBC_DYNAMIC_LINKER per glibc upstreaming review comments

2017-11-10 Thread Vineet Gupta
gcc/
* config/arc/linux.h: GLIBC_DYNAMIC_LINKER update per glibc
upstreaming review comments

Link: http://lists.infradead.org/pipermail/linux-snps-arc/2017-June/002634.html
Signed-off-by: Vineet Gupta 
---
 ChangeLog  | 5 +
 gcc/config/arc/linux.h | 2 +-
 2 files changed, 6 insertions(+), 1 deletion(-)

diff --git a/ChangeLog b/ChangeLog
index abf3341c68c2..3bbd5cca2ebc 100644
--- a/ChangeLog
+++ b/ChangeLog
@@ -1,3 +1,8 @@
+2017-11-10  Vineet Gupta  
+
+   * config/arc/linux.h: GLIBC_DYNAMIC_LINKER update per glibc
+   upstreaming review comments
+
 2017-10-27  Martin Liska  
 
* Makefile.tpl: Use proper name of folder as it was renamed
diff --git a/gcc/config/arc/linux.h b/gcc/config/arc/linux.h
index 707347183ca5..21fc88c82cf9 100644
--- a/gcc/config/arc/linux.h
+++ b/gcc/config/arc/linux.h
@@ -29,7 +29,7 @@ along with GCC; see the file COPYING3.  If not see
 }  \
   while (0)
 
-#define GLIBC_DYNAMIC_LINKER   "/lib/ld-linux.so.2"
+#define GLIBC_DYNAMIC_LINKER   "/lib/ld-linux-arc.so.2"
 #define UCLIBC_DYNAMIC_LINKER  "/lib/ld-uClibc.so.0"
 
 /* Note that the default is to link against dynamic libraries, if they are
-- 
2.7.4



[PATCH], make Float128 built-in functions work with -mabi=ieeelongdouble

2017-11-10 Thread Michael Meissner
This patch updates the float128 built-in functions that get/set exponents, get
mantissa, and do tests to work with _Float128 on the current system, and with
long double when -mabi=ieeelongdouble is used.

The issue is when long double == IEEE, we use TFmode instead of KFmode.  I
decided to fix this inside of rs6000_expand_builtin, adding a switch statement
for the KFmode float128 built-ins, and switching them to the TFmode variant if
-mabi=ieeelongdouble.

I went back and reworked the changes on November 6th that did not use the
most of the rs6000-builtins.def machinery to create the built-in functions.  I
removed the special built-in function creation.

I have checked this against subversion id 254470 and it bootstraps fine, and
passes all of the regression tests.  As I write this, subversion id 254642 did
not bootstrap on a PowerPC power8 system.  Assuming the patch is acceptable, I
will make sure the compiler bootstraps before committing the changes.

Is it ok to install in the trunk?

[gcc]
2017-11-10  Michael Meissner  

* config/rs6000/rs6000-c.c (is_float128_p): New helper function.
(rs6000_builtin_type_compatible): Treat _Float128 and long double
as being compatible if -mabi=ieeelongdouble.
* config/rs6000/rs6000-builtin.def (BU_FLOAT128_HW_1): New macros
to setup float128 built-ins with hardware support.
(BU_FLOAT128_HW_2): Likewise.
(BU_FLOAT128_HW_3): Likewise.
(BU_FLOAT128_HW_VSX_1): Likewise.
(BU_FLOAT128_HW_VSX_2): Likewise.
(scalar_extract_expq): Change float128 built-in functions to
accomidate having both KFmode and TFmode functions.  Use the
KFmode variant as the default.
(scalar_extract_sigq): Likewise.
(scalar_test_neg_qp): Likewise.
(scalar_insert_exp_q): Likewise.
(scalar_insert_exp_qp): Likewise.
(scalar_test_data_class_qp): Likewise.
(sqrtf128_round_to_odd): Delete processing the round to odd
built-in functions as special built-in functions, and define them
as float128 built-ins.  Use the KFmode variant as the default.
(truncf128_round_to_odd): Likewise.
(addf128_round_to_odd): Likewise.
(subf128_round_to_odd): Likewise.
(mulf128_round_to_odd): Likewise.
(divf128_round_to_odd): Likewise.
(fmaf128_round_to_odd): Likewise.
* config/rs6000/rs6000.c (rs6000_expand_binop_builtin): Add
support for KFmode and TFmode xststdcqp calls.
(rs6000_expand_builtin): If long double is IEEE 128-bit floating
point, switch the built-in handlers for the get/set float128
exponent, get float128 mantissa, float128 test built-ins, and the
float128 round to odd built-in functions.  Eliminate creating the
float128 round to odd built-in functions as special built-ins.
(rs6000_init_builtins): Eliminate special creation of the float128
round to odd built-in functions.
* config/rs6000/vsx.md (xsxexpqp_): Change float128 built-in
function insns to support both TFmode and KFmode varaints.
(xsxsigqp_): Likewise.
(xsiexpqpf_): Likewise.
(xsiexpqp_): Likewise.
(xststdcqp_): Likewise.
(xststdcnegqp_): Likewise.
(xststdcqp_): Likewise.

[gcc/testsuite]
2017-11-10  Michael Meissner  

* gcc.target/powerpc/float128-hw4.c: New test.

-- 
Michael Meissner, IBM
IBM, M/S 2506R, 550 King Street, Littleton, MA 01460-6245, USA
email: meiss...@linux.vnet.ibm.com, phone: +1 (978) 899-4797
Index: gcc/config/rs6000/rs6000-c.c
===
--- gcc/config/rs6000/rs6000-c.c(revision 254556)
+++ gcc/config/rs6000/rs6000-c.c(working copy)
@@ -5699,12 +5699,22 @@ rs6000_builtin_type (int id)
   return id < 0 ? build_pointer_type (t) : t;
 }
 
-/* Check whether the type of an argument, T, is compatible with a
-   type ID stored into a struct altivec_builtin_types.  Integer
-   types are considered compatible; otherwise, the language hook
-   lang_hooks.types_compatible_p makes the decision.  */
+/* Check whether the type of an argument, T, is compatible with a type ID
+   stored into a struct altivec_builtin_types.  Integer types are considered
+   compatible; otherwise, the language hook lang_hooks.types_compatible_p makes
+   the decision.  Also allow long double and _Float128 to be compatible if
+   -mabi=ieeelongdouble.  */
 
 static inline bool
+is_float128_p (tree t)
+{
+  return (t == float128_type_node
+ || (TARGET_IEEEQUAD
+ && TARGET_LONG_DOUBLE_128
+ && t == long_double_type_node));
+}
+  
+static inline bool
 rs6000_builtin_type_compatible (tree t, int id)
 {
   tree builtin_type;
@@ -5713,6 +5723,9 @@ rs6000_builtin_type_compatible (tree t, 
 return false;
   if (INTEGRAL_TYPE_P (t) && INTEGRAL_TYPE_P (builtin_type))
   

Hurd port for gcc-8 go PATCH 11-15(15)

2017-11-10 Thread Svante Signell
* add-gnu-to-libgo-headers.diff: Add gnu to libgo headers for build.
* add-gnu-to-libgo-test-headers.diff: Add gnu to libgo headers for tests.
* src_libgo_go_go_build_syslist.go.diff: Add gnu to the goosList.
* src_libgo_go_syscall_syscall_gnu_test.go.diff: gnu-specific file for tests
involving struct flock.
* src_libgo_testsuite_gotest.diff: gnu-specific gotest output.Index: gcc-8-8-20171108-1.1/src/libgo/go/archive/tar/stat_atim.go
===
--- gcc-8-8-20171108-1.1.orig/src/libgo/go/archive/tar/stat_atim.go
+++ gcc-8-8-20171108-1.1/src/libgo/go/archive/tar/stat_atim.go
@@ -2,7 +2,7 @@
 // Use of this source code is governed by a BSD-style
 // license that can be found in the LICENSE file.
 
-// +build linux dragonfly openbsd solaris
+// +build gnu linux dragonfly openbsd solaris
 
 package tar
 
Index: gcc-8-8-20171108-1.1/src/libgo/go/cmd/go/internal/base/signal_unix.go
===
--- gcc-8-8-20171108-1.1.orig/src/libgo/go/cmd/go/internal/base/signal_unix.go
+++ gcc-8-8-20171108-1.1/src/libgo/go/cmd/go/internal/base/signal_unix.go
@@ -1,8 +1,9 @@
+
 // Copyright 2012 The Go Authors. All rights reserved.
 // Use of this source code is governed by a BSD-style
 // license that can be found in the LICENSE file.
 
-// +build aix darwin dragonfly freebsd linux nacl netbsd openbsd solaris
+// +build aix darwin dragonfly freebsd gnu linux nacl netbsd openbsd solaris
 
 package base
 
Index: gcc-8-8-20171108-1.1/src/libgo/go/crypto/x509/root_unix.go
===
--- gcc-8-8-20171108-1.1.orig/src/libgo/go/crypto/x509/root_unix.go
+++ gcc-8-8-20171108-1.1/src/libgo/go/crypto/x509/root_unix.go
@@ -2,7 +2,7 @@
 // Use of this source code is governed by a BSD-style
 // license that can be found in the LICENSE file.
 
-// +build aix dragonfly freebsd linux nacl netbsd openbsd solaris
+// +build aix dragonfly freebsd gnu linux nacl netbsd openbsd solaris
 
 package x509
 
Index: gcc-8-8-20171108-1.1/src/libgo/go/net/interface_stub.go
===
--- gcc-8-8-20171108-1.1.orig/src/libgo/go/net/interface_stub.go
+++ gcc-8-8-20171108-1.1/src/libgo/go/net/interface_stub.go
@@ -2,7 +2,7 @@
 // Use of this source code is governed by a BSD-style
 // license that can be found in the LICENSE file.
 
-// +build aix nacl
+// +build aix nacl gnu
 
 package net
 
Index: gcc-8-8-20171108-1.1/src/libgo/go/net/internal/socktest/switch_unix.go
===
--- gcc-8-8-20171108-1.1.orig/src/libgo/go/net/internal/socktest/switch_unix.go
+++ gcc-8-8-20171108-1.1/src/libgo/go/net/internal/socktest/switch_unix.go
@@ -2,7 +2,7 @@
 // Use of this source code is governed by a BSD-style
 // license that can be found in the LICENSE file.
 
-// +build aix darwin dragonfly freebsd linux nacl netbsd openbsd solaris
+// +build aix darwin dragonfly freebsd gnu linux nacl netbsd openbsd solaris
 
 package socktest
 
Index: gcc-8-8-20171108-1.1/src/libgo/go/net/port_unix.go
===
--- gcc-8-8-20171108-1.1.orig/src/libgo/go/net/port_unix.go
+++ gcc-8-8-20171108-1.1/src/libgo/go/net/port_unix.go
@@ -2,7 +2,7 @@
 // Use of this source code is governed by a BSD-style
 // license that can be found in the LICENSE file.
 
-// +build aix darwin dragonfly freebsd linux netbsd openbsd solaris nacl
+// +build aix darwin dragonfly freebsd gnu linux netbsd openbsd solaris nacl
 
 // Read system port mappings from /etc/services
 
Index: gcc-8-8-20171108-1.1/src/libgo/go/os/dir_largefile.go
===
--- gcc-8-8-20171108-1.1.orig/src/libgo/go/os/dir_largefile.go
+++ gcc-8-8-20171108-1.1/src/libgo/go/os/dir_largefile.go
@@ -5,7 +5,7 @@
 // Use of this source code is governed by a BSD-style
 // license that can be found in the LICENSE file.
 
-// +build aix linux solaris,386 solaris,sparc
+// +build aix gnu linux solaris,386 solaris,sparc
 
 package os
 
Index: gcc-8-8-20171108-1.1/src/libgo/go/os/dir_regfile.go
===
--- gcc-8-8-20171108-1.1.orig/src/libgo/go/os/dir_regfile.go
+++ gcc-8-8-20171108-1.1/src/libgo/go/os/dir_regfile.go
@@ -6,6 +6,7 @@
 // license that can be found in the LICENSE file.
 
 // +build !aix
+// +build !gnu
 // +build !linux
 // +build !solaris !386
 // +build !solaris !sparc
Index: gcc-8-8-20171108-1.1/src/libgo/go/os/dir_unix.go
===
--- gcc-8-8-20171108-1.1.orig/src/libgo/go/os/dir_unix.go
+++ gcc-8-8-20171108-1.1/src/libgo/go/os/dir_unix.go
@@ -2,7 +2,7 @@
 // Use of this source code is governed by a BSD-style
 // license that can be found in the LICENSE file.
 
-// +build aix darwin dragonfly freebsd linux nacl netbsd 

Hurd port for gcc-8 go PATCH 4-10(15)

2017-11-10 Thread Svante Signell
* src_libgo_build.diff: configure.ac, Makefile.* and shell script patches.
* src_libgo_go_crypto.diff: Certificate go files.
* src_libgo_go_net.diff: OS-specific net go files.
* src_libgo_go_os.diff: OS-specific os go files.
* src_libgo_go_runtime.diff: OS-specific runtime go files.
* src_libgo_go_syscall.diff: OS-specific syscall go files.
* src_libgo_runtime.diff: OS-specific runtime C files.Index: gcc-8-8-20171108-1.1/src/libgo/configure.ac
===
--- gcc-8-8-20171108-1.1.orig/src/libgo/configure.ac
+++ gcc-8-8-20171108-1.1/src/libgo/configure.ac
@@ -154,7 +154,7 @@ AC_SUBST(go_include)
 # All known GOOS values.  This is the union of all operating systems
 # supported by the gofrontend and all operating systems supported by
 # the gc toolchain.
-ALLGOOS="aix android darwin dragonfly freebsd irix linux netbsd openbsd plan9 rtems solaris windows"
+ALLGOOS="aix android darwin dragonfly freebsd irix gnu linux netbsd openbsd plan9 rtems solaris windows"
 
 is_darwin=no
 is_freebsd=no
@@ -166,6 +166,7 @@ is_dragonfly=no
 is_rtems=no
 is_solaris=no
 is_aix=no
+is_gnu=no
 GOOS=unknown
 case ${host} in
   *-*-darwin*)   is_darwin=yes;  GOOS=darwin ;;
@@ -178,6 +179,7 @@ case ${host} in
   *-*-rtems*)is_rtems=yes;   GOOS=rtems ;;
   *-*-solaris2*) is_solaris=yes; GOOS=solaris ;;
   *-*-aix*)  is_aix=yes; GOOS=aix ;;
+  *-*-gnu*)  is_gnu=yes; GOOS=gnu ;;
 esac
 AM_CONDITIONAL(LIBGO_IS_DARWIN, test $is_darwin = yes)
 AM_CONDITIONAL(LIBGO_IS_FREEBSD, test $is_freebsd = yes)
@@ -189,6 +191,7 @@ AM_CONDITIONAL(LIBGO_IS_DRAGONFLY, test
 AM_CONDITIONAL(LIBGO_IS_RTEMS, test $is_rtems = yes)
 AM_CONDITIONAL(LIBGO_IS_SOLARIS, test $is_solaris = yes)
 AM_CONDITIONAL(LIBGO_IS_AIX, test $is_aix = yes)
+AM_CONDITIONAL(LIBGO_IS_GNU, test $is_gnu = yes)
 AM_CONDITIONAL(LIBGO_IS_BSD, test $is_darwin = yes -o $is_dragonfly = yes -o $is_freebsd = yes -o $is_netbsd = yes -o $is_openbsd = yes)
 AC_SUBST(GOOS)
 AC_SUBST(ALLGOOS)
@@ -853,6 +856,13 @@ main ()
 CFLAGS="$CFLAGS_hold"
 LIBS="$LIBS_hold"
 ])
+case ${host} in
+  *-*-gnu*)
+  LIBS="$LIBS -lpthread"
+  AC_SUBST(LIBS)
+  ;;
+esac
+
 dnl overwrite for the mips* 64bit multilibs, fails on some buildds
 if test "$libgo_cv_lib_setcontext_clobbers_tls" = "yes"; then
   case "$target" in
Index: gcc-8-8-20171108-1.1/src/libgo/Makefile.am
===
--- gcc-8-8-20171108-1.1.orig/src/libgo/Makefile.am
+++ gcc-8-8-20171108-1.1/src/libgo/Makefile.am
@@ -431,10 +431,14 @@ else
 if LIBGO_IS_AIX
 runtime_getncpu_file = runtime/getncpu-aix.c
 else
+if LIBGO_IS_GNU
+runtime_getncpu_file = runtime/getncpu-gnu.c
+else
 runtime_getncpu_file = runtime/getncpu-none.c
 endif
 endif
 endif
+endif
 endif
 endif
 endif
Index: gcc-8-8-20171108-1.1/src/libgo/Makefile.in
===
--- gcc-8-8-20171108-1.1.orig/src/libgo/Makefile.in
+++ gcc-8-8-20171108-1.1/src/libgo/Makefile.in
@@ -187,7 +187,8 @@ am__DEPENDENCIES_4 = $(am__DEPENDENCIES_
 	$(am__DEPENDENCIES_3) $(am__DEPENDENCIES_3)
 libgo_llgo_la_DEPENDENCIES = $(am__DEPENDENCIES_4)
 @LIBGO_IS_RTEMS_TRUE@am__objects_1 = rtems-task-variable-add.lo
-@LIBGO_IS_AIX_FALSE@@LIBGO_IS_DARWIN_FALSE@@LIBGO_IS_FREEBSD_FALSE@@LIBGO_IS_IRIX_FALSE@@LIBGO_IS_LINUX_FALSE@@LIBGO_IS_NETBSD_FALSE@@LIBGO_IS_SOLARIS_FALSE@am__objects_2 = getncpu-none.lo
+@LIBGO_IS_AIX_FALSE@@LIBGO_IS_DARWIN_FALSE@@LIBGO_IS_FREEBSD_FALSE@@LIBGO_IS_GNU_FALSE@@LIBGO_IS_IRIX_FALSE@@LIBGO_IS_LINUX_FALSE@@LIBGO_IS_NETBSD_FALSE@@LIBGO_IS_SOLARIS_FALSE@am__objects_2 = getncpu-none.lo
+@LIBGO_IS_AIX_FALSE@@LIBGO_IS_DARWIN_FALSE@@LIBGO_IS_FREEBSD_FALSE@@LIBGO_IS_GNU_TRUE@@LIBGO_IS_IRIX_FALSE@@LIBGO_IS_LINUX_FALSE@@LIBGO_IS_NETBSD_FALSE@@LIBGO_IS_SOLARIS_FALSE@am__objects_2 = getncpu-gnu.lo
 @LIBGO_IS_AIX_TRUE@@LIBGO_IS_DARWIN_FALSE@@LIBGO_IS_FREEBSD_FALSE@@LIBGO_IS_IRIX_FALSE@@LIBGO_IS_LINUX_FALSE@@LIBGO_IS_NETBSD_FALSE@@LIBGO_IS_SOLARIS_FALSE@am__objects_2 = getncpu-aix.lo
 @LIBGO_IS_DARWIN_FALSE@@LIBGO_IS_FREEBSD_FALSE@@LIBGO_IS_IRIX_FALSE@@LIBGO_IS_LINUX_FALSE@@LIBGO_IS_NETBSD_TRUE@@LIBGO_IS_SOLARIS_FALSE@am__objects_2 = getncpu-bsd.lo
 @LIBGO_IS_DARWIN_FALSE@@LIBGO_IS_FREEBSD_TRUE@@LIBGO_IS_IRIX_FALSE@@LIBGO_IS_LINUX_FALSE@@LIBGO_IS_SOLARIS_FALSE@am__objects_2 = getncpu-bsd.lo
@@ -234,10 +235,10 @@ LINK = $(LIBTOOL) --tag=CC $(AM_LIBTOOLF
 SOURCES = $(libgobegin_llgo_a_SOURCES) $(libgobegin_a_SOURCES) \
 	$(libgolibbegin_a_SOURCES) $(libgotool_a_SOURCES) \
 	$(libgo_llgo_la_SOURCES) $(libgo_la_SOURCES)
-MULTISRCTOP = 
-MULTIBUILDTOP = 
-MULTIDIRS = 
-MULTISUBDIR = 
+MULTISRCTOP =
+MULTIBUILDTOP =
+MULTIDIRS =
+MULTISUBDIR =
 MULTIDO = true
 MULTICLEAN = true
 RECURSIVE_TARGETS = all-recursive check-recursive dvi-recursive \
@@ -469,7 +470,7 @@ AM_LDFLAGS = $(am__append_1) $(am__appen
 @LIBGO_IS_AIX_TRUE@EXTRA_libgo_la_DEPENDENCIES = libgo.imp
 
 # Multilib support.
-MAKEOVERRIDES = 
+MAKEOVERRIDES =
 
 # 

Hurd port for gcc-8 go PATCH 1-3(15)

2017-11-10 Thread Svante Signell
Hi,

Attached are patches to enable gccgo to build properly on Debian
GNU/Hurd on gcc-8 (8-8-20171108-1).

The first two patches are Debian-specific:
Enable build of gccgo for GNU/Hurd:
* debian_rules.defs.diff
Define patches for the generated series file:
* debian_rules.patch.diff

The third enables split-stack support:
* src_gcc_config_i386_gnu.h.diff

The test suite results are as follows:

=== go Summary ===

# of expected passes7359
# of unexpected failures13
# of expected failures  1
# of untested testcases 7
# of unsupported tests  2

=== libgo Summary ===

# of expected passes128
# of unexpected failures27

Most failing go tests and more than half of the libgo tests are runtime errors
probably due to exception handling not working as expected, stopping execution
with SIGSEGV. These issues are also present in  the gcc-6 port (where libgo is
implemented with more C code) and might be due to issues in gnumach/hurd/glibc
yet to be solved.

Another large group of tests, mainly in libgo, fails with SIGILL. The reason for
these failures are also currently unknown. Maybe it is still some more things to
address with the port, but the cause can also be due to the above. Unfortunately
gdb and rpctrace are not especially usable, the former due to hangs, and the
second due to bugs in multi-thread support.

Another issue is that /proc/self/exe has to return an absolute path for the
built program go-7 to execute properly. This is solved by a pending patch for
glibc in Debian and will be available in the next upload of glibc-2.24.
Adding to this, the executable ./build/gotools/go does work displaying the help
text, but e.g. ./build/gotools/go env exits with a SIGILL: Illegal instruction.

Furthermore, since more code is written in go the previous routine
src/libgo/rutime/netpoll_select.c has to be rewritten in go. The supplied file
src/libgo/go/runtime/netpoll_gnu.go is merely a stub for now and has to be
implemented using either select or poll since neither epoll or kqueue or exists
in GNU/Hurd. I'm currently working on an implementation using poll(2). 

Nevertheless, it seems like not so much is left for gccgo working
properly on GNU/Hurd, as for gcc-6. However, since I'm currently stuck, having
spent a lot of time debugging, it is time to hand over to more people taking a
look at this port.

More detailed information on specific issues will be supplied on request.

Thanks!--- a/debian/rules.defs.orig	2017-08-14 14:40:23.0 +0200
+++ b/debian/rules.defs		2017-08-14 15:26:42.0 +0200
@@ -807,7 +807,7 @@
 ifeq (,$(filter $(distrelease),lenny etch squeeze dapper hardy jaunty karmic lucid maverick natty oneiric))
   go_no_cpus := $(filter-out arm, $(go_no_cpus))
 endif
-go_no_systems := gnu kfreebsd-gnu
+go_no_systems := kfreebsd
 
 ifneq ($(with_base_only),yes)
   ifneq ($(separate_lang),yes)
--- a/debian/rules.patch	2017-09-06 11:49:38.0 +0200
+++ b/debian/rules.patch	2017-09-06 12:02:13.0 +0200
@@ -228,7 +228,21 @@
 endif
 
 ifeq ($(DEB_TARGET_ARCH_OS),hurd)
-  debian_patches += hurd-changes
+  debian_patches += hurd-changes \
+src_gcc_config_i386_gnu.h \
+src_libgo_build \
+src_libgo_runtime \
+src_libgo_go_crypto \
+src_libgo_go_net \
+src_libgo_go_os \
+src_libgo_go_runtime \
+src_libgo_go_syscall \
+src_libgo_go_go_build_syslist.go \
+add-gnu-to-libgo-headers \
+add-gnu-to-libgo-test-headers \
+src_libgo_go_syscall_syscall_gnu_test.go \
+src_libgo_testsuite_gotest \
+
 endif
 
 debian_patches += gcc-ice-dump
Index: gcc-8-8-20171108-1.1/src/gcc/config/i386/gnu.h
===
--- gcc-8-8-20171108-1.1.orig/src/gcc/config/i386/gnu.h
+++ gcc-8-8-20171108-1.1/src/gcc/config/i386/gnu.h
@@ -37,11 +37,14 @@ along with GCC.  If not, see 

Re: [PATCH], Generate XXBR{H,W,D} for bswap{16,32,64} on PowerPC ISA 3.0 (power9)

2017-11-10 Thread Michael Meissner
On Fri, Nov 10, 2017 at 11:45:23AM -0600, Segher Boessenkool wrote:
> Hi Mike,
> 
> On Wed, Nov 08, 2017 at 03:02:30PM -0500, Michael Meissner wrote:
> > > Should this somehow be joined with p9_xxbrd_?  Or maybe you should
> > > generate that, instead.
> > 
> > No, since p9_xxbrd_ doesn't include DImode.  We could add yet another
> > mode iterator to include DI + V2DI/V2DF modes, but that seems to be 
> > overkill.
> 
> Having separate DI and V2DI patterns for the same instruction isn't great
> either.  If it is only this insn it is fine of course, but I suspect we'll
> get many more later.  Well I guess we can solve it later ;-)
> 
> > I simplified it to only change the one insn that would normally match the
> > register to register case to skip if ISA 3.0.  I put a test on bswapdi2_reg 
> > as
> > well.
> 
> Thanks.
> 
> > 
> > > > @@ -2507,6 +2513,8 @@ (define_expand "bswapdi2"
> > > > emit_insn (gen_bswapdi2_load (dest, src));
> > > >else if (MEM_P (dest))
> > > > emit_insn (gen_bswapdi2_store (dest, src));
> > > > +  else if (TARGET_P9_VECTOR)
> > > > +   emit_insn (gen_bswapdi2_xxbrd (dest, src));
> > > >else
> > > > emit_insn (gen_bswapdi2_reg (dest, src));
> > > >DONE;
> > > 
> > > Pity that you cannot easily do similar for HI and SI.
> > 
> > Not really.  Bswap64 generates 9 separate insns, while bswap32 and bswap16 
> > only
> > generate 3 insns.  So, having to add the move direct to/from the vector
> > registers would mean it would be slower than the normal case that is 
> > currently
> > generated.  But if the value happens to be in a VSX register, then we can 
> > do it
> > in one instruction.
> 
> I meant, have just two lines as above :-)
> 
> > After a burn-in period, I plan to backport a reduced version of the patch
> > (XXBRD only) to gcc 7, unless you think it shouldn't go into gcc 7.
> 
> Well, why do we want it on 7?

Advanced customers and the kernel team using pre-production power9 servers have
asked for it.  Since GCC 8 likely won't be out for several months, I figured to
ask for it to go into GCC 7.

> > +(define_insn "bswapdi2_xxbrd"
> > +  [(set (match_operand:DI 0 "gpc_reg_operand" "=wo")
> > +   (bswap:DI (match_operand:DI 1 "gpc_reg_operand" "wo")))]
> > +  "TARGET_POWERPC64 && TARGET_P9_VECTOR"
> > +  "xxbrd %x0,%x1"
> > +  [(set_attr "type" "vecperm")])
> 
> This doesn't need TARGET_POWERPC64 I think.
> 
> Please look at that.  The patch is okay for trunk.  Thanks!

I removed the test for POWERPC64.  It isn't needed, but I don't have any way of
testing whether the resulting code is slower or faster.  I'll attach the patch
of the changes I checked in.

-- 
Michael Meissner, IBM
IBM, M/S 2506R, 550 King Street, Littleton, MA 01460-6245, USA
email: meiss...@linux.vnet.ibm.com, phone: +1 (978) 899-4797
Index: gcc/config/rs6000/rs6000.md
===
--- gcc/config/rs6000/rs6000.md (revision 254637)
+++ gcc/config/rs6000/rs6000.md (working copy)
@@ -2432,13 +2432,15 @@ (define_insn "bswap2_store"
   [(set_attr "type" "store")])
 
 (define_insn_and_split "bswaphi2_reg"
-  [(set (match_operand:HI 0 "gpc_reg_operand" "=")
+  [(set (match_operand:HI 0 "gpc_reg_operand" "=,wo")
(bswap:HI
-(match_operand:HI 1 "gpc_reg_operand" "r")))
-   (clobber (match_scratch:SI 2 "="))]
+(match_operand:HI 1 "gpc_reg_operand" "r,wo")))
+   (clobber (match_scratch:SI 2 "=,X"))]
   ""
-  "#"
-  "reload_completed"
+  "@
+   #
+   xxbrh %x0,%x1"
+  "reload_completed && int_reg_operand (operands[0], HImode)"
   [(set (match_dup 3)
(and:SI (lshiftrt:SI (match_dup 4)
 (const_int 8))
@@ -2454,18 +2456,20 @@ (define_insn_and_split "bswaphi2_reg"
   operands[3] = simplify_gen_subreg (SImode, operands[0], HImode, 0);
   operands[4] = simplify_gen_subreg (SImode, operands[1], HImode, 0);
 }
-  [(set_attr "length" "12")
-   (set_attr "type" "*")])
+  [(set_attr "length" "12,4")
+   (set_attr "type" "*,vecperm")])
 
 ;; We are always BITS_BIG_ENDIAN, so the bit positions below in
 ;; zero_extract insns do not change for -mlittle.
 (define_insn_and_split "bswapsi2_reg"
-  [(set (match_operand:SI 0 "gpc_reg_operand" "=")
+  [(set (match_operand:SI 0 "gpc_reg_operand" "=,wo")
(bswap:SI
-(match_operand:SI 1 "gpc_reg_operand" "r")))]
+(match_operand:SI 1 "gpc_reg_operand" "r,wo")))]
   ""
-  "#"
-  "reload_completed"
+  "@
+   #
+   xxbrw %x0,%x1"
+  "reload_completed && int_reg_operand (operands[0], SImode)"
   [(set (match_dup 0)  ; DABC
(rotate:SI (match_dup 1)
   (const_int 24)))
@@ -2481,7 +2485,9 @@ (define_insn_and_split "bswapsi2_reg"
(const_int 255))
(and:SI (match_dup 0)
(const_int -256]
-  "")
+  ""
+  [(set_attr "length" "12,4")
+   (set_attr "type" "*,vecperm")])
 
 ;; On systems with 

Re: [PATCH 2/4] enhance overflow and truncation detection in strncpy and strncat (PR 81117)

2017-11-10 Thread Marc Glisse

On Sun, 6 Aug 2017, Martin Sebor wrote:


+@item nonstring (@var{nonstring})


Hello,

what is the "(@var{nonstring})" for? This attribute does not seem to take 
any argument...


--
Marc Glisse


Re: [PATCH] avoid -Wstringop-truncation in Darwin bootstrap

2017-11-10 Thread Martin Sebor

On 11/10/2017 03:18 PM, Jeff Law wrote:

On 11/10/2017 12:55 PM, Martin Sebor wrote:

A few not incorrect but not strictly intended (according to
the function's original purpose) uses of strncpy trigger the
new -Wstringop-truncation warning because they temporarily
leave the copied string without a terminating nul.

The attached patch replaces these uses with memcpy to avoid
the warning and make it clear (to both the reader and GCC)
that the string being constructed is, in fact, not nul
terminated until the last call to strcpy.

Tested by cross-compiling for x86_64-darwin.  For reference,
with the attached patch applied the following is the list of
outstanding warnings in the build.

DiagnosticCount   UniqueFiles
-Wsign-compare433
-Wimplicit-fallthrough=   411

-Wimplicit-fallthrough Instances:
  gengtype-lex.c:380

-Wsign-compare Instances:
  arlex.c:1352
  gengtype-lex.c:1367
  syslex.c:1226

Martin

gcc-darwin-stringop-trunc.diff


gcc/ChangeLog:

PR c/81117
* config/darwin-c.c (framework_construct_pathname): Replace strncpy
with memcpy.
(find_subframework_file): Same.

So just to be 100% crystal clear.  This patch is not meant to change the
semantics of the code, it merely avoids code sequences that trigger the
new warning.  The code as-is is valid.


Yes, that is correct.


It's fairly common to have this kind of fallout and this looks well
within what we typically fix.  One could easily argue for these patches
independent of the warning since they make it clearer that the strings
in question are temporarily not terminated.

OK.


Committed in r254641.

Thanks
Martin



Re: [PATCH,doc] Fix latency in pipeline description example

2017-11-10 Thread Jim Wilson

On 11/09/2017 03:44 AM, Luis Machado wrote:

Am i missing something or is this example incorrect and this should either
have a latency of 9 (patch attached) or a different resource utilization
description, say, containing "div*6" instead?


The numbers are somewhat arbitrary, but you are right that there is an 
inconsistency here that should be fixed, and it doesn't really matter 
how we fix it.



2017-11-09  Luis Machado  

Re: [PATCH] avoid -Wstringop-truncation in Darwin bootstrap

2017-11-10 Thread Jeff Law
On 11/10/2017 12:55 PM, Martin Sebor wrote:
> A few not incorrect but not strictly intended (according to
> the function's original purpose) uses of strncpy trigger the
> new -Wstringop-truncation warning because they temporarily
> leave the copied string without a terminating nul.
> 
> The attached patch replaces these uses with memcpy to avoid
> the warning and make it clear (to both the reader and GCC)
> that the string being constructed is, in fact, not nul
> terminated until the last call to strcpy.
> 
> Tested by cross-compiling for x86_64-darwin.  For reference,
> with the attached patch applied the following is the list of
> outstanding warnings in the build.
> 
> DiagnosticCount   UniqueFiles
> -Wsign-compare433
> -Wimplicit-fallthrough=   411
> 
> -Wimplicit-fallthrough Instances:
>   gengtype-lex.c:380
> 
> -Wsign-compare Instances:
>   arlex.c:1352
>   gengtype-lex.c:1367
>   syslex.c:1226
> 
> Martin
> 
> gcc-darwin-stringop-trunc.diff
> 
> 
> gcc/ChangeLog:
> 
>   PR c/81117
>   * config/darwin-c.c (framework_construct_pathname): Replace strncpy
>   with memcpy.
>   (find_subframework_file): Same.
So just to be 100% crystal clear.  This patch is not meant to change the
semantics of the code, it merely avoids code sequences that trigger the
new warning.  The code as-is is valid.

It's fairly common to have this kind of fallout and this looks well
within what we typically fix.  One could easily argue for these patches
independent of the warning since they make it clearer that the strings
in question are temporarily not terminated.

OK.

jeff


Re: [PATCH] [GOLD] Add plugin API for processing plugin-added input files

2017-11-10 Thread Sriraman Tallam via gcc-patches
On Thu, Nov 9, 2017 at 9:04 PM, Cary Coutant  wrote:

> > include/ChangeLog:
> > 2017-11-09  Stephen Crane  
> >
> > * plugin-api.h: Add new plugin hook to allow processing of input
> > files added by a plugin.
> > (ld_plugin_new_input_handler): New funcion hook type.
> > (ld_plugin_register_new_input): New interface.
> > (LDPT_REGISTER_NEW_INPUT_HOOK): New enum val.
> > (tv_register_new_input): New member.
> >
> >
> > gold/ChangeLog:
> > 2017-11-09  Stephen Crane  
> >
> > * plugin.cc (Plugin::load): Include hooks for register_new_input
> > in transfer vector.
> > (Plugin::new_input): New function.
> > (register_new_input): New function.
> > (Plugin_manager::claim_file): Call Plugin::new_input if in
> > replacement phase.
> > * plugin.h (Plugin::set_new_input_handler): New function.
> > * testsuite/plugin_new_section_layout.c: New plugin to test
> > new_input plugin API.
> > * testsuite/plugin_final_layout.sh: Add new input test.
> > * testsuite/Makefile.am (plugin_layout_new_file): New test case.
> > * testsuite/Makefile.in: Regenerate.
>
> These are OK. Thanks!
>
> Sri, I'm out of town through 11/18, and won't be able to commit the
> include/ patch to GCC before Stage 1 ends. Can you take care of it?
> (If not, I'll take care of it when I get back -- it was approved
> during Stage 1, so I think it's OK to commit early in Stage 3,
> especially since it's nothing but new declarations.)
>

Committed plugin-api.h patch to GCC trunk.

Thanks
Sri


>
> -cary
>


[PATCH] PR libstdc++/82917 add missing returns in

2017-11-10 Thread Jonathan Wakely

Thanks to the front-end now checking my dumb mistakes, these functions
no longer compiled - yay for G++ improvements!

PR libstdc++/82917
* include/std/fstream (basic_ifstream::open, basic_ofstream::open)
(basic_fstream::open): Fix missing return.

Tested powerpc64le-linux, committed to trunk.

commit a15c3d1af29deb46eae9bfe3da4bf6b44de5020e
Author: Jonathan Wakely 
Date:   Fri Nov 10 20:59:47 2017 +

PR libstdc++/82917 add missing returns in 

PR libstdc++/82917
* include/std/fstream (basic_ifstream::open, basic_ofstream::open)
(basic_fstream::open): Fix missing return.

diff --git a/libstdc++-v3/include/std/fstream b/libstdc++-v3/include/std/fstream
index a3324c004d7..26176afccd0 100644
--- a/libstdc++-v3/include/std/fstream
+++ b/libstdc++-v3/include/std/fstream
@@ -663,7 +663,7 @@ _GLIBCXX_BEGIN_NAMESPACE_VERSION
   template
auto
open(const _Path& __s, ios_base::openmode __mode = ios_base::in)
-   -> decltype(_M_filebuf.open(__s, __mode))
+   -> decltype((void)_M_filebuf.open(__s, __mode))
{ open(__s.c_str(), __mode); }
 #endif // C++17
 #endif // C++11
@@ -891,7 +891,7 @@ _GLIBCXX_BEGIN_NAMESPACE_VERSION
   template
auto
open(const _Path& __s, ios_base::openmode __mode = ios_base::out)
-   -> decltype(_M_filebuf.open(__s, __mode))
+   -> decltype((void)_M_filebuf.open(__s, __mode))
{ open(__s.c_str(), __mode); }
 #endif // C++17
 #endif // C++11
@@ -1118,7 +1118,7 @@ _GLIBCXX_BEGIN_NAMESPACE_VERSION
auto
open(const _Path& __s,
 ios_base::openmode __mode = ios_base::in | ios_base::out)
-   -> decltype(_M_filebuf.open(__s, __mode))
+   -> decltype((void)_M_filebuf.open(__s, __mode))
{ open(__s.c_str(), __mode); }
 #endif // C++17
 #endif // C++11


[PATCH 11/14] Handle location wrappers in string_conv_p

2017-11-10 Thread David Malcolm
gcc/cp/ChangeLog:
* typeck.c (string_conv_p): Strip any location wrapper from "exp".
---
 gcc/cp/typeck.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/gcc/cp/typeck.c b/gcc/cp/typeck.c
index dd3e19d..523e4d3 100644
--- a/gcc/cp/typeck.c
+++ b/gcc/cp/typeck.c
@@ -2149,6 +2149,8 @@ string_conv_p (const_tree totype, const_tree exp, int 
warn)
   && !same_type_p (t, wchar_type_node))
 return 0;
 
+  STRIP_ANY_LOCATION_WRAPPER (exp);
+
   if (TREE_CODE (exp) == STRING_CST)
 {
   /* Make sure that we don't try to convert between char and wide chars.  
*/
-- 
1.8.5.3



[PATCH 14/14] pp_c_cast_expression: don't print casts for location wrappers

2017-11-10 Thread David Malcolm
This patch suppresses the user-visible printing of location wrappers
for "%E" (and "%qE"), adding test coverage via selftests.

Seen via a failure of g++.dg/parse/error34.C and g++.dg/parse/error35.C.

gcc/c-family/ChangeLog:
* c-common.c (selftest::c_family_tests): Call
selftest::c_pretty_print_c_tests.
* c-common.h (selftest::c_pretty_print_c_tests): New decl.
* c-pretty-print.c: Include "selftest.h".
(pp_c_cast_expression): Don't print casts for location wrappers.
(selftest::assert_c_pretty_printer_output): New function.
(ASSERT_C_PRETTY_PRINTER_OUTPUT): New macro.
(selftest::test_location_wrappers): New function.
(selftest::c_pretty_print_c_tests): New function.
---
 gcc/c-family/c-common.c   |  1 +
 gcc/c-family/c-common.h   |  1 +
 gcc/c-family/c-pretty-print.c | 66 ++-
 3 files changed, 67 insertions(+), 1 deletion(-)

diff --git a/gcc/c-family/c-common.c b/gcc/c-family/c-common.c
index 739c54e..bfcf7b9 100644
--- a/gcc/c-family/c-common.c
+++ b/gcc/c-family/c-common.c
@@ -8126,6 +8126,7 @@ void
 c_family_tests (void)
 {
   c_format_c_tests ();
+  c_pretty_print_c_tests ();
 }
 
 } // namespace selftest
diff --git a/gcc/c-family/c-common.h b/gcc/c-family/c-common.h
index 7e1877e..1f15762 100644
--- a/gcc/c-family/c-common.h
+++ b/gcc/c-family/c-common.h
@@ -1559,6 +1559,7 @@ namespace selftest {
   /* Declarations for specific families of tests within c-family,
  by source file, in alphabetical order.  */
   extern void c_format_c_tests (void);
+  extern void c_pretty_print_c_tests (void);
 
   /* The entrypoint for running all of the above tests.  */
   extern void c_family_tests (void);
diff --git a/gcc/c-family/c-pretty-print.c b/gcc/c-family/c-pretty-print.c
index 0f48b9e..fd4cf0e 100644
--- a/gcc/c-family/c-pretty-print.c
+++ b/gcc/c-family/c-pretty-print.c
@@ -28,6 +28,7 @@ along with GCC; see the file COPYING3.  If not see
 #include "attribs.h"
 #include "intl.h"
 #include "tree-pretty-print.h"
+#include "selftest.h"
 
 /* The pretty-printer code is primarily designed to closely follow
(GNU) C and C++ grammars.  That is to be contrasted with spaghetti
@@ -1819,7 +1820,8 @@ pp_c_cast_expression (c_pretty_printer *pp, tree e)
 case FIX_TRUNC_EXPR:
 CASE_CONVERT:
 case VIEW_CONVERT_EXPR:
-  pp_c_type_cast (pp, TREE_TYPE (e));
+  if (!location_wrapper_p (e))
+   pp_c_type_cast (pp, TREE_TYPE (e));
   pp_c_cast_expression (pp, TREE_OPERAND (e, 0));
   break;
 
@@ -2409,3 +2411,65 @@ pp_c_tree_decl_identifier (c_pretty_printer *pp, tree t)
 
   pp_c_identifier (pp, name);
 }
+
+#if CHECKING_P
+
+namespace selftest {
+
+/* Selftests for pretty-printing trees.  */
+
+/* Verify that EXPR printed by c_pretty_printer is EXPECTED, using
+   LOC as the effective location for any failures.  */
+
+static void
+assert_c_pretty_printer_output (const location , const char *expected,
+   tree expr)
+{
+  c_pretty_printer pp;
+  pp.expression (expr);
+  ASSERT_STREQ_AT (loc, expected, pp_formatted_text ());
+}
+
+/* Helper function for calling assert_c_pretty_printer_output.
+   This is to avoid having to write SELFTEST_LOCATION.  */
+
+#define ASSERT_C_PRETTY_PRINTER_OUTPUT(EXPECTED, EXPR) \
+  SELFTEST_BEGIN_STMT  \
+assert_c_pretty_printer_output ((SELFTEST_LOCATION),   \
+   (EXPECTED), \
+   (EXPR));\
+  SELFTEST_END_STMT
+
+/* Verify that location wrappers don't show up in pretty-printed output.  */
+
+static void
+test_location_wrappers ()
+{
+  /* VAR_DECL.  */
+  tree id = get_identifier ("foo");
+  tree decl = build_decl (UNKNOWN_LOCATION, VAR_DECL, id,
+ integer_type_node);
+  tree wrapped_decl = maybe_wrap_with_location (decl, BUILTINS_LOCATION);
+  ASSERT_NE (wrapped_decl, decl);
+  ASSERT_C_PRETTY_PRINTER_OUTPUT ("foo", decl);
+  ASSERT_C_PRETTY_PRINTER_OUTPUT ("foo", wrapped_decl);
+
+  /* INTEGER_CST.  */
+  tree int_cst = build_int_cst (integer_type_node, 42);
+  tree wrapped_cst = maybe_wrap_with_location (int_cst, BUILTINS_LOCATION);
+  ASSERT_NE (wrapped_cst, int_cst);
+  ASSERT_C_PRETTY_PRINTER_OUTPUT ("42", int_cst);
+  ASSERT_C_PRETTY_PRINTER_OUTPUT ("42", wrapped_cst);
+}
+
+/* Run all of the selftests within this file.  */
+
+void
+c_pretty_print_c_tests ()
+{
+  test_location_wrappers ();
+}
+
+} // namespace selftest
+
+#endif /* CHECKING_P */
-- 
1.8.5.3



[PATCH 12/14] C++: introduce null_node_p

2017-11-10 Thread David Malcolm
Eschew comparison with null_node in favor of a new null_node_p
function, which strips any location wrappers.

All of these sites require the node to be non-NULL, with the
exception of the one in build_throw, hence the patch adds a
test for NULL before the call to non_null_p at that site, rather
than putting the test in null_node_p itself.

gcc/cp/ChangeLog:
* call.c (conversion_null_warnings): Replace comparison with
null_node with call to null_node_p.
(build_over_call): Likewise.
* cp-tree.h (null_node_p): New inline function.
* cvt.c (build_expr_type_conversion): Replace comparison with
null_node with call to null_node_p.
* error.c (args_to_string): Likewise.
* except.c (build_throw): Likewise.
* typeck.c (cp_build_binary_op): Likewise.
---
 gcc/cp/call.c| 4 ++--
 gcc/cp/cp-tree.h | 7 +++
 gcc/cp/cvt.c | 2 +-
 gcc/cp/error.c   | 2 +-
 gcc/cp/except.c  | 2 +-
 gcc/cp/typeck.c  | 2 +-
 6 files changed, 13 insertions(+), 6 deletions(-)

diff --git a/gcc/cp/call.c b/gcc/cp/call.c
index e4a7f19..a963dd4 100644
--- a/gcc/cp/call.c
+++ b/gcc/cp/call.c
@@ -6536,7 +6536,7 @@ static void
 conversion_null_warnings (tree totype, tree expr, tree fn, int argnum)
 {
   /* Issue warnings about peculiar, but valid, uses of NULL.  */
-  if (expr == null_node && TREE_CODE (totype) != BOOLEAN_TYPE
+  if (null_node_p (expr) && TREE_CODE (totype) != BOOLEAN_TYPE
   && ARITHMETIC_TYPE_P (totype))
 {
   source_location loc =
@@ -7873,7 +7873,7 @@ build_over_call (struct z_candidate *cand, int flags, 
tsubst_flags_t complain)
  func(NULL);
}
   */
-  if (arg == null_node
+  if (null_node_p (arg)
   && DECL_TEMPLATE_INFO (fn)
   && cand->template_decl
   && !(flags & LOOKUP_EXPLICIT_TMPL_ARGS))
diff --git a/gcc/cp/cp-tree.h b/gcc/cp/cp-tree.h
index 726b6f5..8735e99 100644
--- a/gcc/cp/cp-tree.h
+++ b/gcc/cp/cp-tree.h
@@ -7440,6 +7440,13 @@ named_decl_hash::equal (const value_type existing, 
compare_type candidate)
   return candidate == name;
 }
 
+inline bool
+null_node_p (const_tree expr)
+{
+  STRIP_ANY_LOCATION_WRAPPER (expr);
+  return expr == null_node;
+}
+
 /* -- end of C++ */
 
 #endif /* ! GCC_CP_TREE_H */
diff --git a/gcc/cp/cvt.c b/gcc/cp/cvt.c
index 9ce094e..b3a6f69 100644
--- a/gcc/cp/cvt.c
+++ b/gcc/cp/cvt.c
@@ -1642,7 +1642,7 @@ build_expr_type_conversion (int desires, tree expr, bool 
complain)
   tree conv = NULL_TREE;
   tree winner = NULL_TREE;
 
-  if (expr == null_node
+  if (null_node_p (expr)
   && (desires & WANT_INT)
   && !(desires & WANT_NULL))
 {
diff --git a/gcc/cp/error.c b/gcc/cp/error.c
index 2537713..d525103 100644
--- a/gcc/cp/error.c
+++ b/gcc/cp/error.c
@@ -3193,7 +3193,7 @@ args_to_string (tree p, int verbose)
   reinit_cxx_pp ();
   for (; p; p = TREE_CHAIN (p))
 {
-  if (TREE_VALUE (p) == null_node)
+  if (null_node_p (TREE_VALUE (p)))
pp_cxx_ws_string (cxx_pp, "NULL");
   else
dump_type (cxx_pp, error_type (TREE_VALUE (p)), flags);
diff --git a/gcc/cp/except.c b/gcc/cp/except.c
index ecc8941..30ab23d 100644
--- a/gcc/cp/except.c
+++ b/gcc/cp/except.c
@@ -577,7 +577,7 @@ build_throw (tree exp)
   return exp;
 }
 
-  if (exp == null_node)
+  if (exp && null_node_p (exp))
 warning (0, "throwing NULL, which has integral, not pointer type");
 
   if (exp != NULL_TREE)
diff --git a/gcc/cp/typeck.c b/gcc/cp/typeck.c
index 523e4d3..f139161 100644
--- a/gcc/cp/typeck.c
+++ b/gcc/cp/typeck.c
@@ -4255,7 +4255,7 @@ cp_build_binary_op (location_t location,
 }
 
   /* Issue warnings about peculiar, but valid, uses of NULL.  */
-  if ((orig_op0 == null_node || orig_op1 == null_node)
+  if ((null_node_p (orig_op0) || null_node_p (orig_op1))
   /* It's reasonable to use pointer values as operands of &&
 and ||, so NULL is no exception.  */
   && code != TRUTH_ANDIF_EXPR && code != TRUTH_ORIF_EXPR 
-- 
1.8.5.3



[PATCH 13/14] c-format.c: handle location wrappers

2017-11-10 Thread David Malcolm
gcc/c-family/ChangeLog:
* c-format.c (check_format_arg): Strip any location wrapper around
format_tree.
---
 gcc/c-family/c-format.c | 9 -
 1 file changed, 8 insertions(+), 1 deletion(-)

diff --git a/gcc/c-family/c-format.c b/gcc/c-family/c-format.c
index 164d035..6b436ec 100644
--- a/gcc/c-family/c-format.c
+++ b/gcc/c-family/c-format.c
@@ -1536,6 +1536,8 @@ check_format_arg (void *ctx, tree format_tree,
 
   location_t fmt_param_loc = EXPR_LOC_OR_LOC (format_tree, input_location);
 
+  STRIP_ANY_LOCATION_WRAPPER (format_tree);
+
   if (VAR_P (format_tree))
 {
   /* Pull out a constant value if the front end didn't.  */
@@ -1598,6 +1600,7 @@ check_format_arg (void *ctx, tree format_tree,
 }
   res->format_string_loc = EXPR_LOC_OR_LOC (format_tree, input_location);
   format_tree = TREE_OPERAND (format_tree, 0);
+  STRIP_ANY_LOCATION_WRAPPER (format_tree);
   if (format_types[info->format_type].flags 
   & (int) FMT_FLAG_PARSE_ARG_CONVERT_EXTERNAL)
 {
@@ -1634,7 +1637,10 @@ check_format_arg (void *ctx, tree format_tree,
   if (TREE_CODE (format_tree) == ARRAY_REF
   && tree_fits_shwi_p (TREE_OPERAND (format_tree, 1))
   && (offset += tree_to_shwi (TREE_OPERAND (format_tree, 1))) >= 0)
-format_tree = TREE_OPERAND (format_tree, 0);
+{
+  format_tree = TREE_OPERAND (format_tree, 0);
+  STRIP_ANY_LOCATION_WRAPPER (format_tree);
+}
   if (offset < 0)
 {
   res->number_non_literal++;
@@ -1650,6 +1656,7 @@ check_format_arg (void *ctx, tree format_tree,
 const char a[3] = "foo";).  */
   array_size = DECL_SIZE_UNIT (format_tree);
   format_tree = array_init;
+  STRIP_ANY_LOCATION_WRAPPER (format_tree);
 }
   if (TREE_CODE (format_tree) != STRING_CST)
 {
-- 
1.8.5.3



[PATCH 09/14] Strip location wrappers in null_ptr_cst_p

2017-11-10 Thread David Malcolm
Without this, "NULL" fails to be usable in C++11 onwards.

gcc/cp/ChangeLog:
* call.c (null_ptr_cst_p): Strip location wrappers when
converting from '0' to a pointer type in C++11 onwards.
---
 gcc/cp/call.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/gcc/cp/call.c b/gcc/cp/call.c
index 6875492..e4a7f19 100644
--- a/gcc/cp/call.c
+++ b/gcc/cp/call.c
@@ -534,6 +534,8 @@ null_ptr_cst_p (tree t)
 
   if (cxx_dialect >= cxx11)
 {
+  STRIP_ANY_LOCATION_WRAPPER (t);
+
   /* Core issue 903 says only literal 0 is a null pointer constant.  */
   if (TREE_CODE (type) == INTEGER_TYPE
  && !char_type_p (type)
-- 
1.8.5.3



[PATCH 10/14] warn_for_memset: handle location wrappers

2017-11-10 Thread David Malcolm
gcc/c-family/ChangeLog:
* c-warn.c (warn_for_memset): Strip any location wrappers
from arg0 and arg2.

gcc/cp/ChangeLog:
* parser.c (cp_parser_postfix_expression): Before warn_for_memset,
strip any wrapper around "arg2" before testing for CONST_DECL.
---
 gcc/c-family/c-warn.c | 3 +++
 gcc/cp/parser.c   | 1 +
 2 files changed, 4 insertions(+)

diff --git a/gcc/c-family/c-warn.c b/gcc/c-family/c-warn.c
index 245c37d..67e6db6 100644
--- a/gcc/c-family/c-warn.c
+++ b/gcc/c-family/c-warn.c
@@ -1850,6 +1850,9 @@ void
 warn_for_memset (location_t loc, tree arg0, tree arg2,
 int literal_zero_mask)
 {
+  STRIP_ANY_LOCATION_WRAPPER (arg0);
+  STRIP_ANY_LOCATION_WRAPPER (arg2);
+
   if (warn_memset_transposed_args
   && integer_zerop (arg2)
   && (literal_zero_mask & (1 << 2)) != 0
diff --git a/gcc/cp/parser.c b/gcc/cp/parser.c
index 54029ef..aee211f 100644
--- a/gcc/cp/parser.c
+++ b/gcc/cp/parser.c
@@ -7176,6 +7176,7 @@ cp_parser_postfix_expression (cp_parser *parser, bool 
address_p, bool cast_p,
tree arg0 = (*args)[0];
tree arg1 = (*args)[1];
tree arg2 = (*args)[2];
+   STRIP_ANY_LOCATION_WRAPPER (arg2);
int literal_mask = ((!!integer_zerop (arg1) << 1)
| (!!integer_zerop (arg2) << 2));
if (TREE_CODE (arg2) == CONST_DECL)
-- 
1.8.5.3



[PATCH 08/14] cp/tree.c: strip location wrappers in lvalue_kind

2017-11-10 Thread David Malcolm
Without this, then lvalue_p returns false for decls, and hence
e.g. uses of them for references fail.

Stripping location wrappers in lvalue_kind restores the correct
behavior of lvalue_p etc.

gcc/cp/ChangeLog:
* tree.c (lvalue_kind): Strip any location wrapper.
---
 gcc/cp/tree.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/gcc/cp/tree.c b/gcc/cp/tree.c
index b63f2ae..28ff7de 100644
--- a/gcc/cp/tree.c
+++ b/gcc/cp/tree.c
@@ -56,6 +56,8 @@ lvalue_kind (const_tree ref)
   cp_lvalue_kind op1_lvalue_kind = clk_none;
   cp_lvalue_kind op2_lvalue_kind = clk_none;
 
+  STRIP_ANY_LOCATION_WRAPPER (ref);
+
   /* Expressions of reference type are sometimes wrapped in
  INDIRECT_REFs.  INDIRECT_REFs are just internal compiler
  representation, not part of the language, so we have to look
-- 
1.8.5.3



[PATCH 07/14] reject_gcc_builtin: strip any location wrappers

2017-11-10 Thread David Malcolm
Otherwise pr70144-1.c breaks.

gcc/c-family/ChangeLog:
* c-common.c (reject_gcc_builtin): Strip any location from EXPR.
---
 gcc/c-family/c-common.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/gcc/c-family/c-common.c b/gcc/c-family/c-common.c
index 24077c7..739c54e 100644
--- a/gcc/c-family/c-common.c
+++ b/gcc/c-family/c-common.c
@@ -7774,6 +7774,8 @@ pointer_to_zero_sized_aggr_p (tree t)
 bool
 reject_gcc_builtin (const_tree expr, location_t loc /* = UNKNOWN_LOCATION */)
 {
+  STRIP_ANY_LOCATION_WRAPPER (expr);
+
   if (TREE_CODE (expr) == ADDR_EXPR)
 expr = TREE_OPERAND (expr, 0);
 
-- 
1.8.5.3



[PATCH 06/14] Fix Wsizeof-pointer-memaccess*.c

2017-11-10 Thread David Malcolm
gcc/c-family/ChangeLog:
* c-warn.c (sizeof_pointer_memaccess_warning): Strip any location
wrappers from src and dest.
---
 gcc/c-family/c-warn.c | 5 +
 1 file changed, 5 insertions(+)

diff --git a/gcc/c-family/c-warn.c b/gcc/c-family/c-warn.c
index 09ef685..245c37d 100644
--- a/gcc/c-family/c-warn.c
+++ b/gcc/c-family/c-warn.c
@@ -770,6 +770,11 @@ sizeof_pointer_memaccess_warning (location_t 
*sizeof_arg_loc, tree callee,
   if (idx >= 3)
 return;
 
+  if (src)
+STRIP_ANY_LOCATION_WRAPPER (src);
+  if (dest)
+STRIP_ANY_LOCATION_WRAPPER (dest);
+
   if (sizeof_arg[idx] == NULL || sizeof_arg[idx] == error_mark_node)
 return;
 
-- 
1.8.5.3



[PATCH 02/14] Support for adding and stripping location_t wrapper nodes

2017-11-10 Thread David Malcolm
This patch provides a mechanism in tree.c for adding a wrapper node
for expressing a location_t, for those nodes for which
!CAN_HAVE_LOCATION_P, along with a new method of cp_expr.

It's called in later patches in the kit via that new method.

In this version of the patch, I use NON_LVALUE_EXPR for wrapping
constants, and VIEW_CONVERT_EXPR for other nodes.

I also turned off wrapper nodes for EXCEPTIONAL_CLASS_P, for the sake
of keeping the patch kit more minimal.

The patch also adds a STRIP_ANY_LOCATION_WRAPPER macro for stripping
such nodes, used later on in the patch kit.

gcc/ChangeLog:
PR c++/43486
* tree.c (maybe_wrap_with_location): New function.
* tree.h (STRIP_ANY_LOCATION_WRAPPER): New macro.
(maybe_wrap_with_location): New decl.
(location_wrapper_p): New inline function.

gcc/cp/ChangeLog:
PR c++/43486
* cp-tree.h (cp_expr::maybe_add_location_wrapper): New method.
---
 gcc/cp/cp-tree.h |  6 ++
 gcc/tree.c   | 27 +++
 gcc/tree.h   | 26 ++
 3 files changed, 59 insertions(+)

diff --git a/gcc/cp/cp-tree.h b/gcc/cp/cp-tree.h
index 874cbcb..726b6f5 100644
--- a/gcc/cp/cp-tree.h
+++ b/gcc/cp/cp-tree.h
@@ -93,6 +93,12 @@ public:
 set_location (make_location (m_loc, start, finish));
   }
 
+  cp_expr& maybe_add_location_wrapper ()
+  {
+m_value = maybe_wrap_with_location (m_value, m_loc);
+return *this;
+  }
+
  private:
   tree m_value;
   location_t m_loc;
diff --git a/gcc/tree.c b/gcc/tree.c
index 28e157f..50c818c 100644
--- a/gcc/tree.c
+++ b/gcc/tree.c
@@ -13747,6 +13747,33 @@ set_source_range (tree expr, source_range src_range)
   return adhoc;
 }
 
+/* Return EXPR, potentially wrapped with a LOCATION_WRAPPER_EXPR node
+   at LOC, if !CAN_HAVE_LOCATION_P (expr).  */
+
+tree
+maybe_wrap_with_location (tree expr, location_t loc)
+{
+  if (expr == NULL)
+return NULL;
+  if (loc == UNKNOWN_LOCATION)
+return expr;
+  if (CAN_HAVE_LOCATION_P (expr))
+return expr;
+  /* We should only be adding wrappers for constants and for decls,
+ or for some exceptional tree nodes (e.g. BASELINK in the C++ FE).  */
+  gcc_assert (CONSTANT_CLASS_P (expr)
+ || DECL_P (expr)
+ || EXCEPTIONAL_CLASS_P (expr));
+
+  if (EXCEPTIONAL_CLASS_P (expr))
+return expr;
+
+  if (CONSTANT_CLASS_P (expr))
+return build1_loc (loc, NON_LVALUE_EXPR, TREE_TYPE (expr), expr);
+  else
+return build1_loc (loc, VIEW_CONVERT_EXPR, TREE_TYPE (expr), expr);
+}
+
 /* Return the name of combined function FN, for debugging purposes.  */
 
 const char *
diff --git a/gcc/tree.h b/gcc/tree.h
index 277aa91..fb45a8d 100644
--- a/gcc/tree.h
+++ b/gcc/tree.h
@@ -483,6 +483,15 @@ extern void omp_clause_range_check_failed (const_tree, 
const char *, int,
 #define STRIP_USELESS_TYPE_CONVERSION(EXP) \
   (EXP) = tree_ssa_strip_useless_type_conversions (EXP)
 
+/* Remove any VIEW_CONVERT_EXPR or NON_LVALUE_EXPR that's purely
+   in use to provide a location_t.  */
+
+#define STRIP_ANY_LOCATION_WRAPPER(EXP) \
+  do { \
+if (location_wrapper_p (EXP))  \
+  (EXP) = TREE_OPERAND ((EXP), 0); \
+  } while (0)
+
 /* Nonzero if TYPE represents a vector type.  */
 
 #define VECTOR_TYPE_P(TYPE) (TREE_CODE (TYPE) == VECTOR_TYPE)
@@ -1147,6 +1156,8 @@ get_expr_source_range (tree expr)
 
 extern void protected_set_expr_location (tree, location_t);
 
+extern tree maybe_wrap_with_location (tree, location_t);
+
 /* In a TARGET_EXPR node.  */
 #define TARGET_EXPR_SLOT(NODE) TREE_OPERAND_CHECK_CODE (NODE, TARGET_EXPR, 0)
 #define TARGET_EXPR_INITIAL(NODE) TREE_OPERAND_CHECK_CODE (NODE, TARGET_EXPR, 
1)
@@ -3637,6 +3648,21 @@ id_equal (const char *str, const_tree id)
   return !strcmp (str, IDENTIFIER_POINTER (id));
 }
 
+/* Test if EXP is merely a wrapper node, added to express a location_t
+   on behalf of its child.  */
+
+inline bool location_wrapper_p (const_tree exp)
+{
+  if (((TREE_CODE (exp) == NON_LVALUE_EXPR
+   && CONSTANT_CLASS_P (TREE_OPERAND (exp, 0)))
+   || (TREE_CODE (exp) == VIEW_CONVERT_EXPR
+  && !CONSTANT_CLASS_P (TREE_OPERAND (exp, 0
+  && (TREE_TYPE (exp)
+ == TREE_TYPE (TREE_OPERAND (exp, 0
+return true;
+  return false;
+}
+
 #define error_mark_nodeglobal_trees[TI_ERROR_MARK]
 
 #define intQI_type_nodeglobal_trees[TI_INTQI_TYPE]
-- 
1.8.5.3



[PATCH 03/14] C++: add location_t wrapper nodes during parsing (minimal impl)

2017-11-10 Thread David Malcolm
The initial version of the patch kit added location wrapper nodes
around constants and uses-of-declarations, along with some other
places in the parser (typeid, alignof, sizeof, offsetof).

This version takes a much more minimal approach: it only adds
location wrapper nodes around the arguments at callsites, thus
not adding wrapper nodes around uses of constants and decls in other
locations.

It keeps them for the other places in the parser (typeid, alignof,
sizeof, offsetof).

In addition, for now, each site that adds wrapper nodes is guarded
with !processing_template_decl, suppressing the creation of wrapper
nodes when processing template declarations.  This is to simplify
the patch kit so that we don't have to support wrapper nodes during
template expansion.

gcc/cp/ChangeLog:
* parser.c (cp_parser_postfix_expression): Call
maybe_add_location_wrapper on the result for RID_TYPEID. Pass true
for new "wrap_locations_p" param of
cp_parser_parenthesized_expression_list.
(cp_parser_parenthesized_expression_list): Add "wrap_locations_p"
param, defaulting to false.  Convert "expr" to a cp_expr, and call
maybe_add_location_wrapper on it when wrap_locations_p is true,
except when processing template decls.
(cp_parser_unary_expression): Call maybe_add_location_wrapper on
the result for RID_ALIGNOF and RID_SIZEOF.
(cp_parser_builtin_offsetof): Likewise.

FIXME: don't do alignof etc when processing template decls
---
 gcc/cp/parser.c | 29 +++--
 1 file changed, 23 insertions(+), 6 deletions(-)

diff --git a/gcc/cp/parser.c b/gcc/cp/parser.c
index 77b9637..54029ef 100644
--- a/gcc/cp/parser.c
+++ b/gcc/cp/parser.c
@@ -2054,7 +2054,8 @@ static tree cp_parser_postfix_open_square_expression
 static tree cp_parser_postfix_dot_deref_expression
   (cp_parser *, enum cpp_ttype, cp_expr, bool, cp_id_kind *, location_t);
 static vec *cp_parser_parenthesized_expression_list
-  (cp_parser *, int, bool, bool, bool *, location_t * = NULL);
+  (cp_parser *, int, bool, bool, bool *, location_t * = NULL,
+   bool = false);
 /* Values for the second parameter of cp_parser_parenthesized_expression_list. 
 */
 enum { non_attr = 0, normal_attr = 1, id_attr = 2 };
 static void cp_parser_pseudo_destructor_name
@@ -6776,6 +6777,8 @@ cp_parser_postfix_expression (cp_parser *parser, bool 
address_p, bool cast_p,
location_t typeid_loc
  = make_location (start_loc, start_loc, close_paren->location);
postfix_expression.set_location (typeid_loc);
+   if (!processing_template_decl)
+ postfix_expression.maybe_add_location_wrapper ();
  }
   }
   break;
@@ -7096,7 +7099,8 @@ cp_parser_postfix_expression (cp_parser *parser, bool 
address_p, bool cast_p,
(parser, non_attr,
 /*cast_p=*/false, /*allow_expansion_p=*/true,
 /*non_constant_p=*/NULL,
-/*close_paren_loc=*/_paren_loc));
+/*close_paren_loc=*/_paren_loc,
+/*wrap_locations_p=*/true));
if (is_builtin_constant_p)
  {
parser->integral_constant_expression_p
@@ -7736,6 +7740,10 @@ cp_parser_postfix_dot_deref_expression (cp_parser 
*parser,
ALLOW_EXPANSION_P is true if this expression allows expansion of an
argument pack.
 
+   WRAP_LOCATIONS_P is true if expressions within this list for which
+   CAN_HAVE_LOCATION_P is false should be wrapped with nodes expressing
+   their source locations.
+
Returns a vector of trees.  Each element is a representation of an
assignment-expression.  NULL is returned if the ( and or ) are
missing.  An empty, but allocated, vector is returned on no
@@ -7755,7 +7763,8 @@ cp_parser_parenthesized_expression_list (cp_parser* 
parser,
 bool cast_p,
  bool allow_expansion_p,
 bool *non_constant_p,
-location_t *close_paren_loc)
+location_t *close_paren_loc,
+bool wrap_locations_p)
 {
   vec *expression_list;
   bool fold_expr_p = is_attribute_list != non_attr;
@@ -7778,12 +7787,12 @@ cp_parser_parenthesized_expression_list (cp_parser* 
parser,
 = parser->greater_than_is_operator_p;
   parser->greater_than_is_operator_p = true;
 
+  cp_expr expr (NULL_TREE);
+
   /* Consume expressions until there are no more.  */
   if (cp_lexer_next_token_is_not (parser->lexer, CPP_CLOSE_PAREN))
 while (true)
   {
-   tree expr;
-
/* At the beginning of attribute lists, check to see if the
   next token is an identifier.  */
if (is_attribute_list == id_attr
@@ -7837,11 +7846,15 @@ cp_parser_parenthesized_expression_list (cp_parser* 

[PATCH 04/14] Update testsuite to show improvements

2017-11-10 Thread David Malcolm
gcc/testsuite/ChangeLog:
PR c++/43486
* g++.dg/diagnostic/param-type-mismatch.C: Update expected results
to reflect that the arguments are correctly underlined.
* g++.dg/plugin/diagnostic-test-expressions-1.C: Add test coverage
for globals, params, locals and literals.
(test_sizeof): Directly test the location of "sizeof", rather than
when used in compound expressions.
(test_alignof): Likewise for "alignof".
(test_string_literals): Likewise for string literals.
(test_numeric_literals): Likewise for numeric literals.
(test_builtin_offsetof): Likewise for "__builtin_offsetof".
(test_typeid): Likewise for typeid.
(test_unary_plus): New.
---
 .../g++.dg/diagnostic/param-type-mismatch.C|  27 +--
 .../g++.dg/plugin/diagnostic-test-expressions-1.C  | 260 +
 2 files changed, 172 insertions(+), 115 deletions(-)

diff --git a/gcc/testsuite/g++.dg/diagnostic/param-type-mismatch.C 
b/gcc/testsuite/g++.dg/diagnostic/param-type-mismatch.C
index bc3a938..5fcde0b 100644
--- a/gcc/testsuite/g++.dg/diagnostic/param-type-mismatch.C
+++ b/gcc/testsuite/g++.dg/diagnostic/param-type-mismatch.C
@@ -1,9 +1,6 @@
 // { dg-options "-fdiagnostics-show-caret" }
 
-/* A collection of calls where argument 2 is of the wrong type.
-
-   TODO: we should put the caret and underline for the diagnostic
-   at the second argument, rather than the close paren.  */
+/* A collection of calls where argument 2 is of the wrong type.  */
 
 /* decl, with argname.  */
 
@@ -14,7 +11,7 @@ int test_1 (int first, int second, float third)
   return callee_1 (first, second, third); // { dg-error "invalid conversion 
from 'int' to 'const char\\*'" }
   /* { dg-begin-multiline-output "" }
return callee_1 (first, second, third);
-^
+   ^~
  { dg-end-multiline-output "" } */
   // { dg-message "initializing argument 2 of 'int callee_1\\(int, const 
char\\*, float\\)'" "" { target *-*-* } callee_1 }
   /* { dg-begin-multiline-output "" }
@@ -32,7 +29,7 @@ int test_2 (int first, int second, float third)
   return callee_2 (first, second, third); // { dg-error "invalid conversion 
from 'int' to 'const char\\*'" }
   /* { dg-begin-multiline-output "" }
return callee_2 (first, second, third);
-^
+   ^~
  { dg-end-multiline-output "" } */
   // { dg-message "initializing argument 2 of 'int callee_2\\(int, const 
char\\*, float\\)'" "" { target *-*-* } callee_2 }
   /* { dg-begin-multiline-output "" }
@@ -53,7 +50,7 @@ int test_3 (int first, int second, float third)
   return callee_3 (first, second, third); // { dg-error "invalid conversion 
from 'int' to 'const char\\*'" }
   /* { dg-begin-multiline-output "" }
return callee_3 (first, second, third);
-^
+   ^~
  { dg-end-multiline-output "" } */
   // { dg-message "initializing argument 2 of 'int callee_3\\(int, const 
char\\*, float\\)'" "" { target *-*-* } callee_3 }
   /* { dg-begin-multiline-output "" }
@@ -71,7 +68,7 @@ int test_4 (int first, int second, float third)
   return s4::member_1 (first, second, third); // { dg-error "invalid 
conversion from 'int' to 'const char\\*'" }
   /* { dg-begin-multiline-output "" }
return s4::member_1 (first, second, third);
-^
+   ^~
  { dg-end-multiline-output "" } */
   /* { dg-begin-multiline-output "" }
  struct s4 { static int member_1 (int one, const char *two, float three); };
@@ -89,7 +86,7 @@ int test_5 (int first, int second, float third)
   return inst.member_1 (first, second, third); // { dg-error "invalid 
conversion from 'int' to 'const char\\*'" }
   /* { dg-begin-multiline-output "" }
return inst.member_1 (first, second, third);
- ^
+^~
  { dg-end-multiline-output "" } */
   /* { dg-begin-multiline-output "" }
  struct s5 { int member_1 (int one, const char *two, float three); };
@@ -106,7 +103,7 @@ int test_6 (int first, int second, float third, s6 *ptr)
   return ptr->member_1 (first, second, third); // { dg-error "invalid 
conversion from 'int' to 'const char\\*'" }
   /* { dg-begin-multiline-output "" }
return ptr->member_1 (first, second, third);
- ^
+^~
  { dg-end-multiline-output "" } */
   /* { dg-begin-multiline-output "" }
  struct s6 { int member_1 (int one, const char *two, float three); };
@@ -128,7 +125,7 @@ int test_7 (int first, int second, float third)
  { dg-end-multiline-output "" } */
   /* { dg-begin-multiline-output "" }
return test_7  (first, second, third);
- ^
+

[PATCH 05/14] tree.c: strip location wrappers from integer_zerop etc

2017-11-10 Thread David Malcolm
We need to strip away location wrappers in tree.c predicates like
integer_zerop, otherwise they fail when they're called on
wrapped INTEGER_CST; an example can be seen for
  c-c++-common/Wmemset-transposed-args1.c
in g++.sum, where the warn_for_memset fails to detect integer zero
if the location wrappers aren't stripped.

gcc/ChangeLog:
* tree.c (integer_zerop): Use STRIP_ANY_LOCATION_WRAPPER on the
expr.
(integer_onep): Likewise.
(integer_each_onep): Likewise.
(integer_all_onesp): Likewise.
(integer_minus_onep): Likewise.
(integer_pow2p): Likewise.
(integer_nonzerop): Likewise.
(integer_truep): Likewise.
(fixed_zerop): Likewise.
(tree_log2): Likewise.
(tree_floor_log2): Likewise.
(tree_ctz): Likewise.
(real_zerop): Likewise.
(real_onep): Likewise.
(real_minus_onep): Likewise.
(really_constant_p): Likewise.
---
 gcc/tree.c | 32 
 1 file changed, 32 insertions(+)

diff --git a/gcc/tree.c b/gcc/tree.c
index 50c818c..f71b484 100644
--- a/gcc/tree.c
+++ b/gcc/tree.c
@@ -2343,6 +2343,8 @@ zerop (const_tree expr)
 int
 integer_zerop (const_tree expr)
 {
+  STRIP_ANY_LOCATION_WRAPPER (expr);
+
   switch (TREE_CODE (expr))
 {
 case INTEGER_CST:
@@ -2369,6 +2371,8 @@ integer_zerop (const_tree expr)
 int
 integer_onep (const_tree expr)
 {
+  STRIP_ANY_LOCATION_WRAPPER (expr);
+
   switch (TREE_CODE (expr))
 {
 case INTEGER_CST:
@@ -2395,6 +2399,8 @@ integer_onep (const_tree expr)
 int
 integer_each_onep (const_tree expr)
 {
+  STRIP_ANY_LOCATION_WRAPPER (expr);
+
   if (TREE_CODE (expr) == COMPLEX_CST)
 return (integer_onep (TREE_REALPART (expr))
&& integer_onep (TREE_IMAGPART (expr)));
@@ -2408,6 +2414,8 @@ integer_each_onep (const_tree expr)
 int
 integer_all_onesp (const_tree expr)
 {
+  STRIP_ANY_LOCATION_WRAPPER (expr);
+
   if (TREE_CODE (expr) == COMPLEX_CST
   && integer_all_onesp (TREE_REALPART (expr))
   && integer_all_onesp (TREE_IMAGPART (expr)))
@@ -2434,6 +2442,8 @@ integer_all_onesp (const_tree expr)
 int
 integer_minus_onep (const_tree expr)
 {
+  STRIP_ANY_LOCATION_WRAPPER (expr);
+
   if (TREE_CODE (expr) == COMPLEX_CST)
 return (integer_all_onesp (TREE_REALPART (expr))
&& integer_zerop (TREE_IMAGPART (expr)));
@@ -2447,6 +2457,8 @@ integer_minus_onep (const_tree expr)
 int
 integer_pow2p (const_tree expr)
 {
+  STRIP_ANY_LOCATION_WRAPPER (expr);
+
   if (TREE_CODE (expr) == COMPLEX_CST
   && integer_pow2p (TREE_REALPART (expr))
   && integer_zerop (TREE_IMAGPART (expr)))
@@ -2464,6 +2476,8 @@ integer_pow2p (const_tree expr)
 int
 integer_nonzerop (const_tree expr)
 {
+  STRIP_ANY_LOCATION_WRAPPER (expr);
+
   return ((TREE_CODE (expr) == INTEGER_CST
   && wi::to_wide (expr) != 0)
  || (TREE_CODE (expr) == COMPLEX_CST
@@ -2478,6 +2492,8 @@ integer_nonzerop (const_tree expr)
 int
 integer_truep (const_tree expr)
 {
+  STRIP_ANY_LOCATION_WRAPPER (expr);
+
   if (TREE_CODE (expr) == VECTOR_CST)
 return integer_all_onesp (expr);
   return integer_onep (expr);
@@ -2488,6 +2504,8 @@ integer_truep (const_tree expr)
 int
 fixed_zerop (const_tree expr)
 {
+  STRIP_ANY_LOCATION_WRAPPER (expr);
+
   return (TREE_CODE (expr) == FIXED_CST
  && TREE_FIXED_CST (expr).data.is_zero ());
 }
@@ -2498,6 +2516,8 @@ fixed_zerop (const_tree expr)
 int
 tree_log2 (const_tree expr)
 {
+  STRIP_ANY_LOCATION_WRAPPER (expr);
+
   if (TREE_CODE (expr) == COMPLEX_CST)
 return tree_log2 (TREE_REALPART (expr));
 
@@ -2510,6 +2530,8 @@ tree_log2 (const_tree expr)
 int
 tree_floor_log2 (const_tree expr)
 {
+  STRIP_ANY_LOCATION_WRAPPER (expr);
+
   if (TREE_CODE (expr) == COMPLEX_CST)
 return tree_log2 (TREE_REALPART (expr));
 
@@ -2522,6 +2544,8 @@ tree_floor_log2 (const_tree expr)
 unsigned int
 tree_ctz (const_tree expr)
 {
+  STRIP_ANY_LOCATION_WRAPPER (expr);
+
   if (!INTEGRAL_TYPE_P (TREE_TYPE (expr))
   && !POINTER_TYPE_P (TREE_TYPE (expr)))
 return 0;
@@ -2633,6 +2657,8 @@ tree_ctz (const_tree expr)
 int
 real_zerop (const_tree expr)
 {
+  STRIP_ANY_LOCATION_WRAPPER (expr);
+
   switch (TREE_CODE (expr))
 {
 case REAL_CST:
@@ -2661,6 +2687,8 @@ real_zerop (const_tree expr)
 int
 real_onep (const_tree expr)
 {
+  STRIP_ANY_LOCATION_WRAPPER (expr);
+
   switch (TREE_CODE (expr))
 {
 case REAL_CST:
@@ -2688,6 +2716,8 @@ real_onep (const_tree expr)
 int
 real_minus_onep (const_tree expr)
 {
+  STRIP_ANY_LOCATION_WRAPPER (expr);
+
   switch (TREE_CODE (expr))
 {
 case REAL_CST:
@@ -2714,6 +2744,8 @@ real_minus_onep (const_tree expr)
 int
 really_constant_p (const_tree exp)
 {
+  STRIP_ANY_LOCATION_WRAPPER (exp);
+
   /* This is not quite the same as STRIP_NOPS.  It does more.  */
   while (CONVERT_EXPR_P (exp)
 || TREE_CODE (exp) == NON_LVALUE_EXPR)
-- 
1.8.5.3



[PATCH 01/14] C++: preserve locations within build_address

2017-11-10 Thread David Malcolm
This is needed for the locations of string literals to be usable,
otherwise the ADDR_EXPR has UNKNOWN_LOCATION, despite wrapping
a node with a correct location_t.

gcc/cp/ChangeLog:
* typeck.c (build_address): Use location of operand when building
address expression.
---
 gcc/cp/typeck.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/gcc/cp/typeck.c b/gcc/cp/typeck.c
index 9130c10..dd3e19d 100644
--- a/gcc/cp/typeck.c
+++ b/gcc/cp/typeck.c
@@ -5621,7 +5621,7 @@ build_address (tree t)
   if (error_operand_p (t) || !cxx_mark_addressable (t))
 return error_mark_node;
   gcc_checking_assert (TREE_CODE (t) != CONSTRUCTOR);
-  t = build_fold_addr_expr (t);
+  t = build_fold_addr_expr_loc (EXPR_LOCATION (t), t);
   if (TREE_CODE (t) != ADDR_EXPR)
 t = rvalue (t);
   return t;
-- 
1.8.5.3



[PATCH v2: 00/14] Preserving locations for variable-uses and constants (PR 43486)

2017-11-10 Thread David Malcolm
On Thu, 2017-11-02 at 10:46 -0400, Jason Merrill wrote:
> On Tue, Oct 31, 2017 at 5:09 PM, David Malcolm 
> wrote:
> > On Tue, 2017-10-24 at 09:53 -0400, Jason Merrill wrote:
> > > On Fri, Oct 20, 2017 at 5:53 PM, David Malcolm  > > om>
> > > wrote:
> > > > Design questions:
> > > > 
> > > > * The patch introduces a new kind of tree node, currently
> > > > called
> > > >   DECL_WRAPPER_EXPR (although it's used for wrapping constants
> > > > as
> > > > well
> > > >   as decls).  Should wrappers be a new kind of tree node, or
> > > > should
> > > > they
> > > >   reuse an existing TREE_CODE? (e.g. NOP_EXPR, CONVERT_EXPR,
> > > > etc).
> > > > * NOP_EXPR: seems to be for use as an rvalue
> > > > * CONVERT_EXPR: for type conversions
> > > > * NON_LVALUE_EXPR: "Value is same as argument, but
> > > > guaranteed
> > > > not an
> > > >   lvalue"
> > > >   * but we *do* want to support lvalues here
> > > 
> > > I think using NON_LVALUE_EXPR for constants would be appropriate.
> > > 
> > > > * VIEW_CONVERT_EXPR: viewing one thing as of a different
> > > > type
> > > >   * can it support lvalues?
> > > 
> > > Yes, the purpose of VIEW_CONVERT_EXPR is to support lvalues, it
> > > seems
> > > like the right choice.
> > > 
> > > Jason
> > 
> > Thanks.  I've been working on a new version of the patch using
> > those
> > tree codes, but have run into an issue.
> > 
> > In g++.dg/conversion/reinterpret1.C:
> > 
> >   // PR c++/15076
> > 
> >   struct Y { Y(int &); };
> > 
> >   int v;
> >   Y y1(reinterpret_cast(v));  // { dg-error "" }
> > 
> > With trunk, this successfully generates an error:
> > 
> >   reinterpret1.C:6:6: error: cannot bind non-const lvalue reference
> > of type ‘int&’ to an rvalue of type ‘int’
> >Y y1(reinterpret_cast(v));  // { dg-error "" }
> > ^~~~
> >   reinterpret1.C:3:12: note:   initializing argument 1 of
> > ‘Y::Y(int&)’
> >struct Y { Y(int &); };
> >   ^
> > 
> > where internally there's a NON_LVALUE_EXPR around a VAR_DECL, where
> > both have the same type:
> > 
> > (gdb) call debug_tree (expr)
> >   > type  > size 
> > unit-size 
> > align:32 warn_if_not_align:0 symtab:0 alias-set -1
> > canonical-type 0x7132e5e8 precision:32 min  > 0x713310d8 -2147483648> max  > 2147483647>
> > pointer_to_this 
> > reference_to_this >
> > 
> > arg:0  > 0x7132e5e8 int>
> > used public static tree_1 read SI /home/david/coding-3/gcc-
> > git-expr-vs-
> > decl/src/gcc/testsuite/g++.dg/conversion/reinterpret1.C:5:5 size
> >  unit-size  > 0x71331138 4>
> > align:32 warn_if_not_align:0 context  > 0x7131e168 /home/david/coding-3/gcc-git-expr-vs-
> > decl/src/gcc/testsuite/g++.dg/conversion/reinterpret1.C>
> > chain  > 0x7144c150 Y>
> > public decl_2 VOID /home/david/coding-3/gcc-git-expr-
> > vs-decl/src/gcc/testsuite/g++.dg/conversion/reinterpret1.C:3:8
> > align:8 warn_if_not_align:0 context
> >  > expr-vs-decl/src/gcc/testsuite/g++.dg/conversion/reinterpret1.C>
> > chain >>
> > /home/david/coding-3/gcc-git-expr-vs-
> > decl/src/gcc/testsuite/g++.dg/conversion/reinterpret1.C:6:6 start:
> > /home/david/coding-3/gcc-git-expr-vs-
> > decl/src/gcc/testsuite/g++.dg/conversion/reinterpret1.C:6:6 finish:
> > /home/david/coding-3/gcc-git-expr-vs-
> > decl/src/gcc/testsuite/g++.dg/conversion/reinterpret1.C:6:29>
> > 
> > The problem is that this reinterpret cast "looks" just like one of
> > my
> > location wrappers.
> 
> Your code shouldn't strip a NON_LVALUE_EXPR around a VAR_DECL.

> > I see a similar issue with constants, where with:
> > 
> >   struct Y { Y(int &); };
> >   Y y1(reinterpret_cast(42));
> > 
> > trunk generates an error like the above, but my code handles the
> >   NON_LVALUE_EXPR(INTEGER_CST(42))
> > as if it were a location wrapper around the INTEGER_CST, and thus
> > doesn't emit the error.
> 
> Why doesn't it emit the error?  We should get the same error whether
> or not we strip the wrapper.

Thanks: my stripping macro was over-zealous: it was stripping any
NON_LVALUE_EXPR or VIEW_CONVERT_EXPR where the type matched that of
the wrapped node.  I've added the additional condition that a
NON_LVALUE_EXPR has to be around a CONSTANT_CLASS_P, and
a VIEW_CONVERT_EXPR around a !CONSTANT_CLASS_P.

Here's an updated version of the patch (v2), now a patch kit (on top
of r254387).  I split it up thematically for ease of review, but all
the patches go together.

This version of the patch kit bootstraps and passes the regression
tests (on x86_64-pc-linux-gnu)

To do so, I've made some simplfications to how wrappers nodes are
added.

The previous patch added wrappers in the C++ parser around constants
and uses-of-declarations, along with some other places in the
parser (typeid, alignof, sizeof, offsetof).

This version takes a much more minimal approach: it only adds
location wrapper 

Re: [PATCH, Fortran] Fix PR 82886 - ICE with -finit-derived in gfc_conv_expr

2017-11-10 Thread Fritz Reese
My mistake, the patch file should not have the random changes to
libiberty/functions.texi. Not sure how that ended up there.
---
Fritz Reese


On Fri, Nov 10, 2017 at 4:31 PM, Fritz Reese  wrote:
> All,
>
> The attached patch fixes the ICE reported in PR 82886. The ICE is due
> to compiling the program with -finit-derived, but without any other
> -finit-* flag (apparently this is something which I never tried when I
> introduced -finit-derived, somehow...) Previously, -finit-derived
> would inherit the component initializer expressions from flags like
> -finit-local-zero, -finit-integer=, -finit-logical=, etc... The
> problem is, if one is not specified and a derived type variable
> contains a component of the same type, the structure constructor
> itself is generated, but the structure element for the component ends
> up with a NULL expression.
>
> The attached patch implements what I think is a natural solution from
> the user's perspective. If -finit-derived is given, any -finit-* flags
> which are not given will be treated as if -finit-local-zero was given,
> for the purposes of the derived-type component initializers. (Of
> course explicit -finit-* flags will still override this inference).
>
> Regression tests pass on x86_64-redhat-linux. OK?
>
> ---
> Fritz Reese
>
> From e70f3917a7b2d35f9baad2f09199c1ccc60a04d4 Mon Sep 17 00:00:00 2001
> From: Fritz Reese 
> Date: Fri, 10 Nov 2017 16:10:06 -0500
> Subject: [PATCH] Fix -finit-derived when given without other -finit-* flags.
>
> PR fortran/82886
> gcc/fortran/
> * gfortran.h (gfc_build_init_expr): New prototype.
> * invoke.texi (finit-derived): Update documentation.
> * expr.c (gfc_build_init_expr): New, from gfc_build_default_init_expr.
> (gfc_build_default_init_expr): Redirect to 
> gfc_build_init_expr(,,false)
> (component_initializer): Force building initializers using
> gfc_build_init_expr(,,true).
>
> PR fortran/82886
> * gcc/testsuite/gfortran.dg/init_flag_16.f03: New testcase.


pr82886.patch
Description: Binary data


[PATCH, Fortran] Fix PR 82886 - ICE with -finit-derived in gfc_conv_expr

2017-11-10 Thread Fritz Reese
All,

The attached patch fixes the ICE reported in PR 82886. The ICE is due
to compiling the program with -finit-derived, but without any other
-finit-* flag (apparently this is something which I never tried when I
introduced -finit-derived, somehow...) Previously, -finit-derived
would inherit the component initializer expressions from flags like
-finit-local-zero, -finit-integer=, -finit-logical=, etc... The
problem is, if one is not specified and a derived type variable
contains a component of the same type, the structure constructor
itself is generated, but the structure element for the component ends
up with a NULL expression.

The attached patch implements what I think is a natural solution from
the user's perspective. If -finit-derived is given, any -finit-* flags
which are not given will be treated as if -finit-local-zero was given,
for the purposes of the derived-type component initializers. (Of
course explicit -finit-* flags will still override this inference).

Regression tests pass on x86_64-redhat-linux. OK?

---
Fritz Reese

>From e70f3917a7b2d35f9baad2f09199c1ccc60a04d4 Mon Sep 17 00:00:00 2001
From: Fritz Reese 
Date: Fri, 10 Nov 2017 16:10:06 -0500
Subject: [PATCH] Fix -finit-derived when given without other -finit-* flags.

PR fortran/82886
gcc/fortran/
* gfortran.h (gfc_build_init_expr): New prototype.
* invoke.texi (finit-derived): Update documentation.
* expr.c (gfc_build_init_expr): New, from gfc_build_default_init_expr.
(gfc_build_default_init_expr): Redirect to gfc_build_init_expr(,,false)
(component_initializer): Force building initializers using
gfc_build_init_expr(,,true).

PR fortran/82886
* gcc/testsuite/gfortran.dg/init_flag_16.f03: New testcase.


pr82886.patch
Description: Binary data


Re: std::advance istreambuf_iterator overload

2017-11-10 Thread Jonathan Wakely

On 09/11/17 22:12 +0100, François Dumont wrote:

Hi

    Working on istreambuf_iterator I realized that this iterator would 
really benefit from an std::advance overload so here it is.




    Tested under Linux x86_64 normal and debug modes, ok to commit ?

François




diff --git a/libstdc++-v3/include/bits/streambuf_iterator.h 
b/libstdc++-v3/include/bits/streambuf_iterator.h
index 0a6c7f9..b60626a 100644
--- a/libstdc++-v3/include/bits/streambuf_iterator.h
+++ b/libstdc++-v3/include/bits/streambuf_iterator.h
@@ -417,6 +421,55 @@ _GLIBCXX_BEGIN_NAMESPACE_VERSION
  return __last;
}

+  template
+inline _GLIBCXX17_CONSTEXPR void


This function can never be constexpr.


+advance(istreambuf_iterator<_CharT>& __i, _Distance __n)
+{
+  if (__n == 0)
+   return;
+
+  __glibcxx_assert(__n > 0);
+  __glibcxx_requires_cond(!__i._M_at_eof(),
+ _M_message(__gnu_debug::__msg_inc_istreambuf)
+ ._M_iterator(__i));
+
+  typedef istreambuf_iterator<_CharT>   __is_iterator_type;
+  typedef typename __is_iterator_type::traits_typetraits_type;
+  typedef typename __is_iterator_type::streambuf_type  streambuf_type;
+  typedef typename traits_type::int_type  int_type;
+  const int_type __eof = traits_type::eof();
+
+  streambuf_type* __sb = __i._M_sbuf;


This function relies on private members of istreambuf_iterator which
may not be present in a user-defined specialization of
istreambuf_iterator.

I think realistically you can only do this optimization for
istreambuf_iterator and istreambuf_iterator. Look at
how the std::copy and std::find overloads are contrained with
__is_char.


+  int_type __c = __sb->sgetc();
+  while (__n && !traits_type::eq_int_type(__c, __eof))


Can we use __n > 0 as the condition? Would it give better behaviour
for negative values in non-debug mode?


+   {
+ streamsize __size = __sb->egptr() - __sb->gptr();
+ if (__size > __n)
+   {
+ __sb->__safe_gbump(__n);
+ __n = 0;
+   }
+ else if (__size > 1)
+   {
+ __sb->__safe_gbump(__size);
+ __n -= __size;
+ __c = __sb->underflow();
+   }
+ else
+   {
+ --__n;
+ __c = __sb->snextc();
+   }


It seems like it should be possible to optimize this loop, but I don't
see an obvious way to improve it.


+   }
+
+  __glibcxx_requires_cond(__n == 0,
+ _M_message(__gnu_debug::__msg_inc_istreambuf)
+ ._M_iterator(__i));
+  __i._M_c = __eof;
+  if (traits_type::eq_int_type(__c, __eof))
+   __i._M_sbuf = 0;
+}
+




diff --git 
a/libstdc++-v3/testsuite/25_algorithms/advance/istreambuf_iterators/char/1.cc 
b/libstdc++-v3/testsuite/25_algorithms/advance/istreambuf_iterators/char/1.cc
new file mode 100644
index 000..7c3f882
--- /dev/null
+++ 
b/libstdc++-v3/testsuite/25_algorithms/advance/istreambuf_iterators/char/1.cc


Thanks for the comprehensive tests, they look great.




Re: SFN+LVU+IEPM v4

2017-11-10 Thread Alexandre Oliva
On Nov 10, 2017, Alexandre Oliva  wrote:

> Most of the patchset is already approved, part by richi, part by jeff.
> The only points still requiring changes, AFAIK, are the ones mentioned
> above.

Actually, I've just noticed that there's one big patch in the set that's
still missing review and approval, namely:
7/9 [LVU] Introduce location views

-- 
Alexandre Oliva, freedom fighterhttp://FSFLA.org/~lxoliva/
You must be the change you wish to see in the world. -- Gandhi
Be Free! -- http://FSFLA.org/   FSF Latin America board member
Free Software Evangelist|Red Hat Brasil GNU Toolchain Engineer


Re: [PATCH] avoid -Wstringop-truncation in Darwin bootstrap

2017-11-10 Thread Martin Sebor

On 11/10/2017 01:13 PM, Mike Stump wrote:

On Nov 10, 2017, at 11:55 AM, Martin Sebor  wrote:

A few not incorrect but not strictly intended (according to
the function's original purpose) uses of strncpy trigger the
new -Wstringop-truncation warning because they temporarily
leave the copied string without a terminating nul.


If people want to tighten the language used in gcc itself, I'm fine with this.  
My take, I'd leave the review of that aspect of it to those that set the 
language gcc uses.


The warning is included in -Wall and apparently causes errors
in a Darwin bootstrap.  I already adjusted the handful of places
that did this sort of thing as I came across them in an x86_64-linux
bootstrap.  I see no other uses of the function in other back ends
so this should be the only one.

Thanks
Martin



Re: [patch][i386, AVX] GFNI enabling [3/4]

2017-11-10 Thread Kirill Yukhin
Hello Julia!
On 06 Nov 08:26, Koval, Julia wrote:
> Rebased after last patch fixes.
> 
> gcc/
>* config/i386/gfniintrin.h (_mm_gf2p8affine_epi64_epi8,
>_mm256_gf2p8affine_epi64_epi8, _mm_mask_gf2p8affine_epi64_epi8,
>_mm_maskz_gf2p8affine_epi64_epi8, _mm256_mask_gf2p8affine_epi64_epi8,
>_mm256_maskz_gf2p8affine_epi64_epi8,
>_mm512_mask_gf2p8affine_epi64_epi8, _mm512_gf2p8affine_epi64_epi8
>_mm512_maskz_gf2p8affine_epi64_epi8): New intrinsics.
>* config/i386/i386-builtin.def (__builtin_ia32_vgf2p8affineqb_v64qi,
>__builtin_ia32_vgf2p8affineqb_v32qi,
>__builtin_ia32_vgf2p8affineqb_v16qi): New builtins.
>* config/i386/sse.md (vgf2p8affineqb_): New pattern.
> 
> gcc/testsuite/
>* gcc.target/i386/avx-1.c: Handle new intrinsics.
>* gcc.target/i386/avx512f-gf2p8affineqb-2.c: New runtime tests.
>* gcc.target/i386/avx512vl-gf2p8affineqb-2.c: Ditto.
>* gcc.target/i386/gfni-1.c: Add tests for GF2P8AFFINE.
>* gcc.target/i386/gfni-2.c: Ditto.
>* gcc.target/i386/gfni-3.c: Ditto.
>* gcc.target/i386/gfni-4.c: Ditto.
>* gcc.target/i386/sse-13.c: Handle new tests. 
>* gcc.target/i386/sse-14.c: Handle new tests.
>* gcc.target/i386/sse-23.c: Handle new tests.
Your patch is OK for trunk. I've check it in.

--
Thanks, K
> 
> > -Original Message-
> > From: Koval, Julia
> > Sent: Tuesday, October 17, 2017 3:26 PM
> > To: Jakub Jelinek 
> > Cc: GCC Patches ; Kirill Yukhin
> > 
> > Subject: RE: [patch][i386, AVX] GFNI enabling [3/4]
> > 
> > Thanks for your comments, fixed everything.
> > 
> > gcc/
> > * config/i386/gfniintrin.h (_mm_gf2p8affine_epi64_epi8,
> > _mm256_gf2p8affine_epi64_epi8, _mm_mask_gf2p8affine_epi64_epi8,
> > _mm_maskz_gf2p8affine_epi64_epi8,
> > _mm256_mask_gf2p8affine_epi64_epi8,
> > _mm256_maskz_gf2p8affine_epi64_epi8,
> > _mm512_mask_gf2p8affine_epi64_epi8, _mm512_gf2p8affine_epi64_epi8
> > _mm512_maskz_gf2p8affine_epi64_epi8): New intrinsics.
> > * config/i386/i386-builtin.def (__builtin_ia32_vgf2p8affineqb_v64qi,
> > __builtin_ia32_vgf2p8affineqb_v32qi,
> > __builtin_ia32_vgf2p8affineqb_v16qi): New builtins.
> > * config/i386/sse.md (vgf2p8affineqb_): New
> > pattern.
> > 
> > gcc/testsuite/
> > * gcc.target/i386/avx-1.c: Handle new intrinsics.
> > * gcc.target/i386/avx512f-gf2p8affineqb-2.c: New runtime tests.
> > * gcc.target/i386/avx512vl-gf2p8affineqb-2.c: Ditto.
> > * gcc.target/i386/gfni-1.c: Add tests for GF2P8AFFINE.
> > * gcc.target/i386/gfni-2.c: Ditto.
> > * gcc.target/i386/gfni-3.c: Ditto.
> > * gcc.target/i386/gfni-4.c: Ditto.
> > * gcc.target/i386/sse-13.c: Handle new tests.
> > * gcc.target/i386/sse-23.c: Handle new tests.
> > 
> > 
> > > -Original Message-
> > > From: Jakub Jelinek [mailto:ja...@redhat.com]
> > > Sent: Tuesday, October 17, 2017 3:15 PM
> > > To: Koval, Julia 
> > > Cc: GCC Patches ; Kirill Yukhin
> > > 
> > > Subject: Re: [patch][i386, AVX] GFNI enabling [3/4]
> > >
> > > On Tue, Oct 17, 2017 at 01:09:50PM +, Koval, Julia wrote:
> > > > Hi, this the third patch of GFNI ISASET enabling. It enables GF2P8AFFINE
> > > instruction, described here:
> > > https://software.intel.com/sites/default/files/managed/c5/15/architecture-
> > > instruction-set-extensions-programming-reference.pdf
> > > >
> > > > gcc/
> > > > * config/i386/gfniintrin.h (_mm_gf2p8affine_epi64_epi8,
> > > _mm256_gf2p8affine_epi64_epi8,
> > >
> > > Too long line, even ChangeLog entries should be wrapped to 80 columns.
> > >
> > > > (_mm_mask_gf2p8affine_epi64_epi8,
> > > _mm_maskz_gf2p8affine_epi64_epi8,
> > > > _mm256_mask_gf2p8affine_epi64_epi8,
> > > _mm256_maskz_gf2p8affine_epi64_epi8,
> > > > _mm512_mask_gf2p8affine_epi64_epi8,
> > > _mm512_maskz_gf2p8affine_epi64_epi8,
> > >
> > > The above two are also too long (off by 1 char).
> > >
> > > > _mm512_gf2p8affine_epi64_epi8): New intrinsics.
> > > > * config/i386/i386-builtin.def 
> > > > (__builtin_ia32_vgf2p8affineqb_v64qi,
> > > > __builtin_ia32_vgf2p8affineqb_v32qi,
> > > __builtin_ia32_vgf2p8affineqb_v16qi): New builtins.
> > >
> > > And this one too.  Please wrap them.
> > >
> > > > * config/i386/sse.md (vgf2p8affineqb_*): New pattern.
> > >
> > > Use vgf2p8affineqb_ instead of the wild-card?
> > >
> > > I'll defer actual review to Kirill.
> > >
> > >   Jakub




Re: [PATCH] avoid -Wstringop-truncation in Darwin bootstrap

2017-11-10 Thread Mike Stump
On Nov 10, 2017, at 11:55 AM, Martin Sebor  wrote:
> A few not incorrect but not strictly intended (according to
> the function's original purpose) uses of strncpy trigger the
> new -Wstringop-truncation warning because they temporarily
> leave the copied string without a terminating nul.

If people want to tighten the language used in gcc itself, I'm fine with this.  
My take, I'd leave the review of that aspect of it to those that set the 
language gcc uses.

[PATCH] avoid -Wstringop-truncation in Darwin bootstrap

2017-11-10 Thread Martin Sebor

A few not incorrect but not strictly intended (according to
the function's original purpose) uses of strncpy trigger the
new -Wstringop-truncation warning because they temporarily
leave the copied string without a terminating nul.

The attached patch replaces these uses with memcpy to avoid
the warning and make it clear (to both the reader and GCC)
that the string being constructed is, in fact, not nul
terminated until the last call to strcpy.

Tested by cross-compiling for x86_64-darwin.  For reference,
with the attached patch applied the following is the list of
outstanding warnings in the build.

DiagnosticCount   UniqueFiles
-Wsign-compare433
-Wimplicit-fallthrough=   411

-Wimplicit-fallthrough Instances:
  gengtype-lex.c:380

-Wsign-compare Instances:
  arlex.c:1352
  gengtype-lex.c:1367
  syslex.c:1226

Martin
gcc/ChangeLog:

	PR c/81117
	* config/darwin-c.c (framework_construct_pathname): Replace strncpy
	with memcpy.
	(find_subframework_file): Same.

diff --git a/gcc/config/darwin-c.c b/gcc/config/darwin-c.c
index 91f08a0..bfb35b9 100644
--- a/gcc/config/darwin-c.c
+++ b/gcc/config/darwin-c.c
@@ -284,13 +284,13 @@ framework_construct_pathname (const char *fname, cpp_dir *dir)
 
   frname = XNEWVEC (char, strlen (fname) + dir->len + 2
 		+ strlen(".framework/") + strlen("PrivateHeaders"));
-  strncpy ([0], dir->name, dir->len);
+  memcpy ([0], dir->name, dir->len);
   frname_len = dir->len;
   if (frname_len && frname[frname_len-1] != '/')
 frname[frname_len++] = '/';
-  strncpy ([frname_len], fname, fname_len);
+  memcpy ([frname_len], fname, fname_len);
   frname_len += fname_len;
-  strncpy ([frname_len], ".framework/", strlen (".framework/"));
+  memcpy ([frname_len], ".framework/", strlen (".framework/"));
   frname_len += strlen (".framework/");
 
   if (fast_dir == 0)
@@ -316,7 +316,7 @@ framework_construct_pathname (const char *fname, cpp_dir *dir)
   /* Append framework_header_dirs and header file name */
   for (i = 0; framework_header_dirs[i].dirName; i++)
 {
-  strncpy ([frname_len],
+  memcpy ([frname_len],
 	   framework_header_dirs[i].dirName,
 	   framework_header_dirs[i].dirNameLen);
   strcpy ([frname_len + framework_header_dirs[i].dirNameLen],
@@ -378,23 +378,23 @@ find_subframework_file (const char *fname, const char *pname)
 
   sfrname_len = bufptr - pname;
 
-  strncpy ([0], pname, sfrname_len);
+  memcpy ([0], pname, sfrname_len);
 
-  strncpy ([sfrname_len], "Frameworks/", strlen ("Frameworks/"));
+  memcpy ([sfrname_len], "Frameworks/", strlen ("Frameworks/"));
   sfrname_len += strlen("Frameworks/");
 
-  strncpy ([sfrname_len], fname, fname_len);
+  memcpy ([sfrname_len], fname, fname_len);
   sfrname_len += fname_len;
 
-  strncpy ([sfrname_len], ".framework/", strlen (".framework/"));
+  memcpy ([sfrname_len], ".framework/", strlen (".framework/"));
   sfrname_len += strlen (".framework/");
 
   /* Append framework_header_dirs and header file name */
   for (i = 0; framework_header_dirs[i].dirName; i++)
 {
-  strncpy ([sfrname_len],
-	   framework_header_dirs[i].dirName,
-	   framework_header_dirs[i].dirNameLen);
+  memcpy ([sfrname_len],
+	  framework_header_dirs[i].dirName,
+	  framework_header_dirs[i].dirNameLen);
   strcpy ([sfrname_len + framework_header_dirs[i].dirNameLen],
 	  [fname_len]);
 


[PATCH, testsuite]: Fix gcc.target/i386/force-indirect-call-?.c fallout

2017-11-10 Thread Uros Bizjak
2017-11-10  Uros Bizjak  

* gcc.target/i386/force-indirect-call-1.c: Merge scan strings.
* gcc.target/i386/force-indirect-call-2.c: Ditto.
Require fpic effective target.
* gcc.target/i386/force-indirect-call-3.c: Ditto.
Require lp64 effective target.

Tested on x86_64-linux-gnu {,-m32} and committed to mainline SVN.

Uros.
Index: gcc.target/i386/force-indirect-call-1.c
===
--- gcc.target/i386/force-indirect-call-1.c (revision 254632)
+++ gcc.target/i386/force-indirect-call-1.c (working copy)
@@ -1,7 +1,7 @@
 /* { dg-do compile } */
 /* { dg-options "-O2 -mforce-indirect-call" } */
-/* { dg-final { scan-assembler-times "call\[ \\t\]+\\*%" 2 } } */
-/* { dg-final { scan-assembler-times "jmp\[ \\t\]+\\*%" 1 } } */
+/* { dg-final { scan-assembler-times "(?:call|jmp)\[ \\t\]+\\*%" 3 } } */
+
 int x;
 int y;
 
Index: gcc.target/i386/force-indirect-call-2.c
===
--- gcc.target/i386/force-indirect-call-2.c (revision 254632)
+++ gcc.target/i386/force-indirect-call-2.c (working copy)
@@ -1,5 +1,6 @@
 /* { dg-do compile } */
 /* { dg-options "-O2 -mforce-indirect-call -fPIC" } */
-/* { dg-final { scan-assembler-times "call\[ \\t\]+\\*%" 2 } } */
-/* { dg-final { scan-assembler-times "jmp\[ \\t\]+\\*%" 1 } } */
+/* { dg-require-effective-target fpic } */
+/* { dg-final { scan-assembler-times "(?:call|jmp)\[ \\t\]+\\*%" 3 } } */
+
 #include "force-indirect-call-1.c"
Index: gcc.target/i386/force-indirect-call-3.c
===
--- gcc.target/i386/force-indirect-call-3.c (revision 254632)
+++ gcc.target/i386/force-indirect-call-3.c (working copy)
@@ -1,5 +1,6 @@
 /* { dg-do compile } */
 /* { dg-options "-O2 -mforce-indirect-call -mcmodel=medium" } */
-/* { dg-final { scan-assembler-times "call\[ \\t\]+\\*%" 2 } } */
-/* { dg-final { scan-assembler-times "jmp\[ \\t\]+\\*%" 1 } } */
+/* { dg-require-effective-target lp64 } */
+/* { dg-final { scan-assembler-times "(?:call|jmp)\[ \\t\]+\\*%" 3 } } */
+
 #include "force-indirect-call-1.c"


Re: [PATCH, rs6000 V2] Add Power 9 support for vec_first builtins

2017-11-10 Thread Segher Boessenkool
Hi!

On Thu, Nov 09, 2017 at 03:42:42PM -0800, Carl Love wrote:
>   * config/rs6000/rs6000-c.c (altivec_overloaded_builtins):
>   Add support for builtins:
>   unsigned int vec_first_{,miss}_match_{,or_eos}index (

Don't end a line with an opening parenthesis.

>   vector {un,}signed {char,int,short},
>   vector {un,}signed {char,int,short}) arguments.
>   * config/rs6000/rs6000-builtin.def (VFIRSTMATCHINDEX,
>   VFIRSTMATCHOREOSINDEX, VFIRSTMISMATCHINDEX, VFIRSTMISMATCHOREOSINDEX):
>   Add BU_P9V_AV_2 expansions for the builtins.
>   * config/rs6000/altivec.h (vec_first_match_index,
>   vec_first_mismatch_index, vec_first_match_or_eos_index,
>   vec_first_mismatch_or_eos_index): Add #defines for the builtins.
>   * config/rs6000/rs6000-protos.h (bytes_in_mode): Add
>   new extern  declaration.

There's a tab character there.

>   * gcc.target/powerpc/vsu/vec-cnttz-lsbb-2.c (dg-error): Add _v16qi to
>   __builtin_altivec_vctzlsbb.

"dg-error" is not a function name or similar; there can be many such
statements with the same name even!  I'd do something like

* gcc.target/powerpc/vsu/vec-cnttz-lsbb-2.c: Adjust expected error
message.

> +  first_mismatch_index_v16qi)
> +BU_P9V_AV_2 (VFIRSTMISMATCHINDEX_V8HI, "first_mismatch_index_v8hi", CONST,
> +  first_mismatch_index_v8hi)
> +BU_P9V_AV_2 (VFIRSTMISMATCHINDEX_V4SI, "first_mismatch_index_v4si", CONST,
> +  first_mismatch_index_v4si)
> +BU_P9V_AV_2 (VFIRSTMISMATCHOREOSINDEX_V16QI, 
> "first_mismatch_or_eos_index_v16qi",
> +  CONST, first_mismatch_or_eos_index_v16qi)
> +BU_P9V_AV_2 (VFIRSTMISMATCHOREOSINDEX_V8HI, 
> "first_mismatch_or_eos_index_v8hi", CONST,
> +  first_mismatch_or_eos_index_v8hi)
> +BU_P9V_AV_2 (VFIRSTMISMATCHOREOSINDEX_V4SI, 
> "first_mismatch_or_eos_index_v4si", CONST,
> +   first_mismatch_or_eos_index_v4si)

Some of those lines are too long; there's not terribly much you can do
about that, but you have moved "CONST" to the next line in one case and not
in others?  And that last line is unaligned (has a space to many).

Other than those nits it looks fine.  Please commit to trunk.  Thanks!


Segher


Re: [PATCH, rs6000] Add __builtin_altivec_vsumsws

2017-11-10 Thread Segher Boessenkool
Hi Carl,

On Wed, Nov 08, 2017 at 01:21:46PM -0800, Carl Love wrote:
> 2017-11-08  Carl Love  
> 
>   * config/rs6000/rs6000-c.c (ALTIVEC_BUILTIN_VEC_SUMS): Add macro 
> expansion.

This line is too long (79 or 80 chars).

> +(define_expand "altivec_vsumsws_be"
> +  [(use (match_operand:V4SI 0 "register_operand"))
> +   (use (match_operand:V4SI 1 "register_operand"))
> +   (use (match_operand:V4SI 2 "register_operand"))]
> +  "TARGET_ALTIVEC"
> +{
> +  emit_insn (gen_altivec_vsumsws_direct (operands[0], operands[1],
> +  operands[2]));
> +  DONE;
> +})

Can't you call altivec_vsumsws_direct from the builtin directly?  That
would be prefered.

Okay for trunk either way.  Thanks!


Segher


Re: [PATCH], Generate XXBR{H,W,D} for bswap{16,32,64} on PowerPC ISA 3.0 (power9)

2017-11-10 Thread Segher Boessenkool
Hi Mike,

On Wed, Nov 08, 2017 at 03:02:30PM -0500, Michael Meissner wrote:
> > Should this somehow be joined with p9_xxbrd_?  Or maybe you should
> > generate that, instead.
> 
> No, since p9_xxbrd_ doesn't include DImode.  We could add yet another
> mode iterator to include DI + V2DI/V2DF modes, but that seems to be overkill.

Having separate DI and V2DI patterns for the same instruction isn't great
either.  If it is only this insn it is fine of course, but I suspect we'll
get many more later.  Well I guess we can solve it later ;-)

> I simplified it to only change the one insn that would normally match the
> register to register case to skip if ISA 3.0.  I put a test on bswapdi2_reg as
> well.

Thanks.

> 
> > > @@ -2507,6 +2513,8 @@ (define_expand "bswapdi2"
> > >   emit_insn (gen_bswapdi2_load (dest, src));
> > >else if (MEM_P (dest))
> > >   emit_insn (gen_bswapdi2_store (dest, src));
> > > +  else if (TARGET_P9_VECTOR)
> > > + emit_insn (gen_bswapdi2_xxbrd (dest, src));
> > >else
> > >   emit_insn (gen_bswapdi2_reg (dest, src));
> > >DONE;
> > 
> > Pity that you cannot easily do similar for HI and SI.
> 
> Not really.  Bswap64 generates 9 separate insns, while bswap32 and bswap16 
> only
> generate 3 insns.  So, having to add the move direct to/from the vector
> registers would mean it would be slower than the normal case that is currently
> generated.  But if the value happens to be in a VSX register, then we can do 
> it
> in one instruction.

I meant, have just two lines as above :-)

> After a burn-in period, I plan to backport a reduced version of the patch
> (XXBRD only) to gcc 7, unless you think it shouldn't go into gcc 7.

Well, why do we want it on 7?

> +(define_insn "bswapdi2_xxbrd"
> +  [(set (match_operand:DI 0 "gpc_reg_operand" "=wo")
> + (bswap:DI (match_operand:DI 1 "gpc_reg_operand" "wo")))]
> +  "TARGET_POWERPC64 && TARGET_P9_VECTOR"
> +  "xxbrd %x0,%x1"
> +  [(set_attr "type" "vecperm")])

This doesn't need TARGET_POWERPC64 I think.

Please look at that.  The patch is okay for trunk.  Thanks!


Segher


Re: [RFA][PATCH] 2/n Refactoring tree-vrp.c -- pull evrp bits into their own file

2017-11-10 Thread Jeff Law
On 11/10/2017 07:11 AM, Richard Biener wrote:
> On Fri, Nov 10, 2017 at 1:30 AM, Jeff Law  wrote:
>> This patch pulls out the EVRP class & methods from tree-vrp.c.  It's a
>> straight copy-n-paste with the exception of the evrp_folder class which
>> I trimmed back down to its minimal form.
>>
>> This obviously forces shared structures/routines between tree-vrp.c and
>> tree-evrp.c to get exposed in a header file (tree-vrp.h).  I consider
>> this a positive as those dependencies are now fairly explicit and we can
>> work to rationalize that set (ie, does the dependency make sense, where
>> is the most natural place for the shared bits, etc).
>>
>> I'm not ready to pull the trigger on submission, but I fully expect
>> tree-evrp.c to go through another refactoring to separate analysis from
>> optimization -- which then allows us to embed the analysis bits into
>> other passes.
>>
>> Bootstrapped and regression tested on x86_64.  OK for the trunk?
> 
> Ok, but can you name it gimple-ssa-evrp.c please? ;)
Yea, trivial to do :-)

Jeff


Re: [RFA][PATCH] 2/n Refactoring tree-vrp.c -- pull evrp bits into their own file

2017-11-10 Thread Aldy Hernandez



On 11/10/2017 09:11 AM, Richard Biener wrote:

On Fri, Nov 10, 2017 at 1:30 AM, Jeff Law  wrote:

This patch pulls out the EVRP class & methods from tree-vrp.c.  It's a
straight copy-n-paste with the exception of the evrp_folder class which
I trimmed back down to its minimal form.

This obviously forces shared structures/routines between tree-vrp.c and
tree-evrp.c to get exposed in a header file (tree-vrp.h).  I consider
this a positive as those dependencies are now fairly explicit and we can
work to rationalize that set (ie, does the dependency make sense, where
is the most natural place for the shared bits, etc).

I'm not ready to pull the trigger on submission, but I fully expect
tree-evrp.c to go through another refactoring to separate analysis from
optimization -- which then allows us to embed the analysis bits into
other passes.

Bootstrapped and regression tested on x86_64.  OK for the trunk?


Ok, but can you name it gimple-ssa-evrp.c please? ;)


Yes, please do.  Slowly but surely I'm becoming a global maintainer by 
wildcard ;-).


$ grep aldy ../MAINTAINERS
rs6000 vector extns Aldy Hernandez  
*gimpl* Aldy Hernandez  


Re: [PATCH][GCC][ARM] Refactor arm_option_override to extract global field setters [Patch (1/3)]

2017-11-10 Thread Tamar Christina
Hi Kyrill,

Bootstrap on arm-none-linux-gnueabihf showed no issue, so I will commit the 
patch.

Thanks,
Tamar


From: Kyrill Tkachov 
Sent: Wednesday, November 8, 2017 10:08:45 AM
To: Tamar Christina; gcc-patches@gcc.gnu.org
Cc: nd; Ramana Radhakrishnan; Richard Earnshaw; ni...@redhat.com
Subject: Re: [PATCH][GCC][ARM] Refactor arm_option_override to extract global 
field setters [Patch (1/3)]

Hi Tamar,

On 06/11/17 16:48, Tamar Christina wrote:
> Hi All,
>
> This patch does a small refactoring to arm_option_override to extract the
> part that sets the global state variables so they can be changed without
> changing other global field that we do not want to change after the
> initial
> configuration has finished.
>
> Regtested on arm-none-eabi and no regressions.
>

Please also run a bootstrap and test on arm-none-linux-gnueabihf.
This is ok if that shows no problems.

Thanks,
Kyrill

> Ok for trunk?
>
> gcc/
> 2017-11-06  Tamar Christina  
>
> PR target/82641
> * config/arm/arm.c
> (arm_option_override): Refactor.
> (arm_option_reconfigure_globals): New.
> (arm_options_perform_arch_sanity_checks): New.
> * config/arm/arm-protos.h (arm_option_reconfigure_globals):
> New prototype.
> (arm_options_perform_arch_sanity_checks): Likewise
>
> --



[PATCH][ARM] Fix more -Wreturn-type fallout

2017-11-10 Thread Sudi Das

Hi

This patch fixes a couple of more tests that are giving out warnings with 
-Wreturn-type:
- g++.dg/ext/pr57735.C
- gcc.target/arm/pr54300.C

*** gcc/testsuite/ChangeLog ***

2017-11-10  Sudakshina Das  

* g++.dg/ext/pr57735.C: Add -Wno-return-type for test.
* gcc.target/arm/pr54300.C (main): Add return type and
return a value.
diff --git a/gcc/testsuite/g++.dg/ext/pr57735.C b/gcc/testsuite/g++.dg/ext/pr57735.C
index a8f7d05712c9a823564d58e2a149c7bc356a5e9e..d9fc9e4aa5e4f47a77c2f9266456e274a9f06d68 100644
--- a/gcc/testsuite/g++.dg/ext/pr57735.C
+++ b/gcc/testsuite/g++.dg/ext/pr57735.C
@@ -2,7 +2,7 @@
 /* { dg-require-effective-target arm_arch_v5te_ok } */
 /* { dg-require-effective-target arm_arm_ok } */
 /* { dg-skip-if "do not override -mfloat-abi" { *-*-* } { "-mfloat-abi=*" } {"-mfloat-abi=soft" } } */
-/* { dg-options "-march=armv5te -marm  -mtune=xscale -mfloat-abi=soft -O1" } */
+/* { dg-options "-march=armv5te -marm  -mtune=xscale -mfloat-abi=soft -O1 -Wno-return-type" } */
 
 typedef unsigned int size_t;
 __extension__
diff --git a/gcc/testsuite/gcc.target/arm/pr54300.C b/gcc/testsuite/gcc.target/arm/pr54300.C
index eb1a74e36cff6d57f7444e1ca34b704c80efbf54..9105e279b331180aed8c5cadef2194cfe5b446ea 100644
--- a/gcc/testsuite/gcc.target/arm/pr54300.C
+++ b/gcc/testsuite/gcc.target/arm/pr54300.C
@@ -51,6 +51,7 @@ test(unsigned short *_Inp, int32_t *_Out,
   vst1q_s32( _Out, c );
 }
 
+int
 main()
 {
   unsigned short a[4] = {1, 2, 3, 4};
@@ -58,4 +59,5 @@ main()
   test(a, b, 1, 1, ~0);
   if (b[0] != 1 || b[1] != 2 || b[2] != 3 || b[3] != 4)
 abort();
+  return 0;
 }


Re: [PATCH, GCC/testsuite/ARM] Consolidate sources for cmse tests

2017-11-10 Thread Kyrill Tkachov

Hi Thomas,

On 10/11/17 11:57, Thomas Preudhomme wrote:
Sorry for the garbled email, I guess I did a middle click paste which 
sometimes

paste things several times. Let me try again:

For the most part, testcases under gcc.target/arm/cmse/baseline and
gcc.target/arm/cmse/mainline are duplicate copies with only different
dejagnu directives. Although there is no requirement for them to be
similar, having them both identical allow to compare the code generated
and make it easier in case of change in code generation to both
architecture to update the testcases (if one needs updating so does the
other).

Similarly all the tests in gcc.target/arm/cmse/mainline/ have
the same source but are duplicate copies.

This patch moves all the code in the tests to a parent directory:
gcc.target/arm/cmse for tests shared by Armv8-M Baseline and Mainline
and gcc.target/arm/cmse/mainline for tests *only* shared by the various
float ABI of Armv8-M Mainline. C includes are then used where the code
used to sit.

Note that the cmse-13.c test used to differ slightly between
architectures and float ABI tested in the first floating-point constant
passed to bar: sometimes 1.0 and sometimes 3.0. This patch settles on
3.0 to not confuse with the 1.0 constant used to clear VFP registers in
some of the configurations.

ChangeLog entry is as follows:

*** gcc/testsuite/ChangeLog ***

2017-11-03  Thomas Preud'homme 

* gcc.target/arm/cmse/bitfield-4.x: New file.
* gcc.target/arm/cmse/baseline/bitfield-4.c: Remove code and 
include

above file.
* gcc.target/arm/cmse/mainline/bitfield-4.c: Likewise.
* gcc.target/arm/cmse/bitfield-5.x: New file.
* gcc.target/arm/cmse/baseline/bitfield-5.c: Remove code and 
include

above file.
* gcc.target/arm/cmse/mainline/bitfield-5.c: Likewise.
* gcc.target/arm/cmse/bitfield-6.x: New file.
* gcc.target/arm/cmse/baseline/bitfield-6.c: Remove code and 
include

above file.
* gcc.target/arm/cmse/mainline/bitfield-6.c: Likewise.
* gcc.target/arm/cmse/bitfield-7.x: New file.
* gcc.target/arm/cmse/baseline/bitfield-7.c: Remove code and 
include

above file.
* gcc.target/arm/cmse/mainline/bitfield-7.c: Likewise.
* gcc.target/arm/cmse/bitfield-8.x: New file.
* gcc.target/arm/cmse/baseline/bitfield-8.c: Remove code and 
include

above file.
* gcc.target/arm/cmse/mainline/bitfield-8.c: Likewise.
* gcc.target/arm/cmse/bitfield-9.x: New file.
* gcc.target/arm/cmse/baseline/bitfield-9.c: Remove code and 
include

above file.
* gcc.target/arm/cmse/mainline/bitfield-9.c: Likewise.
* gcc.target/arm/cmse/bitfield-and-union.x: New file.
* gcc.target/arm/cmse/baseline/bitfield-and-union-1.c: Rename 
into ...
* gcc.target/arm/cmse/baseline/bitfield-and-union.c: This.  
Remove code

and include above bitfield-and-union.x file.
* gcc.target/arm/cmse/mainline/bitfield-and-union-1.c: Rename 
into ...
* gcc.target/arm/cmse/mainline/bitfield-and-union.c: this.  
Remove code

and include above bitfield-and-union.x file.
* gcc.target/arm/cmse/cmse-13.x: New file.
* gcc.target/arm/cmse/baseline/cmse-13.c: Remove code and 
include above

file.
* gcc.target/arm/cmse/mainline/hard-sp/cmse-13.c: Likewise.
* gcc.target/arm/cmse/mainline/hard/cmse-13.c: Likewise.
* gcc.target/arm/cmse/mainline/soft/cmse-13.c: Likewise.
* gcc.target/arm/cmse/mainline/softfp/cmse-13.c: Likewise.
* gcc.target/arm/cmse/cmse-5.x: New file.
* gcc.target/arm/cmse/mainline/hard-sp/cmse-5.c: Remove code and
include above file.
* gcc.target/arm/cmse/mainline/hard/cmse-5.c: Likewise.
* gcc.target/arm/cmse/mainline/soft/cmse-5.c: Likewise.
* gcc.target/arm/cmse/mainline/softfp-sp/cmse-5.c: Likewise.
* gcc.target/arm/cmse/mainline/softfp/cmse-5.c: Likewise.
* gcc.target/arm/cmse/cmse-7.x: New file.
* gcc.target/arm/cmse/mainline/hard-sp/cmse-7.c: Remove code and
include above file.
* gcc.target/arm/cmse/mainline/hard/cmse-7.c: Likewise.
* gcc.target/arm/cmse/mainline/soft/cmse-7.c: Likewise.
* gcc.target/arm/cmse/mainline/softfp-sp/cmse-7.c: Likewise.
* gcc.target/arm/cmse/mainline/softfp/cmse-7.c: Likewise.
* gcc.target/arm/cmse/cmse-8.x: New file.
* gcc.target/arm/cmse/mainline/hard-sp/cmse-8.c: Remove code and
include above file.
* gcc.target/arm/cmse/mainline/hard/cmse-8.c: Likewise.
* gcc.target/arm/cmse/mainline/soft/cmse-8.c: Likewise.
* gcc.target/arm/cmse/mainline/softfp-sp/cmse-8.c: Likewise.
* gcc.target/arm/cmse/mainline/softfp/cmse-8.c: Likewise.
* gcc.target/arm/cmse/union-1.x: New file.
* gcc.target/arm/cmse/baseline/union-1.c: Remove code and 

Re: [C++ PATCH] Remove the null check from placement new in all modes

2017-11-10 Thread Ville Voutilainen
On 10 November 2017 at 18:19, Jason Merrill  wrote:
> OK.


I see non-obvious testsuite failures, I'll see if adding -fcheck-new
to those cases
cures the problem. Please stay tuned. :)


Re: [PATCH] Handle different bit_not_p in store merging (PR tree-optimization/78821)

2017-11-10 Thread Kyrill Tkachov

Hi Jakub,

On 10/11/17 13:59, Jakub Jelinek wrote:

Hi!

This is something Uros requested in the PR, at least with BIT_NOT_EXPRs
it is easy.  Previous store merging changes required that bit_not_p
is equal on all stores in the group (in all 3 spots, i.e. on the result
of BIT_{AND,IOR,XOR}_EXPR and on both of the operands).

This patch handles mixed values of that flag.  If none of the
orig_stores have a particular bit_not_p set, then as previously nothing
is inverted, if all of them have it set, then as previously we 
BIT_NOT_EXPR

the particular SSA_NAME, and newly if there is a mix of false and true
in a particular bit_not_p, we compute a mask and BIT_XOR_EXPR it, this
invert only the bits that were bit_not_p and not the others.

Bootstrapped/regtested on x86_64-linux and i686-linux, ok for trunk?



Might be worth doing a sanity check test run on a big-endian target
since there is a bit of BYTES_BIG_ENDIAN logic in the patch (though it 
looks correct to me).


Thanks,
Kyrill


2017-11-10  Jakub Jelinek  

PR tree-optimization/78821
* gimple-ssa-store-merging.c (compatible_load_p): Don't require
that bit_not_p is the same.
(imm_store_chain_info::coalesce_immediate_stores): Likewise.
(split_group): Count precisely bit_not_p bits in each statement.
(invert_op): New function.
(imm_store_chain_info::output_merged_store): Use invert_op to
emit BIT_XOR_EXPR with a xor_mask instead of BIT_NOT_EXPR if some
but not all orig_stores have BIT_NOT_EXPR in the corresponding 
spots.


* gcc.dg/store_merging_15.c: New test.

--- gcc/gimple-ssa-store-merging.c.jj   2017-11-10 08:04:49.0 
+0100
+++ gcc/gimple-ssa-store-merging.c  2017-11-10 10:53:13.152731543 
+0100

@@ -1036,7 +1036,6 @@ compatible_load_p (merged_store_group *m
 {
   store_immediate_info *infof = merged_store->stores[0];
   if (!info->ops[idx].base_addr
-  || info->ops[idx].bit_not_p != infof->ops[idx].bit_not_p
   || (info->ops[idx].bitpos - infof->ops[idx].bitpos
   != info->bitpos - infof->bitpos)
   || !operand_equal_p (info->ops[idx].base_addr,
@@ -1176,8 +1175,7 @@ imm_store_chain_info::coalesce_immediate
  Merge it into the current store group.  There can be gaps in 
between

  the stores, but there can't be gaps in between bitregions.  */
   else if (info->bitregion_start <= merged_store->bitregion_end
-  && info->rhs_code == merged_store->stores[0]->rhs_code
-  && info->bit_not_p == merged_store->stores[0]->bit_not_p)
+  && info->rhs_code == merged_store->stores[0]->rhs_code)
 {
   store_immediate_info *infof = merged_store->stores[0];

@@ -1496,16 +1494,14 @@ split_group (merged_store_group *group,
   total_orig[0] = 1; /* The orig store.  */
   info = group->stores[0];
   if (info->ops[0].base_addr)
-   total_orig[0] += 1 + info->ops[0].bit_not_p;
+   total_orig[0]++;
   if (info->ops[1].base_addr)
-   total_orig[0] += 1 + info->ops[1].bit_not_p;
+   total_orig[0]++;
   switch (info->rhs_code)
 {
 case BIT_AND_EXPR:
 case BIT_IOR_EXPR:
 case BIT_XOR_EXPR:
- if (info->bit_not_p)
-   total_orig[0]++; /* The orig BIT_NOT_EXPR stmt. */
   total_orig[0]++; /* The orig BIT_*_EXPR stmt.  */
   break;
 default:
@@ -1514,7 +1510,12 @@ split_group (merged_store_group *group,
   total_orig[0] *= group->stores.length ();

   FOR_EACH_VEC_ELT (group->stores, i, info)
-   total_new[0] += count_multiple_uses (info);
+   {
+ total_new[0] += count_multiple_uses (info);
+ total_orig[0] += (info->bit_not_p
+   + info->ops[0].bit_not_p
+   + info->ops[1].bit_not_p);
+   }
 }

   if (!allow_unaligned_load)
@@ -1654,13 +1655,13 @@ split_group (merged_store_group *group,

   if (total_orig)
 {
+  unsigned int i;
+  struct split_store *store;
   /* If we are reusing some original stores and any of the
  original SSA_NAMEs had multiple uses, we need to subtract
  those now before we add the new ones.  */
   if (total_new[0] && any_orig)
 {
- unsigned int i;
- struct split_store *store;
   FOR_EACH_VEC_ELT (*split_stores, i, store)
 if (store->orig)
   total_new[0] -= count_multiple_uses 
(store->orig_stores[0]);

@@ -1668,26 +1669,105 @@ split_group (merged_store_group *group,
   total_new[0] += ret; /* The new store.  */
   store_immediate_info *info = group->stores[0];
   if (info->ops[0].base_addr)
-   total_new[0] += ret * (1 + info->ops[0].bit_not_p);
+   total_new[0] += ret;
   if (info->ops[1].base_addr)
-   total_new[0] += ret * (1 + info->ops[1].bit_not_p);
+   total_new[0] += ret;
   switch (info->rhs_code)
 {
 case 

Re: [PATCH] [GOLD] Add plugin API for processing plugin-added input files

2017-11-10 Thread Sriraman Tallam via gcc-patches
On Thu, Nov 9, 2017 at 9:04 PM, Cary Coutant  wrote:

> > include/ChangeLog:
> > 2017-11-09  Stephen Crane  
> >
> > * plugin-api.h: Add new plugin hook to allow processing of input
> > files added by a plugin.
> > (ld_plugin_new_input_handler): New funcion hook type.
> > (ld_plugin_register_new_input): New interface.
> > (LDPT_REGISTER_NEW_INPUT_HOOK): New enum val.
> > (tv_register_new_input): New member.
> >
> >
> > gold/ChangeLog:
> > 2017-11-09  Stephen Crane  
> >
> > * plugin.cc (Plugin::load): Include hooks for register_new_input
> > in transfer vector.
> > (Plugin::new_input): New function.
> > (register_new_input): New function.
> > (Plugin_manager::claim_file): Call Plugin::new_input if in
> > replacement phase.
> > * plugin.h (Plugin::set_new_input_handler): New function.
> > * testsuite/plugin_new_section_layout.c: New plugin to test
> > new_input plugin API.
> > * testsuite/plugin_final_layout.sh: Add new input test.
> > * testsuite/Makefile.am (plugin_layout_new_file): New test case.
> > * testsuite/Makefile.in: Regenerate.
>
> These are OK. Thanks!
>
> Sri, I'm out of town through 11/18, and won't be able to commit the
> include/ patch to GCC before Stage 1 ends. Can you take care of it?
> (If not, I'll take care of it when I get back -- it was approved
> during Stage 1, so I think it's OK to commit early in Stage 3,
> especially since it's nothing but new declarations.)
>

Sure, I will do this today.

Thanks
Sri


>
> -cary
>


Re: [C++ PATCH] Remove the null check from placement new in all modes

2017-11-10 Thread Jason Merrill
OK.

On Fri, Nov 10, 2017 at 12:29 AM, Ville Voutilainen
 wrote:
> Tested manually on Linux-X64, finishing testing with the full suite on
> Linux-PPC64.
>
> I spent far too much time contemplating whether to add a compatibility switch
> for this, but -fcheck-new *is* such a compatibility switch.
>
> OK for trunk?
>
> 2017-11-10  Ville Voutilainen  
>
> gcc/
>
> Remove the null check from placement new in all modes
> * cp/init.c (build_new_1): Don't do a null check for
> a namespace-scope non-replaceable placement new
> in any mode unless -fcheck-new is provided.
>
> testsuite/
>
> Remove the null check from placement new in all modes
> * g++.dg/init/pr35878_1.C: Adjust.
> * g++.dg/init/pr35878_4.C: New.


Re: Adjust empty class parameter passing ABI (PR c++/60336)

2017-11-10 Thread Jason Merrill

On 11/09/2017 10:26 AM, Richard Biener wrote:

Moving TYPE_EMPTY_P to finalize_type_size revealed a bug in Cilk+, it was
bogusly (I believe) setting TREE_ADDRESSABLE, so the assert fired.  Since
Cilk+ is being deprecated and the Cilk+ testsuite still passes, I'm not
too worried about this change.


Ah, presumably C++ classes aren't hitting the assert just because they 
set TREE_ADDRESSABLE after finalize_type_size, so the assert is wrong. 
Let's drop the assert and the Cilk+ change.



So if you're fine with the DECL_PADDING_P change, all that remains is to
check whether this patch is not changing the ABI for other languages than
C++.  I suppose one way to check that could be to do sth like

   if (strncmp (lang_hooks.name, "GNU C++", 7))
 {FILE *f=fopen("/tmp/A", 
"a");fprintf(f,"%s\n",main_input_filename);fclose(f);}

and compare the assembly of the files it prints?  But there were thousands of
them I think :(.


Shouldn't most of GCCs own object files (and target library object files)
compare 1:1 before and after the patch?  After all it should _only_ affect
parameter passing of empty aggregates (and the files the patch changes
of course)?


That makes sense to me.


@@ -9295,6 +9315,10 @@ ix86_return_in_memory (const_tree type, const_tree 
fntype ATTRIBUTE_UNUSED)

...

+  /* Empty records are never passed in memory.  */
+  if (type && TYPE_EMPTY_P (type))
+return false;


Since the TYPE_EMPTY_P flag is in target-independent code, let's check 
it in aggregate_value_p rather than here.



+ix86_warn_parameter_passing_abi (cumulative_args_t cum_v, tree type)

...

+  tree ctx = cum->decl ? DECL_CONTEXT (cum->decl) : NULL_TREE;
+  if (ctx != NULL_TREE
+  && TREE_CODE (ctx) == TRANSLATION_UNIT_DECL
+  && !TRANSLATION_UNIT_WARN_EMPTY_P (ctx))
+return;


This doesn't handle empty classes within a namespace/class/function. 
Maybe move get_ultimate_context out of dwarf2out.c and use that?



+/* Used in a FIELD_DECL to indicate that this field is padding for
+   the purpose of determining whether the record this field is a member
+   of is considered empty.  */


I wouldn't mention "empty" here; this indicates that the field is 
padding, not data.  A target might use this information to avoid passing 
this field even if the class contains data as well.


Jason


Re: [PATCH] Add offset_int to guard HOST_WIDE_INT overflow (PR tree-optimization/82042).

2017-11-10 Thread Martin Sebor

On 10/19/2017 05:58 AM, Richard Biener wrote:

On Thu, Oct 19, 2017 at 1:21 PM, Martin Liška  wrote:

On 09/20/2017 05:47 PM, Richard Biener wrote:

On Wed, Sep 20, 2017 at 9:50 AM, Martin Liška  wrote:

Hi.

This is partial fix for the PR, where I calculate 2 offsets in offset_int type.

Patch can bootstrap on ppc64le-redhat-linux and survives regression tests.

Ready to be installed?


That seems to poorly handle the cases in offset_overlap_p.  What kind of
overflow do we see here?


We hit:

 (const:DI (plus:DI (symbol_ref:DI ("a") [flags 0x40] )
 (const_int -9223372036854775805 [0x8003] 
"/home/marxin/Programming/testcases/pr82042.c":8 81 {*movdi_internal}

and:

 (const:DI (plus:DI (symbol_ref:DI ("a") [flags 0x40] )
 (const_int 9223372036854775806 [0x7ffe] 81 
{*movdi_internal}

The UBSAN error is:
../../gcc/tree-ssa-alias.c:704:30: runtime error: signed integer overflow: 
9223372036854775806 * 8 cannot be represented in type 'long int'


Huh, but that's a different error?  You are patching alias.c ...

I guess semantically we need to make 'c' sth that is big enough to handle
address differences in bytes (offset_int is for bits) and with
arbitrary positive/negative
value.  offset_int would work of course.   The testcase for the MEMs above is
artificial I guess (those are big offsets to a symbol...).

There are many more places we process offsets that way, for example
in nonoverlapping_memrefs_p (and I bet tree-ssa-alias.c as well).

In the end I don't think we want to slow down code just for the sake of
UBSAN.  IMHO for code invoking undefined behavior (object too large)
it's reasonable for the compiler to invoke undefined behavior ;)


Martin, thanks for trying to fix the bug.  FWIW, from the winky
I suspect Richard's last comment was more tongue-in-cheek than
serious.  I'm sure we don't want well-formed programs to trigger
undefined behavior in GCC, even if their own behavior isn't well
defined at runtime.

FWIW, I raised the bug report while testing a fix for a similar
bug Richard had noted in a review of one of my own patches that
wasn't properly handling unsigned wrapping (see below).  I was
trying to verify that my final patch was free of the problem and
came across a couple of others elsewhere.

Martin

https://gcc.gnu.org/ml/gcc-patches/2017-08/msg01441.html


Re: [PATCH][AArch64] Restrict POST_INC operand in aarch64_simd_mem_operand_p to register

2017-11-10 Thread Dominik Inführ
Ping

> On 31 Oct 2017, at 14:47, Dominik Inführ 
>  wrote:
> 
> Hi,
> 
> I have a custom optimization pass, that moves an expression into an 
> POST_INC-expression. GCC then ICE’s in df-scan.c since it expects REG_P to be 
> true for POST_INC’s operand. aarch64_simd_mem_operand_p doesn’t seem to check 
> POST_INC’s operand. Here is a patch that fixes this for me, although I am not 
> sure if this is the right way to address this. GCC bootstraps and it causes 
> no test regressions.
> 
> Dominik
> 
> ChangeLog:
> 2017-10-31  Dominik Infuehr  
> 
>   * config/aarch64/aarch64.c (aarch64_simd_mem_operand_p): Check
>   if register given as operand for POST_INC.
> 
> -
> 
> diff --git a/gcc/config/aarch64/aarch64.c b/gcc/config/aarch64/aarch64.c
> index ed30b8c..bb61506 100644
> --- a/gcc/config/aarch64/aarch64.c
> +++ b/gcc/config/aarch64/aarch64.c
> @@ -11850,8 +11850,15 @@ aarch64_simd_lane_bounds (rtx operand, HOST_WIDE_INT 
> low, HOST_WIDE_INT high,
> bool
> aarch64_simd_mem_operand_p (rtx op)
> {
> -  return MEM_P (op) && (GET_CODE (XEXP (op, 0)) == POST_INC
> -   || REG_P (XEXP (op, 0)));
> +  if (!MEM_P (op))
> +return false;
> +
> +  rtx opnd = XEXP (op, 0);
> +
> +  if (GET_CODE (opnd) == POST_INC)
> +opnd = XEXP(opnd, 0);
> +
> +  return REG_P (opnd);
> }
> 
> /* Emit a register copy from operand to operand, taking care not to



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Re: [AArch64] Tweak aarch64_classify_address interface

2017-11-10 Thread James Greenhalgh
On Mon, Oct 23, 2017 at 06:58:29PM +0100, Richard Sandiford wrote:
> Ping.

Makes sense. OK.

Reviewed-By: James Greenhalgh 

James

> Richard Sandiford  writes:
> > Richard Sandiford  writes:
> >> James Greenhalgh  writes:
> >>> On Tue, Aug 22, 2017 at 10:23:47AM +0100, Richard Sandiford wrote:
>  Previously aarch64_classify_address used an rtx code to distinguish
>  LDP/STP addresses from normal addresses; the code was PARALLEL
>  to select LDP/STP and anything else to select normal addresses.
>  This patch replaces that parameter with a dedicated enum.
>  
>  The SVE port will add another enum value that didn't map naturally
>  to an rtx code.
>  
>  Tested on aarch64-linux-gnu.  OK to install?
> >>>
> >>> I can't say I really like this new interface, I'd prefer two wrappers
> >>> aarch64_legitimate_address_p , aarch64_legitimate_ldp_address_p (or 
> >>> similar)
> >>> around your new interface, and for most code to simply call the wrapper.
> >>> Or an overloaded call that filled in ADDR_QUERY_M automatically, to save
> >>> that spreading through the backend.
> >>
> >> OK, I went for the second, putting the query type last and making it
> >> an optional argument.
> >
> > By way of a ping, here's the patch updated to current trunk.
> >
> > Tested on aarch64-linux-gnu.  OK to install?
> >
> > Thanks,
> > Richard
> >
> > 2017-09-18  Richard Sandiford  
> > Alan Hayward  
> > David Sherwood  
> >
> > gcc/
> > * config/aarch64/aarch64-protos.h (aarch64_addr_query_type): New enum.
> > (aarch64_legitimate_address_p): Use it instead of an rtx code,
> > as an optional final parameter.
> > * config/aarch64/aarch64.c (aarch64_classify_address): Likewise.
> > (aarch64_legitimate_address_p): Likewise.
> > (aarch64_address_valid_for_prefetch_p): Update calls accordingly.
> > (aarch64_legitimate_address_hook_p): Likewise.
> > (aarch64_print_operand_address): Likewise.
> > (aarch64_address_cost): Likewise.
> > * config/aarch64/constraints.md (Umq, Ump): Likewise.
> > * config/aarch64/predicates.md (aarch64_mem_pair_operand): Likewise.
> >


Re: [03/nn] [AArch64] Rework interface to add constant/offset routines

2017-11-10 Thread James Greenhalgh
On Mon, Oct 30, 2017 at 10:52:26AM +, Richard Sandiford wrote:
> Richard Sandiford  writes:
> > The port had aarch64_add_offset and aarch64_add_constant routines
> > that did similar things.  This patch replaces them with an expanded
> > version of aarch64_add_offset that takes separate source and
> > destination registers.  The new routine also takes a poly_int64 offset
> > instead of a HOST_WIDE_INT offset, but it leaves the HOST_WIDE_INT
> > case to aarch64_add_offset_1, which is basically a repurposed
> > aarch64_add_constant_internal.  The SVE patch will put the handling
> > of VL-based constants in aarch64_add_offset, while still using
> > aarch64_add_offset_1 for the constant part.
> >
> > The vcall_offset == 0 path in aarch64_output_mi_thunk will use temp0
> > as well as temp1 once SVE is added.
> >
> > A side-effect of the patch is that we now generate:
> >
> > mov x29, sp
> >
> > instead of:
> >
> > add x29, sp, 0
> >
> > in the pr70044.c test.
> 
> Sorry, I stupidly rebased the patch just before posting and so
> introduced a last-minute bug.  Here's a fixed version that survives
> testing on aarch64-linux-gnu.
>
> 2017-10-30  Richard Sandiford  
>   Alan Hayward  
>   David Sherwood  
> 
> gcc/
>   * config/aarch64/aarch64.c (aarch64_force_temporary): Assert that
>   x exists before using it.
>   (aarch64_add_constant_internal): Rename to...
>   (aarch64_add_offset_1): ...this.  Replace regnum with separate
>   src and dest rtxes.  Handle the case in which they're different,
>   including when the offset is zero.  Replace scratchreg with an rtx.
>   Use 2 additions if there is no spare register into which we can
>   move a 16-bit constant.
>   (aarch64_add_constant): Delete.
>   (aarch64_add_offset): Replace reg with separate src and dest
>   rtxes.  Take a poly_int64 offset instead of a HOST_WIDE_INT.
>   Use aarch64_add_offset_1.
>   (aarch64_add_sp, aarch64_sub_sp): Take the scratch register as
>   an rtx rather than an int.  Take the delta as a poly_int64
>   rather than a HOST_WIDE_INT.  Use aarch64_add_offset.
>   (aarch64_expand_mov_immediate): Update uses of aarch64_add_offset.
>   (aarch64_allocate_and_probe_stack_space): Take the scratch register
>   as an rtx rather than an int.  Use Pmode rather than word_mode
>   in the loop code.  Update calls to aarch64_sub_sp.
>   (aarch64_expand_prologue): Update calls to aarch64_sub_sp,
>   aarch64_allocate_and_probe_stack_space and aarch64_add_offset.
>   (aarch64_expand_epilogue): Update calls to aarch64_add_offset
>   and aarch64_add_sp.
>   (aarch64_output_mi_thunk): Use aarch64_add_offset rather than
>   aarch64_add_constant.
> 
> gcc/testsuite/
>   * gcc.target/aarch64/pr70044.c: Allow "mov x29, sp" too.


> @@ -1966,86 +1949,123 @@ aarch64_internal_mov_immediate (rtx dest
>return num_insns;
>  }
>  
> -/* Add DELTA to REGNUM in mode MODE.  SCRATCHREG can be used to hold a
> -   temporary value if necessary.  FRAME_RELATED_P should be true if
> -   the RTX_FRAME_RELATED flag should be set and CFA adjustments added
> -   to the generated instructions.  If SCRATCHREG is known to hold
> -   abs (delta), EMIT_MOVE_IMM can be set to false to avoid emitting the
> -   immediate again.
> -
> -   Since this function may be used to adjust the stack pointer, we must
> -   ensure that it cannot cause transient stack deallocation (for example
> -   by first incrementing SP and then decrementing when adjusting by a
> -   large immediate).  */
> +/* A subroutine of aarch64_add_offset that handles the case in which
> +   OFFSET is known at compile time.  The arguments are otherwise the same.  
> */

Some of the restrictions listed in this comment are important to keep
here. 

> -   Since this function may be used to adjust the stack pointer, we must
> -   ensure that it cannot cause transient stack deallocation (for example
> -   by first incrementing SP and then decrementing when adjusting by a
> -   large immediate).  */

This one in particular seems like we'd want it kept nearby the code.

OK with some sort of change to make the restrictions on what this code
should do clear on both functions.

Reviewed-by: James Greenhalgh 

Thanks,
James



Re: [PATCH] GCOV: create one intermediate file per a gcno file (PR gcov-profile/82702).

2017-11-10 Thread Martin Liška
On 11/09/2017 04:23 PM, Nathan Sidwell wrote:
> https://gcc.gnu.org/ml/gcc-patches/2017-10/msg02337.html
> 
> sorry for dropping this one.
> 
> looks good, except:
>> -  for (; argno != argc; argno++)
>> +  if (flag_intermediate_format)
>>  {
>> -  if (flag_display_progress)
>> -    printf ("Processing file %d out of %d\n", argno - first_arg + 1,
>> -    argc - first_arg);
>> -  process_file (argv[argno]);
>> +  for (; argno != argc; argno++)
>> +    {
>> +  if (flag_display_progress)
>> +    printf ("Processing file %d out of %d\n", argno - first_arg + 1,
>> +    argc - first_arg);
>> +  process_file (argv[argno]);
>> +  generate_results (argv[argno]);
>> +  release_structures ();
>> +    }
>>  }
>> +  else
>> +    {
>> +  for (; argno != argc; argno++)
>> +    {
>> +  if (flag_display_progress)
>> +    printf ("Processing file %d out of %d\n", argno - first_arg + 1,
>> +    argc - first_arg);
>> +  process_file (argv[argno]);
>> +    }
> 
> looks like a manually unswitched loop.  Isn't
> 
> for (... )
>   {
>     if (...)
>   printf ...
>     process_file (...)
>     if (flag_intermediate_files)
>   {
>  generate_results (...);
>  release_structures ();
>   }
> }
> 
> clearer?

Yes, fixed in attached patch. Apart from that I find a small issue in
output_intermediate_file.

I'm going to install the patch.

Thanks,
Martin
>From b359c566c0341a44e4a1d60f4926dee2bb9af4bc Mon Sep 17 00:00:00 2001
From: marxin 
Date: Tue, 31 Oct 2017 16:21:23 +0100
Subject: [PATCH] GCOV: create one intermediate file per a gcno file (PR
 gcov-profile/82702).

gcc/ChangeLog:

2017-10-31  Martin Liska  

	PR gcov-profile/82702
	* gcov.c (main): Handle intermediate files in a different
	way.
	(get_gcov_intermediate_filename): New function.
	(output_gcov_file): Remove support of intermediate files.
	(generate_results): Allocate intermediate file.
	(release_structures): Clean-up properly fn_end.
	(output_intermediate_file): Start iterating with line 1.
---
 gcc/gcov.c | 96 +-
 1 file changed, 76 insertions(+), 20 deletions(-)

diff --git a/gcc/gcov.c b/gcc/gcov.c
index 846a2326196..3c76941287a 100644
--- a/gcc/gcov.c
+++ b/gcc/gcov.c
@@ -781,11 +781,13 @@ main (int argc, char **argv)
 	printf ("Processing file %d out of %d\n", argno - first_arg + 1,
 		argc - first_arg);
   process_file (argv[argno]);
-}
-
-  generate_results (multiple_files ? NULL : argv[argc - 1]);
 
-  release_structures ();
+  if (flag_intermediate_format || argno == argc - 1)
+	{
+	  generate_results (argv[argno]);
+	  release_structures ();
+	}
+}
 
   return 0;
 }
@@ -988,6 +990,31 @@ output_intermediate_line (FILE *f, line_info *line, unsigned line_num)
   }
 }
 
+/* Get the name of the gcov file.  The return value must be free'd.
+
+   It appends the '.gcov' extension to the *basename* of the file.
+   The resulting file name will be in PWD.
+
+   e.g.,
+   input: foo.da,   output: foo.da.gcov
+   input: a/b/foo.cc,   output: foo.cc.gcov  */
+
+static char *
+get_gcov_intermediate_filename (const char *file_name)
+{
+  const char *gcov = ".gcov";
+  char *result;
+  const char *cptr;
+
+  /* Find the 'basename'.  */
+  cptr = lbasename (file_name);
+
+  result = XNEWVEC (char, strlen (cptr) + strlen (gcov) + 1);
+  sprintf (result, "%s%s", cptr, gcov);
+
+  return result;
+}
+
 /* Output the result in intermediate format used by 'lcov'.
 
 The intermediate format contains a single file named 'foo.cc.gcov',
@@ -1014,7 +1041,7 @@ output_intermediate_file (FILE *gcov_file, source_info *src)
 	   flag_demangled_names ? (*it)->demangled_name : (*it)->name);
 }
 
-  for (unsigned line_num = 0; line_num <= src->lines.size (); line_num++)
+  for (unsigned line_num = 1; line_num <= src->lines.size (); line_num++)
 {
   vector fns = src->get_functions_at_location (line_num);
 
@@ -1197,19 +1224,16 @@ output_gcov_file (const char *file_name, source_info *src)
 {
   FILE *gcov_file = fopen (gcov_file_name, "w");
   if (gcov_file)
-{
-  fnotice (stdout, "Creating '%s'\n", gcov_file_name);
-
-	  if (flag_intermediate_format)
-	output_intermediate_file (gcov_file, src);
-	  else
-	output_lines (gcov_file, src);
-  if (ferror (gcov_file))
-fnotice (stderr, "Error writing output file '%s'\n", gcov_file_name);
-  fclose (gcov_file);
-}
+	{
+	  fnotice (stdout, "Creating '%s'\n", gcov_file_name);
+	  output_lines (gcov_file, src);
+	  if (ferror (gcov_file))
+	fnotice (stderr, "Error writing output file '%s'\n",
+		 gcov_file_name);
+	  fclose (gcov_file);
+	}
   else
-fnotice (stderr, "Could not open output file '%s'\n", gcov_file_name);
+	fnotice (stderr, "Could not open output file '%s'\n", gcov_file_name);
 }
   else
 {
@@ -1223,6 +1247,8 @@ 

Re: [PATCH] GCOV: do not support unexecuted blocks in Ada

2017-11-10 Thread Martin Liška
On 11/09/2017 04:27 PM, Nathan Sidwell wrote:
> 
>> +  /* support for unexecuted basic blocks */
> 
> comment is not a sentence.
> 
>> +  unsigned support_unexecuted_blocks = gcov_read_unsigned ();
>> +  if (!support_unexecuted_blocks)
>> +    printf ("%s: has_unexecuted_block is not supported\n", filename);
> 
> otherwise Ok.  Just fix that formatting and commit.
> 
> nathan

Thank you Nathan, installed with the nit as r254627.

Martin


[C++ PATCH] P0428R2 - familiar template syntax for generic lambdas

2017-11-10 Thread Jakub Jelinek
Hi!

This feature seems to be fully implemented from what I can see, except that we
pedwarn on it, which we shouldn't do for -std=c++2a or -std=gnu++2a when it is
standard.

I'm not really sure about the pedwarn wording(s), the reality is that
it is supported for C++14 and later as an extension and for C++2A and later
as standard feature.

Regtested on x86_64-linux with check-c++-all.

2017-11-10  Jakub Jelinek  

P0428R2 - familiar template syntax for generic lambdas
* parser.c (cp_parser_lambda_declarator_opt): Don't pedwarn
for cxx2a and above, reword pedwarn for C++14/C++17.

* g++.dg/cpp1y/lambda-generic-x.C: Adjust warnings and limit
to c++17_down target.
* g++.dg/cpp1y/lambda-generic-dep.C: Likewise.
* g++.dg/cpp1y/lambda-generic-77914.C: Adjust error and limit
to c++17_down target.
* g++.dg/cpp2a/lambda-generic1.C: New test.

--- gcc/cp/parser.c.jj  2017-11-01 22:49:15.0 +0100
+++ gcc/cp/parser.c 2017-11-10 13:21:16.475915963 +0100
@@ -10510,9 +10510,10 @@ cp_parser_lambda_declarator_opt (cp_pars
pedwarn (parser->lexer->next_token->location, 0,
 "lambda templates are only available with "
 "-std=c++14 or -std=gnu++14");
-  else
+  else if (cxx_dialect < cxx2a)
pedwarn (parser->lexer->next_token->location, OPT_Wpedantic,
-"ISO C++ does not support lambda templates");
+"lambda templates are only available with "
+"-std=c++2a or -std=gnu++2a");
 
   cp_lexer_consume_token (parser->lexer);
 
--- gcc/testsuite/g++.dg/cpp1y/lambda-generic-x.C.jj2017-01-25 
21:50:13.0 +0100
+++ gcc/testsuite/g++.dg/cpp1y/lambda-generic-x.C   2017-11-10 
13:25:29.113922954 +0100
@@ -6,17 +6,17 @@
 
 int main()
 {
-   auto glambda = []  (A a, B&& b) { return a < b; };  
// { dg-warning "does not support lambda templates" }
+   auto glambda = []  (A a, B&& b) { return a < b; };  
// { dg-warning "lambda templates are only available with" "" { target 
c++17_down } }
bool b = glambda(3, 3.14); // OK
-   auto vglambda = []  (P printer) {   
// { dg-warning "does not support lambda templates" }
+   auto vglambda = []  (P printer) {   
// { dg-warning "lambda templates are only available with" "" { target 
c++17_down } }
  return [=]  (T&& ... ts) { // OK: ts is a function 
parameter pack
-   printer(std::forward(ts)...); 
// { dg-warning "does not support lambda templates" "" { target *-*-* } .-1 }
+   printer(std::forward(ts)...); 
// { dg-warning "lambda templates are only available with" "" { target 
c++17_down } .-1 }
return [=]() {
  printer(ts ...);
};
  };
};
-   auto p = vglambda( []  (A v1, B v2, C v3)
  { std::cout << v1 << v2 << v3; } );
--- gcc/testsuite/g++.dg/cpp1y/lambda-generic-dep.C.jj  2017-01-25 
21:50:13.0 +0100
+++ gcc/testsuite/g++.dg/cpp1y/lambda-generic-dep.C 2017-11-10 
13:23:47.218130116 +0100
@@ -27,7 +27,7 @@ struct S {
 
 int main()
 {
-  auto f = []  (T const& s) mutable {  // { dg-warning "does 
not support lambda templates" }
+  auto f = []  (T const& s) mutable {  // { dg-warning "lambda 
templates are only available with" "" { target c++17_down } }
 typename T::N x;
 return x.test ();
   };
--- gcc/testsuite/g++.dg/cpp1y/lambda-generic-77914.C.jj2017-01-25 
21:50:13.0 +0100
+++ gcc/testsuite/g++.dg/cpp1y/lambda-generic-77914.C   2017-11-10 
13:23:32.644302773 +0100
@@ -4,6 +4,6 @@
 int
 main ()
 {
-  auto l = []  () {};  // { dg-error "does not support lambda 
templates" }
+  auto l = []  () {};  // { dg-error "lambda templates are 
only available with" "" { target c++17_down } }
   l.operator ()  ();
 }
--- gcc/testsuite/g++.dg/cpp2a/lambda-generic1.C.jj 2017-11-10 
13:26:08.666448084 +0100
+++ gcc/testsuite/g++.dg/cpp2a/lambda-generic1.C2017-11-10 
13:29:03.518348714 +0100
@@ -0,0 +1,9 @@
+// P0428R2
+// { dg-do compile { target c++14 } }
+
+int i = [](int i, auto a) { return i; }(3, 4);
+int j = [](T t, int i) { return i; }(3, 4); // { dg-error 
"lambda templates are only available with" "" { target c++17_down } }
+int k[2] = { 5, 6 };
+int l = [](T *p) { return *p; }(k);  // { 
dg-error "lambda templates are only available with" "" { target c++17_down } }
+int m = [](T ()[N]) { return a[N - 1]; }(k); // { 
dg-error "lambda templates are only available with" "" { target c++17_down } }
+int n = [](T a, auto b) { return a + b; }(7, 8); // { dg-error 
"lambda templates are only available with" "" { target c++17_down } }

Jakub


Re: [PATCH PR82726/PR70754][2/2]New fix by finding correct root reference in combined chains

2017-11-10 Thread Bin.Cheng
Hmm, the patch...

Thanks,
bin

On Fri, Nov 10, 2017 at 2:13 PM, Bin.Cheng <amker.ch...@gmail.com> wrote:
> On Tue, Nov 7, 2017 at 10:53 AM, Richard Biener
> <richard.guent...@gmail.com> wrote:
>> On Fri, Nov 3, 2017 at 1:40 PM, Bin Cheng <bin.ch...@arm.com> wrote:
>>> Hi,
>>> As described in message of previous patch:
>>>
>>> This patch set fixes both PRs in the opposite way: Instead of find dominance
>>> insertion position for root reference, we resort zero-distance references of
>>> combined chain by their position information so that new root reference must
>>> dominate others.  This should be more efficient because we avoid function 
>>> call
>>> to stmt_dominates_stmt_p.
>>> Bootstrap and test on x86_64 and AArch64 in patch set.  Is it OK?
>>
>> +/* { dg-additional-options "-mavx2" { target avx2_runtime } } */
>>
>> you don't need avx2_runtime for -mavx2 so please instead use
>> { target { x86_64-*-* i?86-*-* } }
>>
>> +#include 
>> +#define INCLUDE_ALGORITHM /* std::sort */
>>
>> can you please use GCCs own hash_map?  Btw...
>>
>> +  /* Setup UID for all statements in dominance order.  */
>> +  std::map stmts_map;
>> +  basic_block *bbs = get_loop_body_in_dom_order (loop);
>> +  for (i = 0; i < loop->num_nodes; i++)
>> +{
>> +  int uid = 0;
>> +  basic_block bb = bbs[i];
>> +
>> +  for (gimple_stmt_iterator bsi = gsi_start_phis (bb); !gsi_end_p (bsi);
>> +  gsi_next ())
>> +   {
>> + gimple *stmt = gsi_stmt (bsi);
>> + if (!virtual_operand_p (gimple_phi_result (as_a (stmt
>> +   stmts_map[stmt] = uid;
>>
>> why don't you use gimple_[set_]uid ()?  Given you do a dominance check
>> you don't even need to do this in dominance order - usually passes just
>> number UIDs in all relevant BBs.  There is a helper for that as well,
>> renumber_gimple_stmt_uids_in_blocks which can be used on
>> the get_loop_body result.
> Yea, I forgot gimple_[set_]uid interface when doing this.  All fixed now.
>>
>> +  /* Sort all ZERO distance references by position.  */
>> +  std::sort (>refs[0], >refs[0] + j, order_drefs_by_pos);
>> +
>>
>> given ch1->refs is a vec you can use the new vec::qsort_block you added
>> instead of including algorithm and using std::sort.
> Sorry, I haven't push that patch in.  In this updated patch, I fall
> back to generic qsort so algorithm is not included.
>
> Bootstrap and test on x86_64.  Is it OK?
> Thanks,
> bin
>
> 2017-11-10  Bin Cheng  <bin.ch...@arm.com>
>
> PR tree-optimization/82726
> PR tree-optimization/70754
> * tree-predcom.c (order_drefs_by_pos): New function.
> (combine_chains): Move code setting has_max_use_after to...
> (try_combine_chains): ...here.  New parameter.  Sort combined chains
> according to position information.
> (tree_predictive_commoning_loop): Update call to above function.
> (update_pos_for_combined_chains, pcom_stmt_dominates_stmt_p): New.
>
> gcc/testsuite
> 2017-11-10  Bin Cheng  <bin.ch...@arm.com>
>
> PR tree-optimization/82726
> * gcc.dg/tree-ssa/pr82726.c: New test.
>
>
>>
>> Richard.
>>
>>> Thanks,
>>> bin
>>> 2017-11-02  Bin Cheng  <bin.ch...@arm.com>
>>>
>>> PR tree-optimization/82726
>>> PR tree-optimization/70754
>>> * tree-predcom.c (, INCLUDE_ALGORITHM): New headers.
>>> (order_drefs_by_pos): New function.
>>> (combine_chains): Move code setting has_max_use_after to...
>>> (try_combine_chains): ...here.  New parameter.  Sort combined chains
>>> according to position information.
>>> (tree_predictive_commoning_loop): Update call to above function.
>>> (update_pos_for_combined_chains, pcom_stmt_dominates_stmt_p): New.
>>>
>>> gcc/testsuite
>>> 2017-11-02  Bin Cheng  <bin.ch...@arm.com>
>>>
>>> PR tree-optimization/82726
>>> * gcc.dg/tree-ssa/pr82726.c: New test.
From f7b9b4ac78f33aee60ecd37ca515f2f8773f5561 Mon Sep 17 00:00:00 2001
From: Bin Cheng <binch...@e108451-lin.cambridge.arm.com>
Date: Wed, 1 Nov 2017 17:43:55 +
Subject: [PATCH 2/2] pr82726-20171110.txt

---
 gcc/testsuite/gcc.dg/tree-ssa/pr82726.c |  26 ++
 gcc/tree-predcom.c  | 158 
 2 files changed, 168 insertions(+), 16 deletions(-)
 create mode 100644 gcc/testsuite/gcc.dg/tree-ssa/pr82726.c

diff --git

Re: [PATCH] Add option to force indirect calls for x86

2017-11-10 Thread Rainer Orth
Hi Andi,

> This patch adds a -mforce-indirect-call option to force all calls
> or tail calls on x86_64 between functions to indirect. This is similar to the
> large code model, but doesn't affect jumps inside functions, so has much
> less run time overhead.
>
> This is useful with Intel Processor Trace (PT). PT has precise timing
> for indirect calls/jumps, but not for direct ones. So if we can force
> them to indirect it allows to time every function relatively accurately
> (minus the overhead of the indirect branch)
>
> Without this short functions often don't see a timing update and cannot
> be measured.
[...]
> gcc/testsuite/:
> 2017-11-08  Andi Kleen  
>
>   * gcc.target/i386/force-indirect-call-1.c: New test.
>   * gcc.target/i386/force-indirect-call-2.c: New test.
>   * gcc.target/i386/force-indirect-call-3.c: New test.

two of those new tests FAIL for 32-bit x86 (seen on both
i386-pc-solaris2.11 and x86_64-pc-linux-gnu):

+FAIL: gcc.target/i386/force-indirect-call-2.c scan-assembler-times call[ t]
+*% 2 (found 3 times)
+FAIL: gcc.target/i386/force-indirect-call-2.c scan-assembler-times jmp[ t]+
*% 1 (found 0 times)

Also, the test uses -fPIC, thus requires target fpic.

+FAIL: gcc.target/i386/force-indirect-call-3.c (test for excess errors)

cc1: error: code model 'medium' not supported in the 32 bit mode

+UNRESOLVED: gcc.target/i386/force-indirect-call-3.c scan-assembler-times call[ 
t]+*% 2
+UNRESOLVED: gcc.target/i386/force-indirect-call-3.c scan-assembler-times jmp[ \
\\\t]+*% 1

Please fix.

Rainer

-- 
-
Rainer Orth, Center for Biotechnology, Bielefeld University


Re: [PATCH PR82726/PR70754][2/2]New fix by finding correct root reference in combined chains

2017-11-10 Thread Bin.Cheng
On Tue, Nov 7, 2017 at 10:53 AM, Richard Biener
 wrote:
> On Fri, Nov 3, 2017 at 1:40 PM, Bin Cheng  wrote:
>> Hi,
>> As described in message of previous patch:
>>
>> This patch set fixes both PRs in the opposite way: Instead of find dominance
>> insertion position for root reference, we resort zero-distance references of
>> combined chain by their position information so that new root reference must
>> dominate others.  This should be more efficient because we avoid function 
>> call
>> to stmt_dominates_stmt_p.
>> Bootstrap and test on x86_64 and AArch64 in patch set.  Is it OK?
>
> +/* { dg-additional-options "-mavx2" { target avx2_runtime } } */
>
> you don't need avx2_runtime for -mavx2 so please instead use
> { target { x86_64-*-* i?86-*-* } }
>
> +#include 
> +#define INCLUDE_ALGORITHM /* std::sort */
>
> can you please use GCCs own hash_map?  Btw...
>
> +  /* Setup UID for all statements in dominance order.  */
> +  std::map stmts_map;
> +  basic_block *bbs = get_loop_body_in_dom_order (loop);
> +  for (i = 0; i < loop->num_nodes; i++)
> +{
> +  int uid = 0;
> +  basic_block bb = bbs[i];
> +
> +  for (gimple_stmt_iterator bsi = gsi_start_phis (bb); !gsi_end_p (bsi);
> +  gsi_next ())
> +   {
> + gimple *stmt = gsi_stmt (bsi);
> + if (!virtual_operand_p (gimple_phi_result (as_a (stmt
> +   stmts_map[stmt] = uid;
>
> why don't you use gimple_[set_]uid ()?  Given you do a dominance check
> you don't even need to do this in dominance order - usually passes just
> number UIDs in all relevant BBs.  There is a helper for that as well,
> renumber_gimple_stmt_uids_in_blocks which can be used on
> the get_loop_body result.
Yea, I forgot gimple_[set_]uid interface when doing this.  All fixed now.
>
> +  /* Sort all ZERO distance references by position.  */
> +  std::sort (>refs[0], >refs[0] + j, order_drefs_by_pos);
> +
>
> given ch1->refs is a vec you can use the new vec::qsort_block you added
> instead of including algorithm and using std::sort.
Sorry, I haven't push that patch in.  In this updated patch, I fall
back to generic qsort so algorithm is not included.

Bootstrap and test on x86_64.  Is it OK?
Thanks,
bin

2017-11-10  Bin Cheng  

PR tree-optimization/82726
PR tree-optimization/70754
* tree-predcom.c (order_drefs_by_pos): New function.
(combine_chains): Move code setting has_max_use_after to...
(try_combine_chains): ...here.  New parameter.  Sort combined chains
according to position information.
(tree_predictive_commoning_loop): Update call to above function.
(update_pos_for_combined_chains, pcom_stmt_dominates_stmt_p): New.

gcc/testsuite
2017-11-10  Bin Cheng  

PR tree-optimization/82726
* gcc.dg/tree-ssa/pr82726.c: New test.


>
> Richard.
>
>> Thanks,
>> bin
>> 2017-11-02  Bin Cheng  
>>
>> PR tree-optimization/82726
>> PR tree-optimization/70754
>> * tree-predcom.c (, INCLUDE_ALGORITHM): New headers.
>> (order_drefs_by_pos): New function.
>> (combine_chains): Move code setting has_max_use_after to...
>> (try_combine_chains): ...here.  New parameter.  Sort combined chains
>> according to position information.
>> (tree_predictive_commoning_loop): Update call to above function.
>> (update_pos_for_combined_chains, pcom_stmt_dominates_stmt_p): New.
>>
>> gcc/testsuite
>> 2017-11-02  Bin Cheng  
>>
>> PR tree-optimization/82726
>> * gcc.dg/tree-ssa/pr82726.c: New test.


Re: [RFA][PATCH] 2/n Refactoring tree-vrp.c -- pull evrp bits into their own file

2017-11-10 Thread Richard Biener
On Fri, Nov 10, 2017 at 1:30 AM, Jeff Law  wrote:
> This patch pulls out the EVRP class & methods from tree-vrp.c.  It's a
> straight copy-n-paste with the exception of the evrp_folder class which
> I trimmed back down to its minimal form.
>
> This obviously forces shared structures/routines between tree-vrp.c and
> tree-evrp.c to get exposed in a header file (tree-vrp.h).  I consider
> this a positive as those dependencies are now fairly explicit and we can
> work to rationalize that set (ie, does the dependency make sense, where
> is the most natural place for the shared bits, etc).
>
> I'm not ready to pull the trigger on submission, but I fully expect
> tree-evrp.c to go through another refactoring to separate analysis from
> optimization -- which then allows us to embed the analysis bits into
> other passes.
>
> Bootstrapped and regression tested on x86_64.  OK for the trunk?

Ok, but can you name it gimple-ssa-evrp.c please? ;)

Richard.

> Jeff
>
> * vr-values.h (VR_INITIALIZER): Move #define here.
> * tree-evrp.c: New file with contents extracted from tree-vrp.c
> * Makefile.in (OBJS): Add tree-evrp.o
> * tree-vrp.h (assert_info): Move structure definition here.
> (set_value_range_to_varying): Prototype.
> (vrp_operand_equal_p, range_includes_zero_p): Likewise.
> (infer_value_range, register_edge_assert_for): Likewise.
> (stmt_interesting_for_vrp): Likewise.
> * tree-vrp.c: Move all methods for evrp class into tree-evrp.c.
> (set_value_range_to_varying): No longer static.
> (vrp_operand_equal_p, range_includes_zero_p): Likewise.
> (infer_value_range, register_edge_assert_for): Likewise.
>
> diff --git a/gcc/Makefile.in b/gcc/Makefile.in
> index 1bb1d6ec0ff..364d656db26 100644
> --- a/gcc/Makefile.in
> +++ b/gcc/Makefile.in
> @@ -1491,6 +1491,7 @@ OBJS = \
> tree-dump.o \
> tree-eh.o \
> tree-emutls.o \
> +   tree-evrp.o \
> tree-if-conv.o \
> tree-inline.o \
> tree-into-ssa.o \
> diff --git a/gcc/tree-evrp.c b/gcc/tree-evrp.c
> new file mode 100644
> index 000..13ba31d7cd7
> --- /dev/null
> +++ b/gcc/tree-evrp.c
> @@ -0,0 +1,624 @@
> +/* Support routines for Value Range Propagation (VRP).
> +   Copyright (C) 2005-2017 Free Software Foundation, Inc.
> +
> +This file is part of GCC.
> +
> +GCC is free software; you can redistribute it and/or modify
> +it under the terms of the GNU General Public License as published by
> +the Free Software Foundation; either version 3, or (at your option)
> +any later version.
> +
> +GCC is distributed in the hope that it will be useful,
> +but WITHOUT ANY WARRANTY; without even the implied warranty of
> +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
> +GNU General Public License for more details.
> +
> +You should have received a copy of the GNU General Public License
> +along with GCC; see the file COPYING3.  If not see
> +.  */
> +
> +#include "config.h"
> +#include "system.h"
> +#include "coretypes.h"
> +#include "backend.h"
> +#include "tree.h"
> +#include "gimple.h"
> +#include "tree-pass.h"
> +#include "ssa.h"
> +#include "gimple-pretty-print.h"
> +#include "cfganal.h"
> +#include "gimple-fold.h"
> +#include "tree-eh.h"
> +#include "gimple-iterator.h"
> +#include "tree-cfg.h"
> +#include "tree-ssa-loop-manip.h"
> +#include "tree-ssa-loop.h"
> +#include "cfgloop.h"
> +#include "tree-scalar-evolution.h"
> +#include "tree-ssa-propagate.h"
> +#include "alloc-pool.h"
> +#include "domwalk.h"
> +#include "tree-cfgcleanup.h"
> +#include "vr-values.h"
> +
> +class evrp_folder : public substitute_and_fold_engine
> +{
> + public:
> +  tree get_value (tree) FINAL OVERRIDE;
> +
> +  class vr_values *vr_values;
> +};
> +
> +tree
> +evrp_folder::get_value (tree op)
> +{
> +  return vr_values->op_with_constant_singleton_value_range (op);
> +}
> +
> +/* evrp_dom_walker visits the basic blocks in the dominance order and set
> +   the Value Ranges (VR) for SSA_NAMEs in the scope.  Use this VR to
> +   discover more VRs.  */
> +
> +class evrp_dom_walker : public dom_walker
> +{
> +public:
> +  evrp_dom_walker ()
> +: dom_walker (CDI_DOMINATORS), stack (10)
> +{
> +  need_eh_cleanup = BITMAP_ALLOC (NULL);
> +}
> +  ~evrp_dom_walker ()
> +{
> +  BITMAP_FREE (need_eh_cleanup);
> +}
> +  virtual edge before_dom_children (basic_block);
> +  virtual void after_dom_children (basic_block);
> +  void push_value_range (tree var, value_range *vr);
> +  value_range *pop_value_range (tree var);
> +  value_range *try_find_new_range (tree, tree op, tree_code code, tree 
> limit);
> +
> +  /* Cond_stack holds the old VR.  */
> +  auto_vec > stack;
> +  bitmap need_eh_cleanup;
> +  auto_vec stmts_to_fixup;
> +  auto_vec stmts_to_remove;
> +
> +  class vr_values vr_values;
> +
> +  /* Temporary delegators.  */
> +  value_range *get_value_range 

[PATCH] Handle different bit_not_p in store merging (PR tree-optimization/78821)

2017-11-10 Thread Jakub Jelinek
Hi!

This is something Uros requested in the PR, at least with BIT_NOT_EXPRs
it is easy.  Previous store merging changes required that bit_not_p
is equal on all stores in the group (in all 3 spots, i.e. on the result
of BIT_{AND,IOR,XOR}_EXPR and on both of the operands).

This patch handles mixed values of that flag.  If none of the
orig_stores have a particular bit_not_p set, then as previously nothing
is inverted, if all of them have it set, then as previously we BIT_NOT_EXPR
the particular SSA_NAME, and newly if there is a mix of false and true
in a particular bit_not_p, we compute a mask and BIT_XOR_EXPR it, this
invert only the bits that were bit_not_p and not the others.

Bootstrapped/regtested on x86_64-linux and i686-linux, ok for trunk?

2017-11-10  Jakub Jelinek  

PR tree-optimization/78821
* gimple-ssa-store-merging.c (compatible_load_p): Don't require
that bit_not_p is the same.
(imm_store_chain_info::coalesce_immediate_stores): Likewise.
(split_group): Count precisely bit_not_p bits in each statement.
(invert_op): New function.
(imm_store_chain_info::output_merged_store): Use invert_op to
emit BIT_XOR_EXPR with a xor_mask instead of BIT_NOT_EXPR if some
but not all orig_stores have BIT_NOT_EXPR in the corresponding spots.

* gcc.dg/store_merging_15.c: New test.

--- gcc/gimple-ssa-store-merging.c.jj   2017-11-10 08:04:49.0 +0100
+++ gcc/gimple-ssa-store-merging.c  2017-11-10 10:53:13.152731543 +0100
@@ -1036,7 +1036,6 @@ compatible_load_p (merged_store_group *m
 {
   store_immediate_info *infof = merged_store->stores[0];
   if (!info->ops[idx].base_addr
-  || info->ops[idx].bit_not_p != infof->ops[idx].bit_not_p
   || (info->ops[idx].bitpos - infof->ops[idx].bitpos
  != info->bitpos - infof->bitpos)
   || !operand_equal_p (info->ops[idx].base_addr,
@@ -1176,8 +1175,7 @@ imm_store_chain_info::coalesce_immediate
 Merge it into the current store group.  There can be gaps in between
 the stores, but there can't be gaps in between bitregions.  */
   else if (info->bitregion_start <= merged_store->bitregion_end
-  && info->rhs_code == merged_store->stores[0]->rhs_code
-  && info->bit_not_p == merged_store->stores[0]->bit_not_p)
+  && info->rhs_code == merged_store->stores[0]->rhs_code)
{
  store_immediate_info *infof = merged_store->stores[0];
 
@@ -1496,16 +1494,14 @@ split_group (merged_store_group *group,
   total_orig[0] = 1; /* The orig store.  */
   info = group->stores[0];
   if (info->ops[0].base_addr)
-   total_orig[0] += 1 + info->ops[0].bit_not_p;
+   total_orig[0]++;
   if (info->ops[1].base_addr)
-   total_orig[0] += 1 + info->ops[1].bit_not_p;
+   total_orig[0]++;
   switch (info->rhs_code)
{
case BIT_AND_EXPR:
case BIT_IOR_EXPR:
case BIT_XOR_EXPR:
- if (info->bit_not_p)
-   total_orig[0]++; /* The orig BIT_NOT_EXPR stmt.  */
  total_orig[0]++; /* The orig BIT_*_EXPR stmt.  */
  break;
default:
@@ -1514,7 +1510,12 @@ split_group (merged_store_group *group,
   total_orig[0] *= group->stores.length ();
 
   FOR_EACH_VEC_ELT (group->stores, i, info)
-   total_new[0] += count_multiple_uses (info);
+   {
+ total_new[0] += count_multiple_uses (info);
+ total_orig[0] += (info->bit_not_p
+   + info->ops[0].bit_not_p
+   + info->ops[1].bit_not_p);
+   }
 }
 
   if (!allow_unaligned_load)
@@ -1654,13 +1655,13 @@ split_group (merged_store_group *group,
 
   if (total_orig)
 {
+  unsigned int i;
+  struct split_store *store;
   /* If we are reusing some original stores and any of the
 original SSA_NAMEs had multiple uses, we need to subtract
 those now before we add the new ones.  */
   if (total_new[0] && any_orig)
{
- unsigned int i;
- struct split_store *store;
  FOR_EACH_VEC_ELT (*split_stores, i, store)
if (store->orig)
  total_new[0] -= count_multiple_uses (store->orig_stores[0]);
@@ -1668,26 +1669,105 @@ split_group (merged_store_group *group,
   total_new[0] += ret; /* The new store.  */
   store_immediate_info *info = group->stores[0];
   if (info->ops[0].base_addr)
-   total_new[0] += ret * (1 + info->ops[0].bit_not_p);
+   total_new[0] += ret;
   if (info->ops[1].base_addr)
-   total_new[0] += ret * (1 + info->ops[1].bit_not_p);
+   total_new[0] += ret;
   switch (info->rhs_code)
{
case BIT_AND_EXPR:
case BIT_IOR_EXPR:
case BIT_XOR_EXPR:
- if (info->bit_not_p)
-   total_new[0] += ret; /* The new BIT_NOT_EXPR stmt.  */
  total_new[0] += ret; /* The new BIT_*_EXPR stmt.  */
  break;
default:

Re: [PATCH] Fix ICE in store-merging (PR tree-optimization/82929)

2017-11-10 Thread Richard Biener
On Fri, 10 Nov 2017, Jakub Jelinek wrote:

> Hi!
> 
> Because BIT_{AND,IOR,XOR}_EXPR are commutative, we std::swap the
> store_operand_info ops if that means we could append the store into
> a group rather than having to start a new group.  Unfortunately
> for count_multiple_uses we need to walk the stmts computing the stored value
> in order to check the has_single_use stuff and if we've swapped the
> arguments, that confuses the function.
> 
> This patch just records that we've swapped them and then the function
> can take that into account easily.
> 
> Bootstrapped/regtested on x86_64-linux and i686-linux, ok for trunk?

Ok.

Thanks,
Richard.

> 2017-11-10  Jakub Jelinek  
> 
>   PR tree-optimization/82929
>   * gimple-ssa-store-merging.c (struct store_immediate_info): Add
>   ops_swapped_p non-static data member.
>   (store_immediate_info::store_immediate_info): Clear it.
>   (imm_store_chain_info::coalesce_immediate_stores): If swapping
>   ops set ops_swapped_p.
>   (count_multiple_uses): Handle ops_swapped_p.
> 
>   * gcc.dg/pr82929.c: New test.
>   * g++.dg/opt/pr82929.C: New test.
> 
> --- gcc/gimple-ssa-store-merging.c.jj 2017-11-09 20:24:34.0 +0100
> +++ gcc/gimple-ssa-store-merging.c2017-11-10 08:04:49.192744048 +0100
> @@ -209,7 +209,11 @@ struct store_immediate_info
>/* INTEGER_CST for constant stores, MEM_REF for memory copy or
>   BIT_*_EXPR for logical bitwise operation.  */
>enum tree_code rhs_code;
> +  /* True if BIT_{AND,IOR,XOR}_EXPR result is inverted before storing.  */
>bool bit_not_p;
> +  /* True if ops have been swapped and thus ops[1] represents
> + rhs1 of BIT_{AND,IOR,XOR}_EXPR and ops[0] represents rhs2.  */
> +  bool ops_swapped_p;
>/* Operands.  For BIT_*_EXPR rhs_code both operands are used, otherwise
>   just the first one.  */
>store_operand_info ops[2];
> @@ -231,7 +235,8 @@ store_immediate_info::store_immediate_in
>   const store_operand_info ,
>   const store_operand_info )
>: bitsize (bs), bitpos (bp), bitregion_start (brs), bitregion_end (bre),
> -stmt (st), order (ord), rhs_code (rhscode), bit_not_p (bitnotp)
> +stmt (st), order (ord), rhs_code (rhscode), bit_not_p (bitnotp),
> +ops_swapped_p (false)
>  #if __cplusplus >= 201103L
>  , ops { op0r, op1r }
>  {
> @@ -1186,7 +1191,10 @@ imm_store_chain_info::coalesce_immediate
> == info->bitpos - infof->bitpos)
> && operand_equal_p (info->ops[1].base_addr,
> infof->ops[0].base_addr, 0))
> - std::swap (info->ops[0], info->ops[1]);
> + {
> +   std::swap (info->ops[0], info->ops[1]);
> +   info->ops_swapped_p = true;
> + }
> if ((!infof->ops[0].base_addr
>  || compatible_load_p (merged_store, info, base_addr, 0))
> && (!infof->ops[1].base_addr
> @@ -1410,18 +1418,21 @@ count_multiple_uses (store_immediate_inf
>stmt = SSA_NAME_DEF_STMT (gimple_assign_rhs1 (stmt));
>/* stmt is now the BIT_*_EXPR.  */
>if (!has_single_use (gimple_assign_rhs1 (stmt)))
> - ret += 1 + info->ops[0].bit_not_p;
> -  else if (info->ops[0].bit_not_p)
> + ret += 1 + info->ops[info->ops_swapped_p].bit_not_p;
> +  else if (info->ops[info->ops_swapped_p].bit_not_p)
>   {
> gimple *stmt2 = SSA_NAME_DEF_STMT (gimple_assign_rhs1 (stmt));
> if (!has_single_use (gimple_assign_rhs1 (stmt2)))
>   ++ret;
>   }
>if (info->ops[1].base_addr == NULL_TREE)
> - return ret;
> + {
> +   gcc_checking_assert (!info->ops_swapped_p);
> +   return ret;
> + }
>if (!has_single_use (gimple_assign_rhs2 (stmt)))
> - ret += 1 + info->ops[1].bit_not_p;
> -  else if (info->ops[1].bit_not_p)
> + ret += 1 + info->ops[1 - info->ops_swapped_p].bit_not_p;
> +  else if (info->ops[1 - info->ops_swapped_p].bit_not_p)
>   {
> gimple *stmt2 = SSA_NAME_DEF_STMT (gimple_assign_rhs2 (stmt));
> if (!has_single_use (gimple_assign_rhs1 (stmt2)))
> --- gcc/testsuite/gcc.dg/pr82929.c.jj 2017-11-10 08:10:14.399799845 +0100
> +++ gcc/testsuite/gcc.dg/pr82929.c2017-11-10 08:18:24.131904561 +0100
> @@ -0,0 +1,18 @@
> +/* PR tree-optimization/82929 */
> +/* { dg-do compile { target store_merge } } */
> +/* { dg-options "-O2 -fdump-tree-store-merging" } */
> +
> +void
> +foo (short *p, short *q, short *r)
> +{
> +  short a = q[0];
> +  short b = q[1];
> +  short c = ~a;
> +  short d = r[0];
> +  short e = r[1];
> +  short f = ~b;
> +  p[0] = c & d;
> +  p[1] = e & f;
> +}
> +
> +/* { dg-final { scan-tree-dump-times "Merging successful" 1 "store-merging" 
> } } */
> --- gcc/testsuite/g++.dg/opt/pr82929.C.jj 2017-11-10 08:17:35.843479732 
> +0100
> +++ gcc/testsuite/g++.dg/opt/pr82929.C2017-11-10 08:16:16.0 
> +0100

[PATCH] Fix ICE in store-merging (PR tree-optimization/82929)

2017-11-10 Thread Jakub Jelinek
Hi!

Because BIT_{AND,IOR,XOR}_EXPR are commutative, we std::swap the
store_operand_info ops if that means we could append the store into
a group rather than having to start a new group.  Unfortunately
for count_multiple_uses we need to walk the stmts computing the stored value
in order to check the has_single_use stuff and if we've swapped the
arguments, that confuses the function.

This patch just records that we've swapped them and then the function
can take that into account easily.

Bootstrapped/regtested on x86_64-linux and i686-linux, ok for trunk?

2017-11-10  Jakub Jelinek  

PR tree-optimization/82929
* gimple-ssa-store-merging.c (struct store_immediate_info): Add
ops_swapped_p non-static data member.
(store_immediate_info::store_immediate_info): Clear it.
(imm_store_chain_info::coalesce_immediate_stores): If swapping
ops set ops_swapped_p.
(count_multiple_uses): Handle ops_swapped_p.

* gcc.dg/pr82929.c: New test.
* g++.dg/opt/pr82929.C: New test.

--- gcc/gimple-ssa-store-merging.c.jj   2017-11-09 20:24:34.0 +0100
+++ gcc/gimple-ssa-store-merging.c  2017-11-10 08:04:49.192744048 +0100
@@ -209,7 +209,11 @@ struct store_immediate_info
   /* INTEGER_CST for constant stores, MEM_REF for memory copy or
  BIT_*_EXPR for logical bitwise operation.  */
   enum tree_code rhs_code;
+  /* True if BIT_{AND,IOR,XOR}_EXPR result is inverted before storing.  */
   bool bit_not_p;
+  /* True if ops have been swapped and thus ops[1] represents
+ rhs1 of BIT_{AND,IOR,XOR}_EXPR and ops[0] represents rhs2.  */
+  bool ops_swapped_p;
   /* Operands.  For BIT_*_EXPR rhs_code both operands are used, otherwise
  just the first one.  */
   store_operand_info ops[2];
@@ -231,7 +235,8 @@ store_immediate_info::store_immediate_in
const store_operand_info ,
const store_operand_info )
   : bitsize (bs), bitpos (bp), bitregion_start (brs), bitregion_end (bre),
-stmt (st), order (ord), rhs_code (rhscode), bit_not_p (bitnotp)
+stmt (st), order (ord), rhs_code (rhscode), bit_not_p (bitnotp),
+ops_swapped_p (false)
 #if __cplusplus >= 201103L
 , ops { op0r, op1r }
 {
@@ -1186,7 +1191,10 @@ imm_store_chain_info::coalesce_immediate
  == info->bitpos - infof->bitpos)
  && operand_equal_p (info->ops[1].base_addr,
  infof->ops[0].base_addr, 0))
-   std::swap (info->ops[0], info->ops[1]);
+   {
+ std::swap (info->ops[0], info->ops[1]);
+ info->ops_swapped_p = true;
+   }
  if ((!infof->ops[0].base_addr
   || compatible_load_p (merged_store, info, base_addr, 0))
  && (!infof->ops[1].base_addr
@@ -1410,18 +1418,21 @@ count_multiple_uses (store_immediate_inf
   stmt = SSA_NAME_DEF_STMT (gimple_assign_rhs1 (stmt));
   /* stmt is now the BIT_*_EXPR.  */
   if (!has_single_use (gimple_assign_rhs1 (stmt)))
-   ret += 1 + info->ops[0].bit_not_p;
-  else if (info->ops[0].bit_not_p)
+   ret += 1 + info->ops[info->ops_swapped_p].bit_not_p;
+  else if (info->ops[info->ops_swapped_p].bit_not_p)
{
  gimple *stmt2 = SSA_NAME_DEF_STMT (gimple_assign_rhs1 (stmt));
  if (!has_single_use (gimple_assign_rhs1 (stmt2)))
++ret;
}
   if (info->ops[1].base_addr == NULL_TREE)
-   return ret;
+   {
+ gcc_checking_assert (!info->ops_swapped_p);
+ return ret;
+   }
   if (!has_single_use (gimple_assign_rhs2 (stmt)))
-   ret += 1 + info->ops[1].bit_not_p;
-  else if (info->ops[1].bit_not_p)
+   ret += 1 + info->ops[1 - info->ops_swapped_p].bit_not_p;
+  else if (info->ops[1 - info->ops_swapped_p].bit_not_p)
{
  gimple *stmt2 = SSA_NAME_DEF_STMT (gimple_assign_rhs2 (stmt));
  if (!has_single_use (gimple_assign_rhs1 (stmt2)))
--- gcc/testsuite/gcc.dg/pr82929.c.jj   2017-11-10 08:10:14.399799845 +0100
+++ gcc/testsuite/gcc.dg/pr82929.c  2017-11-10 08:18:24.131904561 +0100
@@ -0,0 +1,18 @@
+/* PR tree-optimization/82929 */
+/* { dg-do compile { target store_merge } } */
+/* { dg-options "-O2 -fdump-tree-store-merging" } */
+
+void
+foo (short *p, short *q, short *r)
+{
+  short a = q[0];
+  short b = q[1];
+  short c = ~a;
+  short d = r[0];
+  short e = r[1];
+  short f = ~b;
+  p[0] = c & d;
+  p[1] = e & f;
+}
+
+/* { dg-final { scan-tree-dump-times "Merging successful" 1 "store-merging" } 
} */
--- gcc/testsuite/g++.dg/opt/pr82929.C.jj   2017-11-10 08:17:35.843479732 
+0100
+++ gcc/testsuite/g++.dg/opt/pr82929.C  2017-11-10 08:16:16.0 +0100
@@ -0,0 +1,30 @@
+// PR tree-optimization/82929
+// { dg-do compile }
+// { dg-options "-O2" }
+
+template  struct A {
+  long _M_w[_Nw];
+  void m_fn1(A p1) {
+for (int a = 0;; a++)
+  _M_w[a] &= 

[Patch, fortran] PR82934 - [6/7/8 Regression] Segfault on assumed character length in allocate

2017-11-10 Thread Paul Richard Thomas
Committed as obvious in r254624.

I will apply to 6- and 7-branches over the weekend. Although not a
regression, the fix prevents an ICE in a particularly robust way.

Cheers

Paul

2017-11-10  Paul Thomas  

PR fortran/82934
* trans-stmt.c (gfc_trans_allocate): Remove the gcc_assert on
null string length for assumed length typespec and set
expr3_esize to NULL_TREE;

2017-11-10  Paul Thomas  

PR fortran/82934
* gfortran.dg/allocate_assumed_charlen_1.f90: New test.
Index: gcc/fortran/trans-stmt.c
===
*** gcc/fortran/trans-stmt.c(revision 254604)
--- gcc/fortran/trans-stmt.c(working copy)
*** gfc_trans_allocate (gfc_code * code)
*** 5913,5922 
if (code->ext.alloc.ts.type != BT_CHARACTER)
expr3_esize = TYPE_SIZE_UNIT (
  gfc_typenode_for_spec (>ext.alloc.ts));
!   else
{
  gfc_expr *sz;
- gcc_assert (code->ext.alloc.ts.u.cl->length != NULL);
  sz = gfc_copy_expr (code->ext.alloc.ts.u.cl->length);
  gfc_init_se (_sz, NULL);
  gfc_conv_expr (_sz, sz);
--- 5913,5921 
if (code->ext.alloc.ts.type != BT_CHARACTER)
expr3_esize = TYPE_SIZE_UNIT (
  gfc_typenode_for_spec (>ext.alloc.ts));
!   else if (code->ext.alloc.ts.u.cl->length != NULL)
{
  gfc_expr *sz;
  sz = gfc_copy_expr (code->ext.alloc.ts.u.cl->length);
  gfc_init_se (_sz, NULL);
  gfc_conv_expr (_sz, sz);
*** gfc_trans_allocate (gfc_code * code)
*** 5930,5935 
--- 5929,5936 
 tmp, se_sz.expr);
  expr3_esize = gfc_evaluate_now (expr3_esize, );
}
+   else
+   expr3_esize = NULL_TREE;
  }
  
/* The routine gfc_trans_assignment () already implements all
Index: gcc/testsuite/gfortran.dg/allocate_assumed_charlen_1.f90
===
*** gcc/testsuite/gfortran.dg/allocate_assumed_charlen_1.f90(nonexistent)
--- gcc/testsuite/gfortran.dg/allocate_assumed_charlen_1.f90(working copy)
***
*** 0 
--- 1,28 
+ ! { dg-do run }
+ !
+ ! PR82934: Segfault on compilation in trans-stmt.c:5919(8.0.0).
+ ! The original report only had one item in the allocate list. This
+ ! has been doubled up to verify that the correct string length is
+ ! is used in the allocation.
+ !
+ ! Contributed by FortranFan on clf.
+ !
+character(len=42), allocatable :: foo
+character(len=22), allocatable :: foofoo
+ 
+call alloc( foo , foofoo)
+ 
+if (len(foo) .ne. 42) call abort
+if (len(foofoo) .ne. 22) call abort
+ 
+ contains
+ 
+subroutine alloc( bar, barbar )
+ 
+   character(len=*), allocatable :: bar, barbar
+ 
+   allocate( character(len=*) :: bar , barbar) ! <= Here!
+ 
+end subroutine
+ 
+ end


[patch] Fix PR lto/81351

2017-11-10 Thread Eric Botcazou
Hi,

this is the EH breakage introduced in LTO mode on non-(x86 or Linux):
  https://gcc.gnu.org/ml/gcc-patches/2017-11/msg00771.html

As Jan explained, in the end it's only a matter of recording whether at least 
one function needs a FDE for EH in the compilation unit and, if so, generating 
the EH frame at the end.  That's why a couple of patches to that effect are 
attached, first a cleanup with no functional changes[*] and second the fix.

[*] modulo the dwarf2out_do_cfi_asm hunk, which seems to be another bug fix.

Tested (lightly for now) on x86-64/Linux and SPARC/Solaris, OK for mainline?


2017-11-10  Eric Botcazou  

PR lto/81351
* debug.h (dwarf2out_do_eh_frame): Declare.
* dwarf2cfi.c (dwarf2out_do_eh_frame): New predicate.
(dwarf2out_do_frame): Use it.
(dwarf2out_do_cfi_asm): Likewise.
* dwarf2out.c (dwarf2out_frame_finish): Likewise.
(dwarf2out_assembly_start): Likewise.
(dwarf2out_begin_prologue): Fix comment.
* toplev.c (compile_file): Always call dwarf2out_frame_finish
if the target needs either debug or unwind DWARF2 info.
* lto-opts.c (lto_write_options): Do not save -fexceptions,
-fnon-call-exceptions, -ffp-contract, -fmath-errno, -fsigned-zeros,
-ftrapping-math, -ftrapv and -fwrapv.

PR lto/81351
* dwarf2out.c (do_eh_frame): New static variable.
(dwarf2out_begin_prologue): Set it.
(dwarf2out_frame_finish): Test it instead of dwarf2out_do_eh_frame.

-- 
Eric BotcazouIndex: debug.h
===
--- debug.h	(revision 254599)
+++ debug.h	(working copy)
@@ -241,8 +241,7 @@ extern void dwarf2out_vms_end_prologue (
 extern void dwarf2out_vms_begin_epilogue (unsigned int, const char *);
 extern void dwarf2out_end_epilogue (unsigned int, const char *);
 extern void dwarf2out_frame_finish (void);
-/* Decide whether we want to emit frame unwind information for the current
-   translation unit.  */
+extern bool dwarf2out_do_eh_frame (void);
 extern bool dwarf2out_do_frame (void);
 extern bool dwarf2out_do_cfi_asm (void);
 extern void dwarf2out_switch_text_section (void);
Index: dwarf2cfi.c
===
--- dwarf2cfi.c	(revision 254599)
+++ dwarf2cfi.c	(working copy)
@@ -3402,6 +3402,16 @@ debug_cfi_row (dw_cfi_row *row)
This variable is tri-state, with 0 unset, >0 true, <0 false.  */
 static GTY(()) signed char saved_do_cfi_asm = 0;
 
+/* Decide whether to emit EH frame unwind for the current translation unit.  */
+
+bool
+dwarf2out_do_eh_frame (void)
+{
+  return
+(flag_unwind_tables || flag_exceptions)
+&& targetm_common.except_unwind_info (_options) == UI_DWARF2;
+}
+
 /* Decide whether we want to emit frame unwind information for the current
translation unit.  */
 
@@ -3420,8 +3430,7 @@ dwarf2out_do_frame (void)
   if (targetm.debug_unwind_info () == UI_DWARF2)
 return true;
 
-  if ((flag_unwind_tables || flag_exceptions)
-  && targetm_common.except_unwind_info (_options) == UI_DWARF2)
+  if (dwarf2out_do_eh_frame ())
 return true;
 
   return false;
@@ -3456,9 +3465,7 @@ dwarf2out_do_cfi_asm (void)
 
   /* If we can't get the assembler to emit only .debug_frame, and we don't need
  dwarf2 unwind info for exceptions, then emit .debug_frame by hand.  */
-  if (!HAVE_GAS_CFI_SECTIONS_DIRECTIVE
-  && !flag_unwind_tables && !flag_exceptions
-  && targetm_common.except_unwind_info (_options) != UI_DWARF2)
+  if (!HAVE_GAS_CFI_SECTIONS_DIRECTIVE && !dwarf2out_do_eh_frame ())
 return false;
 
   /* Success!  */
Index: dwarf2out.c
===
--- dwarf2out.c	(revision 254599)
+++ dwarf2out.c	(working copy)
@@ -263,7 +263,6 @@ static GTY(()) int dw2_string_counter;
 static GTY(()) bool have_multiple_function_sections = false;
 
 /* Whether the default text and cold text sections have been used at all.  */
-
 static GTY(()) bool text_section_used = false;
 static GTY(()) bool cold_text_section_used = false;
 
@@ -1060,7 +1059,7 @@ dwarf2out_begin_prologue (unsigned int l
   dup_label = xstrdup (label);
   current_function_func_begin_label = dup_label;
 
-  /* We can elide the fde allocation if we're not emitting debug info.  */
+  /* We can elide FDE allocation if we're not emitting frame unwind info.  */
   if (!do_frame)
 return;
 
@@ -1180,8 +1179,7 @@ dwarf2out_frame_finish (void)
 output_call_frame_info (0);
 
   /* Output another copy for the unwinder.  */
-  if ((flag_unwind_tables || flag_exceptions)
-  && targetm_common.except_unwind_info (_options) == UI_DWARF2)
+  if (dwarf2out_do_eh_frame ())
 output_call_frame_info (1);
 }
 
@@ -27522,8 +27520,7 @@ dwarf2out_assembly_start (void)
 
   if (HAVE_GAS_CFI_SECTIONS_DIRECTIVE
   && dwarf2out_do_cfi_asm ()
-  && (!(flag_unwind_tables || flag_exceptions)
-	  || 

Re: [PATCH, GCC/testsuite/ARM] Consolidate sources for cmse tests

2017-11-10 Thread Thomas Preudhomme
Sorry for the garbled email, I guess I did a middle click paste which sometimes 
paste things several times. Let me try again:


For the most part, testcases under gcc.target/arm/cmse/baseline and
gcc.target/arm/cmse/mainline are duplicate copies with only different
dejagnu directives. Although there is no requirement for them to be
similar, having them both identical allow to compare the code generated
and make it easier in case of change in code generation to both
architecture to update the testcases (if one needs updating so does the
other).

Similarly all the tests in gcc.target/arm/cmse/mainline/ have
the same source but are duplicate copies.

This patch moves all the code in the tests to a parent directory:
gcc.target/arm/cmse for tests shared by Armv8-M Baseline and Mainline
and gcc.target/arm/cmse/mainline for tests *only* shared by the various
float ABI of Armv8-M Mainline. C includes are then used where the code
used to sit.

Note that the cmse-13.c test used to differ slightly between
architectures and float ABI tested in the first floating-point constant
passed to bar: sometimes 1.0 and sometimes 3.0. This patch settles on
3.0 to not confuse with the 1.0 constant used to clear VFP registers in
some of the configurations.

ChangeLog entry is as follows:

*** gcc/testsuite/ChangeLog ***

2017-11-03  Thomas Preud'homme  

* gcc.target/arm/cmse/bitfield-4.x: New file.
* gcc.target/arm/cmse/baseline/bitfield-4.c: Remove code and include
above file.
* gcc.target/arm/cmse/mainline/bitfield-4.c: Likewise.
* gcc.target/arm/cmse/bitfield-5.x: New file.
* gcc.target/arm/cmse/baseline/bitfield-5.c: Remove code and include
above file.
* gcc.target/arm/cmse/mainline/bitfield-5.c: Likewise.
* gcc.target/arm/cmse/bitfield-6.x: New file.
* gcc.target/arm/cmse/baseline/bitfield-6.c: Remove code and include
above file.
* gcc.target/arm/cmse/mainline/bitfield-6.c: Likewise.
* gcc.target/arm/cmse/bitfield-7.x: New file.
* gcc.target/arm/cmse/baseline/bitfield-7.c: Remove code and include
above file.
* gcc.target/arm/cmse/mainline/bitfield-7.c: Likewise.
* gcc.target/arm/cmse/bitfield-8.x: New file.
* gcc.target/arm/cmse/baseline/bitfield-8.c: Remove code and include
above file.
* gcc.target/arm/cmse/mainline/bitfield-8.c: Likewise.
* gcc.target/arm/cmse/bitfield-9.x: New file.
* gcc.target/arm/cmse/baseline/bitfield-9.c: Remove code and include
above file.
* gcc.target/arm/cmse/mainline/bitfield-9.c: Likewise.
* gcc.target/arm/cmse/bitfield-and-union.x: New file.
* gcc.target/arm/cmse/baseline/bitfield-and-union-1.c: Rename into ...
* gcc.target/arm/cmse/baseline/bitfield-and-union.c: This.  Remove code
and include above bitfield-and-union.x file.
* gcc.target/arm/cmse/mainline/bitfield-and-union-1.c: Rename into ...
* gcc.target/arm/cmse/mainline/bitfield-and-union.c: this.  Remove code
and include above bitfield-and-union.x file.
* gcc.target/arm/cmse/cmse-13.x: New file.
* gcc.target/arm/cmse/baseline/cmse-13.c: Remove code and include above
file.
* gcc.target/arm/cmse/mainline/hard-sp/cmse-13.c: Likewise.
* gcc.target/arm/cmse/mainline/hard/cmse-13.c: Likewise.
* gcc.target/arm/cmse/mainline/soft/cmse-13.c: Likewise.
* gcc.target/arm/cmse/mainline/softfp/cmse-13.c: Likewise.
* gcc.target/arm/cmse/cmse-5.x: New file.
* gcc.target/arm/cmse/mainline/hard-sp/cmse-5.c: Remove code and
include above file.
* gcc.target/arm/cmse/mainline/hard/cmse-5.c: Likewise.
* gcc.target/arm/cmse/mainline/soft/cmse-5.c: Likewise.
* gcc.target/arm/cmse/mainline/softfp-sp/cmse-5.c: Likewise.
* gcc.target/arm/cmse/mainline/softfp/cmse-5.c: Likewise.
* gcc.target/arm/cmse/cmse-7.x: New file.
* gcc.target/arm/cmse/mainline/hard-sp/cmse-7.c: Remove code and
include above file.
* gcc.target/arm/cmse/mainline/hard/cmse-7.c: Likewise.
* gcc.target/arm/cmse/mainline/soft/cmse-7.c: Likewise.
* gcc.target/arm/cmse/mainline/softfp-sp/cmse-7.c: Likewise.
* gcc.target/arm/cmse/mainline/softfp/cmse-7.c: Likewise.
* gcc.target/arm/cmse/cmse-8.x: New file.
* gcc.target/arm/cmse/mainline/hard-sp/cmse-8.c: Remove code and
include above file.
* gcc.target/arm/cmse/mainline/hard/cmse-8.c: Likewise.
* gcc.target/arm/cmse/mainline/soft/cmse-8.c: Likewise.
* gcc.target/arm/cmse/mainline/softfp-sp/cmse-8.c: Likewise.
* gcc.target/arm/cmse/mainline/softfp/cmse-8.c: Likewise.
* gcc.target/arm/cmse/union-1.x: New file.
* gcc.target/arm/cmse/baseline/union-1.c: Remove code and include above
file.
* gcc.target/arm/cmse/mainline/union-1.c: 

[PATCH, GCC/testsuite/ARM] Consolidate sources for cmse tests

2017-11-10 Thread Thomas Preudhomme

For the most part, testcases under gcc.target/arm/cmse/baseline and
gcc.target/arm/cmse/mainline are duplicate copies with only different
dejagnu directives. Although there is no requirement for them to be
similar, having them both identical allow to compare the code generated
and make it easier in case of change in code generation to both
architecture to update the testcases (if one needs updating so does the
other).

Similarly all the tests in gcc.target/arm/cmse/mainline/ have
the same source but are duplicate copies.

This patch moves all the code in the tests to a parent directory:
gcc.target/arm/cmse for tests shared by Armv8-M Baseline and Mainline
and gcc.target/arm/cmse/mainline for tests *only* shared by the various
float ABI of Armv8-M Mainline. C includes are then used where the code
used to sit.

Note that the cmse-13.c test used to differ slightly between
architectures and float ABI tested in the first floating-point constant
passed to bar: sometimes 1.0 and sometimes 3.0. This patch settles on
3.0 to not confuse with the 1.0 constant used to clear VFP registers in
some of the configurations.

ChangeLog entry is as follows:

*** gcc/testsuite/ChangeLog ***

2017-11-03  Thomas Preud'homme  

* gcc.target/arm/cmse/bitfield-4.x: New file.
* gcc.target/arm/cmse/baseline/bitfield-4.c: Remove code and include
above file.
* gcc.target/arm/cmse/mainline/bitfield-4.c: Likewise.
* gcc.target/arm/cmse/bitfield-5.x: New file.
* gcc.target/arm/cmse/baseline/bitfield-5.c: Remove code and include
above file.
* gcc.target/arm/cmse/mainline/bitfield-5.c: Likewise.
* gcc.target/arm/cmse/bitfield-6.x: New file.
* gcc.target/arm/cmse/baseline/bitfield-6.c: Remove code and include
above file.
* gcc.target/arm/cmse/mainline/bitfield-6.c: Likewise.
* gcc.target/arm/cmse/bitfield-7.x: New file.
* gcc.target/arm/cmse/baseline/bitfield-7.c: Remove code and include
above file.
* gcc.target/arm/cmse/mainline/bitfield-7.c: Likewise.
* gcc.target/arm/cmse/bitfield-8.x: New file.
* gcc.target/arm/cmse/baseline/bitfield-8.c: Remove code and include
above file.
* gcc.target/arm/cmse/mainline/bitfield-8.c: Likewise.
* gcc.target/arm/cmse/bitfield-9.x: New file.
* gcc.target/arm/cmse/baseline/bitfield-9.c: Remove code and include
above file.
* gcc.target/arm/cmse/mainline/bitfield-9.c: Likewise.
* gcc.target/arm/cmse/bitfield-and-union.x: New file.
* gcc.target/arm/cmse/baseline/bitfield-and-union-1.c: Rename into ...
* gcc.target/arm/cmse/baseline/bitfield-and-union.c: This.  Remove code
and include above bitfield-and-union.x file.
* gcc.target/arm/cmse/mainline/bitfield-and-union-1.c: Rename into ...
* gcc.target/arm/cmse/mainline/bitfield-and-union.c: this.  Remove code
and include above bitfield-and-union.x file.
* gcc.target/arm/cmse/cmse-13.x: New file.
* gcc.target/arm/cmse/baseline/cmse-13.c: Remove code and include above
file.
* gcc.target/arm/cmse/mainline/hard-sp/cmse-13.c: Likewise.
* gcc.target/arm/cmse/mainline/hard/cmse-13.c: Likewise.
* gcc.target/arm/cmse/mainline/soft/cmse-13.c: Likewise.
* gcc.target/arm/cmse/mainline/softfp/cmse-13.c: Likewise.
* gcc.target/arm/cmse/cmse-5.x: New file.
* gcc.target/arm/cmse/mainline/hard-sp/cmse-5.c: Remove code and
include above file.
	* gcc.target/arm/cmse/mainline/harFor the most part, testcases under 
gcc.target/arm/cmse/baseline and

gcc.target/arm/cmse/mainline are duplicate copies with only different
dejagnu directives. Although there is no requirement for them to be
similar, having them both identical allow to compare the code generated
and make it easier in case of change in code generation to both
architecture to update the testcases (if one needs updating so does the
other).

Similarly all the tests in gcc.target/arm/cmse/mainline/ have
the same source but are duplicate copies.

This patch moves all the code in the tests to a parent directory:
gcc.target/arm/cmse for tests shared by Armv8-M Baseline and Mainline
and gcc.target/arm/cmse/mainline for tests *only* shared by the various
float ABI of Armv8-M Mainline. C includes are then used where the code
used to sit.

Note that the cmse-13.c test used to differ slightly between
architectures and float ABI tested in the first floating-point constant
passed to bar: sometimes 1.0 and sometimes 3.0. This patch settles on
3.0 to not confuse with the 1.0 constant used to clear VFP registers in
some of the configurations.

ChangeLog entry is as follows:

*** gcc/testsuite/ChangeLog ***

2017-11-03  Thomas Preud'homme  

* gcc.target/arm/cmse/bitfield-4.x: New file.
* gcc.target/arm/cmse/baseline/bitfield-4.c: Remove code and 

Re: [PATCH][ARM,testsuite] Skip copysign_softfloat_1.c on hard-float targets

2017-11-10 Thread Kyrill Tkachov

Hi Christophe,

On 10/11/17 08:43, Christophe Lyon wrote:

Hi,

The attached testsuite patch makes
gcc.target/arm/copysign_softfloat_1.c UNSUPPORTED on
arm-none-linux-gnueabihf, rather than FAIL/UNRESOLVED because of a
link failure since the toolchain startup code is in hard-float ABI
while the testcase is compiled with -mfloat-abi=soft.

Tested on arm* configurations, with no impact on arm*eabi and
FAIL->UNSUPPORTED on arm*hf targets.

OK?



Ok.
Thanks,
Kyrill


Thanks,

Christophe




Re: [05/nn] [AArch64] Rewrite aarch64_simd_valid_immediate

2017-11-10 Thread James Greenhalgh
On Fri, Oct 27, 2017 at 02:27:08PM +0100, Richard Sandiford wrote:
> This patch reworks aarch64_simd_valid_immediate so that
> it's easier to add SVE support.  The main changes are:
> 
> - make simd_immediate_info easier to construct
> - replace the while (1) { ... break; } blocks with checks that use
>   the full 64-bit value of the constant
> - treat floating-point modes as integers if they aren't valid
>   as floating-point values

This is a nice cleanup. I'm very pleased that we can now read which
conditions you are checking rather than trying to derive them from the
old CHECK macros.

Thanks for the patch, this is OK for trunk.

Reviewed-by: James Greenhalgh 

James



> 
> 
> 2017-10-26  Richard Sandiford  
>   Alan Hayward  
>   David Sherwood  
> 
> gcc/
>   * config/aarch64/aarch64-protos.h (aarch64_output_simd_mov_immediate):
>   Remove the mode argument.
>   (aarch64_simd_valid_immediate): Remove the mode and inverse
>   arguments.
>   * config/aarch64/iterators.md (bitsize): New iterator.
>   * config/aarch64/aarch64-simd.md (*aarch64_simd_mov, and3)
>   (ior3): Update calls to aarch64_output_simd_mov_immediate.
>   * config/aarch64/constraints.md (Do, Db, Dn): Update calls to
>   aarch64_simd_valid_immediate.
>   * config/aarch64/predicates.md (aarch64_reg_or_orr_imm): Likewise.
>   (aarch64_reg_or_bic_imm): Likewise.
>   * config/aarch64/aarch64.c (simd_immediate_info): Replace mvn
>   with an insn_type enum and msl with a modifier_type enum.
>   Replace element_width with a scalar_mode.  Change the shift
>   to unsigned int.  Add constructors for scalar_float_mode and
>   scalar_int_mode elements.
>   (aarch64_vect_float_const_representable_p): Delete.
>   (aarch64_can_const_movi_rtx_p, aarch64_legitimate_constant_p)
>   (aarch64_simd_scalar_immediate_valid_for_move)
>   (aarch64_simd_make_constant): Update call to
>   aarch64_simd_valid_immediate.
>   (aarch64_advsimd_valid_immediate_hs): New function.
>   (aarch64_advsimd_valid_immediate): Likewise.
>   (aarch64_simd_valid_immediate): Remove mode and inverse
>   arguments.  Rewrite to use the above.  Use const_vec_duplicate_p
>   to detect duplicated constants and use aarch64_float_const_zero_rtx_p
>   and aarch64_float_const_representable_p on the result.
>   (aarch64_output_simd_mov_immediate): Remove mode argument.
>   Update call to aarch64_simd_valid_immediate and use of
>   simd_immediate_info.
>   (aarch64_output_scalar_simd_mov_immediate): Update call
>   accordingly.
> 
> gcc/testsuite/
>   * gcc.target/aarch64/vect-movi.c (movi_float_lsl24): New function.
>   (main): Call it.
> 
   


RE: [PATCH][GCC][ARM] Implement "arch" GCC pragma and "+" attributes [Patch (2/3)]

2017-11-10 Thread Tamar Christina
Hi Sandra,

I've respun the patch with the docs changes you requested.

Regards,
Tamar

> -Original Message-
> From: Sandra Loosemore [mailto:san...@codesourcery.com]
> Sent: 07 November 2017 03:38
> To: Tamar Christina; gcc-patches@gcc.gnu.org
> Cc: nd; Ramana Radhakrishnan; Richard Earnshaw; ni...@redhat.com; Kyrylo
> Tkachov
> Subject: Re: [PATCH][GCC][ARM] Implement "arch" GCC pragma and
> "+" attributes [Patch (2/3)]
> 
> On 11/06/2017 09:50 AM, Tamar Christina wrote:
> > Hi All,
> >
> > This patch adds support for the setting the architecture and
> > extensions using the target GCC pragma.
> >
> > #pragma GCC target ("arch=armv8-a+crc")
> >
> > It also supports a short hand where an extension is just added to the
> > current architecture without changing it
> >
> > #pragma GCC target ("+crc")
> >
> > Popping and pushing options also correctly reconfigure the global
> > state as expected.
> >
> > Also supported is using the __attribute__((target("..."))) attributes
> > on functions to change the architecture or extension.
> >
> > Regtested on arm-none-eabi and no regressions.
> >
> > Ok for trunk?
> >
> > diff --git a/gcc/doc/extend.texi b/gcc/doc/extend.texi index
> >
> 8aa443f87fb700f7a723d736bdbd53b6c839656d..18d0ffa6820326ce7badf33001
> b1
> > c6a467c95883 100644
> > --- a/gcc/doc/extend.texi
> > +++ b/gcc/doc/extend.texi
> > @@ -3858,6 +3858,42 @@ Specifies the fpu for which to tune the
> performance of this function.
> >  The behavior and permissible arguments are the same as for the
> > @option{-mfpu=}  command-line option.
> >
> > +@item arch=
> > +@cindex @code{arch=} function attribute, ARM Specifies the
> > +architecture version and architectural extensions to use for this
> > +function.  The behavior and permissible arguments are the same as for
> > +the @option{-march=} command-line option.
> > +
> > +The above target attributes can be specified as follows:
> > +
> > +@smallexample
> > +__attribute__((target("@var{attr-string}")))
> > +int
> > +f (int a)
> > +@{
> > +  return a + 5;
> > +@}
> > +@end smallexample
> > +
> > +where @code{@var{attr-string}} is one of the attribute strings.
> 
> This example doesn't illustrate anything useful, and in fact just confuses
> things by introducing @var{attr-string}.  Please use an actual valid attribute
> here, something like "arch=armv8-a" or whatever.
> 
> Also, either kill the sentence fragment after the example, or be careful to
> add @noindent before it to indicate it's a continuation of the previous
> paragraph.
> 
> > +
> > +Additionally, the architectural extension string may be specified on
> > +its own.  This can be used to turn on and off particular
> > +architectural extensions without having to specify a particular 
> > architecture
> version or core.  Example:
> > +
> > +@smallexample
> > +__attribute__((target("+crc+nocrypto")))
> > +int
> > +foo (int a)
> > +@{
> > +  return a + 5;
> > +@}
> > +@end smallexample
> > +
> > +In this example @code{target("+crc+nocrypto")} enables the @code{crc}
> > +extension and disables the @code{crypto} extension for the function
> > +@code{foo} without modifying an existing @option{-march=} or
> @option{-mcpu} option.
> > +
> >  @end table
> >
> >  @end table
> 
> -Sandra


respin-arm-2.patch
Description: respin-arm-2.patch


Re: [4/4] SVE unwinding

2017-11-10 Thread James Greenhalgh
On Fri, Nov 03, 2017 at 05:52:05PM +, Richard Sandiford wrote:
> This patch adds support for unwinding frames that use the SVE
> pseudo VG register.  We want this register to act like a normal
> register if the CFI explicitly sets it, but want to provide a
> default value otherwise.  Computing the default value requires
> an SVE target, so we only want to compute it on demand.
> 
> aarch64_vg uses a hard-coded .inst in order to avoid a build
> dependency on binutils 2.28 or later.

I think the new hook needs documenting in tm.texi , particularly as it
implies a conditional write to VALUE.

I think this is practice we've seen before, for example
DWARF_REG_TO_UNWIND_COLUMN and REG_VALUE_IN_UNWIND_CONTEXT are defined
in libgcc/config and documented in tm.texi.

Otherwise, the AArch64 parts of this are OK. You mind need to wait for
someone to OK the unwind-dw2.c part.

Thanks,
James

Reviewed-by: James Greenhalgh 

> 2017-11-03  Richard Sandiford  
> 
> libgcc/
>   * config/aarch64/value-unwind.h (aarch64_vg): New function.
>   (DWARF_LAZY_REGISTER_VALUE): Define.
>   * unwind-dw2.c (_Unwind_GetGR): Use DWARF_LAZY_REGISTER_VALUE
>   to provide a fallback register value.
> 
> gcc/testsuite/
>   * g++.target/aarch64/aarch64.exp: New harness.
>   * g++.target/aarch64/sve_catch_1.C: New test.
>   * g++.target/aarch64/sve_catch_2.C: Likewise.
>   * g++.target/aarch64/sve_catch_3.C: Likewise.
>   * g++.target/aarch64/sve_catch_4.C: Likewise.
>   * g++.target/aarch64/sve_catch_5.C: Likewise.
>   * g++.target/aarch64/sve_catch_6.C: Likewise.
>


Re: [PATCH][AArch64] Improve scheduling model for X-Gene

2017-11-10 Thread Kyrill Tkachov

Hi Dominic,

On 10/11/17 09:36, Dominik Inführ wrote:

Hi,

this patch tries to refine the instruction scheduling model for X-Gene. 
Improved performance for 456.hmmer and 464.h264ref (about 1%). Also splits the 
model into multiple automatons, therefore smaller binary and faster build time. 
Survives bootstrap.

Best,
Dominik


The changes look ok to me, but as the description is shared between the 
arm and aarch64 ports can you please also do a sanity check

by building (and preferably bootstrapping) an arm compiler?

Thanks,
Kyrill


gcc/ChangeLog:
2017-10-09  Dominik Infuehr 

* config/arm/xgene1.md (xgene1): Split into automatons
xgene1_main, xgene1_decoder, xgene1_div, xgene1_simd.
(xgene1_f_load): Adjust reservations and/or types.
(xgene1_f_store): Likewise.
(xgene1_load_pair): Likewise.
(xgene1_store_pair): Likewise.
(xgene1_fp_load1): Likewise.
(xgene1_load1): Likewise.
(xgene1_store1): Likewise.
(xgene1_move): Likewise.
(xgene1_alu): Likewise.
(xgene1_simd): Likewise.
(xgene1_bfm): Likewise.
(xgene1_neon_load1): Likewise.
(xgene1_neon_store1): Likewise.
(xgene1_neon_logic): Likewise.
(xgene1_neon_st1): Likewise.
(xgene1_neon_ld1r): Likewise.
(xgene1_alu_cond): Added.
(xgene1_shift_reg): Likwise.
(xgene1_bfx): Likewise.
(xgene1_mul): Split into xgene1_mul32, xgene1_mul64.

—
diff --git a/gcc/config/arm/xgene1.md b/gcc/config/arm/xgene1.md
index c4b3773..cf0694a 100644
--- a/gcc/config/arm/xgene1.md
+++ b/gcc/config/arm/xgene1.md
@@ -20,17 +20,26 @@

  ;; Pipeline description for the xgene1 micro-architecture

-(define_automaton "xgene1")
+(define_automaton "xgene1_main, xgene1_decoder, xgene1_div, xgene1_simd")

-(define_cpu_unit "xgene1_decode_out0" "xgene1")
-(define_cpu_unit "xgene1_decode_out1" "xgene1")
-(define_cpu_unit "xgene1_decode_out2" "xgene1")
-(define_cpu_unit "xgene1_decode_out3" "xgene1")
+(define_cpu_unit "xgene1_decode_out0" "xgene1_decoder")
+(define_cpu_unit "xgene1_decode_out1" "xgene1_decoder")
+(define_cpu_unit "xgene1_decode_out2" "xgene1_decoder")
+(define_cpu_unit "xgene1_decode_out3" "xgene1_decoder")

-(define_cpu_unit "xgene1_divide" "xgene1")
-(define_cpu_unit "xgene1_fp_divide" "xgene1")
-(define_cpu_unit "xgene1_fsu" "xgene1")
-(define_cpu_unit "xgene1_fcmp" "xgene1")
+(define_cpu_unit "xgene1_IXA" "xgene1_main")
+(define_cpu_unit "xgene1_IXB" "xgene1_main")
+(define_cpu_unit "xgene1_IXB_compl" "xgene1_main")
+
+(define_reservation "xgene1_IXn" "(xgene1_IXA | xgene1_IXB)")
+
+(define_cpu_unit "xgene1_multiply" "xgene1_main")
+(define_cpu_unit "xgene1_divide" "xgene1_div")
+(define_cpu_unit "xgene1_fp_divide" "xgene1_div")
+(define_cpu_unit "xgene1_fsu" "xgene1_simd")
+(define_cpu_unit "xgene1_fcmp" "xgene1_simd")
+(define_cpu_unit "xgene1_ld" "xgene1_main")
+(define_cpu_unit "xgene1_st" "xgene1_main")

  (define_reservation "xgene1_decode1op"
  "( xgene1_decode_out0 )
@@ -68,12 +77,12 @@
  (define_insn_reservation "xgene1_f_load" 10
(and (eq_attr "tune" "xgene1")
 (eq_attr "type" "f_loadd,f_loads"))
-  "xgene1_decode2op")
+  "xgene1_decode2op, xgene1_ld")

  (define_insn_reservation "xgene1_f_store" 4
(and (eq_attr "tune" "xgene1")
 (eq_attr "type" "f_stored,f_stores"))
-  "xgene1_decode2op")
+  "xgene1_decode2op, xgene1_st")

  (define_insn_reservation "xgene1_fmov" 2
(and (eq_attr "tune" "xgene1")
@@ -92,85 +101,108 @@

  (define_insn_reservation "xgene1_load_pair" 6
(and (eq_attr "tune" "xgene1")
-   (eq_attr "type" "load_8, load_16"))
-  "xgene1_decodeIsolated")
+   (eq_attr "type" "load_16"))
+  "xgene1_decodeIsolated, xgene1_ld*2")

  (define_insn_reservation "xgene1_store_pair" 2
(and (eq_attr "tune" "xgene1")
-   (eq_attr "type" "store_8, store_16"))
-  "xgene1_decodeIsolated")
+   (eq_attr "type" "store_16"))
+  "xgene1_decodeIsolated, xgene1_st*2")

  (define_insn_reservation "xgene1_fp_load1" 10
(and (eq_attr "tune" "xgene1")
-   (eq_attr "type" "load_4")
+   (eq_attr "type" "load_4, load_8")
 (eq_attr "fp" "yes"))
-  "xgene1_decode1op")
+  "xgene1_decode1op, xgene1_ld")

  (define_insn_reservation "xgene1_load1" 5
(and (eq_attr "tune" "xgene1")
-   (eq_attr "type" "load_4"))
-  "xgene1_decode1op")
+   (eq_attr "type" "load_4, load_8"))
+  "xgene1_decode1op, xgene1_ld")

-(define_insn_reservation "xgene1_store1" 2
+(define_insn_reservation "xgene1_store1" 1
(and (eq_attr "tune" "xgene1")
-   (eq_attr "type" "store_4"))
-  "xgene1_decode2op")
+   (eq_attr "type" "store_4, store_8"))
+  "xgene1_decode1op, xgene1_st")

  (define_insn_reservation "xgene1_move" 1
(and (eq_attr "tune" "xgene1")
 (eq_attr "type" "mov_reg,mov_imm,mrs"))
-  "xgene1_decode1op")
+  "xgene1_decode1op, xgene1_IXn")
+
+(define_insn_reservation 

Re: [PATCH][AArch64] Improve scheduling model for X-Gene

2017-11-10 Thread Dominik Inführ

> On 10 Nov 2017, at 10:40, James Greenhalgh  wrote:
> 
> On Fri, Nov 10, 2017 at 10:36:57AM +0100, Dominik Inführ wrote:
>> Hi,
>> 
>> this patch tries to refine the instruction scheduling model for X-Gene.
>> Improved performance for 456.hmmer and 464.h264ref (about 1%). Also splits
>> the model into multiple automatons, therefore smaller binary and faster build
>> time. Survives bootstrap.
> 
> I'm trusting your judgment on whether these numbers make sense, as I
> have no access to specifications for xgene.
> 
> OK.

Thanks. I do not have commit rights, could you please commit it for me?

> 
> Reviewed-By: James Greenhalgh 
> 
>> 
>> Best,
>> Dominik
>> 
>> gcc/ChangeLog:
>> 2017-10-09  Dominik Infuehr 
>> 
>>  * config/arm/xgene1.md (xgene1): Split into automatons
>>  xgene1_main, xgene1_decoder, xgene1_div, xgene1_simd.
>>  (xgene1_f_load): Adjust reservations and/or types.
>>  (xgene1_f_store): Likewise.
>>  (xgene1_load_pair): Likewise.
>>  (xgene1_store_pair): Likewise.
>>  (xgene1_fp_load1): Likewise.
>>  (xgene1_load1): Likewise.
>>  (xgene1_store1): Likewise.
>>  (xgene1_move): Likewise.
>>  (xgene1_alu): Likewise.
>>  (xgene1_simd): Likewise.
>>  (xgene1_bfm): Likewise.
>>  (xgene1_neon_load1): Likewise.
>>  (xgene1_neon_store1): Likewise.
>>  (xgene1_neon_logic): Likewise.
>>  (xgene1_neon_st1): Likewise.
>>  (xgene1_neon_ld1r): Likewise.
>>  (xgene1_alu_cond): Added.
>>  (xgene1_shift_reg): Likwise.
>>  (xgene1_bfx): Likewise.
>>  (xgene1_mul): Split into xgene1_mul32, xgene1_mul64.
>> 
>> —
>> diff --git a/gcc/config/arm/xgene1.md b/gcc/config/arm/xgene1.md
>> index c4b3773..cf0694a 100644
>> --- a/gcc/config/arm/xgene1.md
>> +++ b/gcc/config/arm/xgene1.md
>> @@ -20,17 +20,26 @@
>> 
>> ;; Pipeline description for the xgene1 micro-architecture
>> 
>> -(define_automaton "xgene1")
>> +(define_automaton "xgene1_main, xgene1_decoder, xgene1_div, xgene1_simd")
>> 
>> -(define_cpu_unit "xgene1_decode_out0" "xgene1")
>> -(define_cpu_unit "xgene1_decode_out1" "xgene1")
>> -(define_cpu_unit "xgene1_decode_out2" "xgene1")
>> -(define_cpu_unit "xgene1_decode_out3" "xgene1")
>> +(define_cpu_unit "xgene1_decode_out0" "xgene1_decoder")
>> +(define_cpu_unit "xgene1_decode_out1" "xgene1_decoder")
>> +(define_cpu_unit "xgene1_decode_out2" "xgene1_decoder")
>> +(define_cpu_unit "xgene1_decode_out3" "xgene1_decoder")
>> 
>> -(define_cpu_unit "xgene1_divide" "xgene1")
>> -(define_cpu_unit "xgene1_fp_divide" "xgene1")
>> -(define_cpu_unit "xgene1_fsu" "xgene1")
>> -(define_cpu_unit "xgene1_fcmp" "xgene1")
>> +(define_cpu_unit "xgene1_IXA" "xgene1_main")
>> +(define_cpu_unit "xgene1_IXB" "xgene1_main")
>> +(define_cpu_unit "xgene1_IXB_compl" "xgene1_main")
>> +
>> +(define_reservation "xgene1_IXn" "(xgene1_IXA | xgene1_IXB)")
>> +
>> +(define_cpu_unit "xgene1_multiply" "xgene1_main")
>> +(define_cpu_unit "xgene1_divide" "xgene1_div")
>> +(define_cpu_unit "xgene1_fp_divide" "xgene1_div")
>> +(define_cpu_unit "xgene1_fsu" "xgene1_simd")
>> +(define_cpu_unit "xgene1_fcmp" "xgene1_simd")
>> +(define_cpu_unit "xgene1_ld" "xgene1_main")
>> +(define_cpu_unit "xgene1_st" "xgene1_main")
>> 
>> (define_reservation "xgene1_decode1op"
>> "( xgene1_decode_out0 )
>> @@ -68,12 +77,12 @@
>> (define_insn_reservation "xgene1_f_load" 10
>>   (and (eq_attr "tune" "xgene1")
>>(eq_attr "type" "f_loadd,f_loads"))
>> -  "xgene1_decode2op")
>> +  "xgene1_decode2op, xgene1_ld")
>> 
>> (define_insn_reservation "xgene1_f_store" 4
>>   (and (eq_attr "tune" "xgene1")
>>(eq_attr "type" "f_stored,f_stores"))
>> -  "xgene1_decode2op")
>> +  "xgene1_decode2op, xgene1_st")
>> 
>> (define_insn_reservation "xgene1_fmov" 2
>>   (and (eq_attr "tune" "xgene1")
>> @@ -92,85 +101,108 @@
>> 
>> (define_insn_reservation "xgene1_load_pair" 6
>>   (and (eq_attr "tune" "xgene1")
>> -   (eq_attr "type" "load_8, load_16"))
>> -  "xgene1_decodeIsolated")
>> +   (eq_attr "type" "load_16"))
>> +  "xgene1_decodeIsolated, xgene1_ld*2")
>> 
>> (define_insn_reservation "xgene1_store_pair" 2
>>   (and (eq_attr "tune" "xgene1")
>> -   (eq_attr "type" "store_8, store_16"))
>> -  "xgene1_decodeIsolated")
>> +   (eq_attr "type" "store_16"))
>> +  "xgene1_decodeIsolated, xgene1_st*2")
>> 
>> (define_insn_reservation "xgene1_fp_load1" 10
>>   (and (eq_attr "tune" "xgene1")
>> -   (eq_attr "type" "load_4")
>> +   (eq_attr "type" "load_4, load_8")
>>(eq_attr "fp" "yes"))
>> -  "xgene1_decode1op")
>> +  "xgene1_decode1op, xgene1_ld")
>> 
>> (define_insn_reservation "xgene1_load1" 5
>>   (and (eq_attr "tune" "xgene1")
>> -   (eq_attr "type" "load_4"))
>> -  "xgene1_decode1op")
>> +   (eq_attr "type" "load_4, load_8"))
>> +  "xgene1_decode1op, xgene1_ld")
>> 
>> -(define_insn_reservation "xgene1_store1" 2
>> +(define_insn_reservation 

Re: [PATCH][AArch64] Improve scheduling model for X-Gene

2017-11-10 Thread James Greenhalgh
On Fri, Nov 10, 2017 at 10:36:57AM +0100, Dominik Inführ wrote:
> Hi,
> 
> this patch tries to refine the instruction scheduling model for X-Gene.
> Improved performance for 456.hmmer and 464.h264ref (about 1%). Also splits
> the model into multiple automatons, therefore smaller binary and faster build
> time. Survives bootstrap.

I'm trusting your judgment on whether these numbers make sense, as I
have no access to specifications for xgene.

OK.

Reviewed-By: James Greenhalgh 

> 
> Best,
> Dominik
> 
> gcc/ChangeLog:
> 2017-10-09  Dominik Infuehr 
> 
>   * config/arm/xgene1.md (xgene1): Split into automatons
>   xgene1_main, xgene1_decoder, xgene1_div, xgene1_simd.
>   (xgene1_f_load): Adjust reservations and/or types.
>   (xgene1_f_store): Likewise.
>   (xgene1_load_pair): Likewise.
>   (xgene1_store_pair): Likewise.
>   (xgene1_fp_load1): Likewise.
>   (xgene1_load1): Likewise.
>   (xgene1_store1): Likewise.
>   (xgene1_move): Likewise.
>   (xgene1_alu): Likewise.
>   (xgene1_simd): Likewise.
>   (xgene1_bfm): Likewise.
>   (xgene1_neon_load1): Likewise.
>   (xgene1_neon_store1): Likewise.
>   (xgene1_neon_logic): Likewise.
>   (xgene1_neon_st1): Likewise.
>   (xgene1_neon_ld1r): Likewise.
>   (xgene1_alu_cond): Added.
>   (xgene1_shift_reg): Likwise.
>   (xgene1_bfx): Likewise.
>   (xgene1_mul): Split into xgene1_mul32, xgene1_mul64.
> 
> —
> diff --git a/gcc/config/arm/xgene1.md b/gcc/config/arm/xgene1.md
> index c4b3773..cf0694a 100644
> --- a/gcc/config/arm/xgene1.md
> +++ b/gcc/config/arm/xgene1.md
> @@ -20,17 +20,26 @@
> 
>  ;; Pipeline description for the xgene1 micro-architecture
> 
> -(define_automaton "xgene1")
> +(define_automaton "xgene1_main, xgene1_decoder, xgene1_div, xgene1_simd")
> 
> -(define_cpu_unit "xgene1_decode_out0" "xgene1")
> -(define_cpu_unit "xgene1_decode_out1" "xgene1")
> -(define_cpu_unit "xgene1_decode_out2" "xgene1")
> -(define_cpu_unit "xgene1_decode_out3" "xgene1")
> +(define_cpu_unit "xgene1_decode_out0" "xgene1_decoder")
> +(define_cpu_unit "xgene1_decode_out1" "xgene1_decoder")
> +(define_cpu_unit "xgene1_decode_out2" "xgene1_decoder")
> +(define_cpu_unit "xgene1_decode_out3" "xgene1_decoder")
> 
> -(define_cpu_unit "xgene1_divide" "xgene1")
> -(define_cpu_unit "xgene1_fp_divide" "xgene1")
> -(define_cpu_unit "xgene1_fsu" "xgene1")
> -(define_cpu_unit "xgene1_fcmp" "xgene1")
> +(define_cpu_unit "xgene1_IXA" "xgene1_main")
> +(define_cpu_unit "xgene1_IXB" "xgene1_main")
> +(define_cpu_unit "xgene1_IXB_compl" "xgene1_main")
> +
> +(define_reservation "xgene1_IXn" "(xgene1_IXA | xgene1_IXB)")
> +
> +(define_cpu_unit "xgene1_multiply" "xgene1_main")
> +(define_cpu_unit "xgene1_divide" "xgene1_div")
> +(define_cpu_unit "xgene1_fp_divide" "xgene1_div")
> +(define_cpu_unit "xgene1_fsu" "xgene1_simd")
> +(define_cpu_unit "xgene1_fcmp" "xgene1_simd")
> +(define_cpu_unit "xgene1_ld" "xgene1_main")
> +(define_cpu_unit "xgene1_st" "xgene1_main")
> 
>  (define_reservation "xgene1_decode1op"
>  "( xgene1_decode_out0 )
> @@ -68,12 +77,12 @@
>  (define_insn_reservation "xgene1_f_load" 10
>(and (eq_attr "tune" "xgene1")
> (eq_attr "type" "f_loadd,f_loads"))
> -  "xgene1_decode2op")
> +  "xgene1_decode2op, xgene1_ld")
> 
>  (define_insn_reservation "xgene1_f_store" 4
>(and (eq_attr "tune" "xgene1")
> (eq_attr "type" "f_stored,f_stores"))
> -  "xgene1_decode2op")
> +  "xgene1_decode2op, xgene1_st")
> 
>  (define_insn_reservation "xgene1_fmov" 2
>(and (eq_attr "tune" "xgene1")
> @@ -92,85 +101,108 @@
> 
>  (define_insn_reservation "xgene1_load_pair" 6
>(and (eq_attr "tune" "xgene1")
> -   (eq_attr "type" "load_8, load_16"))
> -  "xgene1_decodeIsolated")
> +   (eq_attr "type" "load_16"))
> +  "xgene1_decodeIsolated, xgene1_ld*2")
> 
>  (define_insn_reservation "xgene1_store_pair" 2
>(and (eq_attr "tune" "xgene1")
> -   (eq_attr "type" "store_8, store_16"))
> -  "xgene1_decodeIsolated")
> +   (eq_attr "type" "store_16"))
> +  "xgene1_decodeIsolated, xgene1_st*2")
> 
>  (define_insn_reservation "xgene1_fp_load1" 10
>(and (eq_attr "tune" "xgene1")
> -   (eq_attr "type" "load_4")
> +   (eq_attr "type" "load_4, load_8")
> (eq_attr "fp" "yes"))
> -  "xgene1_decode1op")
> +  "xgene1_decode1op, xgene1_ld")
> 
>  (define_insn_reservation "xgene1_load1" 5
>(and (eq_attr "tune" "xgene1")
> -   (eq_attr "type" "load_4"))
> -  "xgene1_decode1op")
> +   (eq_attr "type" "load_4, load_8"))
> +  "xgene1_decode1op, xgene1_ld")
> 
> -(define_insn_reservation "xgene1_store1" 2
> +(define_insn_reservation "xgene1_store1" 1
>(and (eq_attr "tune" "xgene1")
> -   (eq_attr "type" "store_4"))
> -  "xgene1_decode2op")
> +   (eq_attr "type" "store_4, store_8"))
> +  "xgene1_decode1op, xgene1_st")
> 
>  (define_insn_reservation "xgene1_move" 1
>(and 

Re: [02/nn] Add more vec_duplicate simplifications

2017-11-10 Thread Christophe Lyon
On 25 October 2017 at 18:29, Jeff Law  wrote:
> On 10/23/2017 05:17 AM, Richard Sandiford wrote:
>> This patch adds a vec_duplicate_p helper that tests for constant
>> or non-constant vector duplicates.  Together with the existing
>> const_vec_duplicate_p, this complements the gen_vec_duplicate
>> and gen_const_vec_duplicate added by a previous patch.
>>
>> The patch uses the new routines to add more rtx simplifications
>> involving vector duplicates.  These mirror simplifications that
>> we already do for CONST_VECTOR broadcasts and are needed for
>> variable-length SVE, which uses:
>>
>>   (const:M (vec_duplicate:M X))
>>
>> to represent constant broadcasts instead.  The simplifications do
>> trigger on the testsuite for variable duplicates too, and in each
>> case I saw the change was an improvement.  E.g.:
>>
> [ snip ]
>
>>
>> The best way of testing the new simplifications seemed to be
>> via selftests.  The patch cribs part of David's patch here:
>> https://gcc.gnu.org/ml/gcc-patches/2016-07/msg00270.html .
> Cool.  I really wish I had more time to promote David's work by adding
> selftests to various things.  There's certainly cases where it's the
> most direct and useful way to test certain bits of lower level
> infrastructure we have.  Glad to see you found it useful here.
>
>
>
>>
>>
>> 2017-10-23  Richard Sandiford  
>>   David Malcolm  
>>   Alan Hayward  
>>   David Sherwood  
>>
>> gcc/
>>   * rtl.h (vec_duplicate_p): New function.
>>   * selftest-rtl.c (assert_rtx_eq_at): New function.
>>   * selftest-rtl.h (ASSERT_RTX_EQ): New macro.
>>   (assert_rtx_eq_at): Declare.
>>   * selftest.h (selftest::simplify_rtx_c_tests): Declare.
>>   * selftest-run-tests.c (selftest::run_tests): Call it.
>>   * simplify-rtx.c: Include selftest.h and selftest-rtl.h.
>>   (simplify_unary_operation_1): Recursively handle vector duplicates.
>>   (simplify_binary_operation_1): Likewise.  Handle VEC_SELECTs of
>>   vector duplicates.
>>   (simplify_subreg): Handle subregs of vector duplicates.
>>   (make_test_reg, test_vector_ops_duplicate, test_vector_ops)
>>   (selftest::simplify_rtx_c_tests): New functions.

Hi Richard,

I've noticed that this patch (r254294) causes
FAIL: gcc.dg/vect/vect-126.c (internal compiler error)
FAIL: gcc.dg/vect/vect-126.c -flto -ffat-lto-objects (internal compiler error)
on arm* targets.
Sorry if this has been reported before, I've restarted validations
only recently,
so the process is still catching up.

gcc.log has this:
spawn -ignore SIGHUP
/aci-gcc-fsf/builds/gcc-fsf-gccsrc/obj-arm-none-linux-gnueabihf/gcc3/gcc/xgcc
-B/aci-gcc-fsf/builds/gcc-fsf-gccsrc/obj-arm-none-linux-gnueabihf/gcc3/gcc/
/gcc/testsuite/gcc.dg/vect/vect-126.c -fno-diagnostics-show-caret
-fdiagnostics-color=never -ffast-math -ftree-vectorize
-fno-vect-cost-model -fno-common -O2 -fdump-tree-vect-details -S -o
vect-126.s
during RTL pass: combine
/gcc/testsuite/gcc.dg/vect/vect-126.c: In function 'f5':
/gcc/testsuite/gcc.dg/vect/vect-126.c:53:1: internal compiler error:
in neon_valid_immediate, at config/arm/arm.c:11850
0xf3e6c8 neon_valid_immediate
/gcc/config/arm/arm.c:11850
0xf3ea9a neon_immediate_valid_for_move(rtx_def*, machine_mode, rtx_def**, int*)
/gcc/config/arm/arm.c:11968
0xf40a20 arm_rtx_costs_internal
/gcc/config/arm/arm.c:10695
0xf40a20 arm_rtx_costs
/gcc/config/arm/arm.c:10946
0xb113ef rtx_cost(rtx_def*, machine_mode, rtx_code, int, bool)
/gcc/rtlanal.c:4187
0xb1169f set_src_cost
/gcc/rtl.h:2700
0xb1169f pattern_cost(rtx_def*, bool)
/gcc/rtlanal.c:5315
0x128bb3b combine_validate_cost
/gcc/combine.c:893
0x128bb3b try_combine
/gcc/combine.c:4113
0x12923d5 combine_instructions
/gcc/combine.c:1452
0x12926ed rest_of_handle_combine
/gcc/combine.c:14795
0x12926ed execute
/gcc/combine.c:14840
Please submit a full bug report,


Thanks,

Christophe

> Thanks for the examples of how this affects various targets.  Seems like
> it ought to be a consistent win when they trigger.
>
> jeff


[PATCH][AArch64] Improve scheduling model for X-Gene

2017-11-10 Thread Dominik Inführ
Hi,

this patch tries to refine the instruction scheduling model for X-Gene. 
Improved performance for 456.hmmer and 464.h264ref (about 1%). Also splits the 
model into multiple automatons, therefore smaller binary and faster build time. 
Survives bootstrap.

Best,
Dominik

gcc/ChangeLog:
2017-10-09  Dominik Infuehr 

* config/arm/xgene1.md (xgene1): Split into automatons
xgene1_main, xgene1_decoder, xgene1_div, xgene1_simd.
(xgene1_f_load): Adjust reservations and/or types.
(xgene1_f_store): Likewise.
(xgene1_load_pair): Likewise.
(xgene1_store_pair): Likewise.
(xgene1_fp_load1): Likewise.
(xgene1_load1): Likewise.
(xgene1_store1): Likewise.
(xgene1_move): Likewise.
(xgene1_alu): Likewise.
(xgene1_simd): Likewise.
(xgene1_bfm): Likewise.
(xgene1_neon_load1): Likewise.
(xgene1_neon_store1): Likewise.
(xgene1_neon_logic): Likewise.
(xgene1_neon_st1): Likewise.
(xgene1_neon_ld1r): Likewise.
(xgene1_alu_cond): Added.
(xgene1_shift_reg): Likwise.
(xgene1_bfx): Likewise.
(xgene1_mul): Split into xgene1_mul32, xgene1_mul64.

—
diff --git a/gcc/config/arm/xgene1.md b/gcc/config/arm/xgene1.md
index c4b3773..cf0694a 100644
--- a/gcc/config/arm/xgene1.md
+++ b/gcc/config/arm/xgene1.md
@@ -20,17 +20,26 @@

 ;; Pipeline description for the xgene1 micro-architecture

-(define_automaton "xgene1")
+(define_automaton "xgene1_main, xgene1_decoder, xgene1_div, xgene1_simd")

-(define_cpu_unit "xgene1_decode_out0" "xgene1")
-(define_cpu_unit "xgene1_decode_out1" "xgene1")
-(define_cpu_unit "xgene1_decode_out2" "xgene1")
-(define_cpu_unit "xgene1_decode_out3" "xgene1")
+(define_cpu_unit "xgene1_decode_out0" "xgene1_decoder")
+(define_cpu_unit "xgene1_decode_out1" "xgene1_decoder")
+(define_cpu_unit "xgene1_decode_out2" "xgene1_decoder")
+(define_cpu_unit "xgene1_decode_out3" "xgene1_decoder")

-(define_cpu_unit "xgene1_divide" "xgene1")
-(define_cpu_unit "xgene1_fp_divide" "xgene1")
-(define_cpu_unit "xgene1_fsu" "xgene1")
-(define_cpu_unit "xgene1_fcmp" "xgene1")
+(define_cpu_unit "xgene1_IXA" "xgene1_main")
+(define_cpu_unit "xgene1_IXB" "xgene1_main")
+(define_cpu_unit "xgene1_IXB_compl" "xgene1_main")
+
+(define_reservation "xgene1_IXn" "(xgene1_IXA | xgene1_IXB)")
+
+(define_cpu_unit "xgene1_multiply" "xgene1_main")
+(define_cpu_unit "xgene1_divide" "xgene1_div")
+(define_cpu_unit "xgene1_fp_divide" "xgene1_div")
+(define_cpu_unit "xgene1_fsu" "xgene1_simd")
+(define_cpu_unit "xgene1_fcmp" "xgene1_simd")
+(define_cpu_unit "xgene1_ld" "xgene1_main")
+(define_cpu_unit "xgene1_st" "xgene1_main")

 (define_reservation "xgene1_decode1op"
 "( xgene1_decode_out0 )
@@ -68,12 +77,12 @@
 (define_insn_reservation "xgene1_f_load" 10
   (and (eq_attr "tune" "xgene1")
(eq_attr "type" "f_loadd,f_loads"))
-  "xgene1_decode2op")
+  "xgene1_decode2op, xgene1_ld")

 (define_insn_reservation "xgene1_f_store" 4
   (and (eq_attr "tune" "xgene1")
(eq_attr "type" "f_stored,f_stores"))
-  "xgene1_decode2op")
+  "xgene1_decode2op, xgene1_st")

 (define_insn_reservation "xgene1_fmov" 2
   (and (eq_attr "tune" "xgene1")
@@ -92,85 +101,108 @@

 (define_insn_reservation "xgene1_load_pair" 6
   (and (eq_attr "tune" "xgene1")
-   (eq_attr "type" "load_8, load_16"))
-  "xgene1_decodeIsolated")
+   (eq_attr "type" "load_16"))
+  "xgene1_decodeIsolated, xgene1_ld*2")

 (define_insn_reservation "xgene1_store_pair" 2
   (and (eq_attr "tune" "xgene1")
-   (eq_attr "type" "store_8, store_16"))
-  "xgene1_decodeIsolated")
+   (eq_attr "type" "store_16"))
+  "xgene1_decodeIsolated, xgene1_st*2")

 (define_insn_reservation "xgene1_fp_load1" 10
   (and (eq_attr "tune" "xgene1")
-   (eq_attr "type" "load_4")
+   (eq_attr "type" "load_4, load_8")
(eq_attr "fp" "yes"))
-  "xgene1_decode1op")
+  "xgene1_decode1op, xgene1_ld")

 (define_insn_reservation "xgene1_load1" 5
   (and (eq_attr "tune" "xgene1")
-   (eq_attr "type" "load_4"))
-  "xgene1_decode1op")
+   (eq_attr "type" "load_4, load_8"))
+  "xgene1_decode1op, xgene1_ld")

-(define_insn_reservation "xgene1_store1" 2
+(define_insn_reservation "xgene1_store1" 1
   (and (eq_attr "tune" "xgene1")
-   (eq_attr "type" "store_4"))
-  "xgene1_decode2op")
+   (eq_attr "type" "store_4, store_8"))
+  "xgene1_decode1op, xgene1_st")

 (define_insn_reservation "xgene1_move" 1
   (and (eq_attr "tune" "xgene1")
(eq_attr "type" "mov_reg,mov_imm,mrs"))
-  "xgene1_decode1op")
+  "xgene1_decode1op, xgene1_IXn")
+
+(define_insn_reservation "xgene1_alu_cond" 1
+  (and (eq_attr "tune" "xgene1")
+   (eq_attr "type" "csel"))
+  "xgene1_decode1op, xgene1_IXn")

 (define_insn_reservation "xgene1_alu" 1
   (and (eq_attr "tune" "xgene1")
(eq_attr "type" "alu_imm,alu_sreg,alu_shift_imm,\
-

[PATCH][ARM,testsuite] Skip copysign_softfloat_1.c on hard-float targets

2017-11-10 Thread Christophe Lyon
Hi,

The attached testsuite patch makes
gcc.target/arm/copysign_softfloat_1.c UNSUPPORTED on
arm-none-linux-gnueabihf, rather than FAIL/UNRESOLVED because of a
link failure since the toolchain startup code is in hard-float ABI
while the testcase is compiled with -mfloat-abi=soft.

Tested on arm* configurations, with no impact on arm*eabi and
FAIL->UNSUPPORTED on arm*hf targets.

OK?

Thanks,

Christophe
gcc/testsuite/ChangeLog:

2017-11-10  Christophe Lyon  

* lib/target-supports.exp (check_effective_target_arm_soft_ok):
New function.
* gcc.target/arm/copysign_softfloat_1.c: Require arm_soft_ok
effective target.

diff --git a/gcc/testsuite/lib/target-supports.exp 
b/gcc/testsuite/lib/target-supports.exp
index d7ef04f..6917a4d 100644
--- a/gcc/testsuite/lib/target-supports.exp
+++ b/gcc/testsuite/lib/target-supports.exp
@@ -3413,6 +3413,19 @@ proc check_effective_target_arm_vect_no_misalign { } {
 }
 
 
+# Return 1 if this is an ARM target supporting -mfloat-abi=soft.  Some
+# multilibs may be incompatible with this option.
+
+proc check_effective_target_arm_soft_ok { } {
+if { [check_effective_target_arm32] } {
+   return [check_no_compiler_messages arm_soft_ok executable {
+   int main() { return 0;}
+   } "-mfloat-abi=soft"]
+} else {
+   return 0
+}
+}
+
 # Return 1 if this is an ARM target supporting -mfpu=vfp
 # -mfloat-abi=softfp.  Some multilibs may be incompatible with these
 # options.
diff --git a/gcc/testsuite/gcc.target/arm/copysign_softfloat_1.c 
b/gcc/testsuite/gcc.target/arm/copysign_softfloat_1.c
index 1260a6f..d79d014 100644
--- a/gcc/testsuite/gcc.target/arm/copysign_softfloat_1.c
+++ b/gcc/testsuite/gcc.target/arm/copysign_softfloat_1.c
@@ -1,5 +1,6 @@
 /* { dg-do run } */
 /* { dg-require-effective-target arm_thumb2_ok } */
+/* { dg-require-effective-target arm_soft_ok } */
 /* { dg-skip-if "skip override" { *-*-* } { "-mfloat-abi=softfp" 
"-mfloat-abi=hard" } { "" } } */
 /* { dg-options "-O2 -mfloat-abi=soft --save-temps" } */
 extern void abort (void);


Re: [PATCH] Fix profiledbootstrap - store-merging aliasing issue (PR bootstrap/82916)

2017-11-10 Thread Richard Biener
On Fri, 10 Nov 2017, Jakub Jelinek wrote:

> On Fri, Nov 10, 2017 at 08:52:16AM +0100, Richard Biener wrote:
> > > @@ -958,8 +959,10 @@ pass_store_merging::terminate_all_aliasi
> > >unsigned int i;
> > >FOR_EACH_VEC_ELT (cur->m_store_info, i, info)
> > >   {
> > > -   if (ref_maybe_used_by_stmt_p (stmt, gimple_assign_lhs (info->stmt))
> > > -   || stmt_may_clobber_ref_p (stmt, gimple_assign_lhs (info->stmt)))
> > > +   tree lhs = gimple_assign_lhs (info->stmt);
> > > +   if (ref_maybe_used_by_stmt_p (stmt, lhs)
> > > +   || stmt_may_clobber_ref_p (stmt, lhs)
> > > +   || (store_lhs && refs_output_dependent_p (store_lhs, lhs)))
> > 
> > Looks good but may do redundant work for store_lhs?  So rather
> > 
> >|| (! store_lhs && stmt_may_clobber_ref_p (stmt, lhs)
> >|| (store_lhs && refs_output_dependent_p (store_lhs, lhs)
> > 
> > ?  Fails to handle storing calls (in case those can appear in the chains).
> 
> info->stmt is known to be a store, but stmt is not, it can be any other
> stmt, including calls, so the above would miss the calls handling.
> 
> > Looks like we miss some convenient stmt_output/anti_dependent_p (you can
> > follow stmt_may_clobbers_ref_p[_1] for cut and/or add a
> > bool tbaa flag we can pass down to stmt_may_clobber_ref_p_1).
> 
> So perhaps bool tbaa = true argument to both stmt_may_clobber_ref_p_1
> and stmt_may_clobber_ref_p, or just stmt_may_clobber_ref_p_1 and
> add some differently named alternative to stmt_may_clobber_ref_p
> (in that case, any suggestions on a good name?)?

Internally (aka static fn) I'd just add a bool param w/o default.

The external API should be stmt_output/anti_dependent_p and I think
these days with C++ we could make stmt_may_clobber_ref_p_1 taking ao_ref
and stmt_may_clobber_ref_p taking a tree overloads of
stmt_may_clobber_ref_p.  We'd then have _1 being static and having the
extra arg.

Richard.

> > That said - the patch is ok, any improvements can be done as followup.
> 
>   Jakub
> 
> 

-- 
Richard Biener 
SUSE LINUX GmbH, GF: Felix Imendoerffer, Jane Smithard, Graham Norton, HRB 
21284 (AG Nuernberg)


[Ada] Fix ICE on defaulted string parameters at -O

2017-11-10 Thread Eric Botcazou
This is a regression present on the mainline, 7 and 6 branches if optimization 
is enabled.  It turns out that we don't need to generate a VIEW_CONVERT_EXPR 
for a regular conversion between an unconstrained array parameter and one of 
its constrained subtype.

Tested on x86_64-suse-linux, applied on the mainline, 7 and 6 branches.


2017-11-10  Eric Botcazou  

* gcc-interface/utils.c (convert) : Add comment and do
not fall through to the next case.
: Deal specially with a dereference from another array
type with the same element type.


2017-11-10  Eric Botcazou  

* gnat.dg/opt69.adb: New test.

-- 
Eric BotcazouIndex: gcc-interface/utils.c
===
--- gcc-interface/utils.c	(revision 254599)
+++ gcc-interface/utils.c	(working copy)
@@ -4706,6 +4706,7 @@ convert (tree type, tree expr)
   return fold (convert_to_real (type, expr));
 
 case RECORD_TYPE:
+  /* Do a normal conversion between scalar and justified modular type.  */
   if (TYPE_JUSTIFIED_MODULAR_P (type) && !AGGREGATE_TYPE_P (etype))
 	{
 	  vec *v;
@@ -4717,9 +4718,27 @@ convert (tree type, tree expr)
 	  return gnat_build_constructor (type, v);
 	}
 
-  /* ... fall through ... */
+  /* In these cases, assume the front-end has validated the conversion.
+	 If the conversion is valid, it will be a bit-wise conversion, so
+	 it can be viewed as an unchecked conversion.  */
+  return unchecked_convert (type, expr, false);
 
 case ARRAY_TYPE:
+  /* Do a normal conversion between unconstrained and constrained array
+	 type, assuming the latter is a constrained version of the former.  */
+  if (TREE_CODE (expr) == INDIRECT_REF
+	  && ecode == ARRAY_TYPE
+	  && TREE_TYPE (etype) == TREE_TYPE (type))
+	{
+	  tree ptr_type = build_pointer_type (type);
+	  tree t = build_unary_op (INDIRECT_REF, NULL_TREE,
+   fold_convert (ptr_type,
+		 TREE_OPERAND (expr, 0)));
+	  TREE_READONLY (t) = TREE_READONLY (expr);
+	  TREE_THIS_NOTRAP (t) = TREE_THIS_NOTRAP (expr);
+	  return t;
+	}
+
   /* In these cases, assume the front-end has validated the conversion.
 	 If the conversion is valid, it will be a bit-wise conversion, so
 	 it can be viewed as an unchecked conversion.  */
-- { dg-do compile }
-- { dg-options "-O" }

with Ada.Text_IO;

procedure Opt69 is

   procedure Inner
 (A : String := (1 .. 15 => ASCII.NUL);
  B : String := (1 .. 5 => ASCII.NUL);
  C : String := (1 .. 5 => ASCII.NUL))
   is
  Aa : String (1 .. 15);
  Bb : String (1 .. 5);
  Cc : String (1 .. 5);
   begin
  Aa := A;
  Bb := B;
  Cc := C;

  Ada.Text_IO.Put_Line (Aa);
  Ada.Text_IO.Put_Line (Bb);
  Ada.Text_IO.Put_Line (Cc);
   end;

begin
   Inner;
end;


Re: [PATCH] Fix profiledbootstrap - store-merging aliasing issue (PR bootstrap/82916)

2017-11-10 Thread Jakub Jelinek
On Fri, Nov 10, 2017 at 08:52:16AM +0100, Richard Biener wrote:
> > @@ -958,8 +959,10 @@ pass_store_merging::terminate_all_aliasi
> >unsigned int i;
> >FOR_EACH_VEC_ELT (cur->m_store_info, i, info)
> > {
> > - if (ref_maybe_used_by_stmt_p (stmt, gimple_assign_lhs (info->stmt))
> > - || stmt_may_clobber_ref_p (stmt, gimple_assign_lhs (info->stmt)))
> > + tree lhs = gimple_assign_lhs (info->stmt);
> > + if (ref_maybe_used_by_stmt_p (stmt, lhs)
> > + || stmt_may_clobber_ref_p (stmt, lhs)
> > + || (store_lhs && refs_output_dependent_p (store_lhs, lhs)))
> 
> Looks good but may do redundant work for store_lhs?  So rather
> 
>|| (! store_lhs && stmt_may_clobber_ref_p (stmt, lhs)
>|| (store_lhs && refs_output_dependent_p (store_lhs, lhs)
> 
> ?  Fails to handle storing calls (in case those can appear in the chains).

info->stmt is known to be a store, but stmt is not, it can be any other
stmt, including calls, so the above would miss the calls handling.

> Looks like we miss some convenient stmt_output/anti_dependent_p (you can
> follow stmt_may_clobbers_ref_p[_1] for cut and/or add a
> bool tbaa flag we can pass down to stmt_may_clobber_ref_p_1).

So perhaps bool tbaa = true argument to both stmt_may_clobber_ref_p_1
and stmt_may_clobber_ref_p, or just stmt_may_clobber_ref_p_1 and
add some differently named alternative to stmt_may_clobber_ref_p
(in that case, any suggestions on a good name?)?

> That said - the patch is ok, any improvements can be done as followup.

Jakub


Re: [PATCH] enhance -Warray-bounds to detect out-of-bounds offsets (PR 82455)

2017-11-10 Thread Richard Biener
On Thu, 9 Nov 2017, Jeff Law wrote:

> On 11/02/2017 05:48 AM, Richard Biener wrote:
> 
> > 
> > There were elaborate transforms of ptr + CST to ptr->a.b.c[3] in the
> > past.  We have ripped out _most_ of them because of bad interaction
> > with dependence analysis and _b_o_s warnings.
> > 
> > But for example PRE might still end up propagating
> > 
> >  _1 = >a.b.c;
> >  _2 = (*_1)[i_3];
> > 
> > as
> > 
> >  _2 = ptr->a.b.c[i_3];
> > 
> > But it's not so much GCC building up GIMPLE expressions that would
> > cause false positives but "valid" C code and "invalid" C code
> > represented exactly the same in GCC.  Let's say
> I think this is a key point.

It's the usual issue with an optimizing compiler vs. a static analyzer.
We try to get rid of the little semantic details of the input languages
that in the end do not matter for code-generation but that makes
using those semantic details hard (sometimes the little details
are useful, like signed overflow being undefined).

For GIMPLE it's also often the case that we didn't really thoroughly
specify the semantics of the IL - like is an aggregate copy a
block copy (that's how we expand it to RTL) or a memberwise copy?
SRA treats it like the latter in some cases but memcpy folding
turns memcpy into aggregate assignments ... (now think about padding).

It's not that GCC doesn't have its set of existing issues with
respect to interpreting GIMPLE semantic as it seems fit in one way
here and in another way there.  I'm just always nervous when adding
new "interpretations" where I know the non-existing formal definition
of GIMPLE leaves things unspecified.

For example we _do_ use array bounds and array accesses (but _not_
and for now _nowhere_ if they appear in address computations!)
to derive niter information.  At the same time, because of this
exploitation, we try very very hard to never (ok, PRE above as a
couter-example) create an actual array access when dereferencing
a pointer that is constructed by taking the address of an array-ref.
That's why Martin added the warning to forwprop because that pass,
when forwarding such addresses, gets rid of the array-ref.

> >> Or, if that's not it, what exactly is your concern with this
> >> enhancement?  If it's that it's implemented in forwprop, what
> >> would be a better place, e.g., earlier in the optimization
> >> phase?  If it's something something else, I'd appreciate it
> >> if you could explain what.
> > 
> > For one implementing this in forwprop looks like a move in the
> > wrong direction.  I'd like to have separate warning passes or
> > at most amend warnings from optimization passes, not add new ones.
> I tend to agree.  That's one of the reasons why I pushed Aldy away from
> doing this kind of stuff within VRP.
> 
> What I envision is a pass which does a dominator walk through the
> blocks.  It gathers context sensitive range information as it does the walk.
> 
> As we encounter array references, we try to check them against the
> current range information.  We could also try to warn about certain
> pointer computations, though we have to be more careful with those.
> 
> Though I certainly still worry that the false positive cases which led
> Aldy, Andrew and myself to look at path sensitive ranges arent' resolved
> and will limit the utility of doing more array range checking.

I fear while this might be a little bit cleaner you'd still have to
do this very very early in the optimization pipeline (see all the
hard time we had with __builtin_object_size) and thus you won't catch
very many cases unless you start doing an IPA pass and handle propagating
through memory.  Which is when you arrived at a full-blown static
analyzer.

Richard.