Re: [aarch64][RFA][rtl-optimization/87763] Fix insv_1 and insv_2 for aarch64

2019-04-22 Thread Jeff Law
On 4/22/19 6:39 PM, Kugan Vivekanandarajah wrote:
> Hi Jeff,
> 
> [...]
> 
> +  "#"
> +  "&& 1"
> +  [(const_int 0)]
> +  "{
> + /* If we do not have an RMW operand, then copy the input
> + to the output before this insn.  Also modify the existing
> + insn in-place so we can have make_field_assignment actually
> + generate a suitable extraction.  */
> + if (!rtx_equal_p (operands[0], operands[1]))
> +   {
> + emit_move_insn (operands[0], operands[1]);
> + XEXP (XEXP (SET_SRC (PATTERN (curr_insn)), 0), 0) = copy_rtx (operands[0]);
> +   }
> +
> + rtx make_field_assignment (rtx);
> + rtx newpat = make_field_assignment (PATTERN (curr_insn));
> + gcc_assert (newpat);
> + emit_insn (newpat);
> + DONE;
> 
> It seems that make_field_assignment returns a new pattern only  if it
> succeeds and returns the same pattern otherwise. So I am wondering if
> it is worth simplifying the above. Like removing the assert and
> checking/inserting move only when new pattern is returned?
Thanks, this is something I meant to clean up and just totally forgot.
If the assert ever triggers it means something has gone horribly wrong.
 Essentially the insn's condition wasn't sufficiently tight.

Catching it with the assert at this point is much easier to debug.  The
failure modes when you don't catch the failure to create a field
assignment here occur much later in the pipeline and it won't be obvious
why things went wrong (I know that from experience :-).

So please consider the assert to be

gcc_assert (newpat != PATTERN (curr_insn);

Jeff


Re: [aarch64][RFA][rtl-optimization/87763] Fix insv_1 and insv_2 for aarch64

2019-04-22 Thread Kugan Vivekanandarajah
Hi Jeff,

[...]

+  "#"
+  "&& 1"
+  [(const_int 0)]
+  "{
+ /* If we do not have an RMW operand, then copy the input
+ to the output before this insn.  Also modify the existing
+ insn in-place so we can have make_field_assignment actually
+ generate a suitable extraction.  */
+ if (!rtx_equal_p (operands[0], operands[1]))
+   {
+ emit_move_insn (operands[0], operands[1]);
+ XEXP (XEXP (SET_SRC (PATTERN (curr_insn)), 0), 0) = copy_rtx (operands[0]);
+   }
+
+ rtx make_field_assignment (rtx);
+ rtx newpat = make_field_assignment (PATTERN (curr_insn));
+ gcc_assert (newpat);
+ emit_insn (newpat);
+ DONE;

It seems that make_field_assignment returns a new pattern only  if it
succeeds and returns the same pattern otherwise. So I am wondering if
it is worth simplifying the above. Like removing the assert and
checking/inserting move only when new pattern is returned?

Thanks,
Kugan



>
> Jeff


[C++ PATCH] PR c++/87366 - wrong error with alias template.

2019-04-22 Thread Jason Merrill
With this testcase the code in template_args_equal to treat aliases as
distinct wasn't sufficient, because it only looked at the top level, whereas
here we have a reference to the alias.  So let's also handle treating them
as distinct in structural_comptypes.  For GCC 10 I have a more comprehensive
patch, but for GCC 9 let's go with this smaller change.

Tested x86_64-pc-linux-gnu, applying to trunk.

* typeck.c (structural_comptypes): When comparing_specializations,
aliases are unequal.
(comptypes): When comparing_specializations, do structural
comparison.
---
 gcc/cp/typeck.c| 15 +++
 gcc/testsuite/g++.dg/cpp0x/alias-decl-66.C | 21 +
 gcc/cp/ChangeLog   |  8 
 3 files changed, 44 insertions(+)
 create mode 100644 gcc/testsuite/g++.dg/cpp0x/alias-decl-66.C

diff --git a/gcc/cp/typeck.c b/gcc/cp/typeck.c
index 7224d9bf9ed..fff88ab8df4 100644
--- a/gcc/cp/typeck.c
+++ b/gcc/cp/typeck.c
@@ -1443,6 +1443,17 @@ structural_comptypes (tree t1, tree t2, int strict)
   return false;
 }
 
+  /* Don't treat an alias template specialization with dependent
+ arguments as equivalent to its underlying type when used as a
+ template argument; we need them to be distinct so that we
+ substitute into the specialization arguments at instantiation
+ time.  And aliases can't be equivalent without being ==, so
+ we don't need to look any deeper.  */
+  if (comparing_specializations
+  && (dependent_alias_template_spec_p (t1)
+ || dependent_alias_template_spec_p (t2)))
+return false;
+
   /* If we get here, we know that from a target independent POV the
  types are the same.  Make sure the target attributes are also
  the same.  */
@@ -1455,6 +1466,10 @@ structural_comptypes (tree t1, tree t2, int strict)
 bool
 comptypes (tree t1, tree t2, int strict)
 {
+  if (strict == COMPARE_STRICT && comparing_specializations
+  && (t1 != TYPE_CANONICAL (t1) || t2 != TYPE_CANONICAL (t2)))
+/* If comparing_specializations, treat dependent aliases as distinct.  */
+strict = COMPARE_STRUCTURAL;
   if (strict == COMPARE_STRICT)
 {
   if (t1 == t2)
diff --git a/gcc/testsuite/g++.dg/cpp0x/alias-decl-66.C 
b/gcc/testsuite/g++.dg/cpp0x/alias-decl-66.C
new file mode 100644
index 000..acdea77a326
--- /dev/null
+++ b/gcc/testsuite/g++.dg/cpp0x/alias-decl-66.C
@@ -0,0 +1,21 @@
+// PR c++/87366
+// { dg-do compile { target c++11 } }
+
+struct A {};
+struct B {};
+
+template  struct wrapper {};
+
+template  struct enable_if_A { };
+template<> struct enable_if_A { using type = void; };
+
+template ::type> using ok_t = T;
+
+template  void not_even_called(wrapper&> a);
+
+template  int called(wrapper a);
+
+void test(wrapper& val)
+{
+called(val);
+}
diff --git a/gcc/cp/ChangeLog b/gcc/cp/ChangeLog
index 11fc9de29b0..d207d95256e 100644
--- a/gcc/cp/ChangeLog
+++ b/gcc/cp/ChangeLog
@@ -1,3 +1,11 @@
+2019-04-22  Jason Merrill  
+
+   PR c++/87366 - wrong error with alias template.
+   * typeck.c (structural_comptypes): When comparing_specializations,
+   aliases are unequal.
+   (comptypes): When comparing_specializations, do structural
+   comparison.
+
 2019-04-19  Jason Merrill  
 
PR c++/90190 - CTAD with list-constructor.

base-commit: a796a13541419edf99653581cf945253fb417064
-- 
2.20.1



Re: [0/4] Addressing modulo-scheduling bugs

2019-04-22 Thread Roman Zhuykov
As a freshly appointed maintainer I’m ready to commit my own 
modulo-sched patches, but decide to ask here if there are any 
objections.  Maybe I should ask any additional approval at this stage?  
If no, I’ll start tomorrow with committing patches 1/4 and 2/4 which are 
well-formed regression fixes.  Patch 3/4 doesn’t include test example, 
and I don’t know how to add it there, so I am ready to postpone it to 
stage 1.  Patch 4/4 is not solving a regression technically.


First two patches can be also committed into 8 branch.  If no discussion 
occurs,  I’ll commit them later this week, e.g. on friday.


Roman


Re: [4/4][PATCH] Discussing PR83507

2019-04-22 Thread Roman Zhuykov
> > This issue unfortunately was not solved correctly.  In that example we
> > don’t have -fmodulo-sched-allow-regmoves enabled and we should not
> > create any register moves at all.
>
> Yes, but if we do for whatever reason, we should never create register
> moves of hard registers.  Because that is incorrect (there may not be
> insns to do it).  It's a separate issue.
>
> You're extending Jakub's patch here, not replacing it, so that's fine.

Certainly, the patch contains assertions to catch both situations:
when we try to create reg_move when it wasn’t allowed at all, and when
we try to create reg_move for hard register. Preventing both of them
in theory can be easily achieved when SMS algorithm got absolutely
correct DDG as an input data.

> > In pr84524.c we got a loop with an extended inline asm:
> > asm volatile ("" : "+r" (v))
> > which also gives us a “surprising” situation Alexander predicts.
> >
> > For sched-deps scanner such volatile asm is a “true barrier” and we
> > create dependencies to almost all other instructions, while DF scanners
> > don’t give us such information.
>
> There is no such thing as a "true barrier" in extended asm.  The only thing
> volatile asm means is that the asm has a side effect unknown to the compiler;
> this can *not* be a modification of a register or of memory contents, such
> things are known by the compiler, that's what clobbers and "memory" clobber
> are about.

In sched-deps.c we got:
case ASM_OPERANDS:
case ASM_INPUT:
  {
   /* Traditional and volatile asm instructions must be considered to use
  and clobber all hard registers, all pseudo-registers and all of
  memory.  So must TRAP_IF and UNSPEC_VOLATILE operations.

  Consider for instance a volatile asm that changes the fpu rounding
  mode.  An insn should not be moved across this even if it only uses
  pseudo-regs because it might give an incorrectly rounded result.  */
   if ((code != ASM_OPERANDS || MEM_VOLATILE_P (x))
   && !DEBUG_INSN_P (insn))
 reg_pending_barrier = TRUE_BARRIER;
   ...

I understand that mentioned “changing fpu rounding mode” example may
not be relevant in current compiler.  But we still got TRUE_BARRIER
for all volatile asms.

> > Maybe it is a good idea somehow re-implement modulo scheduler using only
> > one scanner instead of two, but at the moment the best thing to do is to
> > detect the situation earlier and skip such loops.
>
> Or fix the broken code...

I’m not sure what you mean here, but the only alternative way to build
correct DDG is to change sched-deps.c parts to make analysis
consistent with DF, but that change will affect all schedulers.  And
we’ll have 2 rather big problems with such change:
1) Testing correctness and quality of generated code in all imaginable
situations in all schedulers.
2) Potential compilation slowdown.  Sched-deps analysis algorithm
implements heuristic ideas, while DF pretends to be more accurate but
slower analysis.  Trying to keep them in sync probably could increase
sched-deps analysis time.

A year ago there were relevant discussion about some unnecessary
inline asm dependencies in DF:
https://gcc.gnu.org/ml/gcc-patches/2018-04/msg01056.html

Roman


Re: Roman Zhuykov appointed Modulo Scheduler maintainer

2019-04-22 Thread Roman Zhuykov
Hello!

> I am pleased to announce that the GCC Steering Committee has
> appointed Roman Zhuykov as Modulo Scheduler maintainer.

Thanks to David and SC for the trust!  I'm pleased to become SMS maintainer.

> Please join me in congratulating Roman on his new role.
> Roman, please update your listing in the MAINTAINERS file.

As David asked me offlist I’ve removed Ayal Zaks and added myself in
MAINTAINERS.  Committed to trunk as r270492.

Roman

diff --git a/ChangeLog b/ChangeLog
--- a/ChangeLog
+++ b/ChangeLog
@@ -1,3 +1,8 @@
+2019-04-22  Roman Zhuykov  
+
+   * MAINTAINERS (Various Maintainers): Remove Ayal Zaks and add myself
+   as modulo-scheduler maintainer.
+
 2019-04-21  Iain Sandoe  

* MAINTAINERS: Add myself as co-maintainer for Darwin.
diff --git a/MAINTAINERS b/MAINTAINERS
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -186,7 +186,7 @@ scheduler (+ haifa) Jim Wilson

 scheduler (+ haifa)Michael Meissner
 scheduler (+ haifa)Jeff Law
 scheduler (+ haifa)Vladimir Makarov
-modulo-scheduler   Ayal Zaks   
+modulo-scheduler   Roman Zhuykov   
 reorg  Jeff Law
 caller-save.c  Jeff Law
 callgraph  Jan Hubicka 


[aarch64][RFA][rtl-optimization/87763] Fix insv_1 and insv_2 for aarch64

2019-04-22 Thread Jeff Law

This is a generalized version of the patch I sent last week.  This
variant fixes the remainder of the insv_1 and insv_2 failures on
aarch64.   In combination with an updated patch from Steve this should
be enough to fix 87763.




A couple notes.

First, it re-uses combine's make_field_assignment in the aarch64
backend.  So we don't have to duplicate any of that logic.  I scanned
make_field_assignment and its children to make sure it didn't use any
data that was only valid during the combine pass, but I could have
missed something.  This is one of those cases where encapsulating the
pass specific bits in a class really helps avoid problems...  Just
saying

Second, it relaxes the main insv pattern to allow an immediate in the
operand predicate, but forces it into a register during LRA.  I don't
generally like having predicates that are looser than the constraints,
but it really helps here.  Basically we want to see the constant field
we're going to insert.

Primarily looking for feedback from the aarch64 maintainers on the
pattern and Segher on the re-use of make_field_assignment.

I've bootstrapped and regression tested on aarch64 and aarch64_be as
well as x86_64, ppc64le, ppc64, i686, etc.  It's also been regression
tested on a nice variety of *-elf targets.

Segher, Richard/James OK for the trunk?

Jeff
diff --git a/gcc/combine.c b/gcc/combine.c
index 5616e6b1bac..03be306f5bc 100644
--- a/gcc/combine.c
+++ b/gcc/combine.c
@@ -449,8 +449,6 @@ static rtx expand_compound_operation (rtx);
 static const_rtx expand_field_assignment (const_rtx);
 static rtx make_extraction (machine_mode, rtx, HOST_WIDE_INT,
rtx, unsigned HOST_WIDE_INT, int, int, int);
-static int get_pos_from_mask (unsigned HOST_WIDE_INT,
- unsigned HOST_WIDE_INT *);
 static rtx canon_reg_for_combine (rtx, rtx);
 static rtx force_int_to_mode (rtx, scalar_int_mode, scalar_int_mode,
  scalar_int_mode, unsigned HOST_WIDE_INT, int);
@@ -459,7 +457,6 @@ static rtx force_to_mode (rtx, machine_mode,
 static rtx if_then_else_cond (rtx, rtx *, rtx *);
 static rtx known_cond (rtx, enum rtx_code, rtx, rtx);
 static int rtx_equal_for_field_assignment_p (rtx, rtx, bool = false);
-static rtx make_field_assignment (rtx);
 static rtx apply_distributive_law (rtx);
 static rtx distribute_and_simplify_rtx (rtx, int);
 static rtx simplify_and_const_int_1 (scalar_int_mode, rtx,
@@ -8569,7 +8566,7 @@ make_compound_operation (rtx x, enum rtx_code in_code)
 
*PLEN is set to the length of the field.  */
 
-static int
+int
 get_pos_from_mask (unsigned HOST_WIDE_INT m, unsigned HOST_WIDE_INT *plen)
 {
   /* Get the bit number of the first 1 bit from the right, -1 if none.  */
@@ -8584,7 +8581,8 @@ get_pos_from_mask (unsigned HOST_WIDE_INT m, unsigned 
HOST_WIDE_INT *plen)
   if (len <= 0)
 pos = -1;
 
-  *plen = len;
+  if (plen)
+*plen = len;
   return pos;
 }
 
@@ -9745,7 +9743,7 @@ rtx_equal_for_field_assignment_p (rtx x, rtx y, bool 
widen_x)
 
We only handle the most common cases.  */
 
-static rtx
+rtx
 make_field_assignment (rtx x)
 {
   rtx dest = SET_DEST (x);
diff --git a/gcc/config/aarch64/aarch64.md b/gcc/config/aarch64/aarch64.md
index 5a1894063a1..a2a0a86cb51 100644
--- a/gcc/config/aarch64/aarch64.md
+++ b/gcc/config/aarch64/aarch64.md
@@ -5473,7 +5473,7 @@
   [(set (zero_extract:GPI (match_operand:GPI 0 "register_operand" "+r")
  (match_operand 1 "const_int_operand" "n")
  (match_operand 2 "const_int_operand" "n"))
-   (match_operand:GPI 3 "register_operand" "r"))]
+   (match_operand:GPI 3 "aarch64_reg_or_imm" "r"))]
   "!(UINTVAL (operands[1]) == 0
  || (UINTVAL (operands[2]) + UINTVAL (operands[1])
 > GET_MODE_BITSIZE (mode)))"
@@ -5481,6 +5481,43 @@
   [(set_attr "type" "bfm")]
 )
 
+;; This must be split before register allocation and reloading as
+;; we need to verify it's actually an bitfield insertion by
+;; examining both immediate operands.  After reload we will lose
+;; knowledge of operands[3] constant status.
+;;
+(define_insn_and_split ""
+  [(set (match_operand:GPI 0 "register_operand" "=r")
+   (ior:GPI (and:GPI (match_operand:GPI 1 "register_operand" "0")
+ (match_operand:GPI 2 "const_int_operand" "n"))
+(match_operand:GPI 3 "const_int_operand" "n")))]
+  "(!reload_completed
+/* make_field_assignment doesn't handle subregs well.  */
+&& REG_P (operands[0])
+&& get_pos_from_mask (~UINTVAL (operands[2]), NULL) >= 0
+&& (UINTVAL (operands[2]) & UINTVAL (operands[3])) == 0)"
+  "#"
+  "&& 1"
+  [(const_int 0)]
+  "{
+ /* If we do not have an RMW operand, then copy the input
+   to the output before this insn.  Also modify the existing
+   insn in-place so we can have make_field_assignment actually
+   generate a suitable extraction.  */
+ if (!rtx_equal_p (operands[0], operands[1]))
+   {

Re: [RFC] D support for S/390

2019-04-22 Thread Iain Buclaw
On Thu, 18 Apr 2019 at 16:55, Robin Dapp  wrote:
>
> Hi Rainer,
>
> > I noticed you missed one piece of Iain's typeinfo.cc patch, btw.:
> >
> > diff --git a/gcc/d/typeinfo.cc b/gcc/d/typeinfo.cc
> > --- a/gcc/d/typeinfo.cc
> > +++ b/gcc/d/typeinfo.cc
> > @@ -886,7 +886,7 @@ public:
> >   if (cd->isCOMinterface ())
> > flags |= ClassFlags::isCOMclass;
> >
> > - this->layout_field (build_integer_cst (flags));
> > + this->layout_field (build_integer_cst (flags, d_uint_type));
> >
> >   /* void *deallocator;
> >  OffsetTypeInfo[] m_offTi;  (not implemented)
>
> thanks for catching this.  I amended the patch and ran the D test suite
> on S/390 and i386 one more time.
>
> For S/390 the number of FAILs is unchanged
>
> === libphobos Summary ===
>
> # of expected passes380
> # of unexpected failures30
>
> Some of the FAILs are still a little worrying, like tests for "-shared"
> which I haven't looked at at all so far.  Still, it's better than the
> >200 before.
>
> On i386 I see no FAILs with the patch.
>

Thanks, I've upstreamed and committed the dmd, druntime, and phobos
parts in r270485, r270490, and r270491 respectively.

Of the remaining patch, the sections module is now
libdruntime/gcc/sections/elf_shared.d.

Other than that, all looks OK.

--
Iain
---
diff --git a/gcc/d/typeinfo.cc b/gcc/d/typeinfo.cc
index dac66acdcd4..865fde2c863 100644
--- a/gcc/d/typeinfo.cc
+++ b/gcc/d/typeinfo.cc
@@ -830,7 +830,7 @@ public:
 flags |= ClassFlags::noPointers;

 Lhaspointers:
-this->layout_field (size_int (flags));
+this->layout_field (build_integer_cst (flags, d_uint_type));

 /* void *deallocator;  */
 tree ddtor = (cd->aggDelete)
@@ -886,7 +886,7 @@ public:
 if (cd->isCOMinterface ())
   flags |= ClassFlags::isCOMclass;

-this->layout_field (size_int (flags));
+this->layout_field (build_integer_cst (flags, d_uint_type));

 /* void *deallocator;
OffsetTypeInfo[] m_offTi;  (not implemented)
@@ -1019,7 +1019,7 @@ public:
 StructFlags::Type m_flags = 0;
 if (ti->hasPointers ())
   m_flags |= StructFlags::hasPointers;
-this->layout_field (size_int (m_flags));
+this->layout_field (build_integer_cst (m_flags, d_uint_type));

 /* void function(void*) xdtor;  */
 tree dtor = (sd->dtor) ? build_address (get_symbol_decl (sd->dtor))
@@ -1033,7 +1033,7 @@ public:
   this->layout_field (null_pointer_node);

 /* uint m_align;  */
-this->layout_field (size_int (ti->alignsize ()));
+this->layout_field (build_integer_cst (ti->alignsize (), d_uint_type));

 if (global.params.is64bit)
   {
@@ -1489,8 +1489,8 @@ create_typeinfo (Type *type, Module *mod)
   array_type_node, array_type_node,
   ptr_type_node, ptr_type_node,
   ptr_type_node, ptr_type_node,
-  size_type_node, ptr_type_node,
-  ptr_type_node, size_type_node,
+  d_uint_type, ptr_type_node,
+  ptr_type_node, d_uint_type,
   ptr_type_node, argtype, argtype, NULL);
 }
   t->vtinfo = TypeInfoStructDeclaration::create (t);
diff --git a/gcc/testsuite/gdc.dg/runnable.d b/gcc/testsuite/gdc.dg/runnable.d
index e36a2585027..8d9a5868831 100644
--- a/gcc/testsuite/gdc.dg/runnable.d
+++ b/gcc/testsuite/gdc.dg/runnable.d
@@ -890,12 +890,17 @@ struct S186
 }
 }

+static if (size_t.sizeof == 8)
+ size_t checkval = 0x0202;
+static if (size_t.sizeof == 4)
+ size_t checkval = 0x0202;
+
 void check186(in S186 obj, byte fieldB)
 {
 assert(obj.fieldA == 2);
 assert(obj.fieldB == 0);
 assert(obj.fieldC == 0);
-assert(obj._complete == 2);
+assert(obj._complete == checkval);
 assert(fieldB == 0);
 }

@@ -907,7 +912,7 @@ void test186a(size_t val)
 assert(obj.fieldA == 2);
 assert(obj.fieldB == 0);
 assert(obj.fieldC == 0);
-assert(obj._complete == 2);
+assert(obj._complete == checkval);

 obj = S186(val);
 check186(obj, obj.fieldB);
@@ -915,12 +920,12 @@ void test186a(size_t val)
 assert(obj.fieldA == 2);
 assert(obj.fieldB == 0);
 assert(obj.fieldC == 0);
-assert(obj._complete == 2);
+assert(obj._complete == checkval);
 }

 void test186()
 {
-test186a(2);
+test186a(checkval);
 }

 /**/
diff --git a/gcc/testsuite/gdc.dg/simd.d b/gcc/testsuite/gdc.dg/simd.d
index 812b36649aa..7d0aa0168c0 100644
--- a/gcc/testsuite/gdc.dg/simd.d
+++ b/gcc/testsuite/gdc.dg/simd.d
@@ -1576,7 +1576,10 @@ ubyte[16] foounsto()
 void testOPvecunsto()
 {
 auto a = foounsto();
-assert(a == [0, 0, 64, 65, 0, 0, 64, 65, 0, 0, 64, 65, 0, 0, 64, 65]);
+version(LittleEndian)
+assert(a == [0, 0, 64, 65, 0, 0, 64, 65, 0, 0, 64, 65, 0, 0, 64, 65]);
+version(BigEndian)
+assert(a == [65, 64, 0, 0, 65, 64, 0, 0, 65, 64, 0, 

[PATCH, libphobos] Committed merge with upstream phobos b538f758a.

2019-04-22 Thread Iain Buclaw
Hi,

This patch merges the libphobos library with upstream phobos b538f758a.

Fixes endian bugs in std.uni, and corrects unit-tests that failed on
version(BigEndian) targets, with good results on s390-linux-gnu.

Bootstrapped and regression tested on x86_64-linux-gnu.

Committed to trunk as r270491.

-- 
Iain
---
diff --git a/libphobos/src/MERGE b/libphobos/src/MERGE
index 3935c059403..e4807fbf437 100644
--- a/libphobos/src/MERGE
+++ b/libphobos/src/MERGE
@@ -1,4 +1,4 @@
-428460ddd8087fa28815e613ff04facb51108a7b
+b538f758a4d274b64751f80564b0207845cd018c
 
 The first line of this file holds the git revision number of the last
 merge done from the dlang/phobos repository.
diff --git a/libphobos/src/std/net/curl.d b/libphobos/src/std/net/curl.d
index e3ce527c303..32ba45ce2de 100644
--- a/libphobos/src/std/net/curl.d
+++ b/libphobos/src/std/net/curl.d
@@ -207,9 +207,7 @@ version (unittest)
 }
 catch (Throwable e)
 {
-import core.stdc.stdlib : exit, EXIT_FAILURE;
-stderr.writeln(e);
-exit(EXIT_FAILURE); // Bugzilla 7018
+stderr.writeln(e);  // Bugzilla 7018
 }
 }
 }
diff --git a/libphobos/src/std/outbuffer.d b/libphobos/src/std/outbuffer.d
index 1d594982cc1..d76ead2ed49 100644
--- a/libphobos/src/std/outbuffer.d
+++ b/libphobos/src/std/outbuffer.d
@@ -408,11 +408,17 @@ class OutBuffer
   {
 OutBuffer buf = new OutBuffer();
 "hello"w.copy(buf);
-assert(buf.toBytes() == "h\x00e\x00l\x00l\x00o\x00");
+version (LittleEndian)
+assert(buf.toBytes() == "h\x00e\x00l\x00l\x00o\x00");
+version (BigEndian)
+assert(buf.toBytes() == "\x00h\x00e\x00l\x00l\x00o");
   }
   {
 OutBuffer buf = new OutBuffer();
 "hello"d.copy(buf);
-assert(buf.toBytes() == "h\x00\x00\x00e\x00\x00\x00l\x00\x00\x00l\x00\x00\x00o\x00\x00\x00");
+version (LittleEndian)
+assert(buf.toBytes() == "h\x00\x00\x00e\x00\x00\x00l\x00\x00\x00l\x00\x00\x00o\x00\x00\x00");
+version (BigEndian)
+assert(buf.toBytes() == "\x00\x00\x00h\x00\x00\x00e\x00\x00\x00l\x00\x00\x00l\x00\x00\x00o");
   }
 }
diff --git a/libphobos/src/std/uni.d b/libphobos/src/std/uni.d
index 5f24ad16be5..0b3da58286c 100644
--- a/libphobos/src/std/uni.d
+++ b/libphobos/src/std/uni.d
@@ -770,6 +770,8 @@ version (X86)
 enum hasUnalignedReads = true;
 else version (X86_64)
 enum hasUnalignedReads = true;
+else version (SystemZ)
+enum hasUnalignedReads = true;
 else
 enum hasUnalignedReads = false; // better be safe then sorry
 
@@ -1245,8 +1247,13 @@ pure nothrow:
 
 T opIndex(size_t idx) inout
 {
-return __ctfe ? simpleIndex(idx) :
-cast(inout(T))(cast(U*) origin)[idx];
+T ret;
+version (LittleEndian)
+ret = __ctfe ? simpleIndex(idx) :
+cast(inout(T))(cast(U*) origin)[idx];
+else
+ret = simpleIndex(idx);
+return ret;
 }
 
 static if (isBitPacked!T) // lack of user-defined implicit conversion
@@ -1259,10 +1266,15 @@ pure nothrow:
 
 void opIndexAssign(TypeOfBitPacked!T val, size_t idx)
 {
-if (__ctfe)
-simpleWrite(val, idx);
+version (LittleEndian)
+{
+if (__ctfe)
+simpleWrite(val, idx);
+else
+(cast(U*) origin)[idx] = cast(U) val;
+}
 else
-(cast(U*) origin)[idx] = cast(U) val;
+simpleWrite(val, idx);
 }
 }
 else
diff --git a/libphobos/src/std/xml.d b/libphobos/src/std/xml.d
index 770c56fdbfb..13241f53613 100644
--- a/libphobos/src/std/xml.d
+++ b/libphobos/src/std/xml.d
@@ -2201,8 +2201,10 @@ private
 mixin Check!("Chars");
 
 dchar c;
-int n = -1;
-foreach (int i,dchar d; s)
+ptrdiff_t n = -1;
+// 'i' must not be smaller than size_t because size_t is used internally in
+// aApply.d and it will be cast e.g to (int *) which fails on BigEndian targets.
+foreach (size_t i, dchar d; s)
 {
 if (!isChar(d))
 {
@@ -2238,8 +2240,10 @@ private
 mixin Check!("Name");
 
 if (s.length == 0) fail();
-int n;
-foreach (int i,dchar c;s)
+ptrdiff_t n;
+// 'i' must not be smaller than size_t because size_t is used internally in
+// aApply.d and it will be cast e.g to (int *) which fails on BigEndian targets.
+foreach (size_t i, dchar c; s)
 {
 if (c == '_' || c == ':' || isLetter(c)) continue;
 if (i == 0) fail();


[PATCH, libphobos] Committed merge with upstream druntime 109f0f2e

2019-04-22 Thread Iain Buclaw
Hi,

This patch merges the libdruntime sub-directory with upstream druntime 109f0f2e.

Includes more backports for extern(C) bindings, notably for DragonFly
and FreeBSD platforms.  After adding the relevant compiler parts, it
should now be possible to turn on libphobos for x86_64 and i?38
dragronfly and freebsd configurations.

Bootstrapped and regression tested on x86_64-linux-gnu, with build
testing done on x86_64-freebsd11.2 and x86_64-dragonfly5.4.

Committed to trunk as r270490.

-- 
Iain
---
diff --git a/libphobos/libdruntime/MERGE b/libphobos/libdruntime/MERGE
index 405be921eb3..8a3790142cf 100644
--- a/libphobos/libdruntime/MERGE
+++ b/libphobos/libdruntime/MERGE
@@ -1,4 +1,4 @@
-4b2674b36b1f6aac75db2a5aa38d67d4be55a987
+109f0f2e11aaaddd2b158117928e10c3c4688870
 
 The first line of this file holds the git revision number of the last
 merge done from the dlang/druntime repository.
diff --git a/libphobos/libdruntime/core/runtime.d b/libphobos/libdruntime/core/runtime.d
index 1fd54407aa5..848b607ae69 100644
--- a/libphobos/libdruntime/core/runtime.d
+++ b/libphobos/libdruntime/core/runtime.d
@@ -464,10 +464,14 @@ extern (C) bool runModuleUnitTests()
 import core.sys.freebsd.execinfo;
 else version (NetBSD)
 import core.sys.netbsd.execinfo;
+else version (DragonFlyBSD)
+import core.sys.dragonflybsd.execinfo;
 else version (Windows)
 import core.sys.windows.stacktrace;
 else version (Solaris)
 import core.sys.solaris.execinfo;
+else version (CRuntime_UClibc)
+import core.sys.linux.execinfo;
 
 static if ( __traits( compiles, new LibBacktrace(0) ) )
 {
@@ -591,10 +595,14 @@ Throwable.TraceInfo defaultTraceHandler( void* ptr = null )
 import core.sys.freebsd.execinfo;
 else version (NetBSD)
 import core.sys.netbsd.execinfo;
+else version (DragonFlyBSD)
+import core.sys.dragonflybsd.execinfo;
 else version (Windows)
 import core.sys.windows.stacktrace;
 else version (Solaris)
 import core.sys.solaris.execinfo;
+else version (CRuntime_UClibc)
+import core.sys.linux.execinfo;
 
 // avoid recursive GC calls in finalizer, trace handlers should be made @nogc instead
 import core.memory : gc_inFinalizer;
@@ -709,6 +717,8 @@ Throwable.TraceInfo defaultTraceHandler( void* ptr = null )
 
 version (linux) enum enableDwarf = true;
 else version (FreeBSD) enum enableDwarf = true;
+else version (DragonFlyBSD) enum enableDwarf = true;
+else version (Darwin) enum enableDwarf = true;
 else enum enableDwarf = false;
 
 static if (enableDwarf)
@@ -832,6 +842,18 @@ Throwable.TraceInfo defaultTraceHandler( void* ptr = null )
 symEnd = eptr - buf.ptr;
 }
 }
+else version (DragonFlyBSD)
+{
+// format is: 0x <_D6module4funcAFZv+0x78> at module
+auto bptr = cast(char*) memchr( buf.ptr, '<', buf.length );
+auto eptr = cast(char*) memchr( buf.ptr, '+', buf.length );
+
+if ( bptr++ && eptr )
+{
+symBeg = bptr - buf.ptr;
+symEnd = eptr - buf.ptr;
+}
+}
 else version (Solaris)
 {
 // format is object'symbol+offset [pc]
@@ -896,7 +918,7 @@ Throwable.TraceInfo defaultTraceHandler( void* ptr = null )
 {
 static enum FIRSTFRAME = 0;
 }
-import core.sys.windows.windows : CONTEXT;
+import core.sys.windows.winnt : CONTEXT;
 auto s = new StackTrace(FIRSTFRAME, cast(CONTEXT*)ptr);
 return s;
 }
diff --git a/libphobos/libdruntime/core/stdc/math.d b/libphobos/libdruntime/core/stdc/math.d
index e93f8533342..9b190048934 100644
--- a/libphobos/libdruntime/core/stdc/math.d
+++ b/libphobos/libdruntime/core/stdc/math.d
@@ -2041,46 +2041,49 @@ else version (FreeBSD)
 {
   version (none) // < 8-CURRENT
   {
-realacosl(real x) { return acos(x); }
-realasinl(real x) { return asin(x); }
-pure realatanl(real x) { return atan(x); }
-realatan2l(real y, real x) { return atan2(y, x); }
-pure realcosl(real x) { return cos(x); }
-pure realsinl(real x) { return sin(x); }
-pure realtanl(real x) { return tan(x); }
-realexp2l(real x) { return exp2(x); }
-pure realfrexpl(real value, int* exp) { return frexp(value, exp); }
-int ilogbl(real x) { return ilogb(x); }
-realldexpl(real x, int exp) { return ldexp(x, exp); }
-reallogbl(real x) { return logb(x); }
-//realmodfl(real value, real *iptr); // nontrivial conversion
-realscalbnl(real x, int n) { return scalbn(x, n); }
-realscalblnl(real x, c_long n) { return 

Re: [PATCH] PR fortran/90166 -- check F2018:C1547

2019-04-22 Thread Dominique d'Humières



> Le 21 avr. 2019 à 18:02, Steve Kargl  a 
> écrit :
> 
> On Sat, Apr 20, 2019 at 09:51:11PM +0200, Dominique d'Humières wrote:
>> OK I missed the previous error. However I am still puzzled by (2):
>> 
>> +
>> +found outside of a module
>> 
> 
> Why are you puzzled?  Did you read the patch?  

I read

Index: gcc/testsuite/gfortran.dg/submodule_22.f08
===
--- gcc/testsuite/gfortran.dg/submodule_22.f08  (revision 270181)
+++ gcc/testsuite/gfortran.dg/submodule_22.f08  (working copy)
@@ -40,8 +40,10 @@ end
 
 submodule (mtop:submod:subsubmod) subsubsubmod ! { dg-error "Syntax error in 
SUBMODULE statement" }
 contains
-  module subroutine sub3
-r = 2.0
-s = 2.0
-  end subroutine sub3
+  module subroutine sub3  ! { dg-error "found outside of a module" }
+r = 2.0   ! { dg-error "Unexpected assignment" }
+s = 2.0   ! { dg-error "Unexpected assignment" }
+  end subroutine sub3 ! { dg-error "Expecting END PROGRAM statement" }
 end
+
+found outside of a module
 ^ I cannot relate this to any dejagnu command

Dominique

> The
> entire error message is 
> 
> +   gfc_error ("MODULE prefix at %C found outside of a module, "
> +"submodule, or interface");
> 
> In 
> 
>   program foo
> contains
> module subroutine foo
> end subroutine foo
>   end program foo
> 
> The "MODULE prefix" attached to "subroutine foo" is
> found outside of a module, a submodule, or interface.
> 
> -- 
> Steve



Re: [PATCH] Fix ARM exception handling (PR target/89093)

2019-04-22 Thread Iain Buclaw
On Mon, 22 Apr 2019 at 11:15, Jakub Jelinek  wrote:
>
> Not sure about libphobos D stuff, does it need to go through upstream and
> is libdruntime/gcc/deh.d compiled by compilers other than GDC?
>

It is not part of upstream, I could make that clearer in
libphobos/README.gcc if there's uncertainty.

> --- libphobos/libdruntime/gcc/deh.d (revision 270444)
> +++ libphobos/libdruntime/gcc/deh.d (working copy)
> @@ -28,6 +28,7 @@ import gcc.unwind;
>  import gcc.unwind.pe;
>  import gcc.builtins;
>  import gcc.config;
> +import gcc.attribute;
>
>  extern(C)
>  {
> @@ -519,10 +520,19 @@ extern(C) void _d_throw(Throwable object)
>  terminate("unwind error", __LINE__);
>  }
>
> +static if (GNU_ARM_EABI_Unwinder)
> +{
> +enum personality_fn_attributes = attribute("target", 
> ("general-regs-only"));
> +}
> +else
> +{
> +enum personality_fn_attributes = "";
> +}
>
>  /**
>   * Read and extract information from the LSDA (.gcc_except_table section).
>   */
> +@personality_fn_attributes
>  _Unwind_Reason_Code scanLSDA(const(ubyte)* lsda, _Unwind_Exception_Class 
> exceptionClass,
>   _Unwind_Action actions, _Unwind_Exception* 
> unwindHeader,
>   _Unwind_Context* context, _Unwind_Word cfa,
> @@ -772,6 +782,7 @@ int actionTableLookup(_Unwind_Action actions, _Unw
>   * Called when the personality function has found neither a cleanup or 
> handler.
>   * To support ARM EABI personality routines, that must also unwind the stack.
>   */
> +@personality_fn_attributes
>  _Unwind_Reason_Code CONTINUE_UNWINDING(_Unwind_Exception* unwindHeader, 
> _Unwind_Context* context)
>  {
>  static if (GNU_ARM_EABI_Unwinder)
> @@ -814,6 +825,7 @@ else
>  static if (GNU_ARM_EABI_Unwinder)
>  {
>  pragma(mangle, PERSONALITY_FUNCTION)
> +@personality_fn_attributes
>  extern(C) _Unwind_Reason_Code gdc_personality(_Unwind_State state,
>_Unwind_Exception* 
> unwindHeader,
>_Unwind_Context* context)
> @@ -873,6 +885,7 @@ else
>  }
>  }
>
> +@personality_fn_attributes
>  private _Unwind_Reason_Code __gdc_personality(_Unwind_Action actions,
>_Unwind_Exception_Class 
> exceptionClass,
>_Unwind_Exception* 
> unwindHeader,

No problem with this part from myself.

-- 
Iain


[PATCH] Fix ARM exception handling (PR target/89093)

2019-04-22 Thread Jakub Jelinek
Hi!

As detailed in the PR, unlike most other targets, on ARM EABI the floating
point registers are saved lazily, when EH personality routine calls
__gnu_unwind_frame (usually in the CONTINUE_UNWINDING macro).
That means the unwinder itself and the personality routines (and whatever
other functions those call in the path to CONTINUE_UNWINDING) must be
compiled so that it doesn't use floating point registers.  Calling some
function that saves those on entry and restores on exit is fine, but calling
some function which saves those on entry and then calls __gnu_unwind_frame
and then restores on exit is not fine.
In 8.x and earlier we were just lucky that the RA when compiling those
didn't decide to use any of those registers, but starting with the combiner
hard register changes we are no longer so lucky.

The following patch introduces -mgeneral-regs-only option and
general-regs-only target attribute for ARM (similarly to how other targets
like AArch64 and x86), changes the ARM unwinder to be compiled with that
and changes the personality routines of all languages so that either just
the personality routine, or whatever other routines called by personality
routines that call directly or indirectly __gnu_unwind_frame to be compiled
that way.

Bootstrapped/regtested on armv7hl-linux-gnueabi (and x86_64-linux to make
sure it compiles on other targets too).

Ok for trunk?

While the libgo changes are included in the patch, I think those need to go
through go upstream and will likely need some changes if that code can be
compiled by earlier GCC versions or other compilers.

Not sure about libphobos D stuff, does it need to go through upstream and
is libdruntime/gcc/deh.d compiled by compilers other than GDC?

The Ada changes need those guards because the file is compiled by both
the system compiler and by the newly built compilers; when compiled by
system compiler, as the FE is built with -fno-exceptions I'd hope the EH
stuff isn't really used there and at least until GCC 9.1 is released we have
the issue that the system compiler could be some earlier GCC 9.0.1 snapshot
which doesn't support general-regs-only.

2019-04-22  Ramana Radhakrishnan  
Bernd Edlinger  
Jakub Jelinek  

PR target/89093
* config/arm/arm.c (aapcs_vfp_is_call_or_return_candidate): Diagnose
if used with general-regs-only.
(arm_conditional_register_usage): Don't add non-general regs if
general-regs-only.
(arm_valid_target_attribute_rec): Handle general-regs-only.
* config/arm/arm.h (TARGET_HARD_FLOAT): Return false if
general-regs-only.
(TARGET_HARD_FLOAT_SUB): Define.
(TARGET_SOFT_FLOAT): Define as negation of TARGET_HARD_FLOAT_SUB.
(TARGET_REALLY_IWMMXT): Add && !TARGET_GENERAL_REGS_ONLY.
(TARGET_REALLY_IWMMXT2): Likewise.
* config/arm/arm.opt: Add -mgeneral-regs-only.
* doc/extend.texi: Document ARM general-regs-only target.
* doc/invoke.texi: Document ARM -mgeneral-regs-only.
gcc/ada/
* raise-gcc.c (TARGET_ATTRIBUTE): Define.
(continue_unwind, personality_body, PERSONALITY_FUNCTION): Add
TARGET_ATTRIBUTE.
libgcc/
* config/arm/pr-support.c: Add #pragma GCC target("general-regs-only").
* config/arm/unwind-arm.c: Likewise.
* unwind-c.c (PERSONALITY_FUNCTION): Add general-regs-only target
attribute for ARM.
libobjc/
* exception.c (PERSONALITY_FUNCTION): Add general-regs-only target
attribute for ARM.
libphobos/
* libdruntime/gcc/deh.d: Import gcc.attribute.
(personality_fn_attributes): New enum.
(scanLSDA, CONTINUE_UNWINDING, gdc_personality, __gdc_personality):
Add @personality_fn_attributes.
libstdc++-v3/
* libsupc++/eh_personality.cc (PERSONALITY_FUNCTION): Add
general-regs-only target attribute for ARM.
libgo/
* runtime/go-unwind.c (PERSONALITY_FUNCTION,
__gccgo_personality_dummy): Add general-regs-only target
attribute for ARM.

--- gcc/config/arm/arm.c(revision 270444)
+++ gcc/config/arm/arm.c(working copy)
@@ -6112,6 +6112,11 @@ aapcs_vfp_is_call_or_return_candidate (enum arm_pc
 return false;
 
   *base_mode = new_mode;
+
+  if (TARGET_GENERAL_REGS_ONLY)
+error ("argument of type %qT not permitted with -mgeneral-regs-only",
+  type);
+
   return true;
 }
 
@@ -28404,7 +28409,7 @@ arm_conditional_register_usage (void)
}
 }
 
-  if (TARGET_REALLY_IWMMXT)
+  if (TARGET_REALLY_IWMMXT && !TARGET_GENERAL_REGS_ONLY)
 {
   regno = FIRST_IWMMXT_GR_REGNUM;
   /* The 2002/10/09 revision of the XScale ABI has wCG0
@@ -30878,6 +30883,9 @@ arm_valid_target_attribute_rec (tree args, struct
   else if (!strcmp (q, "arm"))
opts->x_target_flags &= ~MASK_THUMB;
 
+  else if (!strcmp (q, "general-regs-only"))
+   opts->x_target_flags |= MASK_GENERAL_REGS_ONLY;
+
   else if (!strncmp (q, 

Re: [Patch, fortran] PR57284 - [OOP] ICE with find_array_spec for polymorphic arrays

2019-04-22 Thread Paul Richard Thomas
Thanks, Steve.

Committed as revision 270489.

Paul

On Fri, 19 Apr 2019 at 18:28, Steve Kargl
 wrote:
>
> On Fri, Apr 19, 2019 at 06:19:00PM +0100, Paul Richard Thomas wrote:
> > The part of this patch in resolve.c had essentially already been
> > sorted out by Tobias Burnus in comment #2 of the PR. I suspect that he
> > must have been put off the trail by the segfault that occurred when
> > this was implemented. In the end, the reason for the segfault is quite
> > straight forward and comes about because the temporary declarations
> > representing class actual arguments cause gfc_conv_component_ref to
> > barf, when porcessing the _data component. However, they are amenable
> > to gfc_class_data_get and so this is used in the fix.
> >
> > Bootstrapped and regtested on FC29/x86_64 - OK for trunk?
> >
>
> Looks good to me.  Where are we in the release cycle?
> Do you need release manager approval to apply the
> patch?
>
> --
> Steve



-- 
"If you can't explain it simply, you don't understand it well enough"
- Albert Einstein