Re: [PATCH 3/6] contrib: Add pru-elf to config-list.mk
On неделя, 31 май 2020 г. 13:17:21 EEST Iain Buclaw wrote: > Support for the TI PRU target was added in SVN r272202. > > Judging from the testsuite results posted at the time[1], the only > supported target is pru-elf. > > OK? > > Regards > Iain. > > [1]: http://dinux.eu/gnupru/testresults/index.html > > --- Thank you. I confirm that pru-elf is the only supported target. My bot also posts daily to gcc-testresults [1]. Regards, Dimitar [1] https://gcc.gnu.org/pipermail/gcc-testresults/2020-May/560070.html
Re: [PATCH v2 0/5] Updates for PRU backend
On вторник, 5 май 2020 г. 19:00:29 EEST Jeff Law wrote: > On Sun, 2020-05-03 at 19:11 +0300, Dimitar Dimitrov wrote: > > One of the changes frees a previously fixed register, per > > ABI clarification from TI, for local usage from function. > > The change is backwards compatible. > > > > Rest of changes are cleanups. > > > > Testsuite did not reveal any regressions. > > > > Dimitar Dimitrov (5): > > PRU: Fix comment to avoid fall through warning > > PRU: Simplify machine description > > PRU: Fix R3.w0 register class > > testsuite: pru: Add clobber test > > PRU: Remove TARGET_HARD_REGNO_CALL_PART_CLOBBERED > > These are all OK for the trunk. Your call if you want to backport any of > these changes. Committed to master. I don't think it's worth bothering the release team with those cleanups. Thanks, Dimitar
[PATCH v2 3/5] PRU: Fix R3.w0 register class
TI has clarified [1] that R3.w0 is caller saved, so allow compiler to
use it. This is safe change because older GCC versions treat R3.w0 as
fixed register and never use it.
[1] https://e2e.ti.com/support/tools/ccs/f/81/t/849993
gcc/ChangeLog:
2020-05-03 Dimitar Dimitrov
* config/pru/pru.h: Mark R3.w0 as caller saved.
gcc/testsuite/ChangeLog:
2020-05-03 Dimitar Dimitrov
* gcc.target/pru/lra-framepointer-fragmentation-1.c: Update test to
take into account additional available registers.
* gcc.target/pru/lra-framepointer-fragmentation-2.c: Ditto.
Signed-off-by: Dimitar Dimitrov
---
gcc/config/pru/pru.h | 11 ---
.../gcc.target/pru/lra-framepointer-fragmentation-1.c | 5 +++--
.../gcc.target/pru/lra-framepointer-fragmentation-2.c | 10 ++
3 files changed, 17 insertions(+), 9 deletions(-)
diff --git a/gcc/config/pru/pru.h b/gcc/config/pru/pru.h
index ea6ee109184..314e877a5f9 100644
--- a/gcc/config/pru/pru.h
+++ b/gcc/config/pru/pru.h
@@ -125,7 +125,8 @@
1 r1 Caller Saved. Also used as a temporary by function.
profiler and function prologue/epilogue.
2 r2 spStack Pointer.
- 3* r3.w0raReturn Address (16-bit).
+ 3* r3.w0 Caller saved.
+ 3* r3.w2raReturn Address (16-bit).
4 r4 fpFrame Pointer, also called Argument Pointer in ABI.
5-13 r5-r13 Callee Saved Registers.
14-29 r14-r29Register Arguments. Caller Saved Registers.
@@ -152,7 +153,7 @@
#define FIXED_REGISTERS\
{\
-/* 0 */ 0,0,0,0, 0,0,0,0, 1,1,1,1, 1,1,1,1, \
+/* 0 */ 0,0,0,0, 0,0,0,0, 1,1,1,1, 0,0,1,1, \
/* 4 */ 0,0,0,0, 0,0,0,0, 0,0,0,0, 0,0,0,0, \
/* 8 */ 0,0,0,0, 0,0,0,0, 0,0,0,0, 0,0,0,0, \
/* 12 */ 0,0,0,0, 0,0,0,0, 0,0,0,0, 0,0,0,0, \
@@ -178,10 +179,13 @@
}
#define PRU_SEQ_R(X) (X) * 4 + 0, (X) * 4 + 1, (X) * 4 + 2, (X) * 4 + 3
+#define PRU_SEQ_R_W0(X) (X) * 4 + 0, (X) * 4 + 1
+#define PRU_SEQ_R_W2(X) (X) * 4 + 2, (X) * 4 + 3
#define REG_ALLOC_ORDER
\
{\
/* Call-clobbered, yet not used for parameters. */
\
PRU_SEQ_R (0), PRU_SEQ_R ( 1),\
+PRU_SEQ_R_W0 (3), \
\
PRU_SEQ_R (14), PRU_SEQ_R (15), PRU_SEQ_R (16), PRU_SEQ_R (17),\
PRU_SEQ_R (18), PRU_SEQ_R (19), PRU_SEQ_R (20), PRU_SEQ_R (21),\
@@ -193,7 +197,8 @@
PRU_SEQ_R (13),\
\
PRU_SEQ_R ( 4),\
-PRU_SEQ_R ( 2), PRU_SEQ_R ( 3),\
+PRU_SEQ_R ( 2),\
+PRU_SEQ_R_W2 (3), \
\
/* I/O and virtual registers. */ \
PRU_SEQ_R (30), PRU_SEQ_R (31), PRU_SEQ_R (32), PRU_SEQ_R (33),\
diff --git a/gcc/testsuite/gcc.target/pru/lra-framepointer-fragmentation-1.c
b/gcc/testsuite/gcc.target/pru/lra-framepointer-fragmentation-1.c
index ee1288fc2ae..b2a49e3a9e1 100644
--- a/gcc/testsuite/gcc.target/pru/lra-framepointer-fragmentation-1.c
+++ b/gcc/testsuite/gcc.target/pru/lra-framepointer-fragmentation-1.c
@@ -12,6 +12,7 @@ uint64_t __attribute__((noinline)) test(uint64_t a, uint64_t
b,
uint64_t l1 = 0x12345678, l2 = 0x87654321, l3 = 1001, l4 = 1002;
uint64_t l5 = 1004;
uint32_t l6 = 2005;
+ uint16_t s1 = 4321;
uint8_t c1 = 101, c2 = 102;
/* The numerous dummy asm input operands create just
@@ -24,10 +25,10 @@ uint64_t __attribute__((noinline)) test(uint64_t a,
uint64_t b,
: "0" (l1), "r" (a), "r"(b),
"r"(c), "r"(d), "r"(e), "r"(f),
"r"(g), "r"(h), "r"(l2),
- "r"(c1), "r"(c2),
+ "r"(c1), "r"(c2), "r"(s1),
"r"(l3), "r"(l4), "r"(l5), "r"(l6));
- global = a+b+c+d+e+f+g+h + c1+c2 + l2;
+ global = a+b+c+d+e+f+g+h + s1 + c1+c2 + l2;
return l1;
}
diff --git a/gcc/testsuite/gcc.target/pru/lra-framepointer-fragmentation-2.c
b/gcc/testsuite/gcc.target/pru/lra-framepointer-fragmentation-2.c
index 6c98e9bf13b..2f910295f2a 100644
--- a/gcc/testsuite/gcc.target/
[PATCH v2 2/5] PRU: Simplify machine description
Use the new @insn syntax for simpler gen_* invocation.
gcc/ChangeLog:
2020-05-03 Dimitar Dimitrov
* config/pru/pru.c (pru_emit_doloop): Use new gen_doloop_end_internal
and gen_doloop_begin_internal.
(pru_reorg_loop): Use gen_pruloop with mode.
* config/pru/pru.md: Use new @insn syntax.
Signed-off-by: Dimitar Dimitrov
---
gcc/config/pru/pru.c | 44 +--
gcc/config/pru/pru.md | 6 +++---
2 files changed, 16 insertions(+), 34 deletions(-)
diff --git a/gcc/config/pru/pru.c b/gcc/config/pru/pru.c
index e20b41c6d1f..45b18ed6fe4 100644
--- a/gcc/config/pru/pru.c
+++ b/gcc/config/pru/pru.c
@@ -2345,26 +2345,14 @@ pru_emit_doloop (rtx *operands, int is_end)
tag = GEN_INT (cfun->machine->doloop_tags - 1);
machine_mode opmode = GET_MODE (operands[0]);
+ gcc_assert (opmode == HImode || opmode == SImode);
+
if (is_end)
-{
- if (opmode == HImode)
- emit_jump_insn (gen_doloop_end_internalhi (operands[0],
- operands[1], tag));
- else if (opmode == SImode)
- emit_jump_insn (gen_doloop_end_internalsi (operands[0],
- operands[1], tag));
- else
- gcc_unreachable ();
-}
+emit_jump_insn (gen_doloop_end_internal (opmode, operands[0],
+operands[1], tag));
else
-{
- if (opmode == HImode)
- emit_insn (gen_doloop_begin_internalhi (operands[0], operands[0], tag));
- else if (opmode == SImode)
- emit_insn (gen_doloop_begin_internalsi (operands[0], operands[0], tag));
- else
- gcc_unreachable ();
-}
+emit_insn (gen_doloop_begin_internal (opmode, operands[0],
+ operands[0], tag));
}
@@ -2607,6 +2595,7 @@ pru_reorg_loop (rtx_insn *insns)
/* Case (1) or (2). */
rtx_code_label *repeat_label;
rtx label_ref;
+ rtx loop_rtx;
/* Create a new label for the repeat insn. */
repeat_label = gen_label_rtx ();
@@ -2616,23 +2605,16 @@ pru_reorg_loop (rtx_insn *insns)
will utilize an internal for the PRU core LOOP register. */
label_ref = gen_rtx_LABEL_REF (VOIDmode, repeat_label);
machine_mode loop_mode = GET_MODE (loop->begin->loop_count);
- if (loop_mode == HImode)
- emit_insn_before (gen_pruloophi (loop->begin->loop_count, label_ref),
- loop->begin->insn);
- else if (loop_mode == SImode)
- {
- rtx loop_rtx = gen_pruloopsi (loop->begin->loop_count, label_ref);
- emit_insn_before (loop_rtx, loop->begin->insn);
- }
- else if (loop_mode == VOIDmode)
+ if (loop_mode == VOIDmode)
{
gcc_assert (CONST_INT_P (loop->begin->loop_count));
gcc_assert (UBYTE_INT ( INTVAL (loop->begin->loop_count)));
- rtx loop_rtx = gen_pruloopsi (loop->begin->loop_count, label_ref);
- emit_insn_before (loop_rtx, loop->begin->insn);
+ loop_mode = SImode;
}
- else
- gcc_unreachable ();
+ gcc_assert (loop_mode == HImode || loop_mode == SImode);
+ loop_rtx = gen_pruloop (loop_mode, loop->begin->loop_count, label_ref);
+ emit_insn_before (loop_rtx, loop->begin->insn);
+
delete_insn (loop->begin->insn);
/* Insert the repeat label before the first doloop_end.
diff --git a/gcc/config/pru/pru.md b/gcc/config/pru/pru.md
index 67624e2aac0..2f1bc21f025 100644
--- a/gcc/config/pru/pru.md
+++ b/gcc/config/pru/pru.md
@@ -887,7 +887,7 @@ (define_insn
"cbranch_qbbx_4"
;; This insn is volatile because we'd like it to stay in its original
;; position, just before the loop header. If it stays there, we might
;; be able to convert it into a "loop" insn.
-(define_insn "doloop_begin_internal"
+(define_insn "@doloop_begin_internal"
[(set (match_operand:HISI 0 "register_operand" "=r")
(unspec_volatile:HISI
[(match_operand:HISI 1 "reg_or_ubyte_operand" "rI")
@@ -909,7 +909,7 @@ (define_expand "doloop_begin"
; Note: "JUMP_INSNs and CALL_INSNs are not allowed to have any output
; reloads;". Hence this insn must be prepared for a counter that is
; not a register.
-(define_insn "doloop_end_internal"
+(define_insn "@doloop_end_internal"
[(set (pc)
(if_then_else (ne (match_operand:HISI 0 "nonimmediate_operand" "+r,*m")
(const_int 1))
@@ -951,7 +951,7 @@ (define_expand "doloop_end"
DONE;
})
-(define_insn "pruloop"
+(define_insn "@pruloop"
[(set (reg:HISI LOOPCNTR_REGNUM)
(unspec:HISI [(match_operand:HISI 0 "reg_or_ubyte_operand" "rI")
(label_ref (match_operand 1))]
--
2.20.1
[PATCH v2 5/5] PRU: Remove TARGET_HARD_REGNO_CALL_PART_CLOBBERED
Per clarification in [1], macro is supposed to check for partial
clobbering of single HW registers. Since PRU declares only 8-bit
HW registers, and ABI does not define individual bit clobbering,
it is safe to remove the implementation.
[1] https://gcc.gnu.org/ml/gcc-patches/2019-09/msg00778.html
gcc/ChangeLog:
2020-05-03 Dimitar Dimitrov
* config/pru/pru.c (pru_hard_regno_call_part_clobbered): Remove.
(TARGET_HARD_REGNO_CALL_PART_CLOBBERED): Remove.
Signed-off-by: Dimitar Dimitrov
---
gcc/config/pru/pru.c | 34 --
1 file changed, 34 deletions(-)
diff --git a/gcc/config/pru/pru.c b/gcc/config/pru/pru.c
index 45b18ed6fe4..a715f6b07ce 100644
--- a/gcc/config/pru/pru.c
+++ b/gcc/config/pru/pru.c
@@ -556,37 +556,6 @@ pru_hard_regno_scratch_ok (unsigned int regno)
}
-/* Implement TARGET_HARD_REGNO_CALL_PART_CLOBBERED. */
-
-static bool
-pru_hard_regno_call_part_clobbered (unsigned, unsigned regno,
- machine_mode mode)
-{
- HARD_REG_SET caller_saved_set;
- HARD_REG_SET callee_saved_set;
-
- CLEAR_HARD_REG_SET (caller_saved_set);
- CLEAR_HARD_REG_SET (callee_saved_set);
-
- /* r0 and r1 are caller saved. */
- add_range_to_hard_reg_set (_saved_set, 0, 2 * 4);
-
- add_range_to_hard_reg_set (_saved_set, FIRST_ARG_REGNUM,
-LAST_ARG_REGNUM + 1 - FIRST_ARG_REGNUM);
-
- /* Treat SP as callee saved. */
- add_range_to_hard_reg_set (_saved_set, STACK_POINTER_REGNUM, 4);
-
- /* r3 to r13 are callee saved. */
- add_range_to_hard_reg_set (_saved_set, FIRST_CALLEE_SAVED_REGNUM,
-LAST_CALEE_SAVED_REGNUM + 1
-- FIRST_CALLEE_SAVED_REGNUM);
-
- return overlaps_hard_reg_set_p (caller_saved_set, mode, regno)
-&& overlaps_hard_reg_set_p (callee_saved_set, mode, regno);
-}
-
-
/* Worker function for `HARD_REGNO_RENAME_OK'.
Return nonzero if register OLD_REG can be renamed to register NEW_REG. */
@@ -2935,9 +2904,6 @@ pru_unwind_word_mode (void)
#undef TARGET_HARD_REGNO_SCRATCH_OK
#define TARGET_HARD_REGNO_SCRATCH_OK pru_hard_regno_scratch_ok
-#undef TARGET_HARD_REGNO_CALL_PART_CLOBBERED
-#define TARGET_HARD_REGNO_CALL_PART_CLOBBERED \
- pru_hard_regno_call_part_clobbered
#undef TARGET_FUNCTION_ARG
#define TARGET_FUNCTION_ARG pru_function_arg
--
2.20.1
[PATCH v2 4/5] testsuite: pru: Add clobber test
gcc/testsuite/ChangeLog:
2020-05-03 Dimitar Dimitrov
* gcc.target/pru/clobber-sp.c: New test.
Signed-off-by: Dimitar Dimitrov
---
gcc/testsuite/gcc.target/pru/clobber-sp.c | 24 +++
1 file changed, 24 insertions(+)
create mode 100644 gcc/testsuite/gcc.target/pru/clobber-sp.c
diff --git a/gcc/testsuite/gcc.target/pru/clobber-sp.c
b/gcc/testsuite/gcc.target/pru/clobber-sp.c
new file mode 100644
index 000..3cc0a60bfc9
--- /dev/null
+++ b/gcc/testsuite/gcc.target/pru/clobber-sp.c
@@ -0,0 +1,24 @@
+/* Test inline ASM clobber for SP register */
+
+/* { dg-do compile } */
+/* { dg-options "-O1" } */
+
+/* -O1 in the options is significant. */
+
+extern void abort (void);
+
+int
+test1 (void)
+{
+ int res;
+
+ /* { dg-warning "listing the stack pointer register 'sp' in a clobber list
is deprecated" "" { target pru-*-* } .+2 } */
+ /* { dg-message "note: the value of the stack pointer after an 'asm'
statement must be the same as it was before the statement" "" { target pru-*-*
} .+1 } */
+ asm volatile(
+ "ldi %[res], 101 \n\t"
+ : [res] "=r" (res)
+ :
+ : "sp");
+
+ return res;
+}
--
2.20.1
[PATCH v2 1/5] PRU: Fix comment to avoid fall through warning
gcc/ChangeLog: 2020-05-03 Dimitar Dimitrov * config/pru/pru.c (pru_print_operand): Fix fall through comment. Signed-off-by: Dimitar Dimitrov --- gcc/config/pru/pru.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/gcc/config/pru/pru.c b/gcc/config/pru/pru.c index 37394c5e3b9..e20b41c6d1f 100644 --- a/gcc/config/pru/pru.c +++ b/gcc/config/pru/pru.c @@ -1650,7 +1650,7 @@ pru_print_operand (FILE *file, rtx op, int letter) return; case 'Q': cond = swap_condition (cond); - /* Fall through to reverse. */ + /* Fall through. */ case 'R': fprintf (file, "%s", pru_comparison_str (reverse_condition (cond))); return; -- 2.20.1
[PATCH v2 0/5] Updates for PRU backend
One of the changes frees a previously fixed register, per ABI clarification from TI, for local usage from function. The change is backwards compatible. Rest of changes are cleanups. Testsuite did not reveal any regressions. Dimitar Dimitrov (5): PRU: Fix comment to avoid fall through warning PRU: Simplify machine description PRU: Fix R3.w0 register class testsuite: pru: Add clobber test PRU: Remove TARGET_HARD_REGNO_CALL_PART_CLOBBERED gcc/config/pru/pru.c | 80 --- gcc/config/pru/pru.h | 11 ++- gcc/config/pru/pru.md | 6 +- gcc/testsuite/gcc.target/pru/clobber-sp.c | 24 ++ .../pru/lra-framepointer-fragmentation-1.c| 5 +- .../pru/lra-framepointer-fragmentation-2.c| 10 ++- 6 files changed, 58 insertions(+), 78 deletions(-) create mode 100644 gcc/testsuite/gcc.target/pru/clobber-sp.c -- 2.20.1
Re: Analyzer committed to master (was Re: Analyzer status)
On Wed, 15.01.2020, 14:30:43 EET Rainer Orth wrote: > Hi David, > > > I've rebased and squashed the analyzer patch kit and squashed patch 2 > > of the hash_table fix into it, and re-tested it successfully, so I've > > pushed it to master (as 757bf1dff5e8cee34c0a75d06140ca972bfecfa7). > > > > I'm going to work through the various followup patches I had on my > > branch and re-test and push to master those that seem appropriate. > > I'm seeing quite a number of failures on Solaris (both sparc and x86), > but also some on 32-bit Linux/x86: > > Running target unix/-m32 > +FAIL: gcc.dg/analyzer/data-model-1.c (test for warnings, line 610) > +FAIL: gcc.dg/analyzer/data-model-1.c (test for warnings, line 611) > +FAIL: gcc.dg/analyzer/data-model-1.c (test for warnings, line 615) > +FAIL: gcc.dg/analyzer/data-model-1.c (test for warnings, line 616) > +FAIL: gcc.dg/analyzer/data-model-1.c (test for warnings, line 657) > +FAIL: gcc.dg/analyzer/data-model-1.c (test for warnings, line 658) > +FAIL: gcc.dg/analyzer/data-model-1.c (test for warnings, line 662) > +FAIL: gcc.dg/analyzer/data-model-1.c (test for warnings, line 663) > +FAIL: gcc.dg/analyzer/data-model-1.c (test for warnings, line 705) > +FAIL: gcc.dg/analyzer/data-model-1.c (test for warnings, line 706) > +FAIL: gcc.dg/analyzer/data-model-1.c (test for warnings, line 710) > +FAIL: gcc.dg/analyzer/data-model-1.c (test for warnings, line 711) > +FAIL: gcc.dg/analyzer/data-model-1.c (test for warnings, line 753) > +FAIL: gcc.dg/analyzer/data-model-1.c (test for warnings, line 754) > +FAIL: gcc.dg/analyzer/data-model-1.c (test for warnings, line 758) > +FAIL: gcc.dg/analyzer/data-model-1.c (test for warnings, line 759) > +FAIL: gcc.dg/analyzer/data-model-1.c (test for excess errors) > I see those errors on PRU and AVR backends. Regards, Dimitar
Re: [PATCH] testsuite: Fix array size in gcc.dg/strlenopt-66.c
On Thu, 21 Nov 2019, 20:09:23 EET Martin Sebor wrote:
> On 11/21/19 10:11 AM, Dimitar Dimitrov wrote:
> > One of the passed arguments is actually a string with size 4 ("123").
> > Adjust the destination buffer accordingly.
> >
> > gcc/testsuite/ChangeLog:
> >
> > 2019-11-21 Dimitar Dimitrov
> >
> > * gcc.dg/strlenopt-66.c (test_strncmp_a4_cond_a5_a3_n): Fix array size.
> >
> > Signed-off-by: Dimitar Dimitrov
> > ---
> >
> > gcc/testsuite/gcc.dg/strlenopt-66.c | 2 +-
> > 1 file changed, 1 insertion(+), 1 deletion(-)
> >
> > diff --git a/gcc/testsuite/gcc.dg/strlenopt-66.c
> > b/gcc/testsuite/gcc.dg/strlenopt-66.c index 4ba31a845b0..3de22c18f4f
> > 100644
> > --- a/gcc/testsuite/gcc.dg/strlenopt-66.c
> > +++ b/gcc/testsuite/gcc.dg/strlenopt-66.c
> > @@ -88,7 +88,7 @@ __attribute__ ((noclone, noinline, noipa)) void
> >
> > test_strncmp_a4_cond_a5_a3_n (const char *s1, const char *s2, const char
> > *s3,>
> > int i, unsigned n)
> >
> > {
> >
> > - char a3[3], a4[4], a5[5];
> > + char a3[4], a4[4], a5[5];
>
> That does look like a mistake. Thanks for bringing it up!
>
> The purpose of the test is to exercise strncmp calls whose first
> two arguments involve arrays of all different sizes (and strings
> of different lengths stored in them). In this function,
> the operands of the conditional expression should also be of
> different sizes than the first argument: one should be smaller
> and the other bigger.
>
> So to keep the test doing what it's meant to do I think we need
> to change lengths of the strings passed to the function to fit
> the arrays rather than the sizes of the locals. (Adding even
> more calls to cover all the permutations of lengths and sizes
> would be a further improvement.)
>
> If this sounds too elaborate let me know and I'll fix the test.
>
> Martin
Hi,
I admit I'm a bit confused, so I'll let you fix the test as you see fit.
With "noipa" function attribute the compiler should not be able to propagate
the string constants, so a3/a4/a5 string lengths are unknown when strncmp is
invoked. I don't understand how PR90626 would take effect in such case.
Also, I fail to see how the different sizes of local arrays influence the
test.
Regards,
Dimitar
[PATCH] testsuite: Fix array size in gcc.dg/strlenopt-66.c
One of the passed arguments is actually a string with size 4 ("123").
Adjust the destination buffer accordingly.
gcc/testsuite/ChangeLog:
2019-11-21 Dimitar Dimitrov
* gcc.dg/strlenopt-66.c (test_strncmp_a4_cond_a5_a3_n): Fix array size.
Signed-off-by: Dimitar Dimitrov
---
gcc/testsuite/gcc.dg/strlenopt-66.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/gcc/testsuite/gcc.dg/strlenopt-66.c
b/gcc/testsuite/gcc.dg/strlenopt-66.c
index 4ba31a845b0..3de22c18f4f 100644
--- a/gcc/testsuite/gcc.dg/strlenopt-66.c
+++ b/gcc/testsuite/gcc.dg/strlenopt-66.c
@@ -88,7 +88,7 @@ __attribute__ ((noclone, noinline, noipa)) void
test_strncmp_a4_cond_a5_a3_n (const char *s1, const char *s2, const char *s3,
int i, unsigned n)
{
- char a3[3], a4[4], a5[5];
+ char a3[4], a4[4], a5[5];
strcpy (a3, s1);
strcpy (a4, s2);
strcpy (a5, s3);
--
2.20.1
Re: [PATCH] Support multiple registers for the frame pointer
On Sat, 2 Nov 2019, 19:28:38 EET Kwok Cheung Yeung wrote:
> The AMD GCN architecture uses 64-bit pointers, but the scalar registers
> are 32-bit wide, so pointers must reside in a pair of registers.
...
> Bootstrapped on x86_64 and tested with no regressions, which is not
> surprising as nothing different happens when the FP fits into a single
> register. I believe this is true for the 64-bit variants of the more
> popular architectures as well (ARM, RS6000, MIPS, Sparc). Are there any
> other architectures similar to GCN (i.e. 64-bit pointers with 32-bit GPRs)?
Yes. PRU uses four 8-bit HW registers to hold 32-bit pointers.
>
...
> diff --git a/gcc/ira.c b/gcc/ira.c
> index 9f8da67..25e9359 100644
> --- a/gcc/ira.c
> +++ b/gcc/ira.c
> @@ -515,7 +515,13 @@ setup_alloc_regs (bool use_hard_frame_p)
> #endif
> no_unit_alloc_regs = fixed_nonglobal_reg_set;
> if (! use_hard_frame_p)
> -SET_HARD_REG_BIT (no_unit_alloc_regs, HARD_FRAME_POINTER_REGNUM);
> +{
> + int fp_reg_count = hard_regno_nregs (HARD_FRAME_POINTER_REGNUM,
> Pmode);
> + for (int reg = HARD_FRAME_POINTER_REGNUM;
> +reg < HARD_FRAME_POINTER_REGNUM + fp_reg_count;
> +reg++)
> + SET_HARD_REG_BIT (no_unit_alloc_regs, reg);
> +}
Please consider using the existing helper function instead:
add_to_hard_reg_set (_unit_alloc_regs, Pmode, reg);
Regards,
Dimitar
[PATCH 4/5] PRU: Remove TARGET_HARD_REGNO_CALL_PART_CLOBBERED
Per clarification in [1], macro is supposed to check for partial
clobbering of single HW registers. Since PRU declares only 8-bit
HW registers, and ABI does not define individual bit clobbering,
it is safe to remove the implementation.
[1] https://gcc.gnu.org/ml/gcc-patches/2019-09/msg00778.html
gcc/ChangeLog:
2019-10-13 Dimitar Dimitrov
* config/pru/pru.c (pru_hard_regno_call_part_clobbered): Remove.
(TARGET_HARD_REGNO_CALL_PART_CLOBBERED): Remove.
Signed-off-by: Dimitar Dimitrov
---
gcc/config/pru/pru.c | 34 --
1 file changed, 34 deletions(-)
diff --git a/gcc/config/pru/pru.c b/gcc/config/pru/pru.c
index dabea2b59c8..d66b989eb2d 100644
--- a/gcc/config/pru/pru.c
+++ b/gcc/config/pru/pru.c
@@ -556,37 +556,6 @@ pru_hard_regno_scratch_ok (unsigned int regno)
}
-/* Implement TARGET_HARD_REGNO_CALL_PART_CLOBBERED. */
-
-static bool
-pru_hard_regno_call_part_clobbered (unsigned, unsigned regno,
- machine_mode mode)
-{
- HARD_REG_SET caller_saved_set;
- HARD_REG_SET callee_saved_set;
-
- CLEAR_HARD_REG_SET (caller_saved_set);
- CLEAR_HARD_REG_SET (callee_saved_set);
-
- /* r0 and r1 are caller saved. */
- add_range_to_hard_reg_set (_saved_set, 0, 2 * 4);
-
- add_range_to_hard_reg_set (_saved_set, FIRST_ARG_REGNUM,
-LAST_ARG_REGNUM + 1 - FIRST_ARG_REGNUM);
-
- /* Treat SP as callee saved. */
- add_range_to_hard_reg_set (_saved_set, STACK_POINTER_REGNUM, 4);
-
- /* r3 to r13 are callee saved. */
- add_range_to_hard_reg_set (_saved_set, FIRST_CALLEE_SAVED_REGNUM,
-LAST_CALEE_SAVED_REGNUM + 1
-- FIRST_CALLEE_SAVED_REGNUM);
-
- return overlaps_hard_reg_set_p (caller_saved_set, mode, regno)
-&& overlaps_hard_reg_set_p (callee_saved_set, mode, regno);
-}
-
-
/* Worker function for `HARD_REGNO_RENAME_OK'.
Return nonzero if register OLD_REG can be renamed to register NEW_REG. */
@@ -2935,9 +2904,6 @@ pru_unwind_word_mode (void)
#undef TARGET_HARD_REGNO_SCRATCH_OK
#define TARGET_HARD_REGNO_SCRATCH_OK pru_hard_regno_scratch_ok
-#undef TARGET_HARD_REGNO_CALL_PART_CLOBBERED
-#define TARGET_HARD_REGNO_CALL_PART_CLOBBERED \
- pru_hard_regno_call_part_clobbered
#undef TARGET_FUNCTION_ARG
#define TARGET_FUNCTION_ARG pru_function_arg
--
2.20.1
[PATCH 3/5] PRU: Fix comment about R3/RA
Comment had a typo. Fix it and clarify. gcc/ChangeLog: 2019-10-13 Dimitar Dimitrov * config/pru/pru.h: Clarify R3/RA ABI. Signed-off-by: Dimitar Dimitrov --- gcc/config/pru/pru.h | 8 +++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/gcc/config/pru/pru.h b/gcc/config/pru/pru.h index 15fb637dec6..f2bdd1ef02b 100644 --- a/gcc/config/pru/pru.h +++ b/gcc/config/pru/pru.h @@ -125,7 +125,8 @@ 1 r1 Caller Saved. Also used as a temporary by function. profiler and function prologue/epilogue. 2 r2 spStack Pointer. - 3* r3.w0raReturn Address (16-bit). + 3* r3.w0 ABI does not specify if it is caller or callee saved. + 3* r3.w2raReturn Address (16-bit). 4 r4 fpFrame Pointer, also called Argument Pointer in ABI. 5-13 r5-r13 Callee Saved Registers. 14-29 r14-r29Register Arguments. Caller Saved Registers. @@ -148,6 +149,11 @@ of 8 bit sub-registers (e.g. RA starts at r12). When outputting assembly, GCC will take into account the RTL operand size (e.g. r12:HI) in order to translate to the conventional PRU ISA format expected by GAS (r3.w0). + + TI ISA documentation (SPRUHV7C) does not mark r3.w0 as neither + caller-saved nor callee-saved. So until TI clarifies, let's mark + it as fixed. + */ #define FIXED_REGISTERS\ -- 2.20.1
[PATCH 5/5] Add pru to compare-all-tests
contrib/ChangeLog:
2019-10-13 Dimitar Dimitrov
* compare-all-tests (all_targets): Add pru target.
Signed-off-by: Dimitar Dimitrov
---
contrib/compare-all-tests | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/contrib/compare-all-tests b/contrib/compare-all-tests
index 502cc64f522..6d0f29e052f 100644
--- a/contrib/compare-all-tests
+++ b/contrib/compare-all-tests
@@ -34,7 +34,7 @@ s390_opts='-m31 -m31/-mzarch -m64'
sh_opts='-m3 -m3e -m4 -m4a -m4al -m4/-mieee -m1 -m1/-mno-cbranchdi -m2a
-m2a/-mieee -m2e -m2e/-mieee'
sparc_opts='-mcpu=v8/-m32 -mcpu=v9/-m32 -m64'
-all_targets='alpha arm avr bfin cris fr30 frv h8300 ia64 iq2000 m32c m32r m68k
mcore mips mmix mn10300 pa pdp11 ppc sh sparc v850 vax xstormy16 xtensa' # e500
+all_targets='alpha arm avr bfin cris fr30 frv h8300 ia64 iq2000 m32c m32r m68k
mcore mips mmix mn10300 pa pdp11 ppc pru sh sparc v850 vax xstormy16 xtensa' #
e500
test_one_file ()
{
--
2.20.1
[PATCH 1/5] PRU: Fix comment to avoid fall through warning
gcc/ChangeLog: 2019-10-13 Dimitar Dimitrov * config/pru/pru.c (pru_print_operand): Fix comment. Signed-off-by: Dimitar Dimitrov --- gcc/config/pru/pru.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/gcc/config/pru/pru.c b/gcc/config/pru/pru.c index 16d1451262e..59b004b774f 100644 --- a/gcc/config/pru/pru.c +++ b/gcc/config/pru/pru.c @@ -1650,7 +1650,7 @@ pru_print_operand (FILE *file, rtx op, int letter) return; case 'Q': cond = swap_condition (cond); - /* Fall through to reverse. */ + /* Fall through. */ case 'R': fprintf (file, "%s", pru_comparison_str (reverse_condition (cond))); return; -- 2.20.1
[PATCH 2/5] PRU: Simplify machine description
Use the new @insn syntax for simpler gen_* invocation.
gcc/ChangeLog:
2019-10-13 Dimitar Dimitrov
* config/pru/pru.c (pru_emit_doloop): Use new gen_doloop_end_internal
and gen_doloop_begin_internal.
(pru_reorg_loop): Use gen_pruloop with mode.
* config/pru/pru.md: Use new @insn syntax.
Signed-off-by: Dimitar Dimitrov
---
gcc/config/pru/pru.c | 44 +--
gcc/config/pru/pru.md | 6 +++---
2 files changed, 16 insertions(+), 34 deletions(-)
diff --git a/gcc/config/pru/pru.c b/gcc/config/pru/pru.c
index 59b004b774f..dabea2b59c8 100644
--- a/gcc/config/pru/pru.c
+++ b/gcc/config/pru/pru.c
@@ -2345,26 +2345,14 @@ pru_emit_doloop (rtx *operands, int is_end)
tag = GEN_INT (cfun->machine->doloop_tags - 1);
machine_mode opmode = GET_MODE (operands[0]);
+ gcc_assert (opmode == HImode || opmode == SImode);
+
if (is_end)
-{
- if (opmode == HImode)
- emit_jump_insn (gen_doloop_end_internalhi (operands[0],
- operands[1], tag));
- else if (opmode == SImode)
- emit_jump_insn (gen_doloop_end_internalsi (operands[0],
- operands[1], tag));
- else
- gcc_unreachable ();
-}
+emit_jump_insn (gen_doloop_end_internal (opmode, operands[0],
+operands[1], tag));
else
-{
- if (opmode == HImode)
- emit_insn (gen_doloop_begin_internalhi (operands[0], operands[0], tag));
- else if (opmode == SImode)
- emit_insn (gen_doloop_begin_internalsi (operands[0], operands[0], tag));
- else
- gcc_unreachable ();
-}
+emit_insn (gen_doloop_begin_internal (opmode, operands[0],
+ operands[0], tag));
}
@@ -2607,6 +2595,7 @@ pru_reorg_loop (rtx_insn *insns)
/* Case (1) or (2). */
rtx_code_label *repeat_label;
rtx label_ref;
+ rtx loop_rtx;
/* Create a new label for the repeat insn. */
repeat_label = gen_label_rtx ();
@@ -2616,23 +2605,16 @@ pru_reorg_loop (rtx_insn *insns)
will utilize an internal for the PRU core LOOP register. */
label_ref = gen_rtx_LABEL_REF (VOIDmode, repeat_label);
machine_mode loop_mode = GET_MODE (loop->begin->loop_count);
- if (loop_mode == HImode)
- emit_insn_before (gen_pruloophi (loop->begin->loop_count, label_ref),
- loop->begin->insn);
- else if (loop_mode == SImode)
- {
- rtx loop_rtx = gen_pruloopsi (loop->begin->loop_count, label_ref);
- emit_insn_before (loop_rtx, loop->begin->insn);
- }
- else if (loop_mode == VOIDmode)
+ if (loop_mode == VOIDmode)
{
gcc_assert (CONST_INT_P (loop->begin->loop_count));
gcc_assert (UBYTE_INT ( INTVAL (loop->begin->loop_count)));
- rtx loop_rtx = gen_pruloopsi (loop->begin->loop_count, label_ref);
- emit_insn_before (loop_rtx, loop->begin->insn);
+ loop_mode = SImode;
}
- else
- gcc_unreachable ();
+ gcc_assert (loop_mode == HImode || loop_mode == SImode);
+ loop_rtx = gen_pruloop (loop_mode, loop->begin->loop_count, label_ref);
+ emit_insn_before (loop_rtx, loop->begin->insn);
+
delete_insn (loop->begin->insn);
/* Insert the repeat label before the first doloop_end.
diff --git a/gcc/config/pru/pru.md b/gcc/config/pru/pru.md
index 53fa73dec03..567f41960b4 100644
--- a/gcc/config/pru/pru.md
+++ b/gcc/config/pru/pru.md
@@ -887,7 +887,7 @@
;; This insn is volatile because we'd like it to stay in its original
;; position, just before the loop header. If it stays there, we might
;; be able to convert it into a "loop" insn.
-(define_insn "doloop_begin_internal"
+(define_insn "@doloop_begin_internal"
[(set (match_operand:HISI 0 "register_operand" "=r")
(unspec_volatile:HISI
[(match_operand:HISI 1 "reg_or_ubyte_operand" "rI")
@@ -909,7 +909,7 @@
; Note: "JUMP_INSNs and CALL_INSNs are not allowed to have any output
; reloads;". Hence this insn must be prepared for a counter that is
; not a register.
-(define_insn "doloop_end_internal"
+(define_insn "@doloop_end_internal"
[(set (pc)
(if_then_else (ne (match_operand:HISI 0 "nonimmediate_operand" "+r,*m")
(const_int 1))
@@ -951,7 +951,7 @@
DONE;
})
-(define_insn "pruloop"
+(define_insn "@pruloop"
[(set (reg:HISI LOOPCNTR_REGNUM)
(unspec:HISI [(match_operand:HISI 0 "reg_or_ubyte_operand" "rI")
(label_ref (match_operand 1))]
--
2.20.1
[PATCH 0/5] Assorted minor cleanups for PRU backend
Apart from the last change, these are all minor cleanups to the PRU backend. Dimitar Dimitrov (5): PRU: Fix comment to avoid fall through warning PRU: Simplify machine description PRU: Fix comment about R3/RA PRU: Remove TARGET_HARD_REGNO_CALL_PART_CLOBBERED Add pru to compare-all-tests contrib/compare-all-tests | 2 +- gcc/config/pru/pru.c | 80 +++ gcc/config/pru/pru.h | 8 +++- gcc/config/pru/pru.md | 6 +-- 4 files changed, 25 insertions(+), 71 deletions(-) -- 2.20.1
Re: [00/32] Support multiple ABIs in the same translation unit
On Wed, 11 Sep 2019, 22:02:26 EEST Richard Sandiford wrote: > The reason for the PRU differences is that the port defines > targetm.hard_regno_call_part_clobbered, but uses it to test whether > a multi-register value contains a mixture of fully-clobbered and > fully-preserved registers. AFAICT the port doesn't actually have > individual registers that are partly clobbered, so it doesn't need > to define the hook. (I can see how the documentation gave a misleading > impression though. I've tried to improve it in one of the patches.) > The series moves away from testing hard_regno_call_part_clobbered > directly to testing cached information instead, and the way that the > cached information is calculated means that defining the hook the way > the PRU port does has no effect. In other words, after the series we > treat it (rightly IMO) as having a "normal" ABI whereas before we didn't. You are correct. Port does not have partially clobbered HW registers. And indeed I was worried about multi-register values. PRU testsuite showed no regression from trunk with your patch set. With your patch set, I tried to compare PRU assembly with and without defining the targetm.hard_regno_call_part_clobbered hook. There was much noise in compare-all-tests due to lto compiler ID strings, but after some filtering I think the output assembly was the same. Thanks, Dimitar
Re: [PATCH] Disable postreload GCSE on large code
On вторник, 3 септември 2019 г. 14:54:19 EEST Richard Biener wrote:
> 2019-09-02 Richard Biener
>
> PR rtl-optimization/36262
> * postreload-gcse.c: Include intl.h and gcse.h.
> (insert_expr_in_table): Insert at the head of cur_expr->avail_occr
> to avoid linear list walk.
> (record_last_mem_set_info): Gate off if not computing
> transparentness. (get_bb_avail_insn): If transparentness isn't computed
> give up early.
> (gcse_after_reload_main): Skip compute_transp and extended PRE
> if gcse_or_cprop_is_too_expensive says so.
>
> Index: gcc/postreload-gcse.c
> ===
> --- gcc/postreload-gcse.c (revision 275294)
> +++ gcc/postreload-gcse.c (working copy)
> @@ -38,7 +38,9 @@ along with GCC; see the file COPYING3.
> #include "params.h"
> #include "tree-pass.h"
> #include "dbgcnt.h"
> +#include "intl.h"
> #include "gcse-common.h"
> +#include "gcse.h"
>
> /* The following code implements gcse after reload, the purpose of this
> pass is to cleanup redundant loads generated by reload and other
> @@ -364,7 +366,7 @@ insert_expr_in_table (rtx x, rtx_insn *i
>int do_not_record_p;
>hashval_t hash;
>struct expr *cur_expr, **slot;
> - struct occr *avail_occr, *last_occr = NULL;
> + struct occr *avail_occr;
>
>hash = hash_expr (x, _not_record_p);
>
> @@ -405,38 +407,22 @@ insert_expr_in_table (rtx x, rtx_insn *i
>cur_expr = *slot;
> }
>
> - /* Search for another occurrence in the same basic block. */
> + /* Search for another occurrence in the same basic block. We insert
> + insns blockwise from start to end, so keep appending to the
> + start of the list so we have to check only a single element. */
>avail_occr = cur_expr->avail_occr;
> - while (avail_occr
> -&& BLOCK_FOR_INSN (avail_occr->insn) != BLOCK_FOR_INSN (insn))
> -{
> - /* If an occurrence isn't found, save a pointer to the end of
> -the list. */
> - last_occr = avail_occr;
> - avail_occr = avail_occr->next;
> -}
> -
> - if (avail_occr)
> -/* Found another instance of the expression in the same basic block.
> - Prefer this occurrence to the currently recorded one. We want
> - the last one in the block and the block is scanned from start
> - to end. */
> + if (avail_occr
> + && BLOCK_FOR_INSN (avail_occr->insn) == BLOCK_FOR_INSN (insn))
> avail_occr->insn = insn;
>else
> {
>/* First occurrence of this expression in this basic block. */
>avail_occr = (struct occr *) obstack_alloc (_obstack,
> sizeof (struct occr));
> -
> - /* First occurrence of this expression in any block? */
> - if (cur_expr->avail_occr == NULL)
> -cur_expr->avail_occr = avail_occr;
> - else
> -last_occr->next = avail_occr;
> -
>avail_occr->insn = insn;
> - avail_occr->next = NULL;
> + avail_occr->next = cur_expr->avail_occr;
>avail_occr->deleted_p = 0;
> + cur_expr->avail_occr = avail_occr;
> }
> }
>
> @@ -710,6 +696,9 @@ record_last_reg_set_info_regno (rtx_insn
> static void
> record_last_mem_set_info (rtx_insn *insn)
> {
> + if (!transp)
> +return;
> +
>struct modifies_mem *list_entry;
>
>list_entry = (struct modifies_mem *) obstack_alloc
> (_mem_obstack, @@ -995,7 +984,8 @@ get_bb_avail_insn (basic_block
> bb, struc
>/* If we could not find an occurrence in BB, see if BB
> has a single predecessor with an occurrence that is
> transparent through BB. */
> - if (single_pred_p (bb)
> + if (transp
> + && single_pred_p (bb)
>&& bitmap_bit_p (transp[bb->index], bitmap_index)
>&& (occr = get_bb_avail_insn (single_pred (bb), orig_occr,
> bitmap_index))) {
> @@ -1371,6 +1361,10 @@ delete_redundant_insns (void)
> static void
> gcse_after_reload_main (rtx f ATTRIBUTE_UNUSED)
> {
> + /* Disable computing transparentness if it is too expensive. */
> + bool do_transp
> += !gcse_or_cprop_is_too_expensive (_("using simple load CSE after
> register " +"allocation"));
>
>memset (, 0, sizeof (stats));
>
> @@ -1392,15 +1386,21 @@ gcse_after_reload_main (rtx f ATTRIBUTE_
> increase the number of redundant loads found. So compute
> transparency information for each memory expression in the hash table. */
> df_analyze ();
> - /* This cannot be part of the normal allocation routine because
> -we have to know the number of elements in the hash table. */
> - transp = sbitmap_vector_alloc (last_basic_block_for_fn (cfun),
> -expr_table->elements ());
> - bitmap_vector_ones (transp, last_basic_block_for_fn (cfun));
> - expr_table->traverse (dump_file);
> + if (do_transp)
> + {
> + /* This cannot be
Re: [wwwdocs] Announce PRU backend
On сряда, 19 юни 2019 г. 13:23:01 EEST Jeff Law wrote: > On 6/19/19 11:06 AM, Dimitar Dimitrov wrote: > > Hi, > > > > This WWW update announces the new PRU port in WWW docs, and fills in the > > backend characteristics. > OK > jeff Thank you. Pushed to CVS. Dimitar
[wwwdocs] Announce PRU backend
Hi, This WWW update announces the new PRU port in WWW docs, and fills in the backend characteristics. Thanks, Dimitar Index: htdocs/backends.html === RCS file: /cvs/gcc/wwwdocs/htdocs/backends.html,v retrieving revision 1.85 diff -u -r1.85 backends.html --- htdocs/backends.html13 Jun 2019 18:15:29 - 1.85 +++ htdocs/backends.html19 Jun 2019 16:54:23 - @@ -104,6 +104,7 @@ pa | Q CBD qr b i e pdp11 |L ICqr b e powerpcspe | Q Cqr pb ia +pru|L F a s riscv | Q Cqr gia rl78 |L F l gs rs6000 | Q Cqr pb ia Index: htdocs/index.html === RCS file: /cvs/gcc/wwwdocs/htdocs/index.html,v retrieving revision 1.1129 diff -u -r1.1129 index.html --- htdocs/index.html 3 May 2019 09:05:54 - 1.1129 +++ htdocs/index.html 19 Jun 2019 16:54:23 - @@ -54,6 +54,10 @@ News +PRU support + [2019-06-12] + GCC support for TI PRU I/O processors has been added. + GCC 9.1 released [2019-05-03] Index: htdocs/readings.html === RCS file: /cvs/gcc/wwwdocs/htdocs/readings.html,v retrieving revision 1.314 diff -u -r1.314 readings.html --- htdocs/readings.html11 Jun 2019 06:06:18 - 1.314 +++ htdocs/readings.html19 Jun 2019 16:54:23 - @@ -253,6 +253,12 @@ http://simh.trailing-edge.com/;>Simulators + pru + Manufacturer: Texas Instruments + http://processors.wiki.ti.com/index.php/PRU-ICSS;>Official PRU Documentation + https://elinux.org/Category:PRU;>Community PRU Documentation + + riscv Manufacturer: Many (open ISA standard) https://riscv.org;>RISC-V Foundation Index: htdocs/gcc-10/changes.html === RCS file: /cvs/gcc/wwwdocs/htdocs/gcc-10/changes.html,v retrieving revision 1.3 diff -u -r1.3 changes.html --- htdocs/gcc-10/changes.html 13 May 2019 11:00:15 - 1.3 +++ htdocs/gcc-10/changes.html 19 Jun 2019 16:54:23 - @@ -87,6 +87,13 @@ +PRU + + +A new back end targeting TI PRU I/O processors has been contributed to GCC. + + +
Re: [PATCH v6 00/10] New backend for the TI PRU processor
On вторник, 11 юни 2019 г. 14:04:41 EEST Jeff Law wrote: > On 6/9/19 2:01 PM, Dimitar Dimitrov wrote: > > This is the latest patch set for adding TI PRU I/O processor backend to > > GCC. Comments from all previous series have been addressed [1], [2], [3], > > [4], [5].> > > Test results can be downloaded from here: > >http://dinux.eu/gnupru/testresults/20190607-c16eb7019be/ > > > > Changes since patch series v5 [5] are minimal: > > > > - A few whitespace and comment fixes. > > - doloop_end_internal length expression fix. > > - Define TARGET_HARD_REGNO_CALL_PART_CLOBBERED hook for PRU. > > - Use uniform naming for the PRU register number constants. > > > > [1] http://gcc.gnu.org/ml/gcc-patches/2018-06/msg00775.html > > [2] http://gcc.gnu.org/ml/gcc-patches/2018-07/msg01779.html > > [3] http://gcc.gnu.org/ml/gcc-patches/2018-08/msg00927.html > > [4] http://gcc.gnu.org/ml/gcc-patches/2018-09/msg00392.html > > [5] http://gcc.gnu.org/ml/gcc-patches/2018-10/msg00979.html > > > > Regards, > > Dimitar > > > > Dimitar Dimitrov (10): > > Initial TI PRU GCC port > > Initial TI PRU libgcc port > > testsuite: Add PRU tests > > testsuite: Add check for overflowed IMEM region to testsuite > > testsuite: Add check for unsupported TI ABI PRU features to testsuite > > testsuite: Remove PRU from test cases requiring hosted environment > > testsuite: Define PRU stack usage > > testsuite: Mark that PRU has one-cycle jumps > > testsuite: Mark that PRU uses all function pointer bits > > testsuite: Mark testsuite that PRU has different calling convention > > [ ... ] > My recollection was this was all ready to go, so I'm going to ack with > the only pre-commit requirement being to fix the issue Andreas pointed > out with the 20101011-1.c test change. > > Can you please fill out the write-after-approval form (list me as your > sponsor) > > https://sourceware.org/cgi-bin/pdw/ps_form.cgi > > Jeff I committed all the patches to trunk. The 20101011-1.c issue was fixed. Thanks, Dimitar
[PATCH] List myself as write-after-approval
Committed as obvious. ChangeLog: 2019-06-12 Dimitar Dimitrov * MAINTAINERS (Write After Approval): Add myself. Signed-off-by: Dimitar Dimitrov --- MAINTAINERS | 1 + 1 file changed, 1 insertion(+) diff --git a/MAINTAINERS b/MAINTAINERS index 14fa95ed38b..b8d703c535d 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -365,6 +365,7 @@ Bud Davis Chris Demetriou Sameera Deshpande Wilco Dijkstra +Dimitar Dimitrov Benoit Dupont de Dinechin Jason Eckhardt Bernd Edlinger -- 2.11.0
Re: [PATCH v6 01/10] Initial TI PRU GCC port
On неделя, 9 юни 2019 г. 17:38:58 EEST Segher Boessenkool wrote:
> Hi Dimitar,
>
> Just some comments, do with it what you want :-)
>
> On Sun, Jun 09, 2019 at 11:01:38PM +0300, Dimitar Dimitrov wrote:
> > +; An unfortunate side effect is that quite a few invalid RTL patterns are
> > +; generated. For example:
> > +; ... (zero_extend:SI (match_operand:SI ...)) ...
>
> You could perhaps use a mode iterator like rs6000's EXTHI and friends.
The machine description already extensively uses mode iterators.
The example in that comment is written with SI mode for brevity.
>
> > +; These patterns are harmless since no pass should generate such RTL.
> > This +; shortcut allows us to keep small and concise machine description
> > patterns.
> But the generated code (of GCC itself) will be larger. It's also not
> harmless in that it can complicate your debugging, problems take longer
> to spot.
I'm afraid that's the best I can do without tooling upgrades.
Reference: https://gcc.gnu.org/ml/gcc-patches/2018-09/msg00688.html
>
> > +(define_insn
> > "add_impl_ > _zext_op2>"
> Many lines are too long. Not that it is clear how to fix that in this
> particular case ;-)
Those ones I'm not sure how to break. The C code should conform to GNU
standards, though.
>
> > + [(set_attr "type" "alu,alu,alu")])
>
> You can just say
>
> [(set_attr "type" "alu")])
>
> if all alternatives are the same value for an attribute.
I'll fix it. Thanks.
>
> > +(define_insn "one_impl_"
>
> The standard pattern is called one_cmpl, so maybe you want one_cmpl_impl
> here? one_impl looks like a typo.
I'll update to one_cmpl_impl. Thanks.
>
> > +(define_subst "alu2_zext_subst"
> > + [(set (match_operand:EQD 0 "" "")
> > + (ALUOP2:EQD (zero_extend:EQD (match_operand:EQD 1 "" ""]
>
> I don't know if this actually works for define_subst, but at least in many
> other cases you can write this like
>
> (define_subst "alu2_zext_subst"
> [(set (match_operand:EQD 0)
> (ALUOP2:EQD (zero_extend:EQD (match_operand:EQD 1]
>
> (you can omit trailing empty string arguments).
Indeed, genmddump generates the same output with or without the empty strings.
I was not sure which is the preferred form, though. I see lots of MD
definitions in the GCC tree with empty strings.
>
> > +(define_predicate "pru_muldst_operand"
> > + (match_code "subreg,reg")
> > +{
> > + if (register_operand (op, mode))
> > +{
> > + int regno;
> > +
> > + if (REG_P (op))
> > + regno = REGNO (op);
> > + else if (GET_CODE (op) == SUBREG && REG_P (SUBREG_REG (op)))
> > + regno = REGNO (SUBREG_REG (op));
> > + else
> > + return 0;
> > +
> > + return REGNO_REG_CLASS (regno) == MULDST_REGS
> > +|| regno >= FIRST_PSEUDO_REGISTER;
> > +}
> > + return 0;
> > +})
> >
> >
> > +static bool
> > +pru_hard_regno_scratch_ok (unsigned int regno)
> > +{
> > + /* Don't allow hard registers that might be part of the frame pointer.
> > + Some places in the compiler just test for
> > [HARD_]FRAME_POINTER_REGNUM
> > + and don't handle a frame pointer that spans more than one register.
> > + TODO: Fix those faulty places. */
> > +
> > + if ((!reload_completed || frame_pointer_needed)
> > + && ((regno >= HARD_FRAME_POINTER_REGNUM
> > + && regno <= HARD_FRAME_POINTER_REGNUM + 3)
> > + || (regno >= FRAME_POINTER_REGNUM
> > + && regno <= FRAME_POINTER_REGNUM + 3)))
> > +return false;
>
> Use IN_RANGE?
Sounds good. Will rewrite it.
>
> > + /* QBxx conditional branching cannot cope with block reordering. */
> > + if (flag_reorder_blocks_and_partition)
> > +{
> > + inform (input_location, "%<-freorder-blocks-and-partition%> "
> > + "not supported on this architecture");
> > + flag_reorder_blocks_and_partition = 0;
> > + flag_reorder_blocks = 1;
> > +}
>
> What you cannot cope with is the hot/cold partitioning, I guess --
> otherwise you'd have to disable reorder_blocks itself, and that would
> result in pretty terrible code.
Yes.
>
> > +; There is no pipeline, so our scheduling description is simple.
> > +(define_automaton "pru")
> > +(define_cpu_unit "cpu" "pru")
> > +
> > +(define_insn_reservation "everything" 1 (match_test "true") "cpu")
>
> Because you have a scheduling description, INSN_SCHEDULING is defined,
> and that makes combine not create SUBREGs of MEM. Which is pretty
> important :-)
Would lack of INSN_SCHEDULING result in a more efficient target code? Is it
recommended? I added dummy scheduling as a precaution to avoid issues like
PR78883 for AVR.
BTW, today I tested with and without scheduling description for PRU. I didn't
get any new testsuite failures.
>
>
> It looks like a quite complete port, congratulations :-)
>
>
> Segher
Thank you,
Dimitar
Re: [PATCH v6 06/10] testsuite: Remove PRU from test cases requiring hosted environment
On неделя, 9 юни 2019 г. 22:34:23 EEST Andreas Schwab wrote: > On Jun 09 2019, Dimitar Dimitrov wrote: > > diff --git a/gcc/testsuite/gcc.c-torture/execute/20101011-1.c > > b/gcc/testsuite/gcc.c-torture/execute/20101011-1.c index > > d2beeb52a0e..4a9cc63fde8 100644 > > --- a/gcc/testsuite/gcc.c-torture/execute/20101011-1.c > > +++ b/gcc/testsuite/gcc.c-torture/execute/20101011-1.c > > @@ -102,6 +102,8 @@ __aeabi_idiv0 (int return_value) > > > > # define DO_TEST 0 > > #elif defined (__or1k__) > > > >/* On OpenRISC division by zero does not trap. */ > > > > +#elif defined (__pru__) > > +/* There isn't even a signal function. */ > > > > # define DO_TEST 0 > > That removes the define from the __or1k__ branch. > > Andreas. Sorry about that. Must have slipped through one of the numerous rebases I've been doing. I'll fix it. Thanks for spotting it, Dimitar
[PATCH v6 10/10] testsuite: Mark testsuite that PRU has different calling convention
For variadic functions, the last named and all anonymous arguments
are passed on stack. Regular functions pass arguments in registers.
gcc/testsuite/ChangeLog:
2019-06-07 Dimitar Dimitrov
* gcc.dg/builtin-apply2.c: Skip for PRU.
* gcc.dg/torture/stackalign/builtin-apply-2.c: Ditto.
Signed-off-by: Dimitar Dimitrov
---
gcc/testsuite/gcc.dg/builtin-apply2.c | 2 +-
gcc/testsuite/gcc.dg/torture/stackalign/builtin-apply-2.c | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/gcc/testsuite/gcc.dg/builtin-apply2.c
b/gcc/testsuite/gcc.dg/builtin-apply2.c
index 3eadc773a51..06ef24ef56b 100644
--- a/gcc/testsuite/gcc.dg/builtin-apply2.c
+++ b/gcc/testsuite/gcc.dg/builtin-apply2.c
@@ -1,7 +1,7 @@
/* { dg-do run } */
/* { dg-require-effective-target untyped_assembly } */
/* { dg-skip-if "Variadic funcs have all args on stack. Normal funcs have args
in registers." { "avr-*-* nds32*-*-* amdgcn-*-*" } } */
-/* { dg-skip-if "Variadic funcs use different argument passing from normal
funcs." { "riscv*-*-* or1k*-*-* msp430-*-*" } } */
+/* { dg-skip-if "Variadic funcs use different argument passing from normal
funcs." { "riscv*-*-* or1k*-*-* msp430-*-* pru-*-*" } } */
/* { dg-skip-if "Variadic funcs use Base AAPCS. Normal funcs use VFP
variant." { arm*-*-* && arm_hf_eabi } } */
/* PR target/12503 */
diff --git a/gcc/testsuite/gcc.dg/torture/stackalign/builtin-apply-2.c
b/gcc/testsuite/gcc.dg/torture/stackalign/builtin-apply-2.c
index 1c6fe4fc5ff..31585a0ae69 100644
--- a/gcc/testsuite/gcc.dg/torture/stackalign/builtin-apply-2.c
+++ b/gcc/testsuite/gcc.dg/torture/stackalign/builtin-apply-2.c
@@ -9,7 +9,7 @@
/* arm_hf_eabi: Variadic funcs use Base AAPCS. Normal funcs use VFP variant.
avr: Variadic funcs don't pass arguments in registers, while normal funcs
do. */
-/* { dg-skip-if "Variadic funcs use different argument passing from normal
funcs" { arm_hf_eabi || { avr-*-* riscv*-*-* or1k*-*-* msp430-*-* amdgcn-*-* }
} } */
+/* { dg-skip-if "Variadic funcs use different argument passing from normal
funcs" { arm_hf_eabi || { avr-*-* riscv*-*-* or1k*-*-* msp430-*-* amdgcn-*-*
pru-*-* } } } */
/* { dg-skip-if "Variadic funcs have all args on stack. Normal funcs have args
in registers." { nds32*-*-* } { v850*-*-* } } */
/* { dg-require-effective-target untyped_assembly } */
--
2.11.0
[PATCH v6 08/10] testsuite: Mark that PRU has one-cycle jumps
gcc/testsuite/ChangeLog:
2019-06-07 Dimitar Dimitrov
* gcc.dg/tree-ssa/20040204-1.c: XFAIL on pru.
* gcc.dg/tree-ssa/reassoc-33.c: Ditto.
* gcc.dg/tree-ssa/reassoc-34.c: Ditto.
* gcc.dg/tree-ssa/reassoc-35.c: Ditto.
* gcc.dg/tree-ssa/reassoc-36.c: Ditto.
Signed-off-by: Dimitar Dimitrov
---
gcc/testsuite/gcc.dg/tree-ssa/20040204-1.c | 2 +-
gcc/testsuite/gcc.dg/tree-ssa/reassoc-33.c | 2 +-
gcc/testsuite/gcc.dg/tree-ssa/reassoc-34.c | 2 +-
gcc/testsuite/gcc.dg/tree-ssa/reassoc-35.c | 2 +-
gcc/testsuite/gcc.dg/tree-ssa/reassoc-36.c | 2 +-
5 files changed, 5 insertions(+), 5 deletions(-)
diff --git a/gcc/testsuite/gcc.dg/tree-ssa/20040204-1.c
b/gcc/testsuite/gcc.dg/tree-ssa/20040204-1.c
index 255b6273341..2f3dcb502ad 100644
--- a/gcc/testsuite/gcc.dg/tree-ssa/20040204-1.c
+++ b/gcc/testsuite/gcc.dg/tree-ssa/20040204-1.c
@@ -33,4 +33,4 @@ void test55 (int x, int y)
that the && should be emitted (based on BRANCH_COST). Fix this
by teaching dom to look through && and register all components
as true. */
-/* { dg-final { scan-tree-dump-times "link_error" 0 "optimized" { xfail { !
"alpha*-*-* arm*-*-* aarch64*-*-* powerpc*-*-* cris-*-* crisv32-*-* hppa*-*-*
i?86-*-* mmix-*-* mips*-*-* m68k*-*-* moxie-*-* nds32*-*-* s390*-*-* sh*-*-*
sparc*-*-* spu-*-* visium-*-* x86_64-*-* riscv*-*-* or1k*-*-* msp430-*-*" } } }
} */
+/* { dg-final { scan-tree-dump-times "link_error" 0 "optimized" { xfail { !
"alpha*-*-* arm*-*-* aarch64*-*-* powerpc*-*-* cris-*-* crisv32-*-* hppa*-*-*
i?86-*-* mmix-*-* mips*-*-* m68k*-*-* moxie-*-* nds32*-*-* s390*-*-* sh*-*-*
sparc*-*-* spu-*-* visium-*-* x86_64-*-* riscv*-*-* or1k*-*-* msp430-*-*
pru*-*-*" } } } } */
diff --git a/gcc/testsuite/gcc.dg/tree-ssa/reassoc-33.c
b/gcc/testsuite/gcc.dg/tree-ssa/reassoc-33.c
index 28cd7799ce1..db0ce4c8463 100644
--- a/gcc/testsuite/gcc.dg/tree-ssa/reassoc-33.c
+++ b/gcc/testsuite/gcc.dg/tree-ssa/reassoc-33.c
@@ -1,4 +1,4 @@
-/* { dg-do run { target { ! "m68k*-*-* mmix*-*-* bfin*-*-* v850*-*-*
moxie*-*-* cris*-*-* m32c*-*-* fr30*-*-* mcore*-*-* powerpc*-*-* xtensa*-*-*
hppa*-*-* nios2*-*-* or1k-*-*-*"} } } */
+/* { dg-do run { target { ! "m68k*-*-* mmix*-*-* bfin*-*-* v850*-*-*
moxie*-*-* cris*-*-* m32c*-*-* fr30*-*-* mcore*-*-* powerpc*-*-* xtensa*-*-*
hppa*-*-* nios2*-*-* or1k-*-*-* pru*-*-*"} } } */
/* { dg-options "-O2 -fno-inline -fdump-tree-reassoc1-details --param
logical-op-non-short-circuit=1" } */
/* { dg-additional-options "-mbranch-cost=2" { target branch_cost } } */
diff --git a/gcc/testsuite/gcc.dg/tree-ssa/reassoc-34.c
b/gcc/testsuite/gcc.dg/tree-ssa/reassoc-34.c
index f1087113f51..31e10a44bb1 100644
--- a/gcc/testsuite/gcc.dg/tree-ssa/reassoc-34.c
+++ b/gcc/testsuite/gcc.dg/tree-ssa/reassoc-34.c
@@ -1,4 +1,4 @@
-/* { dg-do run { target { ! "m68k*-*-* mmix*-*-* bfin*-*-* v850*-*-*
moxie*-*-* cris*-*-* m32c*-*-* fr30*-*-* mcore*-*-* powerpc*-*-* xtensa*-*-*
hppa*-*-* nios2*-*-* or1k*-*-*"} } } */
+/* { dg-do run { target { ! "m68k*-*-* mmix*-*-* bfin*-*-* v850*-*-*
moxie*-*-* cris*-*-* m32c*-*-* fr30*-*-* mcore*-*-* powerpc*-*-* xtensa*-*-*
hppa*-*-* nios2*-*-* or1k*-*-* pru*-*-*"} } } */
/* { dg-options "-O2 -fno-inline -fdump-tree-reassoc1-details --param
logical-op-non-short-circuit=1" } */
/* { dg-additional-options "-mbranch-cost=2" { target branch_cost } } */
diff --git a/gcc/testsuite/gcc.dg/tree-ssa/reassoc-35.c
b/gcc/testsuite/gcc.dg/tree-ssa/reassoc-35.c
index 98ea2ad9ebe..d509d9f12c6 100644
--- a/gcc/testsuite/gcc.dg/tree-ssa/reassoc-35.c
+++ b/gcc/testsuite/gcc.dg/tree-ssa/reassoc-35.c
@@ -1,4 +1,4 @@
-/* { dg-do run { target { ! "m68k*-*-* mmix*-*-* bfin*-*-* v850*-*-*
moxie*-*-* cris*-*-* m32c*-*-* fr30*-*-* mcore*-*-* powerpc*-*-* xtensa*-*-*
hppa*-*-* nios2*-*-* or1k*-*-*"} } } */
+/* { dg-do run { target { ! "m68k*-*-* mmix*-*-* bfin*-*-* v850*-*-*
moxie*-*-* cris*-*-* m32c*-*-* fr30*-*-* mcore*-*-* powerpc*-*-* xtensa*-*-*
hppa*-*-* nios2*-*-* or1k*-*-* pru*-*-*"} } } */
/* { dg-options "-O2 -fno-inline -fdump-tree-reassoc1-details --param
logical-op-non-short-circuit=1" } */
/* { dg-additional-options "-mbranch-cost=2" { target branch_cost } } */
diff --git a/gcc/testsuite/gcc.dg/tree-ssa/reassoc-36.c
b/gcc/testsuite/gcc.dg/tree-ssa/reassoc-36.c
index d9184102383..2ad46f59da0 100644
--- a/gcc/testsuite/gcc.dg/tree-ssa/reassoc-36.c
+++ b/gcc/testsuite/gcc.dg/tree-ssa/reassoc-36.c
@@ -1,4 +1,4 @@
-/* { dg-do run { target { ! "m68k*-*-* mmix*-*-* bfin*-*-* v850*-*-*
moxie*-*-* cris*-*-* m32c*-*-* fr30*-*-* mcore*-*-* powerpc*-*-* xtensa*-*-*
hppa*-*-* nios2*-*-* or1k*-*-*"} } } */
+/* { dg-do run { target { ! "m68k*-*-* mmix*-*-* bfin*-*-* v850*-*-*
moxie*-*-* cris*-*-* m32c*-*-* fr30*-*-* mcore*-*-* po
[PATCH v6 09/10] testsuite: Mark that PRU uses all function pointer bits
gcc/testsuite/ChangeLog: 2019-06-07 Dimitar Dimitrov * g++.old-deja/g++.abi/ptrmem.C: Add PRU to list. Signed-off-by: Dimitar Dimitrov --- gcc/testsuite/g++.old-deja/g++.abi/ptrmem.C | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/gcc/testsuite/g++.old-deja/g++.abi/ptrmem.C b/gcc/testsuite/g++.old-deja/g++.abi/ptrmem.C index 341735879c5..bda7960d8a2 100644 --- a/gcc/testsuite/g++.old-deja/g++.abi/ptrmem.C +++ b/gcc/testsuite/g++.old-deja/g++.abi/ptrmem.C @@ -7,7 +7,7 @@ function. However, some platforms use all bits to encode a function pointer. Such platforms use the lowest bit of the delta, that is shifted left by one bit. */ -#if defined __MN10300__ || defined __SH5__ || defined __arm__ || defined __thumb__ || defined __mips__ || defined __aarch64__ +#if defined __MN10300__ || defined __SH5__ || defined __arm__ || defined __thumb__ || defined __mips__ || defined __aarch64__ || defined __PRU__ #define ADJUST_PTRFN(func, virt) ((void (*)())(func)) #define ADJUST_DELTA(delta, virt) (((delta) << 1) + !!(virt)) #else -- 2.11.0
[PATCH v6 05/10] testsuite: Add check for unsupported TI ABI PRU features to testsuite
Not all C language features are supported when -mabi=ti option is
used for PRU target.
gcc/testsuite/ChangeLog:
2019-06-07 Dimitar Dimitrov
* lib/gcc-dg.exp: Filter unsupported features in PRU's TI ABI mode.
* lib/target-utils.exp: Ditto.
* lib/target-supports.exp (check_effective_target_function_pointers,
check_effective_target_large_return_values): New.
Signed-off-by: Dimitar Dimitrov
---
gcc/testsuite/lib/gcc-dg.exp | 11 +++
gcc/testsuite/lib/target-supports.exp | 26 ++
gcc/testsuite/lib/target-utils.exp| 8
3 files changed, 45 insertions(+)
diff --git a/gcc/testsuite/lib/gcc-dg.exp b/gcc/testsuite/lib/gcc-dg.exp
index c56e8e80ae0..e23b63cf3d1 100644
--- a/gcc/testsuite/lib/gcc-dg.exp
+++ b/gcc/testsuite/lib/gcc-dg.exp
@@ -422,6 +422,17 @@ proc gcc-dg-prune { system text } {
return "::unsupported::memory full"
}
+if { [string match "*error: function pointers not supported*" $text]
+ && ![check_effective_target_function_pointers] } {
+ # The format here is important. See dg.exp.
+ return "::unsupported::funcptr"
+}
+if { [string match "*error: large return values not supported*" $text]
+ && ![check_effective_target_large_return_values] } {
+ # The format here is important. See dg.exp.
+ return "::unsupported::large return values"
+}
+
return $text
}
diff --git a/gcc/testsuite/lib/target-supports.exp
b/gcc/testsuite/lib/target-supports.exp
index 2b3290619dc..01472879062 100644
--- a/gcc/testsuite/lib/target-supports.exp
+++ b/gcc/testsuite/lib/target-supports.exp
@@ -2644,6 +2644,32 @@ proc check_effective_target_size20plus { } {
}]
}
+# Return 1 if target supports function pointers, 0 otherwise.
+
+proc check_effective_target_function_pointers { } {
+if { [istarget pru-*-*] } {
+ return [check_no_compiler_messages func_ptr_avail assembly {
+ #ifdef __PRU_EABI_GNU__
+ #error unsupported
+ #endif
+ }]
+}
+return 1
+}
+
+# Return 1 if target supports arbitrarily large return values, 0 otherwise.
+
+proc check_effective_target_large_return_values { } {
+if { [istarget pru-*-*] } {
+ return [check_no_compiler_messages large_return_values assembly {
+ #ifdef __PRU_EABI_GNU__
+ #error unsupported
+ #endif
+ }]
+}
+return 1
+}
+
# Return 1 if we support 24-bit or larger array and structure sizes
# using default options, 0 otherwise.
# This implies at least a 32-bit address space, as no targets have an address
diff --git a/gcc/testsuite/lib/target-utils.exp
b/gcc/testsuite/lib/target-utils.exp
index 23137d4702c..0dd1f3494e8 100644
--- a/gcc/testsuite/lib/target-utils.exp
+++ b/gcc/testsuite/lib/target-utils.exp
@@ -44,5 +44,13 @@ proc ${tool}_check_unsupported_p { output } {
[string match "*exceeds local store*" $output] } {
return "memory full"
}
+if { [string match "*error: function pointers not supported*" $output]
+ && ![check_effective_target_function_pointers] } {
+ return "function pointers not supported"
+}
+if { [string match "*error: large return values not supported*" $output]
+ && ![check_effective_target_large_return_values] } {
+ return "large return values not supported"
+}
return ""
}
--
2.11.0
[PATCH v6 07/10] testsuite: Define PRU stack usage
gcc/testsuite/ChangeLog: 2019-06-07 Dimitar Dimitrov * gcc.dg/stack-usage-1.c: Define PRU stack usage. Signed-off-by: Dimitar Dimitrov --- gcc/testsuite/gcc.dg/stack-usage-1.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/gcc/testsuite/gcc.dg/stack-usage-1.c b/gcc/testsuite/gcc.dg/stack-usage-1.c index e6440142e1d..b2642228808 100644 --- a/gcc/testsuite/gcc.dg/stack-usage-1.c +++ b/gcc/testsuite/gcc.dg/stack-usage-1.c @@ -93,6 +93,8 @@ # define SIZE 254 #elif defined (__nios2__) # define SIZE 252 +#elif defined (__PRU__) +# define SIZE 252 #elif defined (__v850__) #define SIZE 260 #elif defined (__mn10300__) -- 2.11.0
[PATCH v6 03/10] testsuite: Add PRU tests
gcc/testsuite/ChangeLog: 2019-06-07 Dimitar Dimitrov * gcc.target/pru/abi-arg-struct.c: New test. * gcc.target/pru/ashiftrt.c: New test. * gcc.target/pru/builtins-1.c: New test. * gcc.target/pru/builtins-error.c: New test. * gcc.target/pru/clearbit.c: New test. * gcc.target/pru/loop-asm.c: New test. * gcc.target/pru/loop-dowhile.c: New test. * gcc.target/pru/loop-hi-1.c: New test. * gcc.target/pru/loop-hi-2.c: New test. * gcc.target/pru/loop-qi-1.c: New test. * gcc.target/pru/loop-qi-2.c: New test. * gcc.target/pru/loop-short-1.c: New test. * gcc.target/pru/loop-short-2.c: New test. * gcc.target/pru/loop-si-1.c: New test. * gcc.target/pru/loop-si-2.c: New test. * gcc.target/pru/loop-u8_pcrel_overflow.c: New test. * gcc.target/pru/loop-ubyte-1.c: New test. * gcc.target/pru/loop-ubyte-2.c: New test. * gcc.target/pru/lra-framepointer-fragmentation-1.c: New test. * gcc.target/pru/lra-framepointer-fragmentation-2.c: New test. * gcc.target/pru/mabi-ti-1.c: New test. * gcc.target/pru/mabi-ti-2.c: New test. * gcc.target/pru/mabi-ti-3.c: New test. * gcc.target/pru/mabi-ti-4.c: New test. * gcc.target/pru/mabi-ti-5.c: New test. * gcc.target/pru/mabi-ti-6.c: New test. * gcc.target/pru/mabi-ti-7.c: New test. * gcc.target/pru/pr64366.c: New test. * gcc.target/pru/pragma-ctable_entry.c: New test. * gcc.target/pru/pru.exp: New file. * gcc.target/pru/qbbc-1.c: New test. * gcc.target/pru/qbbc-2.c: New test. * gcc.target/pru/qbbc-3.c: New test. * gcc.target/pru/qbbs-1.c: New test. * gcc.target/pru/qbbs-2.c: New test. * gcc.target/pru/setbit.c: New test. * gcc.target/pru/zero_extend-and-hisi.c: New test. * gcc.target/pru/zero_extend-and-qihi.c: New test. * gcc.target/pru/zero_extend-and-qisi.c: New test. * gcc.target/pru/zero_extend-hisi.c: New test. * gcc.target/pru/zero_extend-qihi.c: New test. * gcc.target/pru/zero_extend-qisi.c: New test. * lib/target-supports.exp: Add PRU to feature filters. Signed-off-by: Dimitar Dimitrov --- gcc/testsuite/gcc.target/pru/abi-arg-struct.c | 164 + gcc/testsuite/gcc.target/pru/ashiftrt.c| 13 ++ gcc/testsuite/gcc.target/pru/builtins-1.c | 12 ++ gcc/testsuite/gcc.target/pru/builtins-error.c | 6 + gcc/testsuite/gcc.target/pru/clearbit.c| 13 ++ gcc/testsuite/gcc.target/pru/loop-asm.c| 19 +++ gcc/testsuite/gcc.target/pru/loop-dowhile.c| 45 ++ gcc/testsuite/gcc.target/pru/loop-hi-1.c | 38 + gcc/testsuite/gcc.target/pru/loop-hi-2.c | 17 +++ gcc/testsuite/gcc.target/pru/loop-qi-1.c | 38 + gcc/testsuite/gcc.target/pru/loop-qi-2.c | 17 +++ gcc/testsuite/gcc.target/pru/loop-short-1.c| 53 +++ gcc/testsuite/gcc.target/pru/loop-short-2.c| 21 +++ gcc/testsuite/gcc.target/pru/loop-si-1.c | 41 ++ gcc/testsuite/gcc.target/pru/loop-si-2.c | 20 +++ .../gcc.target/pru/loop-u8_pcrel_overflow.c| 42 ++ gcc/testsuite/gcc.target/pru/loop-ubyte-1.c| 30 gcc/testsuite/gcc.target/pru/loop-ubyte-2.c| 18 +++ .../pru/lra-framepointer-fragmentation-1.c | 33 + .../pru/lra-framepointer-fragmentation-2.c | 61 gcc/testsuite/gcc.target/pru/mabi-ti-1.c | 10 ++ gcc/testsuite/gcc.target/pru/mabi-ti-2.c | 15 ++ gcc/testsuite/gcc.target/pru/mabi-ti-3.c | 12 ++ gcc/testsuite/gcc.target/pru/mabi-ti-4.c | 14 ++ gcc/testsuite/gcc.target/pru/mabi-ti-5.c | 33 + gcc/testsuite/gcc.target/pru/mabi-ti-6.c | 12 ++ gcc/testsuite/gcc.target/pru/mabi-ti-7.c | 21 +++ gcc/testsuite/gcc.target/pru/pr64366.c | 128 gcc/testsuite/gcc.target/pru/pragma-ctable_entry.c | 22 +++ gcc/testsuite/gcc.target/pru/pru.exp | 41 ++ gcc/testsuite/gcc.target/pru/qbbc-1.c | 29 gcc/testsuite/gcc.target/pru/qbbc-2.c | 15 ++ gcc/testsuite/gcc.target/pru/qbbc-3.c | 15 ++ gcc/testsuite/gcc.target/pru/qbbs-1.c | 29 gcc/testsuite/gcc.target/pru/qbbs-2.c | 15 ++ gcc/testsuite/gcc.target/pru/setbit.c | 13 ++ .../gcc.target/pru/zero_extend-and-hisi.c | 16 ++ .../gcc.target/pru/zero_extend-and-qihi.c | 16 ++ .../gcc.target/pru/zero_extend-and-qisi.c | 16 ++ gcc/testsuite/gcc.target/pru/zero_extend-hisi.c| 43 ++ gcc/testsuite/gcc.target/pru/zero_extend-qihi.c| 43 ++ gcc/testsuite/gcc.target/pru/zero_extend-qisi.c| 43 ++ gcc/testsuite/lib/target-supports.exp
[PATCH v6 06/10] testsuite: Remove PRU from test cases requiring hosted environment
gcc/testsuite/ChangeLog: 2019-06-07 Dimitar Dimitrov * gcc.c-torture/execute/20101011-1.c: Define DO_TEST to 0 for PRU. * gcc.dg/20020312-2.c: No PIC register for PRU. Signed-off-by: Dimitar Dimitrov --- gcc/testsuite/gcc.c-torture/execute/20101011-1.c | 2 ++ gcc/testsuite/gcc.dg/20020312-2.c| 2 ++ 2 files changed, 4 insertions(+) diff --git a/gcc/testsuite/gcc.c-torture/execute/20101011-1.c b/gcc/testsuite/gcc.c-torture/execute/20101011-1.c index d2beeb52a0e..4a9cc63fde8 100644 --- a/gcc/testsuite/gcc.c-torture/execute/20101011-1.c +++ b/gcc/testsuite/gcc.c-torture/execute/20101011-1.c @@ -102,6 +102,8 @@ __aeabi_idiv0 (int return_value) # define DO_TEST 0 #elif defined (__or1k__) /* On OpenRISC division by zero does not trap. */ +#elif defined (__pru__) +/* There isn't even a signal function. */ # define DO_TEST 0 #else # define DO_TEST 1 diff --git a/gcc/testsuite/gcc.dg/20020312-2.c b/gcc/testsuite/gcc.dg/20020312-2.c index c584d35908e..dae3599563a 100644 --- a/gcc/testsuite/gcc.dg/20020312-2.c +++ b/gcc/testsuite/gcc.dg/20020312-2.c @@ -121,6 +121,8 @@ extern void abort (void); /* No pic register. */ #elif defined (__AMDGCN__) /* No pic register. */ +#elif defined(__PRU__) +/* No pic register. */ #else # error "Modify the test for your target." #endif -- 2.11.0
[PATCH v6 02/10] Initial TI PRU libgcc port
The floating point support has been borrowed from C6X libgcc port
to help with TI PRU toolchain ABI compatibility.
libgcc/ChangeLog:
2019-06-07 Dimitar Dimitrov
* config.host: Add PRU target.
* config/pru/asri.c: New file.
* config/pru/eqd.c: New file.
* config/pru/eqf.c: New file.
* config/pru/ged.c: New file.
* config/pru/gef.c: New file.
* config/pru/gtd.c: New file.
* config/pru/gtf.c: New file.
* config/pru/led.c: New file.
* config/pru/lef.c: New file.
* config/pru/lib2bitcountHI.c: New file.
* config/pru/lib2divHI.c: New file.
* config/pru/lib2divQI.c: New file.
* config/pru/lib2divSI.c: New file.
* config/pru/libgcc-eabi.ver: New file.
* config/pru/ltd.c: New file.
* config/pru/ltf.c: New file.
* config/pru/mpyll.S: New file.
* config/pru/pru-abi.h: New file.
* config/pru/pru-asm.h: New file.
* config/pru/pru-divmod.h: New file.
* config/pru/sfp-machine.h: New file.
* config/pru/t-pru: New file.
Signed-off-by: Dimitar Dimitrov
---
libgcc/config.host | 7 +++
libgcc/config/pru/asri.c | 33 ++
libgcc/config/pru/eqd.c| 45 +
libgcc/config/pru/eqf.c| 45 +
libgcc/config/pru/ged.c| 45 +
libgcc/config/pru/gef.c| 45 +
libgcc/config/pru/gtd.c| 45 +
libgcc/config/pru/gtf.c| 45 +
libgcc/config/pru/led.c| 45 +
libgcc/config/pru/lef.c| 45 +
libgcc/config/pru/lib2bitcountHI.c | 43 +
libgcc/config/pru/lib2divHI.c | 42 +
libgcc/config/pru/lib2divQI.c | 42 +
libgcc/config/pru/lib2divSI.c | 48 ++
libgcc/config/pru/libgcc-eabi.ver | 88 ++
libgcc/config/pru/ltd.c| 45 +
libgcc/config/pru/ltf.c| 45 +
libgcc/config/pru/mpyll.S | 57 +
libgcc/config/pru/pru-abi.h| 109
libgcc/config/pru/pru-asm.h| 35 +++
libgcc/config/pru/pru-divmod.h | 117 ++
libgcc/config/pru/sfp-machine.h| 125 +
libgcc/config/pru/t-pru| 50 +++
23 files changed, 1246 insertions(+)
create mode 100644 libgcc/config/pru/asri.c
create mode 100644 libgcc/config/pru/eqd.c
create mode 100644 libgcc/config/pru/eqf.c
create mode 100644 libgcc/config/pru/ged.c
create mode 100644 libgcc/config/pru/gef.c
create mode 100644 libgcc/config/pru/gtd.c
create mode 100644 libgcc/config/pru/gtf.c
create mode 100644 libgcc/config/pru/led.c
create mode 100644 libgcc/config/pru/lef.c
create mode 100644 libgcc/config/pru/lib2bitcountHI.c
create mode 100644 libgcc/config/pru/lib2divHI.c
create mode 100644 libgcc/config/pru/lib2divQI.c
create mode 100644 libgcc/config/pru/lib2divSI.c
create mode 100644 libgcc/config/pru/libgcc-eabi.ver
create mode 100644 libgcc/config/pru/ltd.c
create mode 100644 libgcc/config/pru/ltf.c
create mode 100644 libgcc/config/pru/mpyll.S
create mode 100644 libgcc/config/pru/pru-abi.h
create mode 100644 libgcc/config/pru/pru-asm.h
create mode 100644 libgcc/config/pru/pru-divmod.h
create mode 100644 libgcc/config/pru/sfp-machine.h
create mode 100644 libgcc/config/pru/t-pru
diff --git a/libgcc/config.host b/libgcc/config.host
index d75e2b5d7aa..588fd7c3324 100644
--- a/libgcc/config.host
+++ b/libgcc/config.host
@@ -175,6 +175,9 @@ or1k*-*-*)
powerpc*-*-*)
cpu_type=rs6000
;;
+pru-*-*)
+ cpu_type=pru
+ ;;
rs6000*-*-*)
;;
riscv*-*-*)
@@ -1178,6 +1181,10 @@ powerpcle-*-eabi*)
tmake_file="${tmake_file} rs6000/t-ppccomm rs6000/t-crtstuff
t-crtstuff-pic t-fdpbit"
extra_parts="$extra_parts crtbegin.o crtend.o crtbeginS.o crtendS.o
crtbeginT.o ecrti.o ecrtn.o ncrti.o ncrtn.o"
;;
+pru-*-*)
+ tmake_file="${tmake_file} t-softfp-sfdf t-softfp-excl t-softfp
t-gnu-prefix pru/t-pru"
+ tm_file="$tm_file pru/pru-abi.h"
+ ;;
riscv*-*-linux*)
tmake_file="${tmake_file} riscv/t-softfp${host_address} t-softfp
riscv/t-elf riscv/t-elf${host_address}"
extra_parts="$extra_parts crtbegin.o crtend.o crti.o crtn.o crtendS.o
crtbeginT.o"
diff --git a/libgcc/config/pru/asri.c b/libgcc/config/pru/asri.c
new file mode 100644
index 000..7d8d8f672f4
--- /dev/null
+++ b/libgcc/config/pru/asri.c
@@ -0,0 +1,33 @@
+/* PRU ABI compatibility functions
+ Arithmetic right shift
+ Copyright (C) 2017-2019 Free Software Foundation, Inc.
+ Contributed by Dimitar Dimitrov
+
+ This file is free software; you can redistribute it and/or
+
[PATCH v6 00/10] New backend for the TI PRU processor
This is the latest patch set for adding TI PRU I/O processor backend to GCC. Comments from all previous series have been addressed [1], [2], [3], [4], [5]. Test results can be downloaded from here: http://dinux.eu/gnupru/testresults/20190607-c16eb7019be/ Changes since patch series v5 [5] are minimal: - A few whitespace and comment fixes. - doloop_end_internal length expression fix. - Define TARGET_HARD_REGNO_CALL_PART_CLOBBERED hook for PRU. - Use uniform naming for the PRU register number constants. [1] http://gcc.gnu.org/ml/gcc-patches/2018-06/msg00775.html [2] http://gcc.gnu.org/ml/gcc-patches/2018-07/msg01779.html [3] http://gcc.gnu.org/ml/gcc-patches/2018-08/msg00927.html [4] http://gcc.gnu.org/ml/gcc-patches/2018-09/msg00392.html [5] http://gcc.gnu.org/ml/gcc-patches/2018-10/msg00979.html Regards, Dimitar Dimitar Dimitrov (10): Initial TI PRU GCC port Initial TI PRU libgcc port testsuite: Add PRU tests testsuite: Add check for overflowed IMEM region to testsuite testsuite: Add check for unsupported TI ABI PRU features to testsuite testsuite: Remove PRU from test cases requiring hosted environment testsuite: Define PRU stack usage testsuite: Mark that PRU has one-cycle jumps testsuite: Mark that PRU uses all function pointer bits testsuite: Mark testsuite that PRU has different calling convention configure.ac |7 + gcc/common/config/pru/pru-common.c | 36 + gcc/config.gcc |9 + gcc/config/pru/alu-zext.md | 181 ++ gcc/config/pru/constraints.md | 108 + gcc/config/pru/predicates.md | 287 ++ gcc/config/pru/pru-opts.h | 31 + gcc/config/pru/pru-passes.c| 228 ++ gcc/config/pru/pru-pragma.c| 86 + gcc/config/pru/pru-protos.h| 72 + gcc/config/pru/pru.c | 3036 gcc/config/pru/pru.h | 573 gcc/config/pru/pru.md | 1022 +++ gcc/config/pru/pru.opt | 54 + gcc/config/pru/t-pru | 31 + gcc/doc/extend.texi| 21 + gcc/doc/invoke.texi| 65 + gcc/doc/md.texi| 19 + gcc/testsuite/g++.old-deja/g++.abi/ptrmem.C|2 +- gcc/testsuite/gcc.c-torture/execute/20101011-1.c |2 + gcc/testsuite/gcc.dg/20020312-2.c |2 + gcc/testsuite/gcc.dg/builtin-apply2.c |2 +- gcc/testsuite/gcc.dg/stack-usage-1.c |2 + .../gcc.dg/torture/stackalign/builtin-apply-2.c|2 +- gcc/testsuite/gcc.dg/tree-ssa/20040204-1.c |2 +- gcc/testsuite/gcc.dg/tree-ssa/reassoc-33.c |2 +- gcc/testsuite/gcc.dg/tree-ssa/reassoc-34.c |2 +- gcc/testsuite/gcc.dg/tree-ssa/reassoc-35.c |2 +- gcc/testsuite/gcc.dg/tree-ssa/reassoc-36.c |2 +- gcc/testsuite/gcc.target/pru/abi-arg-struct.c | 164 ++ gcc/testsuite/gcc.target/pru/ashiftrt.c| 13 + gcc/testsuite/gcc.target/pru/builtins-1.c | 12 + gcc/testsuite/gcc.target/pru/builtins-error.c |6 + gcc/testsuite/gcc.target/pru/clearbit.c| 13 + gcc/testsuite/gcc.target/pru/loop-asm.c| 19 + gcc/testsuite/gcc.target/pru/loop-dowhile.c| 45 + gcc/testsuite/gcc.target/pru/loop-hi-1.c | 38 + gcc/testsuite/gcc.target/pru/loop-hi-2.c | 17 + gcc/testsuite/gcc.target/pru/loop-qi-1.c | 38 + gcc/testsuite/gcc.target/pru/loop-qi-2.c | 17 + gcc/testsuite/gcc.target/pru/loop-short-1.c| 53 + gcc/testsuite/gcc.target/pru/loop-short-2.c| 21 + gcc/testsuite/gcc.target/pru/loop-si-1.c | 41 + gcc/testsuite/gcc.target/pru/loop-si-2.c | 20 + .../gcc.target/pru/loop-u8_pcrel_overflow.c| 42 + gcc/testsuite/gcc.target/pru/loop-ubyte-1.c| 30 + gcc/testsuite/gcc.target/pru/loop-ubyte-2.c| 18 + .../pru/lra-framepointer-fragmentation-1.c | 33 + .../pru/lra-framepointer-fragmentation-2.c | 61 + gcc/testsuite/gcc.target/pru/mabi-ti-1.c | 10 + gcc/testsuite/gcc.target/pru/mabi-ti-2.c | 15 + gcc/testsuite/gcc.target/pru/mabi-ti-3.c | 12 + gcc/testsuite/gcc.target/pru/mabi-ti-4.c | 14 + gcc/testsuite/gcc.target/pru/mabi-ti-5.c | 33 + gcc/testsuite/gcc.target/pru/mabi-ti-6.c | 12 + gcc/testsuite/gcc.target/pru/mabi-ti-7.c | 21 + gcc/testsuite/gcc.target/pru/pr64366.c | 128 + gcc/testsuite/gcc.target/pru/pragma-ctable_entry.c | 22 + gcc/testsuite/gcc.target/pru/pru.exp | 41 + gcc
[PATCH v6 04/10] testsuite: Add check for overflowed IMEM region to testsuite
PRU architecture supports maximum 256k program memory (IMEM). Some GCC
test cases manage to produce executables bigger than that.
gcc/testsuite/ChangeLog:
2019-06-07 Dimitar Dimitrov
* lib/gcc-dg.exp: Bail on region overflow for tiny targets.
* lib/target-utils.exp: Ditto.
* lib/target-supports.exp: Declare PRU target as tiny.
Signed-off-by: Dimitar Dimitrov
---
gcc/testsuite/lib/target-supports.exp | 5 +
gcc/testsuite/lib/target-utils.exp| 4
2 files changed, 9 insertions(+)
diff --git a/gcc/testsuite/lib/target-supports.exp
b/gcc/testsuite/lib/target-supports.exp
index b60eab6d75d..2b3290619dc 100644
--- a/gcc/testsuite/lib/target-supports.exp
+++ b/gcc/testsuite/lib/target-supports.exp
@@ -8765,6 +8765,11 @@ proc check_effective_target_tiny {} {
&& [check_effective_target_avr_tiny] } {
return 1
}
+ # PRU Program Counter is 16-bits, and trampolines are not supported.
+ # Hence directly declare as a tiny target.
+ if [istarget pru-*-*] {
+ return 1
+ }
return 0
}]
}
diff --git a/gcc/testsuite/lib/target-utils.exp
b/gcc/testsuite/lib/target-utils.exp
index e847fdd4279..23137d4702c 100644
--- a/gcc/testsuite/lib/target-utils.exp
+++ b/gcc/testsuite/lib/target-utils.exp
@@ -35,6 +35,10 @@ proc ${tool}_check_unsupported_p { output } {
&& [check_effective_target_tiny] } {
return "memory full"
}
+if { [regexp "(^|\n)\[^\n\]*: region \[^\n\]* overflowed" $output]
+ && [check_effective_target_tiny] } {
+ return "memory full"
+}
if { [istarget spu-*-*] && \
[string match "*exceeds local store*" $output] } {
--
2.11.0
Re: [PATCH] [RFC] PR target/52813 and target/11807
On Mon, Dec 17 2018 20:15:02 EET Bernd Edlinger wrote:
> out of curiosity I looked at the clobber statement in
> gdb/nat/linux-ptrace.c:
>
>asm volatile ("pushq %0;"
> ".globl linux_ptrace_test_ret_to_nx_instr;"
> "linux_ptrace_test_ret_to_nx_instr:"
> "ret"
> : : "r" ((uint64_t) (uintptr_t) return_address)
> : "%rsp", "memory");
>
> it turns out to be a far jump, instruction.
GDB functionality should not be affected if SP clobber is removed, even if the
generated code is slightly different. Please see this comment:
http://sourceware.org/ml/gdb-patches/2018-12/msg00204.html
As I understand it, this particular code is never meant to return. It should
either stop due to the NX mapping of return_address/%0, or hit the breakpoint
placed at return_address/%0.
Regards,
Dimitar
Re: [PATCH] [RFC] PR target/52813 and target/11807
On Sun, Dec 16 2018 at 14:36:26 EET Bernd Edlinger wrote:
> Hi,
>
> if I understood that right, then clobbering sp is and has always been
> ignored.
>
> If that is right, then I would much prefer a warning, that says exactly
> that, because that would also help to understand why removing that clobber
> statement is safe even for old gcc versions.
>
> Since your patch did not actually change the handling of the PIC register,
> that one should of course stay an error.
Thank you. Looks like general consensus is to have a warning. See attached
patch that switches the error to a warning.
Regards,
Dimitar
>From d589ebd7824b4505ab75a2404f49a7c200679545 Mon Sep 17 00:00:00 2001
From: Dimitar Dimitrov
Date: Sun, 16 Dec 2018 10:13:18 +0200
Subject: [PATCH] PR target/52813
Turns out there are existing programs that clobber stack pointer.
To avoid disruption, switch the newly introduced error to a warning.
Tested with:
$ make check-gcc-c RUNTESTFLAGS="i386.exp=pr52813.c "
gcc/ChangeLog:
2018-12-16 Dimitar Dimitrov
* cfgexpand.c (asm_clobber_reg_is_valid): Switch error to warning.
Add clarification why there is a warning.
gcc/testsuite/ChangeLog:
2018-12-16 Dimitar Dimitrov
* gcc.target/i386/pr52813.c (test1): Update warning message.
Signed-off-by: Dimitar Dimitrov
---
gcc/cfgexpand.c | 7 +--
gcc/testsuite/gcc.target/i386/pr52813.c | 2 +-
2 files changed, 6 insertions(+), 3 deletions(-)
diff --git a/gcc/cfgexpand.c b/gcc/cfgexpand.c
index 0d04bbcafce..1e44c9a7ad0 100644
--- a/gcc/cfgexpand.c
+++ b/gcc/cfgexpand.c
@@ -2872,10 +2872,13 @@ asm_clobber_reg_is_valid (int regno, int nregs, const char *regname)
error ("PIC register clobbered by %qs in %", regname);
is_valid = false;
}
- /* Clobbering the STACK POINTER register is an error. */
+ /* Clobbered STACK POINTER register is not saved/restored by GCC,
+ which is often unexpected by users. See PR52813. */
if (overlaps_hard_reg_set_p (regset, Pmode, STACK_POINTER_REGNUM))
{
- error ("Stack Pointer register clobbered by %qs in %", regname);
+ warning (0, "Stack Pointer register clobbered by %qs in %",
+ regname);
+ warning (0, "GCC has always ignored Stack Pointer % clobbers");
is_valid = false;
}
diff --git a/gcc/testsuite/gcc.target/i386/pr52813.c b/gcc/testsuite/gcc.target/i386/pr52813.c
index 154ebbfc423..644fef15fef 100644
--- a/gcc/testsuite/gcc.target/i386/pr52813.c
+++ b/gcc/testsuite/gcc.target/i386/pr52813.c
@@ -5,5 +5,5 @@
void
test1 (void)
{
- asm volatile ("" : : : "%esp"); /* { dg-error "Stack Pointer register clobbered" } */
+ asm volatile ("" : : : "%esp"); /* { dg-warning "Stack Pointer register clobbered.\+GCC has always ignored Stack Pointer 'asm' clobbers" } */
}
--
2.11.0
Re: [PATCH] [RFC] PR target/52813 and target/11807
On Fri, Dec 14 2018 2:52:17 EET Segher Boessenkool wrote: > You need a few tweaks to what you committed. Or just one perhaps: if > flag_pic is not set, you should not check PIC_OFFSET_TABLE_REGNUM, it is > meaningless in that case. I'm not sure if you need to check whether the > register is fixed or not. The flag_pic flag is already checked by the PIC_OFFSET_TABLE_REGNUM macro. It will return INVALID_REGNUM if flag_pic is false, so no error will be printed. Note that the PIC_OFFSET_TABLE_REGNUM behaviour is not changed by my patch. I merely moved the existing check into a separate function. > > But there are many more regs than just the PIC reg and the stack pointer > that you would want to similarly warn about, because overwriting those > registers is just as fatal: the frame pointer, the program counter, etc. > _Most_ fixed registers, but not _all_. > > So maybe it should be a target hook? OTOH that is a lot of work for such > a trivial warning, that isn't very useful anyway (a better warning for > any asm is: "Are you sure?" :-) ) I'll think about a more generic solution. But in light of the several filed PRs I think it's worth having a simple check for SP. Regards, Dimitar
Re: [PATCH] [RFC] PR target/52813 and target/11807
On Thu, Dec 13, 2018 at 8:48:38 EET Segher Boessenkool wrote: > On Wed, Dec 12, 2018 at 06:26:10PM +0200, Dimitar Dimitrov wrote: > > I expect that if I mark a HW register as "clobber", compiler would save > > its > > contents before executing the asm statement, and after that it would > > restore its contents. This is the GCC behaviour for all but the SP and > > PIC registers. That is why I believe that PR52813 is a valid bug. > > It won't do it for *any* fixed registers. But you do not want to error > or even warn for some fixed registers, for example the "flags" register > on x86 is *always* written to by asm. Yes, you are correct. > > But you never want to warn for non-fixed registers, and e.g. > PIC_OFFSET_TABLE_REGNUM isn't always a fixed register (when flag_pic is 0 > for example). I could not trace how PIC_OFFSET_TABLE_REGNUM on i386 gets marked as fixed register. I'll dig more through the source. > > > I'm not sure how GCC could recover if SP is clobbered. If SP is clobbered > > in such a way that GCC will not notice (e.g. thread switching), then why > > should GCC know about it in the first place? > > Up until today, GCC has always just ignored it if you claimed to clobber > the stack pointer. My point is that the silent ignoring is confusing to users, as shown by PR52813. How would you suggest me to proceed: - Leave patch as-is. - Revert patch. Update documentation to point that clobber marker for fixed registers is ignored by GCC. Close PR52813 as invalid. - Revert patch. Discuss more broadly and specify behaviour of asm clobber for fixed registers (and SP in particular). Thanks, Dimitar
Re: [PATCH] [RFC] PR target/52813 and target/11807
On Wed, 12 Dec 2018 at 11:03:24 EET Christophe Lyon wrote: > And just noticed it causes a failure to build GDB for x86_64: > gdb-8.1-release/gdb/nat/linux-ptrace.c: In function 'void > linux_ptrace_init_warnings()': > gdb-8.1-release/gdb/nat/linux-ptrace.c:149:23: error: Stack Pointer > register clobbered by '%rsp' in 'asm' > 149 |: "%rsp", "memory"); > > | ^ > > Makefile:1640: recipe for target 'linux-ptrace.o' failed > > I didn't check if the GDB code is legitimate though Sorry about this. I had checked the Linux x86 kernel for SP clobbers, but forgot that GDB could also use such magic. I'll try to fix it and send a patch to GDB. It will likely take me a few days, so I hope that this breakage is not considered a P0 bug. Regards, Dimitar
Re: [PATCH] [RFC] PR target/52813 and target/11807
On Wed, 12 Dec 2018 at 14:19:27 EET Christophe Lyon wrote: > On Wed, 12 Dec 2018 at 12:21, Thomas Preudhomme > > wrote: > > So my understanding is that the original code (CMSIS library) used to > > clobber sp because the asm statement was actually changing the sp. > > That in turn led GCC to try to save and restore sp which is not what > > CMSIS was expecting to happen. Changing sp without clobber as done now > > is probably the right solution and r242693 can be reverted. That will > > remove the failing test. > > OK, I read PR52813 too, but I'm not sure to fully understand the new status. > My understanding is that since this patch was committed, if an asm > statement clobbers sp, it is now allowed to actually declare it as clobber > (this patch generates an error in such a case). > So the user is now expected to lie to the compiler when writing to > this kind of register (sp, pic register), by not declaring it as "clobber"? Disclosure: I'm a GCC newbie. I expect that if I mark a HW register as "clobber", compiler would save its contents before executing the asm statement, and after that it would restore its contents. This is the GCC behaviour for all but the SP and PIC registers. That is why I believe that PR52813 is a valid bug. I'm not sure how GCC could recover if SP is clobbered. If SP is clobbered in such a way that GCC will not notice (e.g. thread switching), then why should GCC know about it in the first place? Regards, Dimitar
Re: [PATCH] [RFC] PR target/52813 and target/11807
On понеделник, 10 декември 2018 г. 11:21:53 EET Richard Sandiford wrote: > Dimitar Dimitrov writes: > > I have tested this fix on x86_64 host, and found no regression in the C > > and C++ testsuites. I'm marking this patch as RFC simply because I don't > > have experience with other architectures, and I don't have a setup to > > test all architectures supported by GCC. > > > > gcc/ChangeLog: > > > > 2018-12-07 Dimitar Dimitrov > > > > * cfgexpand.c (asm_clobber_reg_is_valid): Also produce > > error when stack pointer is clobbered. > > (expand_asm_stmt): Refactor clobber check in separate function. > > > > gcc/testsuite/ChangeLog: > > > > 2018-12-07 Dimitar Dimitrov > > > > * gcc.target/i386/pr52813.c: New test. > > > > Signed-off-by: Dimitar Dimitrov > > LGTM. Do you have a copyright assignment on file? 'Fraid this is > probably big enough to need one. Yes, I have copyright assignment. Regards, Dimitar
[PATCH] [RFC] PR target/52813 and target/11807
I have tested this fix on x86_64 host, and found no regression in the C
and C++ testsuites. I'm marking this patch as RFC simply because I don't
have experience with other architectures, and I don't have a setup to
test all architectures supported by GCC.
gcc/ChangeLog:
2018-12-07 Dimitar Dimitrov
* cfgexpand.c (asm_clobber_reg_is_valid): Also produce
error when stack pointer is clobbered.
(expand_asm_stmt): Refactor clobber check in separate function.
gcc/testsuite/ChangeLog:
2018-12-07 Dimitar Dimitrov
* gcc.target/i386/pr52813.c: New test.
Signed-off-by: Dimitar Dimitrov
---
gcc/cfgexpand.c | 42 ++---
gcc/testsuite/gcc.target/i386/pr52813.c | 9 +++
2 files changed, 43 insertions(+), 8 deletions(-)
create mode 100644 gcc/testsuite/gcc.target/i386/pr52813.c
diff --git a/gcc/cfgexpand.c b/gcc/cfgexpand.c
index 5e23bc242b9..8474372a216 100644
--- a/gcc/cfgexpand.c
+++ b/gcc/cfgexpand.c
@@ -2845,6 +2845,38 @@ tree_conflicts_with_clobbers_p (tree t, HARD_REG_SET
*clobbered_regs)
return false;
}
+/* Check that the given REGNO spanning NREGS is a valid
+ asm clobber operand. Some HW registers cannot be
+ saved/restored, hence they should not be clobbered by
+ asm statements. */
+static bool
+asm_clobber_reg_is_valid (int regno, int nregs, const char *regname)
+{
+ bool is_valid = true;
+ HARD_REG_SET regset;
+
+ CLEAR_HARD_REG_SET (regset);
+
+ add_range_to_hard_reg_set (, regno, nregs);
+
+ /* Clobbering the PIC register is an error. */
+ if (PIC_OFFSET_TABLE_REGNUM != INVALID_REGNUM
+ && overlaps_hard_reg_set_p (regset, Pmode, PIC_OFFSET_TABLE_REGNUM))
+{
+ /* ??? Diagnose during gimplification? */
+ error ("PIC register clobbered by %qs in %", regname);
+ is_valid = false;
+}
+ /* Clobbering the STACK POINTER register is an error. */
+ if (overlaps_hard_reg_set_p (regset, Pmode, STACK_POINTER_REGNUM))
+{
+ error ("Stack Pointer register clobbered by %qs in %", regname);
+ is_valid = false;
+}
+
+ return is_valid;
+}
+
/* Generate RTL for an asm statement with arguments.
STRING is the instruction template.
OUTPUTS is a list of output arguments (lvalues); INPUTS a list of inputs.
@@ -2977,14 +3009,8 @@ expand_asm_stmt (gasm *stmt)
else
for (int reg = j; reg < j + nregs; reg++)
{
- /* Clobbering the PIC register is an error. */
- if (reg == (int) PIC_OFFSET_TABLE_REGNUM)
- {
- /* ??? Diagnose during gimplification? */
- error ("PIC register clobbered by %qs in %",
- regname);
- return;
- }
+ if (!asm_clobber_reg_is_valid (reg, nregs, regname))
+ return;
SET_HARD_REG_BIT (clobbered_regs, reg);
rtx x = gen_rtx_REG (reg_raw_mode[reg], reg);
diff --git a/gcc/testsuite/gcc.target/i386/pr52813.c
b/gcc/testsuite/gcc.target/i386/pr52813.c
new file mode 100644
index 000..154ebbfc423
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/pr52813.c
@@ -0,0 +1,9 @@
+/* Ensure that stack pointer cannot be an asm clobber. */
+/* { dg-do compile { target { ! ia32 } } } */
+/* { dg-options "-O2" } */
+
+void
+test1 (void)
+{
+ asm volatile ("" : : : "%esp"); /* { dg-error "Stack Pointer register
clobbered" } */
+}
--
2.11.0
Re: [PATCH v5 01/10] Initial TI PRU GCC port
On Wednesday, 10/17/2018 22:26:58 EEST Richard Sandiford wrote:
> > +; Note: "JUMP_INSNs and CALL_INSNs are not allowed to have any output
> > +; reloads;". Hence this insn must be prepared for a counter that is
> > +; not a register.
> > +(define_insn "doloop_end_internal"
> > + [(set (pc)
> > + (if_then_else (ne (match_operand:HISI 0 "nonimmediate_operand" "+r,*m")
> > + (const_int 1))
> > + (label_ref (match_operand 1 "" ""))
> > + (pc)))
> > + (set (match_dup 0)
> > + (plus:HISI (match_dup 0)
> > +(const_int -1)))
> > + (unspec [(match_operand 2 "const_int_operand" "")] UNSPECV_LOOP_END)
> > + (clobber (match_scratch:HISI 3 "=X,"))]
> > + ""
> > +{
> > + gcc_unreachable ();
> > +}
> > + ;; Worst case length:
> > + ;;
> > + ;; lbbo op3_reg, op3_ptr 4'
> > + ;; sub , 14
> > + ;; qbeq .+8, , 0 4
> > + ;; jmp4
> > + ;; sbbo op3_reg, op3_ptr 4
> > + [(set (attr "length")
> > + (if_then_else
> > + (and (ge (minus (pc) (match_dup 1)) (const_int 0))
> > +(le (minus (pc) (match_dup 1)) (const_int 1020)))
> > + (cond [(eq_attr "alternative" "0") (const_int 4)
> > + (eq_attr "alternative" "0") (const_int 12)]
> > + (const_int 4))
> > + (cond [(eq_attr "alternative" "0") (const_int 12)
> > + (eq_attr "alternative" "0") (const_int 20)]
> > + (const_int 4])
>
> The second (eq_attr "alternative" "0") lines in each (cond ...)
> won't be used, since the first match wins.
Sorry about this. My intention was to have different weights for the two
different constraints. I have fixed it the attached patch.
> OK with those changes once the port is accepted. (No need to repost,
> just fix up locally and commit the fixed version when the time comes.)
See attached fixup patch. I'll need someone to apply it on my behalf, since I
do not have write access.
>
> Jeff, could you ask the SC about accepting the port, if that hasn't
> already been decided? Dimitar, I assume you'd be OK with being the
> maintainer?
Yes, I'll be glad to support the PRU port.
In case the port is accepted, I have attached patches for maintainer listing
and wwwdocs updates.
Thanks,
Dimitar
>From 4e07a710618e0dbbd5f97c83ebe3924a28d2ca20 Mon Sep 17 00:00:00 2001
From: Dimitar Dimitrov
Date: Mon, 27 Aug 2018 16:40:28 +0300
Subject: [PATCH] Add myself as maintainer of PRU port
ChangeLog:
2018-10-18 Dimitar Dimitrov
* MAINTAINERS: Add self as PRU maintainer.
Signed-off-by: Dimitar Dimitrov
---
MAINTAINERS | 1 +
1 file changed, 1 insertion(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index 0d6c81d4af6..1d82083512d 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -92,6 +92,7 @@ nios2 port Sandra Loosemore
nvptx port Tom de Vries
pdp11 port Paul Koning
powerpcspe port Andrew Jenner
+pru port Dimitar Dimitrov
riscv port Kito Cheng
riscv port Palmer Dabbelt
riscv port Andrew Waterman
--
2.11.0
>From a05619f2ebae9afe890fd336437cf9b67ef825ac Mon Sep 17 00:00:00 2001
From: Dimitar Dimitrov
Date: Thu, 18 Oct 2018 07:11:23 +0300
Subject: [PATCH] Fixups for v5 initial PRU backend patch
Signed-off-by: Dimitar Dimitrov
---
gcc/config/pru/predicates.md | 3 ---
gcc/config/pru/pru.md| 10 --
gcc/config/pru/pru.opt | 2 +-
gcc/doc/invoke.texi | 8
4 files changed, 9 insertions(+), 14 deletions(-)
diff --git a/gcc/config/pru/predicates.md b/gcc/config/pru/predicates.md
index 0e34d9c1a31..3e0a776ca54 100644
--- a/gcc/config/pru/predicates.md
+++ b/gcc/config/pru/predicates.md
@@ -75,7 +75,6 @@
else
return 0;
-
return REGNO_REG_CLASS (regno) == MULDST_REGS
|| regno >= FIRST_PSEUDO_REGISTER;
}
@@ -96,7 +95,6 @@
else
return 0;
-
return REGNO_REG_CLASS (regno) == MULSRC0_REG
|| regno >= FIRST_PSEUDO_REGISTER;
}
@@ -117,7 +115,6 @@
else
return 0;
-
return REGNO_REG_CLASS (regno) == MULSRC1_REG
|| regno >= FIRST_PSEUDO_REGISTER;
}
diff --git a/gcc/config/pru/pru.md b/gcc/config/pru/pru.md
index 248ae2c953d..1fa5f9310b0 100644
--- a/gcc/config/pru/pru.md
+++ b/gcc/config/pru/pru.md
@@ -933,12 +933,10 @@
(if_then_else
(and (ge (minus (pc) (match_dup 1)) (const_int 0))
(le (minus (pc) (match_dup 1)) (const_int 1020)))
- (cond [(eq_attr "alternative" "0") (const_int 4)
- (eq_attr "alternative
[PATCH v5 08/10] testsuite: Mark that PRU has one-cycle jumps
gcc/testsuite/ChangeLog:
2018-10-08 Dimitar Dimitrov
* gcc.dg/tree-ssa/20040204-1.c: XFAIL on pru.
* gcc.dg/tree-ssa/reassoc-33.c: Ditto.
* gcc.dg/tree-ssa/reassoc-34.c: Ditto.
* gcc.dg/tree-ssa/reassoc-35.c: Ditto.
* gcc.dg/tree-ssa/reassoc-36.c: Ditto.
* gcc.dg/tree-ssa/ssa-thread-14.c: Ditto.
Signed-off-by: Dimitar Dimitrov
---
gcc/testsuite/gcc.dg/tree-ssa/20040204-1.c| 2 +-
gcc/testsuite/gcc.dg/tree-ssa/reassoc-33.c| 2 +-
gcc/testsuite/gcc.dg/tree-ssa/reassoc-34.c| 2 +-
gcc/testsuite/gcc.dg/tree-ssa/reassoc-35.c| 2 +-
gcc/testsuite/gcc.dg/tree-ssa/reassoc-36.c| 2 +-
gcc/testsuite/gcc.dg/tree-ssa/ssa-thread-14.c | 2 +-
6 files changed, 6 insertions(+), 6 deletions(-)
diff --git a/gcc/testsuite/gcc.dg/tree-ssa/20040204-1.c
b/gcc/testsuite/gcc.dg/tree-ssa/20040204-1.c
index a1237cf839b..06b83029fd3 100644
--- a/gcc/testsuite/gcc.dg/tree-ssa/20040204-1.c
+++ b/gcc/testsuite/gcc.dg/tree-ssa/20040204-1.c
@@ -33,4 +33,4 @@ void test55 (int x, int y)
that the && should be emitted (based on BRANCH_COST). Fix this
by teaching dom to look through && and register all components
as true. */
-/* { dg-final { scan-tree-dump-times "link_error" 0 "optimized" { xfail { !
"alpha*-*-* arm*-*-* aarch64*-*-* powerpc*-*-* cris-*-* crisv32-*-* hppa*-*-*
i?86-*-* mmix-*-* mips*-*-* m68k*-*-* moxie-*-* nds32*-*-* s390*-*-* sh*-*-*
sparc*-*-* spu-*-* visium-*-* x86_64-*-* riscv*-*-*" } } } } */
+/* { dg-final { scan-tree-dump-times "link_error" 0 "optimized" { xfail { !
"alpha*-*-* arm*-*-* aarch64*-*-* powerpc*-*-* cris-*-* crisv32-*-* hppa*-*-*
i?86-*-* mmix-*-* mips*-*-* m68k*-*-* moxie-*-* nds32*-*-* s390*-*-* sh*-*-*
sparc*-*-* spu-*-* visium-*-* x86_64-*-* riscv*-*-* pru*-*-*" } } } } */
diff --git a/gcc/testsuite/gcc.dg/tree-ssa/reassoc-33.c
b/gcc/testsuite/gcc.dg/tree-ssa/reassoc-33.c
index 5572df4ae24..5e1cd1a6fa7 100644
--- a/gcc/testsuite/gcc.dg/tree-ssa/reassoc-33.c
+++ b/gcc/testsuite/gcc.dg/tree-ssa/reassoc-33.c
@@ -1,4 +1,4 @@
-/* { dg-do run { target { ! "m68k*-*-* mmix*-*-* bfin*-*-* v850*-*-*
moxie*-*-* cris*-*-* m32c*-*-* fr30*-*-* mcore*-*-* powerpc*-*-* xtensa*-*-*
hppa*-*-* nios2*-*-*"} } } */
+/* { dg-do run { target { ! "m68k*-*-* mmix*-*-* bfin*-*-* v850*-*-*
moxie*-*-* cris*-*-* m32c*-*-* fr30*-*-* mcore*-*-* powerpc*-*-* xtensa*-*-*
hppa*-*-* nios2*-*-* pru*-*-*"} } } */
/* { dg-options "-O2 -fno-inline -fdump-tree-reassoc1-details" } */
/* { dg-additional-options "-mbranch-cost=2" { target branch_cost } } */
diff --git a/gcc/testsuite/gcc.dg/tree-ssa/reassoc-34.c
b/gcc/testsuite/gcc.dg/tree-ssa/reassoc-34.c
index 9b45f1cd9be..a59df6a7244 100644
--- a/gcc/testsuite/gcc.dg/tree-ssa/reassoc-34.c
+++ b/gcc/testsuite/gcc.dg/tree-ssa/reassoc-34.c
@@ -1,4 +1,4 @@
-/* { dg-do run { target { ! "m68k*-*-* mmix*-*-* bfin*-*-* v850*-*-*
moxie*-*-* cris*-*-* m32c*-*-* fr30*-*-* mcore*-*-* powerpc*-*-* xtensa*-*-*
hppa*-*-* nios2*-*-*"} } } */
+/* { dg-do run { target { ! "m68k*-*-* mmix*-*-* bfin*-*-* v850*-*-*
moxie*-*-* cris*-*-* m32c*-*-* fr30*-*-* mcore*-*-* powerpc*-*-* xtensa*-*-*
hppa*-*-* nios2*-*-* pru*-*-*"} } } */
/* { dg-options "-O2 -fno-inline -fdump-tree-reassoc1-details" } */
/* { dg-additional-options "-mbranch-cost=2" { target branch_cost } } */
diff --git a/gcc/testsuite/gcc.dg/tree-ssa/reassoc-35.c
b/gcc/testsuite/gcc.dg/tree-ssa/reassoc-35.c
index 9ee3abca04e..21239372709 100644
--- a/gcc/testsuite/gcc.dg/tree-ssa/reassoc-35.c
+++ b/gcc/testsuite/gcc.dg/tree-ssa/reassoc-35.c
@@ -1,4 +1,4 @@
-/* { dg-do run { target { ! "m68k*-*-* mmix*-*-* bfin*-*-* v850*-*-*
moxie*-*-* cris*-*-* m32c*-*-* fr30*-*-* mcore*-*-* powerpc*-*-* xtensa*-*-*
hppa*-*-* nios2*-*-*"} } } */
+/* { dg-do run { target { ! "m68k*-*-* mmix*-*-* bfin*-*-* v850*-*-*
moxie*-*-* cris*-*-* m32c*-*-* fr30*-*-* mcore*-*-* powerpc*-*-* xtensa*-*-*
hppa*-*-* nios2*-*-* pru*-*-*"} } } */
/* { dg-options "-O2 -fno-inline -fdump-tree-reassoc1-details" } */
/* { dg-additional-options "-mbranch-cost=2" { target branch_cost } } */
diff --git a/gcc/testsuite/gcc.dg/tree-ssa/reassoc-36.c
b/gcc/testsuite/gcc.dg/tree-ssa/reassoc-36.c
index ac3a04291b7..f8eb0954ae7 100644
--- a/gcc/testsuite/gcc.dg/tree-ssa/reassoc-36.c
+++ b/gcc/testsuite/gcc.dg/tree-ssa/reassoc-36.c
@@ -1,4 +1,4 @@
-/* { dg-do run { target { ! "m68k*-*-* mmix*-*-* bfin*-*-* v850*-*-*
moxie*-*-* cris*-*-* m32c*-*-* fr30*-*-* mcore*-*-* powerpc*-*-* xtensa*-*-*
hppa*-*-* nios2*-*-*"} } } */
+/* { dg-do run { target { ! "m68k*-*-* mmix*-*-* bfin*-*-* v850*-*-*
moxie*-*-* cris*-*-* m32c*-*-* fr30*-*-* mcore*-*-* powerpc*-*-* xtensa*-*-*
hppa*-*-* nios2*-*-* pru*-*-*"} } } */
/* { dg-options "-O2 -fno-inline -fdump-tree-r
[PATCH v5 09/10] testsuite: Mark that PRU uses all function pointer bits
gcc/testsuite/ChangeLog: 2018-10-08 Dimitar Dimitrov * g++.old-deja/g++.abi/ptrmem.C: Add PRU to list. Signed-off-by: Dimitar Dimitrov --- gcc/testsuite/g++.old-deja/g++.abi/ptrmem.C | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/gcc/testsuite/g++.old-deja/g++.abi/ptrmem.C b/gcc/testsuite/g++.old-deja/g++.abi/ptrmem.C index 341735879c5..bda7960d8a2 100644 --- a/gcc/testsuite/g++.old-deja/g++.abi/ptrmem.C +++ b/gcc/testsuite/g++.old-deja/g++.abi/ptrmem.C @@ -7,7 +7,7 @@ function. However, some platforms use all bits to encode a function pointer. Such platforms use the lowest bit of the delta, that is shifted left by one bit. */ -#if defined __MN10300__ || defined __SH5__ || defined __arm__ || defined __thumb__ || defined __mips__ || defined __aarch64__ +#if defined __MN10300__ || defined __SH5__ || defined __arm__ || defined __thumb__ || defined __mips__ || defined __aarch64__ || defined __PRU__ #define ADJUST_PTRFN(func, virt) ((void (*)())(func)) #define ADJUST_DELTA(delta, virt) (((delta) << 1) + !!(virt)) #else -- 2.11.0
[PATCH v5 10/10] testsuite: Mark testsuite that PRU has different calling convention
For variadic functions, the last named and all anonymous arguments
are passed on stack. Regular functions pass arguments in registers.
gcc/testsuite/ChangeLog:
2018-10-08 Dimitar Dimitrov
* gcc.dg/builtin-apply2.c: Skip for PRU.
* gcc.dg/torture/stackalign/builtin-apply-2.c: Ditto.
Signed-off-by: Dimitar Dimitrov
---
gcc/testsuite/gcc.dg/builtin-apply2.c | 2 +-
gcc/testsuite/gcc.dg/torture/stackalign/builtin-apply-2.c | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/gcc/testsuite/gcc.dg/builtin-apply2.c
b/gcc/testsuite/gcc.dg/builtin-apply2.c
index 3768caa5d5a..6ede0f3054b 100644
--- a/gcc/testsuite/gcc.dg/builtin-apply2.c
+++ b/gcc/testsuite/gcc.dg/builtin-apply2.c
@@ -1,7 +1,7 @@
/* { dg-do run } */
/* { dg-require-effective-target untyped_assembly } */
/* { dg-skip-if "Variadic funcs have all args on stack. Normal funcs have args
in registers." { "avr-*-* nds32*-*-*" } } */
-/* { dg-skip-if "Variadic funcs use different argument passing from normal
funcs." { "riscv*-*-*" } } */
+/* { dg-skip-if "Variadic funcs use different argument passing from normal
funcs." { "riscv*-*-* pru-*-*" } } */
/* { dg-skip-if "Variadic funcs use Base AAPCS. Normal funcs use VFP
variant." { arm*-*-* && arm_hf_eabi } } */
/* PR target/12503 */
diff --git a/gcc/testsuite/gcc.dg/torture/stackalign/builtin-apply-2.c
b/gcc/testsuite/gcc.dg/torture/stackalign/builtin-apply-2.c
index d033010dc7c..8b6e693c0f2 100644
--- a/gcc/testsuite/gcc.dg/torture/stackalign/builtin-apply-2.c
+++ b/gcc/testsuite/gcc.dg/torture/stackalign/builtin-apply-2.c
@@ -9,7 +9,7 @@
/* arm_hf_eabi: Variadic funcs use Base AAPCS. Normal funcs use VFP variant.
avr: Variadic funcs don't pass arguments in registers, while normal funcs
do. */
-/* { dg-skip-if "Variadic funcs use different argument passing from normal
funcs" { arm_hf_eabi || { avr-*-* riscv*-*-* } } } */
+/* { dg-skip-if "Variadic funcs use different argument passing from normal
funcs" { arm_hf_eabi || { avr-*-* riscv*-*-* pru-*-* } } } */
/* { dg-skip-if "Variadic funcs have all args on stack. Normal funcs have args
in registers." { nds32*-*-* } } */
/* { dg-require-effective-target untyped_assembly } */
--
2.11.0
[PATCH v5 06/10] testsuite: Remove PRU from test cases requiring hosted environment
gcc/testsuite/ChangeLog: 2018-10-08 Dimitar Dimitrov * gcc.c-torture/execute/20101011-1.c: Define DO_TEST to 0 for PRU. * gcc.dg/20020312-2.c: No PIC register for PRU. Signed-off-by: Dimitar Dimitrov --- gcc/testsuite/gcc.c-torture/execute/20101011-1.c | 3 +++ gcc/testsuite/gcc.dg/20020312-2.c| 2 ++ 2 files changed, 5 insertions(+) diff --git a/gcc/testsuite/gcc.c-torture/execute/20101011-1.c b/gcc/testsuite/gcc.c-torture/execute/20101011-1.c index 8261b796a47..aa06dbfb73a 100644 --- a/gcc/testsuite/gcc.c-torture/execute/20101011-1.c +++ b/gcc/testsuite/gcc.c-torture/execute/20101011-1.c @@ -100,6 +100,9 @@ __aeabi_idiv0 (int return_value) #elif defined (__moxie__) /* Not all moxie configurations may raise exceptions. */ # define DO_TEST 0 +#elif defined (__pru__) +/* There isn't even a signal function. */ +# define DO_TEST 0 #else # define DO_TEST 1 #endif diff --git a/gcc/testsuite/gcc.dg/20020312-2.c b/gcc/testsuite/gcc.dg/20020312-2.c index 1a8afd81506..133862f3421 100644 --- a/gcc/testsuite/gcc.dg/20020312-2.c +++ b/gcc/testsuite/gcc.dg/20020312-2.c @@ -117,6 +117,8 @@ extern void abort (void); # if defined (__CK807__) || defined (__CK810__) # define PIC_REG "r28" # endif +#elif defined(__PRU__) +/* No pic register. */ #else # error "Modify the test for your target." #endif -- 2.11.0
[PATCH v5 07/10] testsuite: Define PRU stack usage
gcc/testsuite/ChangeLog: 2018-10-08 Dimitar Dimitrov * gcc.dg/stack-usage-1.c: Define PRU stack usage. Signed-off-by: Dimitar Dimitrov --- gcc/testsuite/gcc.dg/stack-usage-1.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/gcc/testsuite/gcc.dg/stack-usage-1.c b/gcc/testsuite/gcc.dg/stack-usage-1.c index e6440142e1d..b2642228808 100644 --- a/gcc/testsuite/gcc.dg/stack-usage-1.c +++ b/gcc/testsuite/gcc.dg/stack-usage-1.c @@ -93,6 +93,8 @@ # define SIZE 254 #elif defined (__nios2__) # define SIZE 252 +#elif defined (__PRU__) +# define SIZE 252 #elif defined (__v850__) #define SIZE 260 #elif defined (__mn10300__) -- 2.11.0
[PATCH v5 03/10] testsuite: Add PRU tests
gcc/testsuite/ChangeLog: 2018-10-08 Dimitar Dimitrov * gcc.target/pru/abi-arg-struct.c: New test. * gcc.target/pru/ashiftrt.c: New test. * gcc.target/pru/builtins-1.c: New test. * gcc.target/pru/builtins-error.c: New test. * gcc.target/pru/clearbit.c: New test. * gcc.target/pru/loop-asm.c: New test. * gcc.target/pru/loop-dowhile.c: New test. * gcc.target/pru/loop-hi-1.c: New test. * gcc.target/pru/loop-hi-2.c: New test. * gcc.target/pru/loop-qi-1.c: New test. * gcc.target/pru/loop-qi-2.c: New test. * gcc.target/pru/loop-short-1.c: New test. * gcc.target/pru/loop-short-2.c: New test. * gcc.target/pru/loop-si-1.c: New test. * gcc.target/pru/loop-si-2.c: New test. * gcc.target/pru/loop-u8_pcrel_overflow.c: New test. * gcc.target/pru/loop-ubyte-1.c: New test. * gcc.target/pru/loop-ubyte-2.c: New test. * gcc.target/pru/lra-framepointer-fragmentation-1.c: New test. * gcc.target/pru/lra-framepointer-fragmentation-2.c: New test. * gcc.target/pru/mabi-ti-1.c: New test. * gcc.target/pru/mabi-ti-2.c: New test. * gcc.target/pru/mabi-ti-3.c: New test. * gcc.target/pru/mabi-ti-4.c: New test. * gcc.target/pru/mabi-ti-5.c: New test. * gcc.target/pru/mabi-ti-6.c: New test. * gcc.target/pru/mabi-ti-7.c: New test. * gcc.target/pru/pr64366.c: New test. * gcc.target/pru/pragma-ctable_entry.c: New test. * gcc.target/pru/pru.exp: New file. * gcc.target/pru/qbbc-1.c: New test. * gcc.target/pru/qbbc-2.c: New test. * gcc.target/pru/qbbc-3.c: New test. * gcc.target/pru/qbbs-1.c: New test. * gcc.target/pru/qbbs-2.c: New test. * gcc.target/pru/setbit.c: New test. * gcc.target/pru/zero_extend-and-hisi.c: New test. * gcc.target/pru/zero_extend-and-qihi.c: New test. * gcc.target/pru/zero_extend-and-qisi.c: New test. * gcc.target/pru/zero_extend-hisi.c: New test. * gcc.target/pru/zero_extend-qihi.c: New test. * gcc.target/pru/zero_extend-qisi.c: New test. * lib/target-supports.exp: Add PRU to feature filters. Signed-off-by: Dimitar Dimitrov --- gcc/testsuite/gcc.target/pru/abi-arg-struct.c | 164 + gcc/testsuite/gcc.target/pru/ashiftrt.c| 13 ++ gcc/testsuite/gcc.target/pru/builtins-1.c | 12 ++ gcc/testsuite/gcc.target/pru/builtins-error.c | 6 + gcc/testsuite/gcc.target/pru/clearbit.c| 13 ++ gcc/testsuite/gcc.target/pru/loop-asm.c| 19 +++ gcc/testsuite/gcc.target/pru/loop-dowhile.c| 45 ++ gcc/testsuite/gcc.target/pru/loop-hi-1.c | 38 + gcc/testsuite/gcc.target/pru/loop-hi-2.c | 17 +++ gcc/testsuite/gcc.target/pru/loop-qi-1.c | 38 + gcc/testsuite/gcc.target/pru/loop-qi-2.c | 17 +++ gcc/testsuite/gcc.target/pru/loop-short-1.c| 53 +++ gcc/testsuite/gcc.target/pru/loop-short-2.c| 21 +++ gcc/testsuite/gcc.target/pru/loop-si-1.c | 41 ++ gcc/testsuite/gcc.target/pru/loop-si-2.c | 20 +++ .../gcc.target/pru/loop-u8_pcrel_overflow.c| 42 ++ gcc/testsuite/gcc.target/pru/loop-ubyte-1.c| 30 gcc/testsuite/gcc.target/pru/loop-ubyte-2.c| 18 +++ .../pru/lra-framepointer-fragmentation-1.c | 33 + .../pru/lra-framepointer-fragmentation-2.c | 61 gcc/testsuite/gcc.target/pru/mabi-ti-1.c | 10 ++ gcc/testsuite/gcc.target/pru/mabi-ti-2.c | 15 ++ gcc/testsuite/gcc.target/pru/mabi-ti-3.c | 12 ++ gcc/testsuite/gcc.target/pru/mabi-ti-4.c | 14 ++ gcc/testsuite/gcc.target/pru/mabi-ti-5.c | 33 + gcc/testsuite/gcc.target/pru/mabi-ti-6.c | 12 ++ gcc/testsuite/gcc.target/pru/mabi-ti-7.c | 21 +++ gcc/testsuite/gcc.target/pru/pr64366.c | 128 gcc/testsuite/gcc.target/pru/pragma-ctable_entry.c | 22 +++ gcc/testsuite/gcc.target/pru/pru.exp | 41 ++ gcc/testsuite/gcc.target/pru/qbbc-1.c | 29 gcc/testsuite/gcc.target/pru/qbbc-2.c | 15 ++ gcc/testsuite/gcc.target/pru/qbbc-3.c | 15 ++ gcc/testsuite/gcc.target/pru/qbbs-1.c | 29 gcc/testsuite/gcc.target/pru/qbbs-2.c | 15 ++ gcc/testsuite/gcc.target/pru/setbit.c | 13 ++ .../gcc.target/pru/zero_extend-and-hisi.c | 16 ++ .../gcc.target/pru/zero_extend-and-qihi.c | 16 ++ .../gcc.target/pru/zero_extend-and-qisi.c | 16 ++ gcc/testsuite/gcc.target/pru/zero_extend-hisi.c| 43 ++ gcc/testsuite/gcc.target/pru/zero_extend-qihi.c| 43 ++ gcc/testsuite/gcc.target/pru/zero_extend-qisi.c| 43 ++ gcc/testsuite/lib/target-supports.exp
[PATCH v5 05/10] testsuite: Add check for unsupported TI ABI PRU features to testsuite
Not all C language features are supported when -mabi=ti option is
used for PRU target.
gcc/testsuite/ChangeLog:
2018-10-08 Dimitar Dimitrov
* lib/gcc-dg.exp: Filter unsupported features in PRU's TI ABI mode.
* lib/target-utils.exp: Ditto.
* lib/target-supports.exp (check_effective_target_function_pointers,
check_effective_target_large_return_values): New.
Signed-off-by: Dimitar Dimitrov
---
gcc/testsuite/lib/gcc-dg.exp | 11 +++
gcc/testsuite/lib/target-supports.exp | 26 ++
gcc/testsuite/lib/target-utils.exp| 8
3 files changed, 45 insertions(+)
diff --git a/gcc/testsuite/lib/gcc-dg.exp b/gcc/testsuite/lib/gcc-dg.exp
index 59c10016014..3287184c0bb 100644
--- a/gcc/testsuite/lib/gcc-dg.exp
+++ b/gcc/testsuite/lib/gcc-dg.exp
@@ -407,6 +407,17 @@ proc gcc-dg-prune { system text } {
return "::unsupported::memory full"
}
+if { [string match "*error: function pointers not supported*" $text]
+ && ![check_effective_target_function_pointers] } {
+ # The format here is important. See dg.exp.
+ return "::unsupported::funcptr"
+}
+if { [string match "*error: large return values not supported*" $text]
+ && ![check_effective_target_large_return_values] } {
+ # The format here is important. See dg.exp.
+ return "::unsupported::large return values"
+}
+
return $text
}
diff --git a/gcc/testsuite/lib/target-supports.exp
b/gcc/testsuite/lib/target-supports.exp
index 13e32377885..6e475df0922 100644
--- a/gcc/testsuite/lib/target-supports.exp
+++ b/gcc/testsuite/lib/target-supports.exp
@@ -2602,6 +2602,32 @@ proc check_effective_target_ptr32plus { } {
}]
}
+# Return 1 if target supports function pointers, 0 otherwise.
+
+proc check_effective_target_function_pointers { } {
+if { [istarget pru-*-*] } {
+ return [check_no_compiler_messages func_ptr_avail assembly {
+ #ifdef __PRU_EABI_GNU__
+ #error unsupported
+ #endif
+ }]
+}
+return 1
+}
+
+# Return 1 if target supports arbitrarily large return values, 0 otherwise.
+
+proc check_effective_target_large_return_values { } {
+if { [istarget pru-*-*] } {
+ return [check_no_compiler_messages func_ptr_avail assembly {
+ #ifdef __PRU_EABI_GNU__
+ #error unsupported
+ #endif
+ }]
+}
+return 1
+}
+
# Return 1 if we support 32-bit or larger array and structure sizes
# using default options, 0 otherwise. Avoid false positive on
# targets with 20 or 24 bit address spaces.
diff --git a/gcc/testsuite/lib/target-utils.exp
b/gcc/testsuite/lib/target-utils.exp
index 732a1827a02..f636be2cb01 100644
--- a/gcc/testsuite/lib/target-utils.exp
+++ b/gcc/testsuite/lib/target-utils.exp
@@ -44,5 +44,13 @@ proc ${tool}_check_unsupported_p { output } {
[string match "*exceeds local store*" $output] } {
return "memory full"
}
+if { [string match "*error: function pointers not supported*" $output]
+ && ![check_effective_target_function_pointers] } {
+ return "function pointers not supported"
+}
+if { [string match "*error: large return values not supported*" $output]
+ && ![check_effective_target_large_return_values] } {
+ return "large return values not supported"
+}
return ""
}
--
2.11.0
[PATCH v5 02/10] Initial TI PRU libgcc port
The floating point support has been borrowed from C6X libgcc port
to help with TI PRU toolchain ABI compatibility.
libgcc/ChangeLog:
2018-10-08 Dimitar Dimitrov
* config.host: Add PRU target.
* config/pru/asri.c: New file.
* config/pru/eqd.c: New file.
* config/pru/eqf.c: New file.
* config/pru/ged.c: New file.
* config/pru/gef.c: New file.
* config/pru/gtd.c: New file.
* config/pru/gtf.c: New file.
* config/pru/led.c: New file.
* config/pru/lef.c: New file.
* config/pru/lib2bitcountHI.c: New file.
* config/pru/lib2divHI.c: New file.
* config/pru/lib2divQI.c: New file.
* config/pru/lib2divSI.c: New file.
* config/pru/libgcc-eabi.ver: New file.
* config/pru/ltd.c: New file.
* config/pru/ltf.c: New file.
* config/pru/mpyll.S: New file.
* config/pru/pru-abi.h: New file.
* config/pru/pru-asm.h: New file.
* config/pru/pru-divmod.h: New file.
* config/pru/sfp-machine.h: New file.
* config/pru/t-pru: New file.
Signed-off-by: Dimitar Dimitrov
---
libgcc/config.host | 7 +++
libgcc/config/pru/asri.c | 33 ++
libgcc/config/pru/eqd.c| 45 +
libgcc/config/pru/eqf.c| 45 +
libgcc/config/pru/ged.c| 45 +
libgcc/config/pru/gef.c| 45 +
libgcc/config/pru/gtd.c| 45 +
libgcc/config/pru/gtf.c| 45 +
libgcc/config/pru/led.c| 45 +
libgcc/config/pru/lef.c| 45 +
libgcc/config/pru/lib2bitcountHI.c | 43 +
libgcc/config/pru/lib2divHI.c | 42 +
libgcc/config/pru/lib2divQI.c | 42 +
libgcc/config/pru/lib2divSI.c | 48 ++
libgcc/config/pru/libgcc-eabi.ver | 88 ++
libgcc/config/pru/ltd.c| 45 +
libgcc/config/pru/ltf.c| 45 +
libgcc/config/pru/mpyll.S | 57 +
libgcc/config/pru/pru-abi.h| 109
libgcc/config/pru/pru-asm.h| 35 +++
libgcc/config/pru/pru-divmod.h | 117 ++
libgcc/config/pru/sfp-machine.h| 125 +
libgcc/config/pru/t-pru| 50 +++
23 files changed, 1246 insertions(+)
create mode 100644 libgcc/config/pru/asri.c
create mode 100644 libgcc/config/pru/eqd.c
create mode 100644 libgcc/config/pru/eqf.c
create mode 100644 libgcc/config/pru/ged.c
create mode 100644 libgcc/config/pru/gef.c
create mode 100644 libgcc/config/pru/gtd.c
create mode 100644 libgcc/config/pru/gtf.c
create mode 100644 libgcc/config/pru/led.c
create mode 100644 libgcc/config/pru/lef.c
create mode 100644 libgcc/config/pru/lib2bitcountHI.c
create mode 100644 libgcc/config/pru/lib2divHI.c
create mode 100644 libgcc/config/pru/lib2divQI.c
create mode 100644 libgcc/config/pru/lib2divSI.c
create mode 100644 libgcc/config/pru/libgcc-eabi.ver
create mode 100644 libgcc/config/pru/ltd.c
create mode 100644 libgcc/config/pru/ltf.c
create mode 100644 libgcc/config/pru/mpyll.S
create mode 100644 libgcc/config/pru/pru-abi.h
create mode 100644 libgcc/config/pru/pru-asm.h
create mode 100644 libgcc/config/pru/pru-divmod.h
create mode 100644 libgcc/config/pru/sfp-machine.h
create mode 100644 libgcc/config/pru/t-pru
diff --git a/libgcc/config.host b/libgcc/config.host
index 029f6569caf..5206b5dc9d7 100644
--- a/libgcc/config.host
+++ b/libgcc/config.host
@@ -168,6 +168,9 @@ nios2*-*-*)
powerpc*-*-*)
cpu_type=rs6000
;;
+pru-*-*)
+ cpu_type=pru
+ ;;
rs6000*-*-*)
;;
riscv*-*-*)
@@ -1158,6 +1161,10 @@ powerpcle-*-eabi*)
tmake_file="${tmake_file} rs6000/t-ppccomm rs6000/t-crtstuff
t-crtstuff-pic t-fdpbit"
extra_parts="$extra_parts crtbegin.o crtend.o crtbeginS.o crtendS.o
crtbeginT.o ecrti.o ecrtn.o ncrti.o ncrtn.o"
;;
+pru-*-*)
+ tmake_file="${tmake_file} t-softfp-sfdf t-softfp-excl t-softfp
t-gnu-prefix pru/t-pru"
+ tm_file="$tm_file pru/pru-abi.h"
+ ;;
riscv*-*-linux*)
tmake_file="${tmake_file} riscv/t-softfp${host_address} t-softfp
riscv/t-elf riscv/t-elf${host_address}"
extra_parts="$extra_parts crtbegin.o crtend.o crti.o crtn.o crtendS.o
crtbeginT.o"
diff --git a/libgcc/config/pru/asri.c b/libgcc/config/pru/asri.c
new file mode 100644
index 000..591d660f227
--- /dev/null
+++ b/libgcc/config/pru/asri.c
@@ -0,0 +1,33 @@
+/* PRU ABI compatibility functions
+ Arithmetic right shift
+ Copyright (C) 2017-2018 Free Software Foundation, Inc.
+ Contributed by Dimitar Dimitrov
+
+ This file is free software; you can redistribute it and/or
+
[PATCH v5 04/10] testsuite: Add check for overflowed IMEM region to testsuite
PRU architecture supports maximum 256k program memory (IMEM). Some GCC
test cases manage to produce executables bigger than that.
gcc/testsuite/ChangeLog:
2018-10-08 Dimitar Dimitrov
* lib/gcc-dg.exp: Bail on region overflow for tiny targets.
* lib/target-utils.exp: Ditto.
* lib/target-supports.exp: Declare PRU target as tiny.
Signed-off-by: Dimitar Dimitrov
---
gcc/testsuite/lib/gcc-dg.exp | 5 +
gcc/testsuite/lib/target-supports.exp | 5 +
gcc/testsuite/lib/target-utils.exp| 4
3 files changed, 14 insertions(+)
diff --git a/gcc/testsuite/lib/gcc-dg.exp b/gcc/testsuite/lib/gcc-dg.exp
index c33a50c0b13..59c10016014 100644
--- a/gcc/testsuite/lib/gcc-dg.exp
+++ b/gcc/testsuite/lib/gcc-dg.exp
@@ -394,6 +394,11 @@ proc gcc-dg-prune { system text } {
return "::unsupported::memory full"
}
+if { [regexp "(^|\n)\[^\n\]*: region \[^\n\]* overflowed" $text]
+ && [check_effective_target_tiny] } {
+ return "::unsupported::memory full"
+}
+
# Likewise, if we see ".text exceeds local store range" or
# similar.
if {[string match "spu-*" $system] && \
diff --git a/gcc/testsuite/lib/target-supports.exp
b/gcc/testsuite/lib/target-supports.exp
index 8caea35edff..13e32377885 100644
--- a/gcc/testsuite/lib/target-supports.exp
+++ b/gcc/testsuite/lib/target-supports.exp
@@ -8377,6 +8377,11 @@ proc check_effective_target_tiny {} {
&& [check_effective_target_avr_tiny] } {
return 1
}
+ # PRU Program Counter is 16-bits, and trampolines are not supported.
+ # Hence directly declare as a tiny target.
+ if [istarget pru-*-*] {
+ return 1
+ }
return 0
}]
}
diff --git a/gcc/testsuite/lib/target-utils.exp
b/gcc/testsuite/lib/target-utils.exp
index bd39cc5bc79..732a1827a02 100644
--- a/gcc/testsuite/lib/target-utils.exp
+++ b/gcc/testsuite/lib/target-utils.exp
@@ -35,6 +35,10 @@ proc ${tool}_check_unsupported_p { output } {
&& [check_effective_target_tiny] } {
return "memory full"
}
+if { [regexp "(^|\n)\[^\n\]*: region \[^\n\]* overflowed" $output]
+ && [check_effective_target_tiny] } {
+ return "memory full"
+}
if { [istarget spu-*-*] && \
[string match "*exceeds local store*" $output] } {
--
2.11.0
[PATCH v5 00/10] New backend for the TI PRU processor
This is the latest patch set for adding TI PRU I/O processor backend to GCC. Comments from all previous series have been addressed [1], [2], [3], [4]. Test results can be downloaded from here: http://dinux.eu/gnupru/testresults/20181014-c45bebb5ee9 Changes since patch series v4 [4]: - Handle QI const_int signedness using a new "ubyte_constr" mode_attr. - Tuned the FP register semantics to align with TI recommendations. - Rewrote "mul" pattern with a more robust way to handle the fixed HW registers. - Use output_operand_lossage instead of asserts for modifier validation. - Reworked "ashr" to expand to an RTL loop. - Whitespace, comment and indentation fixes. - Clarified documentation. - Removed "sub" pattern with constant operand 2. - Simplified code to use strip_offset and plus_constant. - Removed length attribute when declared with default value. - Marked internal constraints with @intern. - Removed PRU's TARGET_MODES_TIEABLE_P callback. - Removed PRU's TARGET_PREFERRED_RELOAD_CLASS callback. - Refactored code to use the TARGET_COMPUTE_FRAME_LAYOUT hook. - Enabled TARGET_SUPPORTS_WIDE_INT. - Removed references to reg_renumber. - Used more robust method to discern direct function calls from function pointer references, for -mabi=ti enforcement. - Simplified pru_function_arg_regi and put more comments. [1] http://gcc.gnu.org/ml/gcc-patches/2018-06/msg00775.html [2] http://gcc.gnu.org/ml/gcc-patches/2018-07/msg01779.html [3] http://gcc.gnu.org/ml/gcc-patches/2018-08/msg00927.html [4] http://gcc.gnu.org/ml/gcc-patches/2018-09/msg00392.html Regards, Dimitar Dimitar Dimitrov (10): Initial TI PRU GCC port Initial TI PRU libgcc port testsuite: Add PRU tests testsuite: Add check for overflowed IMEM region to testsuite testsuite: Add check for unsupported TI ABI PRU features to testsuite testsuite: Remove PRU from test cases requiring hosted environment testsuite: Define PRU stack usage testsuite: Mark that PRU has one-cycle jumps testsuite: Mark that PRU uses all function pointer bits testsuite: Mark testsuite that PRU has different calling convention configure.ac |7 + gcc/common/config/pru/pru-common.c | 36 + gcc/config.gcc |9 + gcc/config/pru/alu-zext.md | 181 ++ gcc/config/pru/constraints.md | 108 + gcc/config/pru/predicates.md | 290 ++ gcc/config/pru/pru-opts.h | 31 + gcc/config/pru/pru-passes.c| 228 ++ gcc/config/pru/pru-pragma.c| 86 + gcc/config/pru/pru-protos.h| 72 + gcc/config/pru/pru.c | 3003 gcc/config/pru/pru.h | 572 gcc/config/pru/pru.md | 1022 +++ gcc/config/pru/pru.opt | 54 + gcc/config/pru/t-pru | 31 + gcc/doc/extend.texi| 21 + gcc/doc/invoke.texi| 65 + gcc/doc/md.texi| 19 + gcc/testsuite/g++.old-deja/g++.abi/ptrmem.C|2 +- gcc/testsuite/gcc.c-torture/execute/20101011-1.c |3 + gcc/testsuite/gcc.dg/20020312-2.c |2 + gcc/testsuite/gcc.dg/builtin-apply2.c |2 +- gcc/testsuite/gcc.dg/stack-usage-1.c |2 + .../gcc.dg/torture/stackalign/builtin-apply-2.c|2 +- gcc/testsuite/gcc.dg/tree-ssa/20040204-1.c |2 +- gcc/testsuite/gcc.dg/tree-ssa/reassoc-33.c |2 +- gcc/testsuite/gcc.dg/tree-ssa/reassoc-34.c |2 +- gcc/testsuite/gcc.dg/tree-ssa/reassoc-35.c |2 +- gcc/testsuite/gcc.dg/tree-ssa/reassoc-36.c |2 +- gcc/testsuite/gcc.dg/tree-ssa/ssa-thread-14.c |2 +- gcc/testsuite/gcc.target/pru/abi-arg-struct.c | 164 ++ gcc/testsuite/gcc.target/pru/ashiftrt.c| 13 + gcc/testsuite/gcc.target/pru/builtins-1.c | 12 + gcc/testsuite/gcc.target/pru/builtins-error.c |6 + gcc/testsuite/gcc.target/pru/clearbit.c| 13 + gcc/testsuite/gcc.target/pru/loop-asm.c| 19 + gcc/testsuite/gcc.target/pru/loop-dowhile.c| 45 + gcc/testsuite/gcc.target/pru/loop-hi-1.c | 38 + gcc/testsuite/gcc.target/pru/loop-hi-2.c | 17 + gcc/testsuite/gcc.target/pru/loop-qi-1.c | 38 + gcc/testsuite/gcc.target/pru/loop-qi-2.c | 17 + gcc/testsuite/gcc.target/pru/loop-short-1.c| 53 + gcc/testsuite/gcc.target/pru/loop-short-2.c| 21 + gcc/testsuite/gcc.target/pru/loop-si-1.c | 41 + gcc/testsuite/gcc.target/pru/loop-si-2.c | 20 + .../gcc.target/pr
Re: [PATCH v4 01/10] Initial TI PRU GCC port
On Monday, 9/24/2018 11:38:23 EEST Richard Sandiford wrote:
> Dimitar Dimitrov writes:
> > On Thursday, 9/13/2018 13:02:21 EEST Richard Sandiford wrote:
> >> Dimitar Dimitrov writes:
> >> > +/* Callback for walk_gimple_seq that checks TP tree for TI ABI
> >> > compliance. */ +static tree
> >> > +check_op_callback (tree *tp, int *walk_subtrees, void *data)
> >> > +{
> >> > + struct walk_stmt_info *wi = (struct walk_stmt_info *) data;
> >> > +
> >> > + if (RECORD_OR_UNION_TYPE_P (*tp) || TREE_CODE (*tp) ==
> >> > ENUMERAL_TYPE)
> >> > +{
> >> > + /* Forward declarations have NULL tree type. Skip them. */
> >> > + if (TREE_TYPE (*tp) == NULL)
> >> > +return NULL;
> >> > +}
> >> > +
> >> > + /* TODO - why C++ leaves INTEGER_TYPE forward declarations around?
> >> > */
> >> > + if (TREE_TYPE (*tp) == NULL)
> >> > +return NULL;
> >> > +
> >> > + const tree type = TREE_TYPE (*tp);
> >> > +
> >> > + /* Direct function calls are allowed, obviously. */
> >> > + if (TREE_CODE (*tp) == ADDR_EXPR && TREE_CODE (type) ==
> >> > POINTER_TYPE)
> >> > +{
> >> > + const tree ptype = TREE_TYPE (type);
> >> > + if (TREE_CODE (ptype) == FUNCTION_TYPE)
> >> > +return NULL;
> >> > +}
> >>
> >> This seems like a bit of a dangerous heuristic. Couldn't it also cause
> >>
> >> us to skip things like:
> >>(void *) func
> >>
> >> ? (OK, that's dubious C, but we do support it.)
> >
> > The cast yields a "data pointer", which is 32 bits for both types of ABI.
> > Hence it is safe to skip "(void *) func".
> >
> > The TI ABI's 16 bit function pointers become a problem when they change
> > the
> > layout of structures and function argument registers.
>
> OK. The reason this stood out is that the code doesn't obviously match
> the comment. If the code is just trying to skip direct function calls,
> I think the gcall sequence I mentioned would be more obvious, and would
> match the existing comment. If anything that takes the address of a
> function is OK then it might be worth changing the comment to include that.
I will use your suggested gcall snippet since it is safe and obvious. The
comment matches my original intent.
> >> > +/* Implement TARGET_PREFERRED_RELOAD_CLASS. */
> >> > +static reg_class_t
> >> > +pru_preferred_reload_class (rtx x ATTRIBUTE_UNUSED, reg_class_t
> >> > regclass)
> >> > +{
> >> > + return regclass == NO_REGS ? GENERAL_REGS : regclass;
> >> > +}
> >>
> >> This looks odd: PREFERRED_RELOAD_CLASS should return a subset of the
> >> original class rather than add new registers. Can you remember why
> >> it was needed?
> >
> > I'm not sure what target code is supposed to return when NO_REGS is passed
> > here. I saw how other ports handle NO_REGS (c-sky, m32c, nios2, rl78). So
> > I
> > followed suite.
> >
> > Here is a backtrace of LRA when NO_REGS is passed:
> > 0xf629ae pru_preferred_reload_class
> >
> > ../../gcc/gcc/config/pru/pru.c:788
> >
> > 0xa3d6e8 process_alt_operands
> >
> > ../../gcc/gcc/lra-constraints.c:2600
> >
> > 0xa3ef7d curr_insn_transform
> >
> > ../../gcc/gcc/lra-constraints.c:3889
> >
> > 0xa4301e lra_constraints(bool)
> >
> > ../../gcc/gcc/lra-constraints.c:4906
> >
> > 0xa2726c lra(_IO_FILE*)
> >
> > ../../gcc/gcc/lra.c:2446
> >
> > 0x9c97a9 do_reload
> >
> > ../../gcc/gcc/ira.c:5469
> >
> > 0x9c97a9 execute
> >
> > ../../gcc/gcc/ira.c:5653
>
> I think it should just pass NO_REGS through unmodified (which means
> spill to memory). In some ways it would be good if it didn't have to
> handle this case, but again that's going to be work to fix.
>
> The RA will pass ALL_REGS if it can handle any register, and wants to
> know what the target would prefer. But for any input, the hook needs
> to stick within the registers it was given.
Thanks for the clarification. I will remove the PRU hook and will rely on the
default implementation (i.e. return the given rclass).
> >> > +; LRA cannot cope with clobbered op2, hence the scratch register.
> >> > +(define_insn &quo
Re: [PATCH v4 01/10] Initial TI PRU GCC port
On Thursday, 9/13/2018 13:02:21 EEST Richard Sandiford wrote:
> Dimitar Dimitrov writes:
> > +(define_insn
> > "sub_impl_ > _zext_op2>" + [(set (match_operand:EQD 0 "register_operand" "=r,r,r")
> > + (minus:EQD
> > +(zero_extend:EQD
> > + (match_operand:EQS0 1 "reg_or_ubyte_operand" "r,r,I"))
> > +(zero_extend:EQD
> > + (match_operand:EQS1 2 "reg_or_ubyte_operand" "r,I,r"]
> > + ""
> > + "@
> > + sub\\t%0, %1, %2
> > + sub\\t%0, %1, %2
> > + rsb\\t%0, %2, %1"
> > + [(set_attr "type" "alu")
> > + (set_attr "length" "4")])
>
> By convention, subtraction patterns shouldn't accept constants for
> operand 2. Constants should instead be subtracted using an addition
> of the negative.
Understood. I will remove second alternative. But I will leave the third one
since it enables an important optimization:
unsigned test(unsigned a)
{
return 10-a;
}
RTL:
(insn 6 3 7 2 (set (reg:SI 152)
(minus:SI (const_int 10 [0xa])
(reg/v:SI 151 [ a ]))) "test.c":430 -1
(nil))
Assembly:
test:
rsb r14, r14, 10
ret
>
> > +(define_constraint "I"
> > + "An unsigned 8-bit constant."
> > + (and (match_code "const_int")
> > + (match_test "UBYTE_INT (ival)")))
>
> As it stands this will reject QImode constants with the top bit set,
> since const_ints are always stored in sign-extended form. E.g. QImode
> 128 is stored as (const_int -128) rather than (const_int 128).
>
> Unfortunately this is difficult to fix in a clean way, since
> const_ints don't store their mode (a long-standing wart) and unlike
> predicates, constraints aren't given a mode from context. The best
> way I can think of coping with it is:
>
> a) have a separate constraint for -128...127
> b) add a define_mode_attr that maps QI to the new constraint and
>HI and SI to I
> c) use etc. instead of I in the match_operands
>
> Similar comment for "J" and HImode, although you already have the
> "N" as the corresponding signed constraint and so don't need a new one.
Thank you. This strategy worked for QImode. I will include the changes in my
next patch.
Since PRU ALU operations do not have 16-bit constant operands, there is no
need to add define_mode_attr for HImode. The "mov" pattern already handles the
"N" [-32768, 32767] constraint.
>
>
> > +;; Return true if OP is a text segment reference.
> > +;; This is needed for program memory address expressions. Borrowed from
> > AVR. +(define_predicate "text_segment_operand"
> > + (match_code "code_label,label_ref,symbol_ref,plus,minus,const")
> > +{
> > + switch (GET_CODE (op))
> > +{
> > +case CODE_LABEL:
> > + return true;
> > +case LABEL_REF :
> > + return true;
> > +case SYMBOL_REF :
> > + return SYMBOL_REF_FUNCTION_P (op);
> > +case PLUS :
> > +case MINUS :
> > + /* Assume canonical format of symbol + constant.
> > +Fall through. */
> > +case CONST :
> > + return text_segment_operand (XEXP (op, 0), VOIDmode);
> > +default :
> > + return false;
> > +}
> > +})
>
> This probably comes from AVR, but: no spaces before ":".
>
> Bit surprised that we can get a CODE_LABEL rather than a LABEL_REF here.
> Do you know if that triggers in practice, and if so where?
Indeed, CODE_LABEL case is never reached. I'll leave gcc_unreachable here.
> An IMO neater and slightly more robust way of writing the body is:
> poly_int64 offset:
> rtx base = strip_offset (op, );
> switch (GET_CODE (base))
>
> {
>
> case LABEL_REF:
> ...as above...
>
> case SYMBOL_REF:
> ...as above...
>
> default:
> return false;
>
> }
>
> with "plus" and "minus" not in the match_code list (since they should
> always appear in consts if they really are text references).
The "plus" and "minus" are needed when handling code labels as values. Take
for example the following construct:
int x = & - &
lab1:
...
lab2:
My TARGET_ASM_INTEGER callback uses the text_segment_operand predicate. In the
above case it is passed the following RTL expression:
(minus:SI (label_ref/v:SI 20)
(label_ref/v:SI 27))
I need to detect text labels so that I annotate them with %pmem:
.4byte %pmem(.L4-(.L2))
Instead of th
[PATCH v4 10/10] testsuite: Mark testsuite that PRU has different calling convention
For variadic functions, the last named and all anonymous arguments
are passed on stack. Regular functions pass arguments in registers.
gcc/testsuite/ChangeLog:
2018-08-29 Dimitar Dimitrov
* gcc.dg/builtin-apply2.c: Skip for PRU.
* gcc.dg/torture/stackalign/builtin-apply-2.c: Ditto.
Signed-off-by: Dimitar Dimitrov
---
gcc/testsuite/gcc.dg/builtin-apply2.c | 2 +-
gcc/testsuite/gcc.dg/torture/stackalign/builtin-apply-2.c | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/gcc/testsuite/gcc.dg/builtin-apply2.c
b/gcc/testsuite/gcc.dg/builtin-apply2.c
index 3768caa5d5a..6ede0f3054b 100644
--- a/gcc/testsuite/gcc.dg/builtin-apply2.c
+++ b/gcc/testsuite/gcc.dg/builtin-apply2.c
@@ -1,7 +1,7 @@
/* { dg-do run } */
/* { dg-require-effective-target untyped_assembly } */
/* { dg-skip-if "Variadic funcs have all args on stack. Normal funcs have args
in registers." { "avr-*-* nds32*-*-*" } } */
-/* { dg-skip-if "Variadic funcs use different argument passing from normal
funcs." { "riscv*-*-*" } } */
+/* { dg-skip-if "Variadic funcs use different argument passing from normal
funcs." { "riscv*-*-* pru-*-*" } } */
/* { dg-skip-if "Variadic funcs use Base AAPCS. Normal funcs use VFP
variant." { arm*-*-* && arm_hf_eabi } } */
/* PR target/12503 */
diff --git a/gcc/testsuite/gcc.dg/torture/stackalign/builtin-apply-2.c
b/gcc/testsuite/gcc.dg/torture/stackalign/builtin-apply-2.c
index d033010dc7c..8b6e693c0f2 100644
--- a/gcc/testsuite/gcc.dg/torture/stackalign/builtin-apply-2.c
+++ b/gcc/testsuite/gcc.dg/torture/stackalign/builtin-apply-2.c
@@ -9,7 +9,7 @@
/* arm_hf_eabi: Variadic funcs use Base AAPCS. Normal funcs use VFP variant.
avr: Variadic funcs don't pass arguments in registers, while normal funcs
do. */
-/* { dg-skip-if "Variadic funcs use different argument passing from normal
funcs" { arm_hf_eabi || { avr-*-* riscv*-*-* } } } */
+/* { dg-skip-if "Variadic funcs use different argument passing from normal
funcs" { arm_hf_eabi || { avr-*-* riscv*-*-* pru-*-* } } } */
/* { dg-skip-if "Variadic funcs have all args on stack. Normal funcs have args
in registers." { nds32*-*-* } } */
/* { dg-require-effective-target untyped_assembly } */
--
2.11.0
[PATCH v4 08/10] testsuite: Mark that PRU has one-cycle jumps
gcc/testsuite/ChangeLog:
2018-08-29 Dimitar Dimitrov
* gcc.dg/tree-ssa/20040204-1.c: XFAIL on pru.
* gcc.dg/tree-ssa/reassoc-33.c: Ditto.
* gcc.dg/tree-ssa/reassoc-34.c: Ditto.
* gcc.dg/tree-ssa/reassoc-35.c: Ditto.
* gcc.dg/tree-ssa/reassoc-36.c: Ditto.
* gcc.dg/tree-ssa/ssa-thread-14.c: Ditto.
Signed-off-by: Dimitar Dimitrov
---
gcc/testsuite/gcc.dg/tree-ssa/20040204-1.c| 2 +-
gcc/testsuite/gcc.dg/tree-ssa/reassoc-33.c| 2 +-
gcc/testsuite/gcc.dg/tree-ssa/reassoc-34.c| 2 +-
gcc/testsuite/gcc.dg/tree-ssa/reassoc-35.c| 2 +-
gcc/testsuite/gcc.dg/tree-ssa/reassoc-36.c| 2 +-
gcc/testsuite/gcc.dg/tree-ssa/ssa-thread-14.c | 2 +-
6 files changed, 6 insertions(+), 6 deletions(-)
diff --git a/gcc/testsuite/gcc.dg/tree-ssa/20040204-1.c
b/gcc/testsuite/gcc.dg/tree-ssa/20040204-1.c
index a1237cf839b..06b83029fd3 100644
--- a/gcc/testsuite/gcc.dg/tree-ssa/20040204-1.c
+++ b/gcc/testsuite/gcc.dg/tree-ssa/20040204-1.c
@@ -33,4 +33,4 @@ void test55 (int x, int y)
that the && should be emitted (based on BRANCH_COST). Fix this
by teaching dom to look through && and register all components
as true. */
-/* { dg-final { scan-tree-dump-times "link_error" 0 "optimized" { xfail { !
"alpha*-*-* arm*-*-* aarch64*-*-* powerpc*-*-* cris-*-* crisv32-*-* hppa*-*-*
i?86-*-* mmix-*-* mips*-*-* m68k*-*-* moxie-*-* nds32*-*-* s390*-*-* sh*-*-*
sparc*-*-* spu-*-* visium-*-* x86_64-*-* riscv*-*-*" } } } } */
+/* { dg-final { scan-tree-dump-times "link_error" 0 "optimized" { xfail { !
"alpha*-*-* arm*-*-* aarch64*-*-* powerpc*-*-* cris-*-* crisv32-*-* hppa*-*-*
i?86-*-* mmix-*-* mips*-*-* m68k*-*-* moxie-*-* nds32*-*-* s390*-*-* sh*-*-*
sparc*-*-* spu-*-* visium-*-* x86_64-*-* riscv*-*-* pru*-*-*" } } } } */
diff --git a/gcc/testsuite/gcc.dg/tree-ssa/reassoc-33.c
b/gcc/testsuite/gcc.dg/tree-ssa/reassoc-33.c
index 5572df4ae24..5e1cd1a6fa7 100644
--- a/gcc/testsuite/gcc.dg/tree-ssa/reassoc-33.c
+++ b/gcc/testsuite/gcc.dg/tree-ssa/reassoc-33.c
@@ -1,4 +1,4 @@
-/* { dg-do run { target { ! "m68k*-*-* mmix*-*-* bfin*-*-* v850*-*-*
moxie*-*-* cris*-*-* m32c*-*-* fr30*-*-* mcore*-*-* powerpc*-*-* xtensa*-*-*
hppa*-*-* nios2*-*-*"} } } */
+/* { dg-do run { target { ! "m68k*-*-* mmix*-*-* bfin*-*-* v850*-*-*
moxie*-*-* cris*-*-* m32c*-*-* fr30*-*-* mcore*-*-* powerpc*-*-* xtensa*-*-*
hppa*-*-* nios2*-*-* pru*-*-*"} } } */
/* { dg-options "-O2 -fno-inline -fdump-tree-reassoc1-details" } */
/* { dg-additional-options "-mbranch-cost=2" { target branch_cost } } */
diff --git a/gcc/testsuite/gcc.dg/tree-ssa/reassoc-34.c
b/gcc/testsuite/gcc.dg/tree-ssa/reassoc-34.c
index 9b45f1cd9be..a59df6a7244 100644
--- a/gcc/testsuite/gcc.dg/tree-ssa/reassoc-34.c
+++ b/gcc/testsuite/gcc.dg/tree-ssa/reassoc-34.c
@@ -1,4 +1,4 @@
-/* { dg-do run { target { ! "m68k*-*-* mmix*-*-* bfin*-*-* v850*-*-*
moxie*-*-* cris*-*-* m32c*-*-* fr30*-*-* mcore*-*-* powerpc*-*-* xtensa*-*-*
hppa*-*-* nios2*-*-*"} } } */
+/* { dg-do run { target { ! "m68k*-*-* mmix*-*-* bfin*-*-* v850*-*-*
moxie*-*-* cris*-*-* m32c*-*-* fr30*-*-* mcore*-*-* powerpc*-*-* xtensa*-*-*
hppa*-*-* nios2*-*-* pru*-*-*"} } } */
/* { dg-options "-O2 -fno-inline -fdump-tree-reassoc1-details" } */
/* { dg-additional-options "-mbranch-cost=2" { target branch_cost } } */
diff --git a/gcc/testsuite/gcc.dg/tree-ssa/reassoc-35.c
b/gcc/testsuite/gcc.dg/tree-ssa/reassoc-35.c
index 9ee3abca04e..21239372709 100644
--- a/gcc/testsuite/gcc.dg/tree-ssa/reassoc-35.c
+++ b/gcc/testsuite/gcc.dg/tree-ssa/reassoc-35.c
@@ -1,4 +1,4 @@
-/* { dg-do run { target { ! "m68k*-*-* mmix*-*-* bfin*-*-* v850*-*-*
moxie*-*-* cris*-*-* m32c*-*-* fr30*-*-* mcore*-*-* powerpc*-*-* xtensa*-*-*
hppa*-*-* nios2*-*-*"} } } */
+/* { dg-do run { target { ! "m68k*-*-* mmix*-*-* bfin*-*-* v850*-*-*
moxie*-*-* cris*-*-* m32c*-*-* fr30*-*-* mcore*-*-* powerpc*-*-* xtensa*-*-*
hppa*-*-* nios2*-*-* pru*-*-*"} } } */
/* { dg-options "-O2 -fno-inline -fdump-tree-reassoc1-details" } */
/* { dg-additional-options "-mbranch-cost=2" { target branch_cost } } */
diff --git a/gcc/testsuite/gcc.dg/tree-ssa/reassoc-36.c
b/gcc/testsuite/gcc.dg/tree-ssa/reassoc-36.c
index ac3a04291b7..f8eb0954ae7 100644
--- a/gcc/testsuite/gcc.dg/tree-ssa/reassoc-36.c
+++ b/gcc/testsuite/gcc.dg/tree-ssa/reassoc-36.c
@@ -1,4 +1,4 @@
-/* { dg-do run { target { ! "m68k*-*-* mmix*-*-* bfin*-*-* v850*-*-*
moxie*-*-* cris*-*-* m32c*-*-* fr30*-*-* mcore*-*-* powerpc*-*-* xtensa*-*-*
hppa*-*-* nios2*-*-*"} } } */
+/* { dg-do run { target { ! "m68k*-*-* mmix*-*-* bfin*-*-* v850*-*-*
moxie*-*-* cris*-*-* m32c*-*-* fr30*-*-* mcore*-*-* powerpc*-*-* xtensa*-*-*
hppa*-*-* nios2*-*-* pru*-*-*"} } } */
/* { dg-options "-O2 -fno-inline -fdump-tree-r
[PATCH v4 09/10] testsuite: Mark that PRU uses all function pointer bits
gcc/testsuite/ChangeLog: 2018-08-29 Dimitar Dimitrov * g++.old-deja/g++.abi/ptrmem.C: Add PRU to list. Signed-off-by: Dimitar Dimitrov --- gcc/testsuite/g++.old-deja/g++.abi/ptrmem.C | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/gcc/testsuite/g++.old-deja/g++.abi/ptrmem.C b/gcc/testsuite/g++.old-deja/g++.abi/ptrmem.C index 341735879c5..bda7960d8a2 100644 --- a/gcc/testsuite/g++.old-deja/g++.abi/ptrmem.C +++ b/gcc/testsuite/g++.old-deja/g++.abi/ptrmem.C @@ -7,7 +7,7 @@ function. However, some platforms use all bits to encode a function pointer. Such platforms use the lowest bit of the delta, that is shifted left by one bit. */ -#if defined __MN10300__ || defined __SH5__ || defined __arm__ || defined __thumb__ || defined __mips__ || defined __aarch64__ +#if defined __MN10300__ || defined __SH5__ || defined __arm__ || defined __thumb__ || defined __mips__ || defined __aarch64__ || defined __PRU__ #define ADJUST_PTRFN(func, virt) ((void (*)())(func)) #define ADJUST_DELTA(delta, virt) (((delta) << 1) + !!(virt)) #else -- 2.11.0
[PATCH v4 07/10] testsuite: Define PRU stack usage
gcc/testsuite/ChangeLog: 2018-08-29 Dimitar Dimitrov * gcc.dg/stack-usage-1.c: Define PRU stack usage. Signed-off-by: Dimitar Dimitrov --- gcc/testsuite/gcc.dg/stack-usage-1.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/gcc/testsuite/gcc.dg/stack-usage-1.c b/gcc/testsuite/gcc.dg/stack-usage-1.c index e6440142e1d..b2642228808 100644 --- a/gcc/testsuite/gcc.dg/stack-usage-1.c +++ b/gcc/testsuite/gcc.dg/stack-usage-1.c @@ -93,6 +93,8 @@ # define SIZE 254 #elif defined (__nios2__) # define SIZE 252 +#elif defined (__PRU__) +# define SIZE 252 #elif defined (__v850__) #define SIZE 260 #elif defined (__mn10300__) -- 2.11.0
[PATCH v4 05/10] testsuite: Add check for unsupported TI ABI PRU features to testsuite
Not all C language features are supported when -mabi=ti option is
used for PRU target.
gcc/testsuite/ChangeLog:
2018-08-29 Dimitar Dimitrov
* lib/gcc-dg.exp: Filter unsupported features in PRU's TI ABI mode.
* lib/target-utils.exp: Ditto.
* lib/target-supports.exp (check_effective_target_function_pointers,
check_effective_target_large_return_values): New.
Signed-off-by: Dimitar Dimitrov
---
gcc/testsuite/lib/gcc-dg.exp | 11 +++
gcc/testsuite/lib/target-supports.exp | 26 ++
gcc/testsuite/lib/target-utils.exp| 8
3 files changed, 45 insertions(+)
diff --git a/gcc/testsuite/lib/gcc-dg.exp b/gcc/testsuite/lib/gcc-dg.exp
index 7ef9de59dc2..8f70232914b 100644
--- a/gcc/testsuite/lib/gcc-dg.exp
+++ b/gcc/testsuite/lib/gcc-dg.exp
@@ -407,6 +407,17 @@ proc gcc-dg-prune { system text } {
return "::unsupported::memory full"
}
+if { [string match "*error: function pointers not supported*" $text]
+ && ![check_effective_target_function_pointers] } {
+ # The format here is important. See dg.exp.
+ return "::unsupported::funcptr"
+}
+if { [string match "*error: large return values not supported*" $text]
+ && ![check_effective_target_large_return_values] } {
+ # The format here is important. See dg.exp.
+ return "::unsupported::large return values"
+}
+
return $text
}
diff --git a/gcc/testsuite/lib/target-supports.exp
b/gcc/testsuite/lib/target-supports.exp
index 7d4ea35babb..08c011317b4 100644
--- a/gcc/testsuite/lib/target-supports.exp
+++ b/gcc/testsuite/lib/target-supports.exp
@@ -2619,6 +2619,32 @@ proc check_effective_target_ptr32plus { } {
}]
}
+# Return 1 if target supports function pointers, 0 otherwise.
+
+proc check_effective_target_function_pointers { } {
+if { [istarget pru-*-*] } {
+ return [check_no_compiler_messages func_ptr_avail assembly {
+ #ifdef __PRU_EABI_GNU__
+ #error unsupported
+ #endif
+ }]
+}
+return 1
+}
+
+# Return 1 if target supports arbitrarily large return values, 0 otherwise.
+
+proc check_effective_target_large_return_values { } {
+if { [istarget pru-*-*] } {
+ return [check_no_compiler_messages func_ptr_avail assembly {
+ #ifdef __PRU_EABI_GNU__
+ #error unsupported
+ #endif
+ }]
+}
+return 1
+}
+
# Return 1 if we support 32-bit or larger array and structure sizes
# using default options, 0 otherwise. Avoid false positive on
# targets with 20 or 24 bit address spaces.
diff --git a/gcc/testsuite/lib/target-utils.exp
b/gcc/testsuite/lib/target-utils.exp
index 732a1827a02..f636be2cb01 100644
--- a/gcc/testsuite/lib/target-utils.exp
+++ b/gcc/testsuite/lib/target-utils.exp
@@ -44,5 +44,13 @@ proc ${tool}_check_unsupported_p { output } {
[string match "*exceeds local store*" $output] } {
return "memory full"
}
+if { [string match "*error: function pointers not supported*" $output]
+ && ![check_effective_target_function_pointers] } {
+ return "function pointers not supported"
+}
+if { [string match "*error: large return values not supported*" $output]
+ && ![check_effective_target_large_return_values] } {
+ return "large return values not supported"
+}
return ""
}
--
2.11.0
[PATCH v4 06/10] testsuite: Remove PRU from test cases requiring hosted environment
gcc/testsuite/ChangeLog: 2018-08-29 Dimitar Dimitrov * gcc.c-torture/execute/20101011-1.c: Define DO_TEST to 0 for PRU. * gcc.dg/20020312-2.c: No PIC register for PRU. Signed-off-by: Dimitar Dimitrov --- gcc/testsuite/gcc.c-torture/execute/20101011-1.c | 3 +++ gcc/testsuite/gcc.dg/20020312-2.c| 2 ++ 2 files changed, 5 insertions(+) diff --git a/gcc/testsuite/gcc.c-torture/execute/20101011-1.c b/gcc/testsuite/gcc.c-torture/execute/20101011-1.c index f95d900deaf..aa72b35fa16 100644 --- a/gcc/testsuite/gcc.c-torture/execute/20101011-1.c +++ b/gcc/testsuite/gcc.c-torture/execute/20101011-1.c @@ -97,6 +97,9 @@ __aeabi_idiv0 (int return_value) /* This presently doesn't raise SIGFPE even on csky-linux-gnu, much less bare metal. See the implementation of __divsi3 in libgcc. */ # define DO_TEST 0 +#elif defined (__pru__) +/* There isn't even a signal function. */ +# define DO_TEST 0 #else # define DO_TEST 1 #endif diff --git a/gcc/testsuite/gcc.dg/20020312-2.c b/gcc/testsuite/gcc.dg/20020312-2.c index f8be3ce2964..365ae6e847c 100644 --- a/gcc/testsuite/gcc.dg/20020312-2.c +++ b/gcc/testsuite/gcc.dg/20020312-2.c @@ -116,6 +116,8 @@ extern void abort (void); # if defined (__CK807__) || defined (__CK810__) # define PIC_REG "r28" # endif +#elif defined(__PRU__) +/* No pic register. */ #else # error "Modify the test for your target." #endif -- 2.11.0
[PATCH v4 03/10] testsuite: Add PRU tests
gcc/testsuite/ChangeLog: 2018-08-29 Dimitar Dimitrov * gcc.target/pru/abi-arg-struct.c: New test. * gcc.target/pru/ashiftrt.c: New test. * gcc.target/pru/builtins-1.c: New test. * gcc.target/pru/builtins-error.c: New test. * gcc.target/pru/clearbit.c: New test. * gcc.target/pru/loop-asm.c: New test. * gcc.target/pru/loop-dowhile.c: New test. * gcc.target/pru/loop-hi-1.c: New test. * gcc.target/pru/loop-hi-2.c: New test. * gcc.target/pru/loop-qi-1.c: New test. * gcc.target/pru/loop-qi-2.c: New test. * gcc.target/pru/loop-short-1.c: New test. * gcc.target/pru/loop-short-2.c: New test. * gcc.target/pru/loop-si-1.c: New test. * gcc.target/pru/loop-si-2.c: New test. * gcc.target/pru/loop-u8_pcrel_overflow.c: New test. * gcc.target/pru/loop-ubyte-1.c: New test. * gcc.target/pru/loop-ubyte-2.c: New test. * gcc.target/pru/lra-framepointer-fragmentation-1.c: New test. * gcc.target/pru/lra-framepointer-fragmentation-2.c: New test. * gcc.target/pru/mabi-ti-1.c: New test. * gcc.target/pru/mabi-ti-2.c: New test. * gcc.target/pru/mabi-ti-3.c: New test. * gcc.target/pru/mabi-ti-4.c: New test. * gcc.target/pru/mabi-ti-5.c: New test. * gcc.target/pru/mabi-ti-6.c: New test. * gcc.target/pru/mabi-ti-7.c: New test. * gcc.target/pru/pr64366.c: New test. * gcc.target/pru/pragma-ctable_entry.c: New test. * gcc.target/pru/pru.exp: New file. * gcc.target/pru/qbbc-1.c: New test. * gcc.target/pru/qbbc-2.c: New test. * gcc.target/pru/qbbc-3.c: New test. * gcc.target/pru/qbbs-1.c: New test. * gcc.target/pru/qbbs-2.c: New test. * gcc.target/pru/setbit.c: New test. * gcc.target/pru/zero_extend-and-hisi.c: New test. * gcc.target/pru/zero_extend-and-qihi.c: New test. * gcc.target/pru/zero_extend-and-qisi.c: New test. * gcc.target/pru/zero_extend-hisi.c: New test. * gcc.target/pru/zero_extend-qihi.c: New test. * gcc.target/pru/zero_extend-qisi.c: New test. * lib/target-supports.exp: Add PRU to feature filters. Signed-off-by: Dimitar Dimitrov --- gcc/testsuite/gcc.target/pru/abi-arg-struct.c | 164 + gcc/testsuite/gcc.target/pru/ashiftrt.c| 13 ++ gcc/testsuite/gcc.target/pru/builtins-1.c | 12 ++ gcc/testsuite/gcc.target/pru/builtins-error.c | 6 + gcc/testsuite/gcc.target/pru/clearbit.c| 13 ++ gcc/testsuite/gcc.target/pru/loop-asm.c| 19 +++ gcc/testsuite/gcc.target/pru/loop-dowhile.c| 45 ++ gcc/testsuite/gcc.target/pru/loop-hi-1.c | 38 + gcc/testsuite/gcc.target/pru/loop-hi-2.c | 17 +++ gcc/testsuite/gcc.target/pru/loop-qi-1.c | 38 + gcc/testsuite/gcc.target/pru/loop-qi-2.c | 17 +++ gcc/testsuite/gcc.target/pru/loop-short-1.c| 53 +++ gcc/testsuite/gcc.target/pru/loop-short-2.c| 21 +++ gcc/testsuite/gcc.target/pru/loop-si-1.c | 41 ++ gcc/testsuite/gcc.target/pru/loop-si-2.c | 20 +++ .../gcc.target/pru/loop-u8_pcrel_overflow.c| 42 ++ gcc/testsuite/gcc.target/pru/loop-ubyte-1.c| 30 gcc/testsuite/gcc.target/pru/loop-ubyte-2.c| 18 +++ .../pru/lra-framepointer-fragmentation-1.c | 33 + .../pru/lra-framepointer-fragmentation-2.c | 61 gcc/testsuite/gcc.target/pru/mabi-ti-1.c | 10 ++ gcc/testsuite/gcc.target/pru/mabi-ti-2.c | 15 ++ gcc/testsuite/gcc.target/pru/mabi-ti-3.c | 12 ++ gcc/testsuite/gcc.target/pru/mabi-ti-4.c | 14 ++ gcc/testsuite/gcc.target/pru/mabi-ti-5.c | 33 + gcc/testsuite/gcc.target/pru/mabi-ti-6.c | 12 ++ gcc/testsuite/gcc.target/pru/mabi-ti-7.c | 21 +++ gcc/testsuite/gcc.target/pru/pr64366.c | 128 gcc/testsuite/gcc.target/pru/pragma-ctable_entry.c | 22 +++ gcc/testsuite/gcc.target/pru/pru.exp | 41 ++ gcc/testsuite/gcc.target/pru/qbbc-1.c | 29 gcc/testsuite/gcc.target/pru/qbbc-2.c | 15 ++ gcc/testsuite/gcc.target/pru/qbbc-3.c | 15 ++ gcc/testsuite/gcc.target/pru/qbbs-1.c | 29 gcc/testsuite/gcc.target/pru/qbbs-2.c | 15 ++ gcc/testsuite/gcc.target/pru/setbit.c | 13 ++ .../gcc.target/pru/zero_extend-and-hisi.c | 16 ++ .../gcc.target/pru/zero_extend-and-qihi.c | 16 ++ .../gcc.target/pru/zero_extend-and-qisi.c | 16 ++ gcc/testsuite/gcc.target/pru/zero_extend-hisi.c| 43 ++ gcc/testsuite/gcc.target/pru/zero_extend-qihi.c| 43 ++ gcc/testsuite/gcc.target/pru/zero_extend-qisi.c| 43 ++ gcc/testsuite/lib/target-supports.exp
[PATCH v4 02/10] Initial TI PRU libgcc port
The floating point support has been borrowed from C6X libgcc port
to help with TI PRU toolchain ABI compatibility.
libgcc/ChangeLog:
2018-08-29 Dimitar Dimitrov
* config.host: Add PRU target.
* config/pru/asri.c: New file.
* config/pru/eqd.c: New file.
* config/pru/eqf.c: New file.
* config/pru/ged.c: New file.
* config/pru/gef.c: New file.
* config/pru/gtd.c: New file.
* config/pru/gtf.c: New file.
* config/pru/led.c: New file.
* config/pru/lef.c: New file.
* config/pru/lib2bitcountHI.c: New file.
* config/pru/lib2divHI.c: New file.
* config/pru/lib2divQI.c: New file.
* config/pru/lib2divSI.c: New file.
* config/pru/libgcc-eabi.ver: New file.
* config/pru/ltd.c: New file.
* config/pru/ltf.c: New file.
* config/pru/mpyll.S: New file.
* config/pru/pru-abi.h: New file.
* config/pru/pru-asm.h: New file.
* config/pru/pru-divmod.h: New file.
* config/pru/sfp-machine.h: New file.
* config/pru/t-pru: New file.
Signed-off-by: Dimitar Dimitrov
---
libgcc/config.host | 7 +++
libgcc/config/pru/asri.c | 33 ++
libgcc/config/pru/eqd.c| 45 +
libgcc/config/pru/eqf.c| 45 +
libgcc/config/pru/ged.c| 45 +
libgcc/config/pru/gef.c| 45 +
libgcc/config/pru/gtd.c| 45 +
libgcc/config/pru/gtf.c| 45 +
libgcc/config/pru/led.c| 45 +
libgcc/config/pru/lef.c| 45 +
libgcc/config/pru/lib2bitcountHI.c | 43 +
libgcc/config/pru/lib2divHI.c | 42 +
libgcc/config/pru/lib2divQI.c | 42 +
libgcc/config/pru/lib2divSI.c | 48 ++
libgcc/config/pru/libgcc-eabi.ver | 88 ++
libgcc/config/pru/ltd.c| 45 +
libgcc/config/pru/ltf.c| 45 +
libgcc/config/pru/mpyll.S | 57 +
libgcc/config/pru/pru-abi.h| 109
libgcc/config/pru/pru-asm.h| 35 +++
libgcc/config/pru/pru-divmod.h | 117 ++
libgcc/config/pru/sfp-machine.h| 125 +
libgcc/config/pru/t-pru| 50 +++
23 files changed, 1246 insertions(+)
create mode 100644 libgcc/config/pru/asri.c
create mode 100644 libgcc/config/pru/eqd.c
create mode 100644 libgcc/config/pru/eqf.c
create mode 100644 libgcc/config/pru/ged.c
create mode 100644 libgcc/config/pru/gef.c
create mode 100644 libgcc/config/pru/gtd.c
create mode 100644 libgcc/config/pru/gtf.c
create mode 100644 libgcc/config/pru/led.c
create mode 100644 libgcc/config/pru/lef.c
create mode 100644 libgcc/config/pru/lib2bitcountHI.c
create mode 100644 libgcc/config/pru/lib2divHI.c
create mode 100644 libgcc/config/pru/lib2divQI.c
create mode 100644 libgcc/config/pru/lib2divSI.c
create mode 100644 libgcc/config/pru/libgcc-eabi.ver
create mode 100644 libgcc/config/pru/ltd.c
create mode 100644 libgcc/config/pru/ltf.c
create mode 100644 libgcc/config/pru/mpyll.S
create mode 100644 libgcc/config/pru/pru-abi.h
create mode 100644 libgcc/config/pru/pru-asm.h
create mode 100644 libgcc/config/pru/pru-divmod.h
create mode 100644 libgcc/config/pru/sfp-machine.h
create mode 100644 libgcc/config/pru/t-pru
diff --git a/libgcc/config.host b/libgcc/config.host
index 029f6569caf..5206b5dc9d7 100644
--- a/libgcc/config.host
+++ b/libgcc/config.host
@@ -168,6 +168,9 @@ nios2*-*-*)
powerpc*-*-*)
cpu_type=rs6000
;;
+pru-*-*)
+ cpu_type=pru
+ ;;
rs6000*-*-*)
;;
riscv*-*-*)
@@ -1158,6 +1161,10 @@ powerpcle-*-eabi*)
tmake_file="${tmake_file} rs6000/t-ppccomm rs6000/t-crtstuff
t-crtstuff-pic t-fdpbit"
extra_parts="$extra_parts crtbegin.o crtend.o crtbeginS.o crtendS.o
crtbeginT.o ecrti.o ecrtn.o ncrti.o ncrtn.o"
;;
+pru-*-*)
+ tmake_file="${tmake_file} t-softfp-sfdf t-softfp-excl t-softfp
t-gnu-prefix pru/t-pru"
+ tm_file="$tm_file pru/pru-abi.h"
+ ;;
riscv*-*-linux*)
tmake_file="${tmake_file} riscv/t-softfp${host_address} t-softfp
riscv/t-elf riscv/t-elf${host_address}"
extra_parts="$extra_parts crtbegin.o crtend.o crti.o crtn.o crtendS.o
crtbeginT.o"
diff --git a/libgcc/config/pru/asri.c b/libgcc/config/pru/asri.c
new file mode 100644
index 000..591d660f227
--- /dev/null
+++ b/libgcc/config/pru/asri.c
@@ -0,0 +1,33 @@
+/* PRU ABI compatibility functions
+ Arithmetic right shift
+ Copyright (C) 2017-2018 Free Software Foundation, Inc.
+ Contributed by Dimitar Dimitrov
+
+ This file is free software; you can redistribute it and/or
+
[PATCH v4 00/10] New backend for the TI PRU processor
This patch series adds support for the TI PRU I/O processor to GCC. This fourth patch set revision addresses comments from v1 [1], v2 [2] and v3 [3]. Test results can be downloaded from here: http://dinux.eu/gnupru/testresults/20180828-f4455d5f/ Changes since patch series v3 [3]: - Added blockage in epilogue before SP restore. - Folded "mov" patterns. [1] http://gcc.gnu.org/ml/gcc-patches/2018-06/msg00775.html [2] http://gcc.gnu.org/ml/gcc-patches/2018-07/msg01779.html [3] http://gcc.gnu.org/ml/gcc-patches/2018-08/msg00927.html Dimitar Dimitrov (10): Initial TI PRU GCC port Initial TI PRU libgcc port testsuite: Add PRU tests testsuite: Add check for overflowed IMEM region to testsuite testsuite: Add check for unsupported TI ABI PRU features to testsuite testsuite: Remove PRU from test cases requiring hosted environment testsuite: Define PRU stack usage testsuite: Mark that PRU has one-cycle jumps testsuite: Mark that PRU uses all function pointer bits testsuite: Mark testsuite that PRU has different calling convention configure.ac |7 + gcc/common/config/pru/pru-common.c | 36 + gcc/config.gcc |9 + gcc/config/pru/alu-zext.md | 178 ++ gcc/config/pru/constraints.md | 88 + gcc/config/pru/predicates.md | 224 ++ gcc/config/pru/pru-opts.h | 31 + gcc/config/pru/pru-passes.c| 234 ++ gcc/config/pru/pru-pragma.c| 90 + gcc/config/pru/pru-protos.h| 72 + gcc/config/pru/pru.c | 3008 gcc/config/pru/pru.h | 551 gcc/config/pru/pru.md | 946 ++ gcc/config/pru/pru.opt | 53 + gcc/config/pru/t-pru | 31 + gcc/doc/extend.texi| 21 + gcc/doc/invoke.texi| 55 + gcc/doc/md.texi| 22 + gcc/testsuite/g++.old-deja/g++.abi/ptrmem.C|2 +- gcc/testsuite/gcc.c-torture/execute/20101011-1.c |3 + gcc/testsuite/gcc.dg/20020312-2.c |2 + gcc/testsuite/gcc.dg/builtin-apply2.c |2 +- gcc/testsuite/gcc.dg/stack-usage-1.c |2 + .../gcc.dg/torture/stackalign/builtin-apply-2.c|2 +- gcc/testsuite/gcc.dg/tree-ssa/20040204-1.c |2 +- gcc/testsuite/gcc.dg/tree-ssa/reassoc-33.c |2 +- gcc/testsuite/gcc.dg/tree-ssa/reassoc-34.c |2 +- gcc/testsuite/gcc.dg/tree-ssa/reassoc-35.c |2 +- gcc/testsuite/gcc.dg/tree-ssa/reassoc-36.c |2 +- gcc/testsuite/gcc.dg/tree-ssa/ssa-thread-14.c |2 +- gcc/testsuite/gcc.target/pru/abi-arg-struct.c | 164 ++ gcc/testsuite/gcc.target/pru/ashiftrt.c| 13 + gcc/testsuite/gcc.target/pru/builtins-1.c | 12 + gcc/testsuite/gcc.target/pru/builtins-error.c |6 + gcc/testsuite/gcc.target/pru/clearbit.c| 13 + gcc/testsuite/gcc.target/pru/loop-asm.c| 19 + gcc/testsuite/gcc.target/pru/loop-dowhile.c| 45 + gcc/testsuite/gcc.target/pru/loop-hi-1.c | 38 + gcc/testsuite/gcc.target/pru/loop-hi-2.c | 17 + gcc/testsuite/gcc.target/pru/loop-qi-1.c | 38 + gcc/testsuite/gcc.target/pru/loop-qi-2.c | 17 + gcc/testsuite/gcc.target/pru/loop-short-1.c| 53 + gcc/testsuite/gcc.target/pru/loop-short-2.c| 21 + gcc/testsuite/gcc.target/pru/loop-si-1.c | 41 + gcc/testsuite/gcc.target/pru/loop-si-2.c | 20 + .../gcc.target/pru/loop-u8_pcrel_overflow.c| 42 + gcc/testsuite/gcc.target/pru/loop-ubyte-1.c| 30 + gcc/testsuite/gcc.target/pru/loop-ubyte-2.c| 18 + .../pru/lra-framepointer-fragmentation-1.c | 33 + .../pru/lra-framepointer-fragmentation-2.c | 61 + gcc/testsuite/gcc.target/pru/mabi-ti-1.c | 10 + gcc/testsuite/gcc.target/pru/mabi-ti-2.c | 15 + gcc/testsuite/gcc.target/pru/mabi-ti-3.c | 12 + gcc/testsuite/gcc.target/pru/mabi-ti-4.c | 14 + gcc/testsuite/gcc.target/pru/mabi-ti-5.c | 33 + gcc/testsuite/gcc.target/pru/mabi-ti-6.c | 12 + gcc/testsuite/gcc.target/pru/mabi-ti-7.c | 21 + gcc/testsuite/gcc.target/pru/pr64366.c | 128 + gcc/testsuite/gcc.target/pru/pragma-ctable_entry.c | 22 + gcc/testsuite/gcc.target/pru/pru.exp | 41 + gcc/testsuite/gcc.target/pru/qbbc-1.c | 29 + gcc/testsuite/gcc.target/pru/qbbc-2.c | 15 + gcc/testsuite/gcc.target/pru/qbbc-3.c | 15 + gcc/testsuite/gcc.target/pr
[PATCH v4 04/10] testsuite: Add check for overflowed IMEM region to testsuite
PRU architecture supports maximum 256k program memory (IMEM). Some GCC
test cases manage to produce executables bigger than that.
gcc/testsuite/ChangeLog:
2018-08-29 Dimitar Dimitrov
* lib/gcc-dg.exp: Bail on region overflow for tiny targets.
* lib/target-utils.exp: Ditto.
* lib/target-supports.exp: Declare PRU target as tiny.
Signed-off-by: Dimitar Dimitrov
---
gcc/testsuite/lib/gcc-dg.exp | 5 +
gcc/testsuite/lib/target-supports.exp | 5 +
gcc/testsuite/lib/target-utils.exp| 4
3 files changed, 14 insertions(+)
diff --git a/gcc/testsuite/lib/gcc-dg.exp b/gcc/testsuite/lib/gcc-dg.exp
index 24d0b00d25d..7ef9de59dc2 100644
--- a/gcc/testsuite/lib/gcc-dg.exp
+++ b/gcc/testsuite/lib/gcc-dg.exp
@@ -394,6 +394,11 @@ proc gcc-dg-prune { system text } {
return "::unsupported::memory full"
}
+if { [regexp "(^|\n)\[^\n\]*: region \[^\n\]* overflowed" $text]
+ && [check_effective_target_tiny] } {
+ return "::unsupported::memory full"
+}
+
# Likewise, if we see ".text exceeds local store range" or
# similar.
if {[string match "spu-*" $system] && \
diff --git a/gcc/testsuite/lib/target-supports.exp
b/gcc/testsuite/lib/target-supports.exp
index ce89f618349..7d4ea35babb 100644
--- a/gcc/testsuite/lib/target-supports.exp
+++ b/gcc/testsuite/lib/target-supports.exp
@@ -8843,6 +8843,11 @@ proc check_effective_target_tiny {} {
&& [check_effective_target_avr_tiny] } {
set et_target_tiny_saved 1
}
+ # PRU Program Counter is 16-bits, and trampolines are not supported.
+ # Hence directly declare as a tiny target.
+ if [istarget pru-*-*] {
+ set et_target_tiny_saved 1
+ }
}
return $et_target_tiny_saved
diff --git a/gcc/testsuite/lib/target-utils.exp
b/gcc/testsuite/lib/target-utils.exp
index bd39cc5bc79..732a1827a02 100644
--- a/gcc/testsuite/lib/target-utils.exp
+++ b/gcc/testsuite/lib/target-utils.exp
@@ -35,6 +35,10 @@ proc ${tool}_check_unsupported_p { output } {
&& [check_effective_target_tiny] } {
return "memory full"
}
+if { [regexp "(^|\n)\[^\n\]*: region \[^\n\]* overflowed" $output]
+ && [check_effective_target_tiny] } {
+ return "memory full"
+}
if { [istarget spu-*-*] && \
[string match "*exceeds local store*" $output] } {
--
2.11.0
Re: [PATCH v3 01/10] Initial TI PRU GCC port
On Thursday, 08/23/2018. 8:09:05 EEST Dimitar Dimitrov wrote:
> > > +/* Emit function epilogue. */
> > > +void
> > > +pru_expand_epilogue (bool sibcall_p)
> > > +{
> > > + rtx cfa_adj;
> > > + int total_frame_size;
> > > + int sp_adjust, save_offset;
> > > + int regno_start;
> > > +
> > > + if (!sibcall_p && pru_can_use_return_insn ())
> > > +{
> > > + emit_jump_insn (gen_return ());
> > > + return;
> > > +}
> > > +
> > > + emit_insn (gen_blockage ());
> > > +
> > > + total_frame_size = pru_compute_frame_layout ();
> > > + if (frame_pointer_needed)
> > > +{
> > > + /* Recover the stack pointer. */
> > > + cfa_adj = plus_constant (Pmode, stack_pointer_rtx,
> > > + (total_frame_size
> > > + - cfun->machine->save_regs_offset));
> > > + pru_add3_frame_adjust (stack_pointer_rtx,
> > > +hard_frame_pointer_rtx,
> > > +-cfun->machine->fp_save_offset,
> > > +REG_CFA_DEF_CFA,
> > > +cfa_adj);
> > > +
> > > + save_offset = 0;
> > > + sp_adjust = total_frame_size - cfun->machine->save_regs_offset;
> > > +}
> > > + else if (!UBYTE_INT (total_frame_size))
> > > +{
> > > + pru_add_to_sp (cfun->machine->save_regs_offset,
> > > + REG_CFA_ADJUST_CFA);
> > > + save_offset = 0;
> > > + sp_adjust = total_frame_size - cfun->machine->save_regs_offset;
> > > +}
> > > + else
> > > +{
> > > + save_offset = cfun->machine->save_regs_offset;
> > > + sp_adjust = total_frame_size;
> > > +}
> > > +
> > > + regno_start = 0;
> > > + do {
> > > + regno_start = xbbo_next_reg_cluster (regno_start, _offset,
> > > false); + } while (regno_start >= 0);
> > > +
> > > + if (sp_adjust)
> > > + pru_add_to_sp (sp_adjust, REG_CFA_ADJUST_CFA);
> > > +
> > > + if (!sibcall_p)
> > > +emit_jump_insn (gen_simple_return ());
> >
> > Note you probably need a blockage before the restore of the stack
> > pointer to avoid some really nasty problems with the scheduler
> > reordering things such that the current frame gets deallocated before
> > register restores happen. It usually doesn't cause a problem, but if an
> > interrupt occurs between the de-allocation and register restore, then
> > all bets are off.
>
> Thank you. I will fix it.
I have attached a fixup patch for this particular blockage issue, in case you
want to apply it on top of the v3 patch series. If that is not convenient, I
will wait a few more days for comments, and then I will send v4.
Thanks,
Dimitar
>From 3feed8e7d19db555af0665dec24233a97d9a634c Mon Sep 17 00:00:00 2001
From: Dimitar Dimitrov
Date: Thu, 23 Aug 2018 08:14:13 +0300
Subject: [PATCH] Add blockage in epilogue before SP restore.
Signed-off-by: Dimitar Dimitrov
---
gcc/config/pru/pru.c | 7 +++
1 file changed, 7 insertions(+)
diff --git a/gcc/config/pru/pru.c b/gcc/config/pru/pru.c
index de72d22278e..f1ce8bfeddd 100644
--- a/gcc/config/pru/pru.c
+++ b/gcc/config/pru/pru.c
@@ -389,6 +389,13 @@ pru_expand_epilogue (bool sibcall_p)
regno_start = xbbo_next_reg_cluster (regno_start, _offset, false);
} while (regno_start >= 0);
+ /* Emit a blockage insn here to keep these insns from being moved to
+ an earlier spot in the epilogue.
+
+ This is necessary as we must not cut the stack back before all the
+ restores are finished. */
+ emit_insn (gen_blockage ());
+
if (sp_adjust)
pru_add_to_sp (sp_adjust, REG_CFA_ADJUST_CFA);
--
2.11.0
Re: [PATCH v3 01/10] Initial TI PRU GCC port
On Monday, 8/20/2018 11:12:23 EEST Jeff Law wrote:
> On 08/15/2018 10:49 PM, Dimitar Dimitrov wrote:
> > ChangeLog:
> >
> > 2018-07-27 Dimitar Dimitrov
> >
> > * configure: Regenerate.
> > * configure.ac: Add PRU target.
> >
> > gcc/ChangeLog:
> >
> > 2018-07-27 Dimitar Dimitrov
> >
> > * common/config/pru/pru-common.c: New file.
> > * config.gcc: Add PRU target.
> > * config/pru/alu-zext.md: New file.
> > * config/pru/constraints.md: New file.
> > * config/pru/predicates.md: New file.
> > * config/pru/pru-opts.h: New file.
> > * config/pru/pru-passes.c: New file.
> > * config/pru/pru-pragma.c: New file.
> > * config/pru/pru-protos.h: New file.
> > * config/pru/pru.c: New file.
> > * config/pru/pru.h: New file.
> > * config/pru/pru.md: New file.
> > * config/pru/pru.opt: New file.
> > * config/pru/t-pru: New file.
> > * doc/extend.texi: Document PRU pragmas.
> > * doc/invoke.texi: Document PRU-specific options.
> > * doc/md.texi: Document PRU asm constraints.
> >
> > Signed-off-by: Dimitar Dimitrov
> >
> > diff --git a/gcc/config/pru/alu-zext.md b/gcc/config/pru/alu-zext.md
> > new file mode 100644
> > index 000..2112b08d3f4
> > --- /dev/null
> > +++ b/gcc/config/pru/alu-zext.md
>
> [ ... ]
> I wonder if the zero-extensions in alu-zext.md are really needed. Can
> we define WORD_REGISTER_OPERATIONS for PRU? Or do you really want to
> expose sub-word operations? I simply don't know enough about the
> hardware to provide guidance here. But it might allow for some
> simplification of the port. You wouldn't want to define sub-word
> patterns such as addqi/addhi anymore either.
The QI/HI ALU patterns are needed for efficient code generation and ABI
compliance.
In the PRU GCC port, UNITS_PER_WORD=1. Hence addqi is a full word size
pattern, and WORD_REGISTER_OPERATIONS should not matter.
Note that in PRU architecture, ALU operands can be either 8, 16 or 32 bits.
All inputs are zero-extended to 32 bits, and outputs are truncated as needed.
Here is a relevant discussion: http://gcc.gnu.org/ml/gcc/2017-01/msg00217.html
For example, the following C snippet:
uint16_t test(uint8_t a, uint16_t b)
{
return a + b;
}
Produces the following RTL and efficient assembler output:
(insn 13 8 14 2 (set (reg/i:HI 56 r14.b0)
(plus:HI (zero_extend:HI (reg:QI 56 r14.b0 [ a ]))
(reg:HI 57 r14.b1 [ b ]))) "test.c":407 76 )
test:
# Note: Function arguments are passed in sub-hw-registers
add r14.w0, r14.b0, r14.w1
ret
>
> > diff --git a/gcc/config/pru/pru.c b/gcc/config/pru/pru.c
> > new file mode 100644
> > index 000..de72d22278e
> > --- /dev/null
> > +++ b/gcc/config/pru/pru.c
> > @@ -0,0 +1,3001 @@
> >
> > +/* Emit efficient RTL equivalent of ADD3 with the given const_int for
> > + frame-related registers.
> > + op0 - Destination register.
> > + op1 - First addendum operand (a register).
> > + addendum - Second addendum operand (a constant).
> > + kind- Note kind. REG_NOTE_MAX if no note must be added.
> > + reg_note_rtx - Reg note RTX. NULL if it should be computed
> > automatically. + */
> > +static rtx
> > +pru_add3_frame_adjust (rtx op0, rtx op1, int addendum,
> > + const enum reg_note kind, rtx reg_note_rtx)
> > +{
> > + rtx insn;
> > +
> > + rtx op0_adjust = gen_rtx_SET (op0, plus_constant (Pmode, op1,
> > addendum)); +
> > + if (UBYTE_INT (addendum) || UBYTE_INT (-addendum))
> > +insn = emit_insn (op0_adjust);
> > + else
> > +{
> > + /* Help the compiler to cope with an arbitrary integer constant.
> > +Reload has finished so we can't expect the compiler to
> > +auto-allocate a temporary register. But we know that call-saved
> > +registers are not live yet, so we utilize them. */
>
> Note I think this can run afoul of IPA-RA. THough it looks like you're
> exposing this in RTL, so you're probably safe.
Grepping for PROLOGUE_TEMP_REG, it appears that MIPS and Risc-V use the same
technique to get a temporary register for prologue/epilougue.
>
> > +/* Emit function epilogue. */
> > +void
> > +pru_expand_epilogue (bool sibcall_p)
> > +{
> > + rtx cfa_adj;
> > + int total_frame_size;
> > + int sp_adjust, save_offset;
> > + int regno_start;
> > +
> > + if (!sibcall_p && pru_can_use_return_insn ())
> > +{
> > + emit
[PATCH v3 05/10] testsuite: Add check for unsupported TI ABI PRU features to testsuite
Not all C language features are supported when -mabi=ti option is
used for PRU target.
gcc/testsuite/ChangeLog:
2018-07-27 Dimitar Dimitrov
* lib/gcc-dg.exp: Filter unsupported features in PRU's TI ABI mode.
* lib/target-utils.exp: Ditto.
* lib/target-supports.exp (check_effective_target_function_pointers,
check_effective_target_large_return_values): New.
Signed-off-by: Dimitar Dimitrov
---
gcc/testsuite/lib/gcc-dg.exp | 11 +++
gcc/testsuite/lib/target-supports.exp | 26 ++
gcc/testsuite/lib/target-utils.exp| 8
3 files changed, 45 insertions(+)
diff --git a/gcc/testsuite/lib/gcc-dg.exp b/gcc/testsuite/lib/gcc-dg.exp
index c26d1c73aa0..c061c152f16 100644
--- a/gcc/testsuite/lib/gcc-dg.exp
+++ b/gcc/testsuite/lib/gcc-dg.exp
@@ -405,6 +405,17 @@ proc gcc-dg-prune { system text } {
return "::unsupported::memory full"
}
+if { [string match "*error: function pointers not supported*" $text]
+ && ![check_effective_target_function_pointers] } {
+ # The format here is important. See dg.exp.
+ return "::unsupported::funcptr"
+}
+if { [string match "*error: large return values not supported*" $text]
+ && ![check_effective_target_large_return_values] } {
+ # The format here is important. See dg.exp.
+ return "::unsupported::large return values"
+}
+
return $text
}
diff --git a/gcc/testsuite/lib/target-supports.exp
b/gcc/testsuite/lib/target-supports.exp
index 5299aaefcc3..711a6db1e97 100644
--- a/gcc/testsuite/lib/target-supports.exp
+++ b/gcc/testsuite/lib/target-supports.exp
@@ -2608,6 +2608,32 @@ proc check_effective_target_ptr32plus { } {
}]
}
+# Return 1 if target supports function pointers, 0 otherwise.
+
+proc check_effective_target_function_pointers { } {
+if { [istarget pru-*-*] } {
+ return [check_no_compiler_messages func_ptr_avail assembly {
+ #ifdef __PRU_EABI_GNU__
+ #error unsupported
+ #endif
+ }]
+}
+return 1
+}
+
+# Return 1 if target supports arbitrarily large return values, 0 otherwise.
+
+proc check_effective_target_large_return_values { } {
+if { [istarget pru-*-*] } {
+ return [check_no_compiler_messages func_ptr_avail assembly {
+ #ifdef __PRU_EABI_GNU__
+ #error unsupported
+ #endif
+ }]
+}
+return 1
+}
+
# Return 1 if we support 32-bit or larger array and structure sizes
# using default options, 0 otherwise. Avoid false positive on
# targets with 20 or 24 bit address spaces.
diff --git a/gcc/testsuite/lib/target-utils.exp
b/gcc/testsuite/lib/target-utils.exp
index 732a1827a02..f636be2cb01 100644
--- a/gcc/testsuite/lib/target-utils.exp
+++ b/gcc/testsuite/lib/target-utils.exp
@@ -44,5 +44,13 @@ proc ${tool}_check_unsupported_p { output } {
[string match "*exceeds local store*" $output] } {
return "memory full"
}
+if { [string match "*error: function pointers not supported*" $output]
+ && ![check_effective_target_function_pointers] } {
+ return "function pointers not supported"
+}
+if { [string match "*error: large return values not supported*" $output]
+ && ![check_effective_target_large_return_values] } {
+ return "large return values not supported"
+}
return ""
}
--
2.11.0
[PATCH v3 06/10] testsuite: Remove PRU from test cases requiring hosted environment
gcc/testsuite/ChangeLog: 2018-07-27 Dimitar Dimitrov * gcc.c-torture/execute/20101011-1.c: Define DO_TEST to 0 for PRU. * gcc.dg/20020312-2.c: No PIC register for PRU. Signed-off-by: Dimitar Dimitrov --- gcc/testsuite/gcc.c-torture/execute/20101011-1.c | 3 +++ gcc/testsuite/gcc.dg/20020312-2.c| 2 ++ 2 files changed, 5 insertions(+) diff --git a/gcc/testsuite/gcc.c-torture/execute/20101011-1.c b/gcc/testsuite/gcc.c-torture/execute/20101011-1.c index dda49a59852..7f8d14d617c 100644 --- a/gcc/testsuite/gcc.c-torture/execute/20101011-1.c +++ b/gcc/testsuite/gcc.c-torture/execute/20101011-1.c @@ -93,6 +93,9 @@ __aeabi_idiv0 (int return_value) #elif defined (__nvptx__) /* There isn't even a signal function. */ # define DO_TEST 0 +#elif defined (__pru__) +/* There isn't even a signal function. */ +# define DO_TEST 0 #else # define DO_TEST 1 #endif diff --git a/gcc/testsuite/gcc.dg/20020312-2.c b/gcc/testsuite/gcc.dg/20020312-2.c index f5929e0b057..209ef67e263 100644 --- a/gcc/testsuite/gcc.dg/20020312-2.c +++ b/gcc/testsuite/gcc.dg/20020312-2.c @@ -111,6 +111,8 @@ extern void abort (void); /* No pic register. */ #elif defined (__nvptx__) /* No pic register. */ +#elif defined(__PRU__) +/* No pic register. */ #else # error "Modify the test for your target." #endif -- 2.11.0
[PATCH v3 10/10] testsuite: Mark testsuite that PRU has different calling convention
For variadic functions, the last named and all anonymous arguments
are passed on stack. Regular functions pass arguments in registers.
gcc/testsuite/ChangeLog:
2018-07-27 Dimitar Dimitrov
* gcc.dg/builtin-apply2.c: Skip for PRU.
* gcc.dg/torture/stackalign/builtin-apply-2.c: Ditto.
Signed-off-by: Dimitar Dimitrov
---
gcc/testsuite/gcc.dg/builtin-apply2.c | 2 +-
gcc/testsuite/gcc.dg/torture/stackalign/builtin-apply-2.c | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/gcc/testsuite/gcc.dg/builtin-apply2.c
b/gcc/testsuite/gcc.dg/builtin-apply2.c
index 3768caa5d5a..6ede0f3054b 100644
--- a/gcc/testsuite/gcc.dg/builtin-apply2.c
+++ b/gcc/testsuite/gcc.dg/builtin-apply2.c
@@ -1,7 +1,7 @@
/* { dg-do run } */
/* { dg-require-effective-target untyped_assembly } */
/* { dg-skip-if "Variadic funcs have all args on stack. Normal funcs have args
in registers." { "avr-*-* nds32*-*-*" } } */
-/* { dg-skip-if "Variadic funcs use different argument passing from normal
funcs." { "riscv*-*-*" } } */
+/* { dg-skip-if "Variadic funcs use different argument passing from normal
funcs." { "riscv*-*-* pru-*-*" } } */
/* { dg-skip-if "Variadic funcs use Base AAPCS. Normal funcs use VFP
variant." { arm*-*-* && arm_hf_eabi } } */
/* PR target/12503 */
diff --git a/gcc/testsuite/gcc.dg/torture/stackalign/builtin-apply-2.c
b/gcc/testsuite/gcc.dg/torture/stackalign/builtin-apply-2.c
index d033010dc7c..8b6e693c0f2 100644
--- a/gcc/testsuite/gcc.dg/torture/stackalign/builtin-apply-2.c
+++ b/gcc/testsuite/gcc.dg/torture/stackalign/builtin-apply-2.c
@@ -9,7 +9,7 @@
/* arm_hf_eabi: Variadic funcs use Base AAPCS. Normal funcs use VFP variant.
avr: Variadic funcs don't pass arguments in registers, while normal funcs
do. */
-/* { dg-skip-if "Variadic funcs use different argument passing from normal
funcs" { arm_hf_eabi || { avr-*-* riscv*-*-* } } } */
+/* { dg-skip-if "Variadic funcs use different argument passing from normal
funcs" { arm_hf_eabi || { avr-*-* riscv*-*-* pru-*-* } } } */
/* { dg-skip-if "Variadic funcs have all args on stack. Normal funcs have args
in registers." { nds32*-*-* } } */
/* { dg-require-effective-target untyped_assembly } */
--
2.11.0
[PATCH v3 09/10] testsuite: Mark that PRU uses all function pointer bits
gcc/testsuite/ChangeLog: 2018-07-27 Dimitar Dimitrov * g++.old-deja/g++.abi/ptrmem.C: Add PRU to list. Signed-off-by: Dimitar Dimitrov --- gcc/testsuite/g++.old-deja/g++.abi/ptrmem.C | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/gcc/testsuite/g++.old-deja/g++.abi/ptrmem.C b/gcc/testsuite/g++.old-deja/g++.abi/ptrmem.C index 341735879c5..bda7960d8a2 100644 --- a/gcc/testsuite/g++.old-deja/g++.abi/ptrmem.C +++ b/gcc/testsuite/g++.old-deja/g++.abi/ptrmem.C @@ -7,7 +7,7 @@ function. However, some platforms use all bits to encode a function pointer. Such platforms use the lowest bit of the delta, that is shifted left by one bit. */ -#if defined __MN10300__ || defined __SH5__ || defined __arm__ || defined __thumb__ || defined __mips__ || defined __aarch64__ +#if defined __MN10300__ || defined __SH5__ || defined __arm__ || defined __thumb__ || defined __mips__ || defined __aarch64__ || defined __PRU__ #define ADJUST_PTRFN(func, virt) ((void (*)())(func)) #define ADJUST_DELTA(delta, virt) (((delta) << 1) + !!(virt)) #else -- 2.11.0
[PATCH v3 03/10] testsuite: Add PRU tests
gcc/testsuite/ChangeLog: 2018-07-27 Dimitar Dimitrov * gcc.target/pru/abi-arg-struct.c: New test. * gcc.target/pru/ashiftrt.c: New test. * gcc.target/pru/builtins-1.c: New test. * gcc.target/pru/builtins-error.c: New test. * gcc.target/pru/clearbit.c: New test. * gcc.target/pru/loop-asm.c: New test. * gcc.target/pru/loop-dowhile.c: New test. * gcc.target/pru/loop-hi-1.c: New test. * gcc.target/pru/loop-hi-2.c: New test. * gcc.target/pru/loop-qi-1.c: New test. * gcc.target/pru/loop-qi-2.c: New test. * gcc.target/pru/loop-short-1.c: New test. * gcc.target/pru/loop-short-2.c: New test. * gcc.target/pru/loop-si-1.c: New test. * gcc.target/pru/loop-si-2.c: New test. * gcc.target/pru/loop-u8_pcrel_overflow.c: New test. * gcc.target/pru/loop-ubyte-1.c: New test. * gcc.target/pru/loop-ubyte-2.c: New test. * gcc.target/pru/lra-framepointer-fragmentation-1.c: New test. * gcc.target/pru/lra-framepointer-fragmentation-2.c: New test. * gcc.target/pru/mabi-ti-1.c: New test. * gcc.target/pru/mabi-ti-2.c: New test. * gcc.target/pru/mabi-ti-3.c: New test. * gcc.target/pru/mabi-ti-4.c: New test. * gcc.target/pru/mabi-ti-5.c: New test. * gcc.target/pru/mabi-ti-6.c: New test. * gcc.target/pru/mabi-ti-7.c: New test. * gcc.target/pru/pr64366.c: New test. * gcc.target/pru/pragma-ctable_entry.c: New test. * gcc.target/pru/pru.exp: New file. * gcc.target/pru/qbbc-1.c: New test. * gcc.target/pru/qbbc-2.c: New test. * gcc.target/pru/qbbc-3.c: New test. * gcc.target/pru/qbbs-1.c: New test. * gcc.target/pru/qbbs-2.c: New test. * gcc.target/pru/setbit.c: New test. * gcc.target/pru/zero_extend-and-hisi.c: New test. * gcc.target/pru/zero_extend-and-qihi.c: New test. * gcc.target/pru/zero_extend-and-qisi.c: New test. * gcc.target/pru/zero_extend-hisi.c: New test. * gcc.target/pru/zero_extend-qihi.c: New test. * gcc.target/pru/zero_extend-qisi.c: New test. * lib/target-supports.exp: Add PRU to feature filters. Signed-off-by: Dimitar Dimitrov --- gcc/testsuite/gcc.target/pru/abi-arg-struct.c | 164 + gcc/testsuite/gcc.target/pru/ashiftrt.c| 13 ++ gcc/testsuite/gcc.target/pru/builtins-1.c | 12 ++ gcc/testsuite/gcc.target/pru/builtins-error.c | 6 + gcc/testsuite/gcc.target/pru/clearbit.c| 13 ++ gcc/testsuite/gcc.target/pru/loop-asm.c| 19 +++ gcc/testsuite/gcc.target/pru/loop-dowhile.c| 45 ++ gcc/testsuite/gcc.target/pru/loop-hi-1.c | 38 + gcc/testsuite/gcc.target/pru/loop-hi-2.c | 17 +++ gcc/testsuite/gcc.target/pru/loop-qi-1.c | 38 + gcc/testsuite/gcc.target/pru/loop-qi-2.c | 17 +++ gcc/testsuite/gcc.target/pru/loop-short-1.c| 53 +++ gcc/testsuite/gcc.target/pru/loop-short-2.c| 21 +++ gcc/testsuite/gcc.target/pru/loop-si-1.c | 41 ++ gcc/testsuite/gcc.target/pru/loop-si-2.c | 20 +++ .../gcc.target/pru/loop-u8_pcrel_overflow.c| 42 ++ gcc/testsuite/gcc.target/pru/loop-ubyte-1.c| 30 gcc/testsuite/gcc.target/pru/loop-ubyte-2.c| 18 +++ .../pru/lra-framepointer-fragmentation-1.c | 33 + .../pru/lra-framepointer-fragmentation-2.c | 61 gcc/testsuite/gcc.target/pru/mabi-ti-1.c | 10 ++ gcc/testsuite/gcc.target/pru/mabi-ti-2.c | 15 ++ gcc/testsuite/gcc.target/pru/mabi-ti-3.c | 12 ++ gcc/testsuite/gcc.target/pru/mabi-ti-4.c | 14 ++ gcc/testsuite/gcc.target/pru/mabi-ti-5.c | 33 + gcc/testsuite/gcc.target/pru/mabi-ti-6.c | 12 ++ gcc/testsuite/gcc.target/pru/mabi-ti-7.c | 21 +++ gcc/testsuite/gcc.target/pru/pr64366.c | 128 gcc/testsuite/gcc.target/pru/pragma-ctable_entry.c | 22 +++ gcc/testsuite/gcc.target/pru/pru.exp | 41 ++ gcc/testsuite/gcc.target/pru/qbbc-1.c | 29 gcc/testsuite/gcc.target/pru/qbbc-2.c | 15 ++ gcc/testsuite/gcc.target/pru/qbbc-3.c | 15 ++ gcc/testsuite/gcc.target/pru/qbbs-1.c | 29 gcc/testsuite/gcc.target/pru/qbbs-2.c | 15 ++ gcc/testsuite/gcc.target/pru/setbit.c | 13 ++ .../gcc.target/pru/zero_extend-and-hisi.c | 16 ++ .../gcc.target/pru/zero_extend-and-qihi.c | 16 ++ .../gcc.target/pru/zero_extend-and-qisi.c | 16 ++ gcc/testsuite/gcc.target/pru/zero_extend-hisi.c| 43 ++ gcc/testsuite/gcc.target/pru/zero_extend-qihi.c| 43 ++ gcc/testsuite/gcc.target/pru/zero_extend-qisi.c| 43 ++ gcc/testsuite/lib/target-supports.exp
[PATCH v3 07/10] testsuite: Define PRU stack usage
gcc/testsuite/ChangeLog: 2018-07-27 Dimitar Dimitrov * gcc.dg/stack-usage-1.c: Define PRU stack usage. Signed-off-by: Dimitar Dimitrov --- gcc/testsuite/gcc.dg/stack-usage-1.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/gcc/testsuite/gcc.dg/stack-usage-1.c b/gcc/testsuite/gcc.dg/stack-usage-1.c index 038bd4ec05c..ffa97da6c32 100644 --- a/gcc/testsuite/gcc.dg/stack-usage-1.c +++ b/gcc/testsuite/gcc.dg/stack-usage-1.c @@ -93,6 +93,8 @@ # define SIZE 254 #elif defined (__nios2__) # define SIZE 252 +#elif defined (__PRU__) +# define SIZE 252 #elif defined (__v850__) #define SIZE 260 #elif defined (__mn10300__) -- 2.11.0
[PATCH v3 08/10] testsuite: Mark that PRU has one-cycle jumps
gcc/testsuite/ChangeLog:
2018-07-27 Dimitar Dimitrov
* gcc.dg/tree-ssa/20040204-1.c: XFAIL on pru.
* gcc.dg/tree-ssa/reassoc-33.c: Ditto.
* gcc.dg/tree-ssa/reassoc-34.c: Ditto.
* gcc.dg/tree-ssa/reassoc-35.c: Ditto.
* gcc.dg/tree-ssa/reassoc-36.c: Ditto.
* gcc.dg/tree-ssa/ssa-thread-14.c: Ditto.
Signed-off-by: Dimitar Dimitrov
---
gcc/testsuite/gcc.dg/tree-ssa/20040204-1.c| 2 +-
gcc/testsuite/gcc.dg/tree-ssa/reassoc-33.c| 2 +-
gcc/testsuite/gcc.dg/tree-ssa/reassoc-34.c| 2 +-
gcc/testsuite/gcc.dg/tree-ssa/reassoc-35.c| 2 +-
gcc/testsuite/gcc.dg/tree-ssa/reassoc-36.c| 2 +-
gcc/testsuite/gcc.dg/tree-ssa/ssa-thread-14.c | 2 +-
6 files changed, 6 insertions(+), 6 deletions(-)
diff --git a/gcc/testsuite/gcc.dg/tree-ssa/20040204-1.c
b/gcc/testsuite/gcc.dg/tree-ssa/20040204-1.c
index a1237cf839b..06b83029fd3 100644
--- a/gcc/testsuite/gcc.dg/tree-ssa/20040204-1.c
+++ b/gcc/testsuite/gcc.dg/tree-ssa/20040204-1.c
@@ -33,4 +33,4 @@ void test55 (int x, int y)
that the && should be emitted (based on BRANCH_COST). Fix this
by teaching dom to look through && and register all components
as true. */
-/* { dg-final { scan-tree-dump-times "link_error" 0 "optimized" { xfail { !
"alpha*-*-* arm*-*-* aarch64*-*-* powerpc*-*-* cris-*-* crisv32-*-* hppa*-*-*
i?86-*-* mmix-*-* mips*-*-* m68k*-*-* moxie-*-* nds32*-*-* s390*-*-* sh*-*-*
sparc*-*-* spu-*-* visium-*-* x86_64-*-* riscv*-*-*" } } } } */
+/* { dg-final { scan-tree-dump-times "link_error" 0 "optimized" { xfail { !
"alpha*-*-* arm*-*-* aarch64*-*-* powerpc*-*-* cris-*-* crisv32-*-* hppa*-*-*
i?86-*-* mmix-*-* mips*-*-* m68k*-*-* moxie-*-* nds32*-*-* s390*-*-* sh*-*-*
sparc*-*-* spu-*-* visium-*-* x86_64-*-* riscv*-*-* pru*-*-*" } } } } */
diff --git a/gcc/testsuite/gcc.dg/tree-ssa/reassoc-33.c
b/gcc/testsuite/gcc.dg/tree-ssa/reassoc-33.c
index 5572df4ae24..5e1cd1a6fa7 100644
--- a/gcc/testsuite/gcc.dg/tree-ssa/reassoc-33.c
+++ b/gcc/testsuite/gcc.dg/tree-ssa/reassoc-33.c
@@ -1,4 +1,4 @@
-/* { dg-do run { target { ! "m68k*-*-* mmix*-*-* bfin*-*-* v850*-*-*
moxie*-*-* cris*-*-* m32c*-*-* fr30*-*-* mcore*-*-* powerpc*-*-* xtensa*-*-*
hppa*-*-* nios2*-*-*"} } } */
+/* { dg-do run { target { ! "m68k*-*-* mmix*-*-* bfin*-*-* v850*-*-*
moxie*-*-* cris*-*-* m32c*-*-* fr30*-*-* mcore*-*-* powerpc*-*-* xtensa*-*-*
hppa*-*-* nios2*-*-* pru*-*-*"} } } */
/* { dg-options "-O2 -fno-inline -fdump-tree-reassoc1-details" } */
/* { dg-additional-options "-mbranch-cost=2" { target branch_cost } } */
diff --git a/gcc/testsuite/gcc.dg/tree-ssa/reassoc-34.c
b/gcc/testsuite/gcc.dg/tree-ssa/reassoc-34.c
index 9b45f1cd9be..a59df6a7244 100644
--- a/gcc/testsuite/gcc.dg/tree-ssa/reassoc-34.c
+++ b/gcc/testsuite/gcc.dg/tree-ssa/reassoc-34.c
@@ -1,4 +1,4 @@
-/* { dg-do run { target { ! "m68k*-*-* mmix*-*-* bfin*-*-* v850*-*-*
moxie*-*-* cris*-*-* m32c*-*-* fr30*-*-* mcore*-*-* powerpc*-*-* xtensa*-*-*
hppa*-*-* nios2*-*-*"} } } */
+/* { dg-do run { target { ! "m68k*-*-* mmix*-*-* bfin*-*-* v850*-*-*
moxie*-*-* cris*-*-* m32c*-*-* fr30*-*-* mcore*-*-* powerpc*-*-* xtensa*-*-*
hppa*-*-* nios2*-*-* pru*-*-*"} } } */
/* { dg-options "-O2 -fno-inline -fdump-tree-reassoc1-details" } */
/* { dg-additional-options "-mbranch-cost=2" { target branch_cost } } */
diff --git a/gcc/testsuite/gcc.dg/tree-ssa/reassoc-35.c
b/gcc/testsuite/gcc.dg/tree-ssa/reassoc-35.c
index 9ee3abca04e..21239372709 100644
--- a/gcc/testsuite/gcc.dg/tree-ssa/reassoc-35.c
+++ b/gcc/testsuite/gcc.dg/tree-ssa/reassoc-35.c
@@ -1,4 +1,4 @@
-/* { dg-do run { target { ! "m68k*-*-* mmix*-*-* bfin*-*-* v850*-*-*
moxie*-*-* cris*-*-* m32c*-*-* fr30*-*-* mcore*-*-* powerpc*-*-* xtensa*-*-*
hppa*-*-* nios2*-*-*"} } } */
+/* { dg-do run { target { ! "m68k*-*-* mmix*-*-* bfin*-*-* v850*-*-*
moxie*-*-* cris*-*-* m32c*-*-* fr30*-*-* mcore*-*-* powerpc*-*-* xtensa*-*-*
hppa*-*-* nios2*-*-* pru*-*-*"} } } */
/* { dg-options "-O2 -fno-inline -fdump-tree-reassoc1-details" } */
/* { dg-additional-options "-mbranch-cost=2" { target branch_cost } } */
diff --git a/gcc/testsuite/gcc.dg/tree-ssa/reassoc-36.c
b/gcc/testsuite/gcc.dg/tree-ssa/reassoc-36.c
index ac3a04291b7..f8eb0954ae7 100644
--- a/gcc/testsuite/gcc.dg/tree-ssa/reassoc-36.c
+++ b/gcc/testsuite/gcc.dg/tree-ssa/reassoc-36.c
@@ -1,4 +1,4 @@
-/* { dg-do run { target { ! "m68k*-*-* mmix*-*-* bfin*-*-* v850*-*-*
moxie*-*-* cris*-*-* m32c*-*-* fr30*-*-* mcore*-*-* powerpc*-*-* xtensa*-*-*
hppa*-*-* nios2*-*-*"} } } */
+/* { dg-do run { target { ! "m68k*-*-* mmix*-*-* bfin*-*-* v850*-*-*
moxie*-*-* cris*-*-* m32c*-*-* fr30*-*-* mcore*-*-* powerpc*-*-* xtensa*-*-*
hppa*-*-* nios2*-*-* pru*-*-*"} } } */
/* { dg-options "-O2 -fno-inline -fdump-tree-r
[PATCH v3 02/10] Initial TI PRU libgcc port
The floating point support has been borrowed from C6X libgcc port
to help with TI PRU toolchain ABI compatibility.
libgcc/ChangeLog:
2018-07-27 Dimitar Dimitrov
* config.host: Add PRU target.
* config/pru/asri.c: New file.
* config/pru/eqd.c: New file.
* config/pru/eqf.c: New file.
* config/pru/ged.c: New file.
* config/pru/gef.c: New file.
* config/pru/gtd.c: New file.
* config/pru/gtf.c: New file.
* config/pru/led.c: New file.
* config/pru/lef.c: New file.
* config/pru/lib2bitcountHI.c: New file.
* config/pru/lib2divHI.c: New file.
* config/pru/lib2divQI.c: New file.
* config/pru/lib2divSI.c: New file.
* config/pru/libgcc-eabi.ver: New file.
* config/pru/ltd.c: New file.
* config/pru/ltf.c: New file.
* config/pru/mpyll.S: New file.
* config/pru/pru-abi.h: New file.
* config/pru/pru-asm.h: New file.
* config/pru/pru-divmod.h: New file.
* config/pru/sfp-machine.h: New file.
* config/pru/t-pru: New file.
Signed-off-by: Dimitar Dimitrov
---
libgcc/config.host | 7 +++
libgcc/config/pru/asri.c | 33 ++
libgcc/config/pru/eqd.c| 45 +
libgcc/config/pru/eqf.c| 45 +
libgcc/config/pru/ged.c| 45 +
libgcc/config/pru/gef.c| 45 +
libgcc/config/pru/gtd.c| 45 +
libgcc/config/pru/gtf.c| 45 +
libgcc/config/pru/led.c| 45 +
libgcc/config/pru/lef.c| 45 +
libgcc/config/pru/lib2bitcountHI.c | 43 +
libgcc/config/pru/lib2divHI.c | 42 +
libgcc/config/pru/lib2divQI.c | 42 +
libgcc/config/pru/lib2divSI.c | 48 ++
libgcc/config/pru/libgcc-eabi.ver | 88 ++
libgcc/config/pru/ltd.c| 45 +
libgcc/config/pru/ltf.c| 45 +
libgcc/config/pru/mpyll.S | 57 +
libgcc/config/pru/pru-abi.h| 109
libgcc/config/pru/pru-asm.h| 35 +++
libgcc/config/pru/pru-divmod.h | 117 ++
libgcc/config/pru/sfp-machine.h| 125 +
libgcc/config/pru/t-pru| 50 +++
23 files changed, 1246 insertions(+)
create mode 100644 libgcc/config/pru/asri.c
create mode 100644 libgcc/config/pru/eqd.c
create mode 100644 libgcc/config/pru/eqf.c
create mode 100644 libgcc/config/pru/ged.c
create mode 100644 libgcc/config/pru/gef.c
create mode 100644 libgcc/config/pru/gtd.c
create mode 100644 libgcc/config/pru/gtf.c
create mode 100644 libgcc/config/pru/led.c
create mode 100644 libgcc/config/pru/lef.c
create mode 100644 libgcc/config/pru/lib2bitcountHI.c
create mode 100644 libgcc/config/pru/lib2divHI.c
create mode 100644 libgcc/config/pru/lib2divQI.c
create mode 100644 libgcc/config/pru/lib2divSI.c
create mode 100644 libgcc/config/pru/libgcc-eabi.ver
create mode 100644 libgcc/config/pru/ltd.c
create mode 100644 libgcc/config/pru/ltf.c
create mode 100644 libgcc/config/pru/mpyll.S
create mode 100644 libgcc/config/pru/pru-abi.h
create mode 100644 libgcc/config/pru/pru-asm.h
create mode 100644 libgcc/config/pru/pru-divmod.h
create mode 100644 libgcc/config/pru/sfp-machine.h
create mode 100644 libgcc/config/pru/t-pru
diff --git a/libgcc/config.host b/libgcc/config.host
index 18cabaf24f6..ff229c38f0c 100644
--- a/libgcc/config.host
+++ b/libgcc/config.host
@@ -165,6 +165,9 @@ nios2*-*-*)
powerpc*-*-*)
cpu_type=rs6000
;;
+pru-*-*)
+ cpu_type=pru
+ ;;
rs6000*-*-*)
;;
riscv*-*-*)
@@ -1145,6 +1148,10 @@ powerpcle-*-eabi*)
tmake_file="${tmake_file} rs6000/t-ppccomm rs6000/t-crtstuff
t-crtstuff-pic t-fdpbit"
extra_parts="$extra_parts crtbegin.o crtend.o crtbeginS.o crtendS.o
crtbeginT.o ecrti.o ecrtn.o ncrti.o ncrtn.o"
;;
+pru-*-*)
+ tmake_file="${tmake_file} t-softfp-sfdf t-softfp-excl t-softfp
t-gnu-prefix pru/t-pru"
+ tm_file="$tm_file pru/pru-abi.h"
+ ;;
riscv*-*-linux*)
tmake_file="${tmake_file} riscv/t-softfp${host_address} t-softfp
riscv/t-elf riscv/t-elf${host_address}"
extra_parts="$extra_parts crtbegin.o crtend.o crti.o crtn.o crtendS.o
crtbeginT.o"
diff --git a/libgcc/config/pru/asri.c b/libgcc/config/pru/asri.c
new file mode 100644
index 000..591d660f227
--- /dev/null
+++ b/libgcc/config/pru/asri.c
@@ -0,0 +1,33 @@
+/* PRU ABI compatibility functions
+ Arithmetic right shift
+ Copyright (C) 2017-2018 Free Software Foundation, Inc.
+ Contributed by Dimitar Dimitrov
+
+ This file is free software; you can redistribute it and/or
+
[PATCH v3 04/10] testsuite: Add check for overflowed IMEM region to testsuite
PRU architecture supports maximum 256k program memory (IMEM). Some GCC
test cases manage to produce executables bigger than that.
gcc/testsuite/ChangeLog:
2018-07-27 Dimitar Dimitrov
* lib/gcc-dg.exp: Bail on region overflow for tiny targets.
* lib/target-utils.exp: Ditto.
* lib/target-supports.exp: Declare PRU target as tiny.
Signed-off-by: Dimitar Dimitrov
---
gcc/testsuite/lib/gcc-dg.exp | 5 +
gcc/testsuite/lib/target-supports.exp | 5 +
gcc/testsuite/lib/target-utils.exp| 4
3 files changed, 14 insertions(+)
diff --git a/gcc/testsuite/lib/gcc-dg.exp b/gcc/testsuite/lib/gcc-dg.exp
index f5e6bef5dd9..c26d1c73aa0 100644
--- a/gcc/testsuite/lib/gcc-dg.exp
+++ b/gcc/testsuite/lib/gcc-dg.exp
@@ -392,6 +392,11 @@ proc gcc-dg-prune { system text } {
return "::unsupported::memory full"
}
+if { [regexp "(^|\n)\[^\n\]*: region \[^\n\]* overflowed" $text]
+ && [check_effective_target_tiny] } {
+ return "::unsupported::memory full"
+}
+
# Likewise, if we see ".text exceeds local store range" or
# similar.
if {[string match "spu-*" $system] && \
diff --git a/gcc/testsuite/lib/target-supports.exp
b/gcc/testsuite/lib/target-supports.exp
index 60105eb9fd7..5299aaefcc3 100644
--- a/gcc/testsuite/lib/target-supports.exp
+++ b/gcc/testsuite/lib/target-supports.exp
@@ -8833,6 +8833,11 @@ proc check_effective_target_tiny {} {
&& [check_effective_target_avr_tiny] } {
set et_target_tiny_saved 1
}
+ # PRU Program Counter is 16-bits, and trampolines are not supported.
+ # Hence directly declare as a tiny target.
+ if [istarget pru-*-*] {
+ set et_target_tiny_saved 1
+ }
}
return $et_target_tiny_saved
diff --git a/gcc/testsuite/lib/target-utils.exp
b/gcc/testsuite/lib/target-utils.exp
index bd39cc5bc79..732a1827a02 100644
--- a/gcc/testsuite/lib/target-utils.exp
+++ b/gcc/testsuite/lib/target-utils.exp
@@ -35,6 +35,10 @@ proc ${tool}_check_unsupported_p { output } {
&& [check_effective_target_tiny] } {
return "memory full"
}
+if { [regexp "(^|\n)\[^\n\]*: region \[^\n\]* overflowed" $output]
+ && [check_effective_target_tiny] } {
+ return "memory full"
+}
if { [istarget spu-*-*] && \
[string match "*exceeds local store*" $output] } {
--
2.11.0
[PATCH v3 00/10] New backend for the TI PRU processor
This patch series adds support for the TI PRU I/O processor to GCC. All comments from v1 [1] and v2 [2] should be addressed in this third patch revision. Test results can be downloaded from here: http://dinux.eu/gnupru/testresults/20180816-b7bb5264/ Changes since patch series v2 [2]: - Minor fixes in documentation. - Set TARGET_HAVE_SPECULATION_SAFE_VALUE for PRU. Changes since patch series v1 [1]: - Simplified the load/store_multiple pattern. Replaced the numerous machine-generated patterns with a single generic one. - Removed the patch for MAX_MAX_OPERANDS increase. - Generalized testsuite checks for availability of large return values and function pointers. - A few rtx -> rtx_insn fixes. - Fixed function declaration formatting. - Added missing function comments. - Fixed diagnostics string format. - Removed unneeded dbxelf.h reference. - Removed flag_unwind_tables check. - Removed the workaround with subreg from machine description. Looks like core has meanwhile fixed the rootcause. - Added PRU regression tests for LRA framepointer fragmentation issue. - Added a new patch to skip two builtin_apply tests for PRU. [1] http://gcc.gnu.org/ml/gcc-patches/2018-06/msg00775.html [2] http://gcc.gnu.org/ml/gcc-patches/2018-07/msg01779.html Dimitar Dimitrov (10): Initial TI PRU GCC port Initial TI PRU libgcc port testsuite: Add PRU tests testsuite: Add check for overflowed IMEM region to testsuite testsuite: Add check for unsupported TI ABI PRU features to testsuite testsuite: Remove PRU from test cases requiring hosted environment testsuite: Define PRU stack usage testsuite: Mark that PRU has one-cycle jumps testsuite: Mark that PRU uses all function pointer bits testsuite: Mark testsuite that PRU has different calling convention configure.ac |7 + gcc/common/config/pru/pru-common.c | 36 + gcc/config.gcc |9 + gcc/config/pru/alu-zext.md | 178 ++ gcc/config/pru/constraints.md | 88 + gcc/config/pru/predicates.md | 224 ++ gcc/config/pru/pru-opts.h | 31 + gcc/config/pru/pru-passes.c| 234 ++ gcc/config/pru/pru-pragma.c| 90 + gcc/config/pru/pru-protos.h| 72 + gcc/config/pru/pru.c | 3001 gcc/config/pru/pru.h | 551 gcc/config/pru/pru.md | 956 +++ gcc/config/pru/pru.opt | 53 + gcc/config/pru/t-pru | 31 + gcc/doc/extend.texi| 21 + gcc/doc/invoke.texi| 55 + gcc/doc/md.texi| 22 + gcc/testsuite/g++.old-deja/g++.abi/ptrmem.C|2 +- gcc/testsuite/gcc.c-torture/execute/20101011-1.c |3 + gcc/testsuite/gcc.dg/20020312-2.c |2 + gcc/testsuite/gcc.dg/builtin-apply2.c |2 +- gcc/testsuite/gcc.dg/stack-usage-1.c |2 + .../gcc.dg/torture/stackalign/builtin-apply-2.c|2 +- gcc/testsuite/gcc.dg/tree-ssa/20040204-1.c |2 +- gcc/testsuite/gcc.dg/tree-ssa/reassoc-33.c |2 +- gcc/testsuite/gcc.dg/tree-ssa/reassoc-34.c |2 +- gcc/testsuite/gcc.dg/tree-ssa/reassoc-35.c |2 +- gcc/testsuite/gcc.dg/tree-ssa/reassoc-36.c |2 +- gcc/testsuite/gcc.dg/tree-ssa/ssa-thread-14.c |2 +- gcc/testsuite/gcc.target/pru/abi-arg-struct.c | 164 ++ gcc/testsuite/gcc.target/pru/ashiftrt.c| 13 + gcc/testsuite/gcc.target/pru/builtins-1.c | 12 + gcc/testsuite/gcc.target/pru/builtins-error.c |6 + gcc/testsuite/gcc.target/pru/clearbit.c| 13 + gcc/testsuite/gcc.target/pru/loop-asm.c| 19 + gcc/testsuite/gcc.target/pru/loop-dowhile.c| 45 + gcc/testsuite/gcc.target/pru/loop-hi-1.c | 38 + gcc/testsuite/gcc.target/pru/loop-hi-2.c | 17 + gcc/testsuite/gcc.target/pru/loop-qi-1.c | 38 + gcc/testsuite/gcc.target/pru/loop-qi-2.c | 17 + gcc/testsuite/gcc.target/pru/loop-short-1.c| 53 + gcc/testsuite/gcc.target/pru/loop-short-2.c| 21 + gcc/testsuite/gcc.target/pru/loop-si-1.c | 41 + gcc/testsuite/gcc.target/pru/loop-si-2.c | 20 + .../gcc.target/pru/loop-u8_pcrel_overflow.c| 42 + gcc/testsuite/gcc.target/pru/loop-ubyte-1.c| 30 + gcc/testsuite/gcc.target/pru/loop-ubyte-2.c| 18 + .../pru/lra-framepointer-fragmentation-1.c | 33 + .../pru/lra-framepointer-fragmentation-2.c | 61 + gcc/testsuite/gcc.target/pru/mabi-ti-1.c | 10 + gcc/testsu
Re: [PATCH v2 01/10] Initial TI PRU GCC port
On Tuesday, 7 Aug 2018, 16:56:16 EEST Sandra Loosemore wrote: > > * doc/extend.texi: Document PRU pragmas. > > * doc/invoke.texi: Document PRU-specific options. > > * doc/md.texi: Document PRU asm constraints. > > I have a few nit-picky comments about the documentation parts. Thank you for the review. I will fix those and send a new patch version. Regards, Dimitar
[PATCH v2 08/10] testsuite: Mark that PRU has one-cycle jumps
gcc/testsuite/ChangeLog:
2018-07-27 Dimitar Dimitrov
* gcc.dg/tree-ssa/20040204-1.c: XFAIL on pru.
* gcc.dg/tree-ssa/reassoc-33.c: Ditto.
* gcc.dg/tree-ssa/reassoc-34.c: Ditto.
* gcc.dg/tree-ssa/reassoc-35.c: Ditto.
* gcc.dg/tree-ssa/reassoc-36.c: Ditto.
* gcc.dg/tree-ssa/ssa-thread-14.c: Ditto.
Signed-off-by: Dimitar Dimitrov
---
gcc/testsuite/gcc.dg/tree-ssa/20040204-1.c| 2 +-
gcc/testsuite/gcc.dg/tree-ssa/reassoc-33.c| 2 +-
gcc/testsuite/gcc.dg/tree-ssa/reassoc-34.c| 2 +-
gcc/testsuite/gcc.dg/tree-ssa/reassoc-35.c| 2 +-
gcc/testsuite/gcc.dg/tree-ssa/reassoc-36.c| 2 +-
gcc/testsuite/gcc.dg/tree-ssa/ssa-thread-14.c | 2 +-
6 files changed, 6 insertions(+), 6 deletions(-)
diff --git a/gcc/testsuite/gcc.dg/tree-ssa/20040204-1.c
b/gcc/testsuite/gcc.dg/tree-ssa/20040204-1.c
index a1237cf839b..06b83029fd3 100644
--- a/gcc/testsuite/gcc.dg/tree-ssa/20040204-1.c
+++ b/gcc/testsuite/gcc.dg/tree-ssa/20040204-1.c
@@ -33,4 +33,4 @@ void test55 (int x, int y)
that the && should be emitted (based on BRANCH_COST). Fix this
by teaching dom to look through && and register all components
as true. */
-/* { dg-final { scan-tree-dump-times "link_error" 0 "optimized" { xfail { !
"alpha*-*-* arm*-*-* aarch64*-*-* powerpc*-*-* cris-*-* crisv32-*-* hppa*-*-*
i?86-*-* mmix-*-* mips*-*-* m68k*-*-* moxie-*-* nds32*-*-* s390*-*-* sh*-*-*
sparc*-*-* spu-*-* visium-*-* x86_64-*-* riscv*-*-*" } } } } */
+/* { dg-final { scan-tree-dump-times "link_error" 0 "optimized" { xfail { !
"alpha*-*-* arm*-*-* aarch64*-*-* powerpc*-*-* cris-*-* crisv32-*-* hppa*-*-*
i?86-*-* mmix-*-* mips*-*-* m68k*-*-* moxie-*-* nds32*-*-* s390*-*-* sh*-*-*
sparc*-*-* spu-*-* visium-*-* x86_64-*-* riscv*-*-* pru*-*-*" } } } } */
diff --git a/gcc/testsuite/gcc.dg/tree-ssa/reassoc-33.c
b/gcc/testsuite/gcc.dg/tree-ssa/reassoc-33.c
index 5572df4ae24..5e1cd1a6fa7 100644
--- a/gcc/testsuite/gcc.dg/tree-ssa/reassoc-33.c
+++ b/gcc/testsuite/gcc.dg/tree-ssa/reassoc-33.c
@@ -1,4 +1,4 @@
-/* { dg-do run { target { ! "m68k*-*-* mmix*-*-* bfin*-*-* v850*-*-*
moxie*-*-* cris*-*-* m32c*-*-* fr30*-*-* mcore*-*-* powerpc*-*-* xtensa*-*-*
hppa*-*-* nios2*-*-*"} } } */
+/* { dg-do run { target { ! "m68k*-*-* mmix*-*-* bfin*-*-* v850*-*-*
moxie*-*-* cris*-*-* m32c*-*-* fr30*-*-* mcore*-*-* powerpc*-*-* xtensa*-*-*
hppa*-*-* nios2*-*-* pru*-*-*"} } } */
/* { dg-options "-O2 -fno-inline -fdump-tree-reassoc1-details" } */
/* { dg-additional-options "-mbranch-cost=2" { target branch_cost } } */
diff --git a/gcc/testsuite/gcc.dg/tree-ssa/reassoc-34.c
b/gcc/testsuite/gcc.dg/tree-ssa/reassoc-34.c
index 9b45f1cd9be..a59df6a7244 100644
--- a/gcc/testsuite/gcc.dg/tree-ssa/reassoc-34.c
+++ b/gcc/testsuite/gcc.dg/tree-ssa/reassoc-34.c
@@ -1,4 +1,4 @@
-/* { dg-do run { target { ! "m68k*-*-* mmix*-*-* bfin*-*-* v850*-*-*
moxie*-*-* cris*-*-* m32c*-*-* fr30*-*-* mcore*-*-* powerpc*-*-* xtensa*-*-*
hppa*-*-* nios2*-*-*"} } } */
+/* { dg-do run { target { ! "m68k*-*-* mmix*-*-* bfin*-*-* v850*-*-*
moxie*-*-* cris*-*-* m32c*-*-* fr30*-*-* mcore*-*-* powerpc*-*-* xtensa*-*-*
hppa*-*-* nios2*-*-* pru*-*-*"} } } */
/* { dg-options "-O2 -fno-inline -fdump-tree-reassoc1-details" } */
/* { dg-additional-options "-mbranch-cost=2" { target branch_cost } } */
diff --git a/gcc/testsuite/gcc.dg/tree-ssa/reassoc-35.c
b/gcc/testsuite/gcc.dg/tree-ssa/reassoc-35.c
index 9ee3abca04e..21239372709 100644
--- a/gcc/testsuite/gcc.dg/tree-ssa/reassoc-35.c
+++ b/gcc/testsuite/gcc.dg/tree-ssa/reassoc-35.c
@@ -1,4 +1,4 @@
-/* { dg-do run { target { ! "m68k*-*-* mmix*-*-* bfin*-*-* v850*-*-*
moxie*-*-* cris*-*-* m32c*-*-* fr30*-*-* mcore*-*-* powerpc*-*-* xtensa*-*-*
hppa*-*-* nios2*-*-*"} } } */
+/* { dg-do run { target { ! "m68k*-*-* mmix*-*-* bfin*-*-* v850*-*-*
moxie*-*-* cris*-*-* m32c*-*-* fr30*-*-* mcore*-*-* powerpc*-*-* xtensa*-*-*
hppa*-*-* nios2*-*-* pru*-*-*"} } } */
/* { dg-options "-O2 -fno-inline -fdump-tree-reassoc1-details" } */
/* { dg-additional-options "-mbranch-cost=2" { target branch_cost } } */
diff --git a/gcc/testsuite/gcc.dg/tree-ssa/reassoc-36.c
b/gcc/testsuite/gcc.dg/tree-ssa/reassoc-36.c
index ac3a04291b7..f8eb0954ae7 100644
--- a/gcc/testsuite/gcc.dg/tree-ssa/reassoc-36.c
+++ b/gcc/testsuite/gcc.dg/tree-ssa/reassoc-36.c
@@ -1,4 +1,4 @@
-/* { dg-do run { target { ! "m68k*-*-* mmix*-*-* bfin*-*-* v850*-*-*
moxie*-*-* cris*-*-* m32c*-*-* fr30*-*-* mcore*-*-* powerpc*-*-* xtensa*-*-*
hppa*-*-* nios2*-*-*"} } } */
+/* { dg-do run { target { ! "m68k*-*-* mmix*-*-* bfin*-*-* v850*-*-*
moxie*-*-* cris*-*-* m32c*-*-* fr30*-*-* mcore*-*-* powerpc*-*-* xtensa*-*-*
hppa*-*-* nios2*-*-* pru*-*-*"} } } */
/* { dg-options "-O2 -fno-inline -fdump-tree-r
[PATCH v2 02/10] Initial TI PRU libgcc port
The floating point support has been borrowed from C6X libgcc port
to help with TI PRU toolchain ABI compatibility.
libgcc/ChangeLog:
2018-07-27 Dimitar Dimitrov
* config.host: Add PRU target.
* config/pru/asri.c: New file.
* config/pru/eqd.c: New file.
* config/pru/eqf.c: New file.
* config/pru/ged.c: New file.
* config/pru/gef.c: New file.
* config/pru/gtd.c: New file.
* config/pru/gtf.c: New file.
* config/pru/led.c: New file.
* config/pru/lef.c: New file.
* config/pru/lib2bitcountHI.c: New file.
* config/pru/lib2divHI.c: New file.
* config/pru/lib2divQI.c: New file.
* config/pru/lib2divSI.c: New file.
* config/pru/libgcc-eabi.ver: New file.
* config/pru/ltd.c: New file.
* config/pru/ltf.c: New file.
* config/pru/mpyll.S: New file.
* config/pru/pru-abi.h: New file.
* config/pru/pru-asm.h: New file.
* config/pru/pru-divmod.h: New file.
* config/pru/sfp-machine.h: New file.
* config/pru/t-pru: New file.
Signed-off-by: Dimitar Dimitrov
---
libgcc/config.host | 7 +++
libgcc/config/pru/asri.c | 33 ++
libgcc/config/pru/eqd.c| 45 +
libgcc/config/pru/eqf.c| 45 +
libgcc/config/pru/ged.c| 45 +
libgcc/config/pru/gef.c| 45 +
libgcc/config/pru/gtd.c| 45 +
libgcc/config/pru/gtf.c| 45 +
libgcc/config/pru/led.c| 45 +
libgcc/config/pru/lef.c| 45 +
libgcc/config/pru/lib2bitcountHI.c | 43 +
libgcc/config/pru/lib2divHI.c | 42 +
libgcc/config/pru/lib2divQI.c | 42 +
libgcc/config/pru/lib2divSI.c | 48 ++
libgcc/config/pru/libgcc-eabi.ver | 88 ++
libgcc/config/pru/ltd.c| 45 +
libgcc/config/pru/ltf.c| 45 +
libgcc/config/pru/mpyll.S | 57 +
libgcc/config/pru/pru-abi.h| 109
libgcc/config/pru/pru-asm.h| 35 +++
libgcc/config/pru/pru-divmod.h | 117 ++
libgcc/config/pru/sfp-machine.h| 125 +
libgcc/config/pru/t-pru| 50 +++
23 files changed, 1246 insertions(+)
create mode 100644 libgcc/config/pru/asri.c
create mode 100644 libgcc/config/pru/eqd.c
create mode 100644 libgcc/config/pru/eqf.c
create mode 100644 libgcc/config/pru/ged.c
create mode 100644 libgcc/config/pru/gef.c
create mode 100644 libgcc/config/pru/gtd.c
create mode 100644 libgcc/config/pru/gtf.c
create mode 100644 libgcc/config/pru/led.c
create mode 100644 libgcc/config/pru/lef.c
create mode 100644 libgcc/config/pru/lib2bitcountHI.c
create mode 100644 libgcc/config/pru/lib2divHI.c
create mode 100644 libgcc/config/pru/lib2divQI.c
create mode 100644 libgcc/config/pru/lib2divSI.c
create mode 100644 libgcc/config/pru/libgcc-eabi.ver
create mode 100644 libgcc/config/pru/ltd.c
create mode 100644 libgcc/config/pru/ltf.c
create mode 100644 libgcc/config/pru/mpyll.S
create mode 100644 libgcc/config/pru/pru-abi.h
create mode 100644 libgcc/config/pru/pru-asm.h
create mode 100644 libgcc/config/pru/pru-divmod.h
create mode 100644 libgcc/config/pru/sfp-machine.h
create mode 100644 libgcc/config/pru/t-pru
diff --git a/libgcc/config.host b/libgcc/config.host
index 18cabaf24f6..ff229c38f0c 100644
--- a/libgcc/config.host
+++ b/libgcc/config.host
@@ -165,6 +165,9 @@ nios2*-*-*)
powerpc*-*-*)
cpu_type=rs6000
;;
+pru-*-*)
+ cpu_type=pru
+ ;;
rs6000*-*-*)
;;
riscv*-*-*)
@@ -1145,6 +1148,10 @@ powerpcle-*-eabi*)
tmake_file="${tmake_file} rs6000/t-ppccomm rs6000/t-crtstuff
t-crtstuff-pic t-fdpbit"
extra_parts="$extra_parts crtbegin.o crtend.o crtbeginS.o crtendS.o
crtbeginT.o ecrti.o ecrtn.o ncrti.o ncrtn.o"
;;
+pru-*-*)
+ tmake_file="${tmake_file} t-softfp-sfdf t-softfp-excl t-softfp
t-gnu-prefix pru/t-pru"
+ tm_file="$tm_file pru/pru-abi.h"
+ ;;
riscv*-*-linux*)
tmake_file="${tmake_file} riscv/t-softfp${host_address} t-softfp
riscv/t-elf riscv/t-elf${host_address}"
extra_parts="$extra_parts crtbegin.o crtend.o crti.o crtn.o crtendS.o
crtbeginT.o"
diff --git a/libgcc/config/pru/asri.c b/libgcc/config/pru/asri.c
new file mode 100644
index 000..591d660f227
--- /dev/null
+++ b/libgcc/config/pru/asri.c
@@ -0,0 +1,33 @@
+/* PRU ABI compatibility functions
+ Arithmetic right shift
+ Copyright (C) 2017-2018 Free Software Foundation, Inc.
+ Contributed by Dimitar Dimitrov
+
+ This file is free software; you can redistribute it and/or
+
[PATCH v2 10/10] testsuite: Mark testsuite that PRU has different calling convention
For variadic functions, the last named and all anonymous arguments
are passed on stack. Regular functions pass arguments in registers.
gcc/testsuite/ChangeLog:
2018-07-27 Dimitar Dimitrov
* gcc.dg/builtin-apply2.c: Skip for PRU.
* gcc.dg/torture/stackalign/builtin-apply-2.c: Ditto.
Signed-off-by: Dimitar Dimitrov
---
gcc/testsuite/gcc.dg/builtin-apply2.c | 2 +-
gcc/testsuite/gcc.dg/torture/stackalign/builtin-apply-2.c | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/gcc/testsuite/gcc.dg/builtin-apply2.c
b/gcc/testsuite/gcc.dg/builtin-apply2.c
index 3768caa5d5a..6ede0f3054b 100644
--- a/gcc/testsuite/gcc.dg/builtin-apply2.c
+++ b/gcc/testsuite/gcc.dg/builtin-apply2.c
@@ -1,7 +1,7 @@
/* { dg-do run } */
/* { dg-require-effective-target untyped_assembly } */
/* { dg-skip-if "Variadic funcs have all args on stack. Normal funcs have args
in registers." { "avr-*-* nds32*-*-*" } } */
-/* { dg-skip-if "Variadic funcs use different argument passing from normal
funcs." { "riscv*-*-*" } } */
+/* { dg-skip-if "Variadic funcs use different argument passing from normal
funcs." { "riscv*-*-* pru-*-*" } } */
/* { dg-skip-if "Variadic funcs use Base AAPCS. Normal funcs use VFP
variant." { arm*-*-* && arm_hf_eabi } } */
/* PR target/12503 */
diff --git a/gcc/testsuite/gcc.dg/torture/stackalign/builtin-apply-2.c
b/gcc/testsuite/gcc.dg/torture/stackalign/builtin-apply-2.c
index d033010dc7c..8b6e693c0f2 100644
--- a/gcc/testsuite/gcc.dg/torture/stackalign/builtin-apply-2.c
+++ b/gcc/testsuite/gcc.dg/torture/stackalign/builtin-apply-2.c
@@ -9,7 +9,7 @@
/* arm_hf_eabi: Variadic funcs use Base AAPCS. Normal funcs use VFP variant.
avr: Variadic funcs don't pass arguments in registers, while normal funcs
do. */
-/* { dg-skip-if "Variadic funcs use different argument passing from normal
funcs" { arm_hf_eabi || { avr-*-* riscv*-*-* } } } */
+/* { dg-skip-if "Variadic funcs use different argument passing from normal
funcs" { arm_hf_eabi || { avr-*-* riscv*-*-* pru-*-* } } } */
/* { dg-skip-if "Variadic funcs have all args on stack. Normal funcs have args
in registers." { nds32*-*-* } } */
/* { dg-require-effective-target untyped_assembly } */
--
2.11.0
[PATCH v2 09/10] testsuite: Mark that PRU uses all function pointer bits
gcc/testsuite/ChangeLog: 2018-07-27 Dimitar Dimitrov * g++.old-deja/g++.abi/ptrmem.C: Add PRU to list. Signed-off-by: Dimitar Dimitrov --- gcc/testsuite/g++.old-deja/g++.abi/ptrmem.C | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/gcc/testsuite/g++.old-deja/g++.abi/ptrmem.C b/gcc/testsuite/g++.old-deja/g++.abi/ptrmem.C index 341735879c5..bda7960d8a2 100644 --- a/gcc/testsuite/g++.old-deja/g++.abi/ptrmem.C +++ b/gcc/testsuite/g++.old-deja/g++.abi/ptrmem.C @@ -7,7 +7,7 @@ function. However, some platforms use all bits to encode a function pointer. Such platforms use the lowest bit of the delta, that is shifted left by one bit. */ -#if defined __MN10300__ || defined __SH5__ || defined __arm__ || defined __thumb__ || defined __mips__ || defined __aarch64__ +#if defined __MN10300__ || defined __SH5__ || defined __arm__ || defined __thumb__ || defined __mips__ || defined __aarch64__ || defined __PRU__ #define ADJUST_PTRFN(func, virt) ((void (*)())(func)) #define ADJUST_DELTA(delta, virt) (((delta) << 1) + !!(virt)) #else -- 2.11.0
[PATCH v2 06/10] testsuite: Remove PRU from test cases requiring hosted environment
gcc/testsuite/ChangeLog: 2018-07-27 Dimitar Dimitrov * gcc.c-torture/execute/20101011-1.c: Define DO_TEST to 0 for PRU. * gcc.dg/20020312-2.c: No PIC register for PRU. Signed-off-by: Dimitar Dimitrov --- gcc/testsuite/gcc.c-torture/execute/20101011-1.c | 3 +++ gcc/testsuite/gcc.dg/20020312-2.c| 2 ++ 2 files changed, 5 insertions(+) diff --git a/gcc/testsuite/gcc.c-torture/execute/20101011-1.c b/gcc/testsuite/gcc.c-torture/execute/20101011-1.c index dda49a59852..7f8d14d617c 100644 --- a/gcc/testsuite/gcc.c-torture/execute/20101011-1.c +++ b/gcc/testsuite/gcc.c-torture/execute/20101011-1.c @@ -93,6 +93,9 @@ __aeabi_idiv0 (int return_value) #elif defined (__nvptx__) /* There isn't even a signal function. */ # define DO_TEST 0 +#elif defined (__pru__) +/* There isn't even a signal function. */ +# define DO_TEST 0 #else # define DO_TEST 1 #endif diff --git a/gcc/testsuite/gcc.dg/20020312-2.c b/gcc/testsuite/gcc.dg/20020312-2.c index f5929e0b057..209ef67e263 100644 --- a/gcc/testsuite/gcc.dg/20020312-2.c +++ b/gcc/testsuite/gcc.dg/20020312-2.c @@ -111,6 +111,8 @@ extern void abort (void); /* No pic register. */ #elif defined (__nvptx__) /* No pic register. */ +#elif defined(__PRU__) +/* No pic register. */ #else # error "Modify the test for your target." #endif -- 2.11.0
[PATCH v2 03/10] testsuite: Add PRU tests
gcc/testsuite/ChangeLog: 2018-07-27 Dimitar Dimitrov * gcc.target/pru/abi-arg-struct.c: New test. * gcc.target/pru/ashiftrt.c: New test. * gcc.target/pru/builtins-1.c: New test. * gcc.target/pru/builtins-error.c: New test. * gcc.target/pru/clearbit.c: New test. * gcc.target/pru/loop-asm.c: New test. * gcc.target/pru/loop-dowhile.c: New test. * gcc.target/pru/loop-hi-1.c: New test. * gcc.target/pru/loop-hi-2.c: New test. * gcc.target/pru/loop-qi-1.c: New test. * gcc.target/pru/loop-qi-2.c: New test. * gcc.target/pru/loop-short-1.c: New test. * gcc.target/pru/loop-short-2.c: New test. * gcc.target/pru/loop-si-1.c: New test. * gcc.target/pru/loop-si-2.c: New test. * gcc.target/pru/loop-u8_pcrel_overflow.c: New test. * gcc.target/pru/loop-ubyte-1.c: New test. * gcc.target/pru/loop-ubyte-2.c: New test. * gcc.target/pru/lra-framepointer-fragmentation-1.c: New test. * gcc.target/pru/lra-framepointer-fragmentation-2.c: New test. * gcc.target/pru/mabi-ti-1.c: New test. * gcc.target/pru/mabi-ti-2.c: New test. * gcc.target/pru/mabi-ti-3.c: New test. * gcc.target/pru/mabi-ti-4.c: New test. * gcc.target/pru/mabi-ti-5.c: New test. * gcc.target/pru/mabi-ti-6.c: New test. * gcc.target/pru/mabi-ti-7.c: New test. * gcc.target/pru/pr64366.c: New test. * gcc.target/pru/pragma-ctable_entry.c: New test. * gcc.target/pru/pru.exp: New file. * gcc.target/pru/qbbc-1.c: New test. * gcc.target/pru/qbbc-2.c: New test. * gcc.target/pru/qbbc-3.c: New test. * gcc.target/pru/qbbs-1.c: New test. * gcc.target/pru/qbbs-2.c: New test. * gcc.target/pru/setbit.c: New test. * gcc.target/pru/zero_extend-and-hisi.c: New test. * gcc.target/pru/zero_extend-and-qihi.c: New test. * gcc.target/pru/zero_extend-and-qisi.c: New test. * gcc.target/pru/zero_extend-hisi.c: New test. * gcc.target/pru/zero_extend-qihi.c: New test. * gcc.target/pru/zero_extend-qisi.c: New test. * lib/target-supports.exp: Add PRU to feature filters. Signed-off-by: Dimitar Dimitrov --- gcc/testsuite/gcc.target/pru/abi-arg-struct.c | 164 + gcc/testsuite/gcc.target/pru/ashiftrt.c| 13 ++ gcc/testsuite/gcc.target/pru/builtins-1.c | 12 ++ gcc/testsuite/gcc.target/pru/builtins-error.c | 6 + gcc/testsuite/gcc.target/pru/clearbit.c| 13 ++ gcc/testsuite/gcc.target/pru/loop-asm.c| 19 +++ gcc/testsuite/gcc.target/pru/loop-dowhile.c| 45 ++ gcc/testsuite/gcc.target/pru/loop-hi-1.c | 38 + gcc/testsuite/gcc.target/pru/loop-hi-2.c | 17 +++ gcc/testsuite/gcc.target/pru/loop-qi-1.c | 38 + gcc/testsuite/gcc.target/pru/loop-qi-2.c | 17 +++ gcc/testsuite/gcc.target/pru/loop-short-1.c| 53 +++ gcc/testsuite/gcc.target/pru/loop-short-2.c| 21 +++ gcc/testsuite/gcc.target/pru/loop-si-1.c | 41 ++ gcc/testsuite/gcc.target/pru/loop-si-2.c | 20 +++ .../gcc.target/pru/loop-u8_pcrel_overflow.c| 42 ++ gcc/testsuite/gcc.target/pru/loop-ubyte-1.c| 30 gcc/testsuite/gcc.target/pru/loop-ubyte-2.c| 18 +++ .../pru/lra-framepointer-fragmentation-1.c | 33 + .../pru/lra-framepointer-fragmentation-2.c | 61 gcc/testsuite/gcc.target/pru/mabi-ti-1.c | 10 ++ gcc/testsuite/gcc.target/pru/mabi-ti-2.c | 15 ++ gcc/testsuite/gcc.target/pru/mabi-ti-3.c | 12 ++ gcc/testsuite/gcc.target/pru/mabi-ti-4.c | 14 ++ gcc/testsuite/gcc.target/pru/mabi-ti-5.c | 33 + gcc/testsuite/gcc.target/pru/mabi-ti-6.c | 12 ++ gcc/testsuite/gcc.target/pru/mabi-ti-7.c | 21 +++ gcc/testsuite/gcc.target/pru/pr64366.c | 128 gcc/testsuite/gcc.target/pru/pragma-ctable_entry.c | 22 +++ gcc/testsuite/gcc.target/pru/pru.exp | 41 ++ gcc/testsuite/gcc.target/pru/qbbc-1.c | 29 gcc/testsuite/gcc.target/pru/qbbc-2.c | 15 ++ gcc/testsuite/gcc.target/pru/qbbc-3.c | 15 ++ gcc/testsuite/gcc.target/pru/qbbs-1.c | 29 gcc/testsuite/gcc.target/pru/qbbs-2.c | 15 ++ gcc/testsuite/gcc.target/pru/setbit.c | 13 ++ .../gcc.target/pru/zero_extend-and-hisi.c | 16 ++ .../gcc.target/pru/zero_extend-and-qihi.c | 16 ++ .../gcc.target/pru/zero_extend-and-qisi.c | 16 ++ gcc/testsuite/gcc.target/pru/zero_extend-hisi.c| 43 ++ gcc/testsuite/gcc.target/pru/zero_extend-qihi.c| 43 ++ gcc/testsuite/gcc.target/pru/zero_extend-qisi.c| 43 ++ gcc/testsuite/lib/target-supports.exp
[PATCH v2 07/10] testsuite: Define PRU stack usage
gcc/testsuite/ChangeLog: 2018-07-27 Dimitar Dimitrov * gcc.dg/stack-usage-1.c: Define PRU stack usage. Signed-off-by: Dimitar Dimitrov --- gcc/testsuite/gcc.dg/stack-usage-1.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/gcc/testsuite/gcc.dg/stack-usage-1.c b/gcc/testsuite/gcc.dg/stack-usage-1.c index 038bd4ec05c..ffa97da6c32 100644 --- a/gcc/testsuite/gcc.dg/stack-usage-1.c +++ b/gcc/testsuite/gcc.dg/stack-usage-1.c @@ -93,6 +93,8 @@ # define SIZE 254 #elif defined (__nios2__) # define SIZE 252 +#elif defined (__PRU__) +# define SIZE 252 #elif defined (__v850__) #define SIZE 260 #elif defined (__mn10300__) -- 2.11.0
[PATCH v2 00/10] New backend for the TI PRU processor
Hi, This patch series adds support for the TI PRU I/O processor to GCC. All comments from v1 [1] should be addressed in this second patch revision. Test results can be downloaded from here: http://dinux.eu/gnupru/testresults/20180727-e6562f4b/ I'm working to bringup a testbot sending results to gcc-testresults. I'll need a few weeks to finish and deploy it. Changes since patch series v1 [1]: - Simplified the load/store_multiple pattern. Replaced the numerous machine-generated patterns with a single generic one. - Removed the patch for MAX_MAX_OPERANDS increase. - Generalized testsuite checks for availability of large return values and function pointers. - A few rtx -> rtx_insn fixes. - Fixed function declaration formatting. - Added missing function comments. - Fixed diagnostics string format. - Removed unneeded dbxelf.h reference. - Removed flag_unwind_tables check. - Removed the workaround with subreg from machine description. Looks like core has meanwhile fixed the rootcause. - Added PRU regression tests for LRA framepointer fragmentation issue. - Added a new patch to skip two builtin_apply tests for PRU. [1] http://gcc.gnu.org/ml/gcc-patches/2018-06/msg00775.html Dimitar Dimitrov (10): Initial TI PRU GCC port Initial TI PRU libgcc port testsuite: Add PRU tests testsuite: Add check for overflowed IMEM region to testsuite testsuite: Add check for unsupported TI ABI PRU features to testsuite testsuite: Remove PRU from test cases requiring hosted environment testsuite: Define PRU stack usage testsuite: Mark that PRU has one-cycle jumps testsuite: Mark that PRU uses all function pointer bits testsuite: Mark testsuite that PRU has different calling convention configure.ac |7 + gcc/common/config/pru/pru-common.c | 36 + gcc/config.gcc |9 + gcc/config/pru/alu-zext.md | 178 ++ gcc/config/pru/constraints.md | 88 + gcc/config/pru/predicates.md | 224 ++ gcc/config/pru/pru-opts.h | 31 + gcc/config/pru/pru-passes.c| 234 ++ gcc/config/pru/pru-pragma.c| 90 + gcc/config/pru/pru-protos.h| 72 + gcc/config/pru/pru.c | 2998 gcc/config/pru/pru.h | 551 gcc/config/pru/pru.md | 956 +++ gcc/config/pru/pru.opt | 53 + gcc/config/pru/t-pru | 31 + gcc/doc/extend.texi| 20 + gcc/doc/invoke.texi| 55 + gcc/doc/md.texi| 22 + gcc/testsuite/g++.old-deja/g++.abi/ptrmem.C|2 +- gcc/testsuite/gcc.c-torture/execute/20101011-1.c |3 + gcc/testsuite/gcc.dg/20020312-2.c |2 + gcc/testsuite/gcc.dg/builtin-apply2.c |2 +- gcc/testsuite/gcc.dg/stack-usage-1.c |2 + .../gcc.dg/torture/stackalign/builtin-apply-2.c|2 +- gcc/testsuite/gcc.dg/tree-ssa/20040204-1.c |2 +- gcc/testsuite/gcc.dg/tree-ssa/reassoc-33.c |2 +- gcc/testsuite/gcc.dg/tree-ssa/reassoc-34.c |2 +- gcc/testsuite/gcc.dg/tree-ssa/reassoc-35.c |2 +- gcc/testsuite/gcc.dg/tree-ssa/reassoc-36.c |2 +- gcc/testsuite/gcc.dg/tree-ssa/ssa-thread-14.c |2 +- gcc/testsuite/gcc.target/pru/abi-arg-struct.c | 164 ++ gcc/testsuite/gcc.target/pru/ashiftrt.c| 13 + gcc/testsuite/gcc.target/pru/builtins-1.c | 12 + gcc/testsuite/gcc.target/pru/builtins-error.c |6 + gcc/testsuite/gcc.target/pru/clearbit.c| 13 + gcc/testsuite/gcc.target/pru/loop-asm.c| 19 + gcc/testsuite/gcc.target/pru/loop-dowhile.c| 45 + gcc/testsuite/gcc.target/pru/loop-hi-1.c | 38 + gcc/testsuite/gcc.target/pru/loop-hi-2.c | 17 + gcc/testsuite/gcc.target/pru/loop-qi-1.c | 38 + gcc/testsuite/gcc.target/pru/loop-qi-2.c | 17 + gcc/testsuite/gcc.target/pru/loop-short-1.c| 53 + gcc/testsuite/gcc.target/pru/loop-short-2.c| 21 + gcc/testsuite/gcc.target/pru/loop-si-1.c | 41 + gcc/testsuite/gcc.target/pru/loop-si-2.c | 20 + .../gcc.target/pru/loop-u8_pcrel_overflow.c| 42 + gcc/testsuite/gcc.target/pru/loop-ubyte-1.c| 30 + gcc/testsuite/gcc.target/pru/loop-ubyte-2.c| 18 + .../pru/lra-framepointer-fragmentation-1.c | 33 + .../pru/lra-framepointer-fragmentation-2.c | 61 + gcc/testsuite/gcc.target/pru/mabi-ti-1.c | 10 + gcc/testsuite/gcc.target/pru/mabi-ti-2.c | 15 + gcc/testsuite/gcc.target/pru/m
[PATCH v2 05/10] testsuite: Add check for unsupported TI ABI PRU features to testsuite
Not all C language features are supported when -mabi=ti option is
used for PRU target.
gcc/testsuite/ChangeLog:
2018-07-27 Dimitar Dimitrov
* lib/gcc-dg.exp: Filter unsupported features in PRU's TI ABI mode.
* lib/target-utils.exp: Ditto.
* lib/target-supports.exp (check_effective_target_function_pointers,
check_effective_target_large_return_values): New.
Signed-off-by: Dimitar Dimitrov
---
gcc/testsuite/lib/gcc-dg.exp | 11 +++
gcc/testsuite/lib/target-supports.exp | 26 ++
gcc/testsuite/lib/target-utils.exp| 8
3 files changed, 45 insertions(+)
diff --git a/gcc/testsuite/lib/gcc-dg.exp b/gcc/testsuite/lib/gcc-dg.exp
index c26d1c73aa0..c061c152f16 100644
--- a/gcc/testsuite/lib/gcc-dg.exp
+++ b/gcc/testsuite/lib/gcc-dg.exp
@@ -405,6 +405,17 @@ proc gcc-dg-prune { system text } {
return "::unsupported::memory full"
}
+if { [string match "*error: function pointers not supported*" $text]
+ && ![check_effective_target_function_pointers] } {
+ # The format here is important. See dg.exp.
+ return "::unsupported::funcptr"
+}
+if { [string match "*error: large return values not supported*" $text]
+ && ![check_effective_target_large_return_values] } {
+ # The format here is important. See dg.exp.
+ return "::unsupported::large return values"
+}
+
return $text
}
diff --git a/gcc/testsuite/lib/target-supports.exp
b/gcc/testsuite/lib/target-supports.exp
index 5299aaefcc3..711a6db1e97 100644
--- a/gcc/testsuite/lib/target-supports.exp
+++ b/gcc/testsuite/lib/target-supports.exp
@@ -2608,6 +2608,32 @@ proc check_effective_target_ptr32plus { } {
}]
}
+# Return 1 if target supports function pointers, 0 otherwise.
+
+proc check_effective_target_function_pointers { } {
+if { [istarget pru-*-*] } {
+ return [check_no_compiler_messages func_ptr_avail assembly {
+ #ifdef __PRU_EABI_GNU__
+ #error unsupported
+ #endif
+ }]
+}
+return 1
+}
+
+# Return 1 if target supports arbitrarily large return values, 0 otherwise.
+
+proc check_effective_target_large_return_values { } {
+if { [istarget pru-*-*] } {
+ return [check_no_compiler_messages func_ptr_avail assembly {
+ #ifdef __PRU_EABI_GNU__
+ #error unsupported
+ #endif
+ }]
+}
+return 1
+}
+
# Return 1 if we support 32-bit or larger array and structure sizes
# using default options, 0 otherwise. Avoid false positive on
# targets with 20 or 24 bit address spaces.
diff --git a/gcc/testsuite/lib/target-utils.exp
b/gcc/testsuite/lib/target-utils.exp
index 732a1827a02..f636be2cb01 100644
--- a/gcc/testsuite/lib/target-utils.exp
+++ b/gcc/testsuite/lib/target-utils.exp
@@ -44,5 +44,13 @@ proc ${tool}_check_unsupported_p { output } {
[string match "*exceeds local store*" $output] } {
return "memory full"
}
+if { [string match "*error: function pointers not supported*" $output]
+ && ![check_effective_target_function_pointers] } {
+ return "function pointers not supported"
+}
+if { [string match "*error: large return values not supported*" $output]
+ && ![check_effective_target_large_return_values] } {
+ return "large return values not supported"
+}
return ""
}
--
2.11.0
[PATCH v2 04/10] testsuite: Add check for overflowed IMEM region to testsuite
PRU architecture supports maximum 256k program memory (IMEM). Some GCC
test cases manage to produce executables bigger than that.
gcc/testsuite/ChangeLog:
2018-07-27 Dimitar Dimitrov
* lib/gcc-dg.exp: Bail on region overflow for tiny targets.
* lib/target-utils.exp: Ditto.
* lib/target-supports.exp: Declare PRU target as tiny.
Signed-off-by: Dimitar Dimitrov
---
gcc/testsuite/lib/gcc-dg.exp | 5 +
gcc/testsuite/lib/target-supports.exp | 5 +
gcc/testsuite/lib/target-utils.exp| 4
3 files changed, 14 insertions(+)
diff --git a/gcc/testsuite/lib/gcc-dg.exp b/gcc/testsuite/lib/gcc-dg.exp
index f5e6bef5dd9..c26d1c73aa0 100644
--- a/gcc/testsuite/lib/gcc-dg.exp
+++ b/gcc/testsuite/lib/gcc-dg.exp
@@ -392,6 +392,11 @@ proc gcc-dg-prune { system text } {
return "::unsupported::memory full"
}
+if { [regexp "(^|\n)\[^\n\]*: region \[^\n\]* overflowed" $text]
+ && [check_effective_target_tiny] } {
+ return "::unsupported::memory full"
+}
+
# Likewise, if we see ".text exceeds local store range" or
# similar.
if {[string match "spu-*" $system] && \
diff --git a/gcc/testsuite/lib/target-supports.exp
b/gcc/testsuite/lib/target-supports.exp
index 60105eb9fd7..5299aaefcc3 100644
--- a/gcc/testsuite/lib/target-supports.exp
+++ b/gcc/testsuite/lib/target-supports.exp
@@ -8833,6 +8833,11 @@ proc check_effective_target_tiny {} {
&& [check_effective_target_avr_tiny] } {
set et_target_tiny_saved 1
}
+ # PRU Program Counter is 16-bits, and trampolines are not supported.
+ # Hence directly declare as a tiny target.
+ if [istarget pru-*-*] {
+ set et_target_tiny_saved 1
+ }
}
return $et_target_tiny_saved
diff --git a/gcc/testsuite/lib/target-utils.exp
b/gcc/testsuite/lib/target-utils.exp
index bd39cc5bc79..732a1827a02 100644
--- a/gcc/testsuite/lib/target-utils.exp
+++ b/gcc/testsuite/lib/target-utils.exp
@@ -35,6 +35,10 @@ proc ${tool}_check_unsupported_p { output } {
&& [check_effective_target_tiny] } {
return "memory full"
}
+if { [regexp "(^|\n)\[^\n\]*: region \[^\n\]* overflowed" $output]
+ && [check_effective_target_tiny] } {
+ return "memory full"
+}
if { [istarget spu-*-*] && \
[string match "*exceeds local store*" $output] } {
--
2.11.0
Re: [PATCH 11/11] Increase MAX_MAX_OPERANDS limit
On Monday, 23/7/2018 16:22:24 EEST Jeff Law wrote: > On 07/19/2018 08:12 PM, Dimitar Dimitrov wrote: > > On събота, 23 юни 2018 г. 20:35:23 EEST Jakub Jelinek wrote: > >> On Sat, Jun 23, 2018 at 03:26:50PM +0300, Dimitar Dimitrov wrote: > >>> I took arm/ldmstm.md as an inspiration. See attached machine description > >>> for PRU that requires the increase. I omitted this machine-generated MD > >>> file from my first patch set, but per comments will include it in v2. > >>> > >>> PRU has a total of 32 32-bit registers with flexible subregister > >>> addressing. The PRU GCC port represents the register file as 128 > >>> individual 8-bit registers. Rationale: > >>> http://gcc.gnu.org/ml/gcc/2017-01/msg00217.html > >>> > >>> Load/store instructions can load anywhere between 1 and 124 consecutive > >>> 8-bit registers. The load/store-multiple patterns seem to require > >>> const_int_operand offsets for each loaded register, hence the explosion > >>> of operands. > >> > >> If it is consecutive only, then you could represent those that load a lot > >> of registers using wider modes, so represent e.g. that 124 register load > >> as 15 DImode loads + 1 SImode. > >> > >>Jakub > > > > Jeff, Jakub, thank you for raising a concern that increasing > > MAX_MAX_OPERANDS is suspicous. > > > > I think a better approach is to altogether avoid expansion, and instead > > > > declare define_insn. Advantages are that: > > - machine description is greatly simplified; > > - there is no machine-generated code; > > - I don't need to increase MAX_MAX_OPERANDS. > > > > I'll revise the PRU port and send patch v2. Here is how I intend to > > implement the pattern: > > > > (define_insn "load_multiple" > > > > [(unspec_volatile > > > > [(parallel [(match_operand:QI 0 "register_operand" "=r") > > > > (match_operand:BLK 1 "memory_operand" "m") > > (match_operand:VOID 2 "const_int_operand" "i")])] > > > > UNSPECV_LOAD_MULTPLE)] > > > > "" > > "lb%B1o\\t%b0, %1, %2" > > [(set_attr "type" "ld") > > > >(set_attr "length" "4")]) > > So my only worry with that is dataflow -- ie, how many registers have > their values changed isn't expressed in the pattern in a way that the > generic parts of the compiler understand. That's likely to cause some > problems. My intention was to simplify the machine description, but apparently I went too far. I'll instead use the s390x port that Jakub recommended as a starting point. It seems to fit the PRU requirements. Thanks, Dimitar
Re: [PATCH 11/11] Increase MAX_MAX_OPERANDS limit
On събота, 23 юни 2018 г. 20:35:23 EEST Jakub Jelinek wrote: > On Sat, Jun 23, 2018 at 03:26:50PM +0300, Dimitar Dimitrov wrote: > > I took arm/ldmstm.md as an inspiration. See attached machine description > > for PRU that requires the increase. I omitted this machine-generated MD > > file from my first patch set, but per comments will include it in v2. > > > > PRU has a total of 32 32-bit registers with flexible subregister > > addressing. The PRU GCC port represents the register file as 128 > > individual 8-bit registers. Rationale: > > http://gcc.gnu.org/ml/gcc/2017-01/msg00217.html > > > > Load/store instructions can load anywhere between 1 and 124 consecutive > > 8-bit registers. The load/store-multiple patterns seem to require > > const_int_operand offsets for each loaded register, hence the explosion > > of operands. > If it is consecutive only, then you could represent those that load a lot of > registers using wider modes, so represent e.g. that 124 register load as 15 > DImode loads + 1 SImode. > > Jakub Jeff, Jakub, thank you for raising a concern that increasing MAX_MAX_OPERANDS is suspicous. I think a better approach is to altogether avoid expansion, and instead declare define_insn. Advantages are that: - machine description is greatly simplified; - there is no machine-generated code; - I don't need to increase MAX_MAX_OPERANDS. I'll revise the PRU port and send patch v2. Here is how I intend to implement the pattern: (define_insn "load_multiple" [(unspec_volatile [(parallel [(match_operand:QI 0 "register_operand" "=r") (match_operand:BLK 1 "memory_operand" "m") (match_operand:VOID 2 "const_int_operand" "i")])] UNSPECV_LOAD_MULTPLE)] "" "lb%B1o\\t%b0, %1, %2" [(set_attr "type" "ld") (set_attr "length" "4")]) Regards, Dimitar
Re: [PATCH 01/11] Initial TI PRU GCC port
On петък, 22 юни 2018 г. 12:20:46 EEST Jeff Law wrote:
> On 06/13/2018 12:57 PM, Dimitar Dimitrov wrote:
> > ChangeLog:
> >
> > 2018-06-13 Dimitar Dimitrov
> >
> > * configure: Regenerate.
> > * configure.ac: Add PRU target.
> >
> > gcc/ChangeLog:
> >
> > 2018-06-13 Dimitar Dimitrov
> >
> > * config/pru/pru-ldst-multiple.md: Generate using pru-ldst-multiple.ml.
> > * common/config/pru/pru-common.c: New file.
> > * config.gcc: Add PRU target.
> > * config/pru/alu-zext.md: New file.
> > * config/pru/constraints.md: New file.
> > * config/pru/predicates.md: New file.
> > * config/pru/pru-ldst-multiple.ml: New file.
> > * config/pru/pru-opts.h: New file.
> > * config/pru/pru-passes.c: New file.
> > * config/pru/pru-pragma.c: New file.
> > * config/pru/pru-protos.h: New file.
> > * config/pru/pru.c: New file.
> > * config/pru/pru.h: New file.
> > * config/pru/pru.md: New file.
> > * config/pru/pru.opt: New file.
> > * config/pru/t-pru: New file.
> > * doc/extend.texi: Document PRU pragmas.
> > * doc/invoke.texi: Document PRU-specific options.
> > * doc/md.texi: Document PRU asm constraints.
>
> Joseph has already made some notes about diagnostics. Those will need
> to be addressed.
>
> A couple global comments on style issues.
>
> First, each function should have a comment describing what it does,
> ideally describing the input parameters and output value.
>
> Second the function definition should always look like
>
> [static]
> name (type1 arg1, type2 arg2)
> {
> body
> }
>
> In some cases you've joined the linkage/type line with the function's
> name. Can you please review pru.c in particular to fix these issues.
I'll fix these in patch v2.
>
[...]
>
> I've already asked about your copyright assignment status. So you know,
> we can't go forward with any nontrivial contributions until the
> assignment is in place.
Yes, FSF has my assignment since November 2016.
>
> I'm going to assume that you plan to maintain this port. Ideally you'll
> have it using an auto-builder and posting tests gcc-testresults :-0
Yes, I'm willing to maintain it. To be fair, it is entirely in my own spare
time. I've been writing, rewriting and maintaning this out-of-tree port for
the past 4 years. I believe I'll have time and will to continue doing so for
the foreseeable future.
Emailing the results would actually be easier for me than maintaining my own
testresults web page. Thanks.
>
> I'm assuming that since you're patching LRA in a different patch that
> you're using LRA rather than reload :-) That also implies that you're
> not using the deprecated cc0 bits, which is good.
Yes, port is using LRA. No cc0.
>
> > diff --git a/configure.ac b/configure.ac
> > index 28155a0e593..684a7f58515 100644
> > --- a/configure.ac
> > +++ b/configure.ac
>
> [ ... ]
> So it looks like you're supporting libgloss/newlib. Does it work with
> the current libgloss/newlib trunk? I've had troubles over the last few
> months with 16 bit targets.
I have not detected issues with top-of-tree. But keep in mind that PRU is 8-
bit only for the GCC internal representation. The port declares efficient 32-
bit ops for SImode. From newlib's point of view, PRU is native 32-bit.
Some history here: http://gcc.gnu.org/ml/gcc/2017-01/msg00217.html
>
> > diff --git a/gcc/common/config/pru/pru-common.c
> > b/gcc/common/config/pru/pru-common.c new file mode 100644
> > index 000..e87d70ce9ca
> > --- /dev/null
> > +++ b/gcc/common/config/pru/pru-common.c
>
> [ ... ]
>
> > @@ -0,0 +1,36 @@
> > +
> > +#undef TARGET_EXCEPT_UNWIND_INFO
> > +#define TARGET_EXCEPT_UNWIND_INFO sjlj_except_unwind_info
>
> SJLJ exceptions? Is there some reason you're not using dwarf2 unwind
> info? It may mean adding some notes in the prologue generation code,
> but otherwise I'd expect it to "just work".
I would like to avoid increasing memory footprint. I saw that AVR folks use
it, too. My understanding is that eh_frame data will have to be included for
each function when using dwarf2 unwind.
For reference, typical data memory size for PRU is 4kb.
>
> > +
> > +struct gcc_targetm_common targetm_common = TARGETM_COMMON_INITIALIZER;
> > diff --git a/gcc/config.gcc b/gcc/config.gcc
> > index 8b2fd908c38..d1cddb86c36 100644
> > --- a/gcc/config.gcc
> > +++ b/gcc/config.gcc
>
> [ ... ]
>
> > +pru*-*-*)
> > + tm_file="dbxelf.h elfos.h newlib-stdint.h ${tm_file}"
> > + tmake_file=&qu
[PATCH v2] Fix LRA to handle multi-word eliminable registers
For some targets, Pmode != UNITS_PER_WORD. Take this into account
when marking hard registers as being used.
I tested C and C++ testsuits for x86_64 with and without this
patch. There was no regression, i.e. gcc.sum and g++.sum matched
exactly.
Changes since patch series v1:
- Cleanup to use add_to_hard_reg_set.
- Also fix check_pseudos_live_through_calls.
- Decouple PRU tests so that LRA patch is now standalone.
gcc/ChangeLog:
2018-06-23 Dimitar Dimitrov
* lra-eliminations.c (update_reg_eliminate): Mark all spanning hard
registers for Pmode..
* lra-lives.c (check_pseudos_live_through_calls): Mark all spanning
hard registers for the clobbered pseudo.
Cc: Vladimir Makarov
Cc: Peter Bergner
Cc: Kenneth Zadeck
Cc: Seongbae Park
Cc: Jeff Law
Signed-off-by: Dimitar Dimitrov
---
gcc/lra-eliminations.c | 4 ++--
gcc/lra-lives.c| 3 ++-
2 files changed, 4 insertions(+), 3 deletions(-)
diff --git a/gcc/lra-eliminations.c b/gcc/lra-eliminations.c
index 21d8d5f8018..f5f104020b3 100644
--- a/gcc/lra-eliminations.c
+++ b/gcc/lra-eliminations.c
@@ -1264,13 +1264,13 @@ update_reg_eliminate (bitmap insns_with_changed_offsets)
CLEAR_HARD_REG_SET (temp_hard_reg_set);
for (ep = reg_eliminate; ep < _eliminate[NUM_ELIMINABLE_REGS]; ep++)
if (elimination_map[ep->from] == NULL)
- SET_HARD_REG_BIT (temp_hard_reg_set, ep->from);
+ add_to_hard_reg_set (_hard_reg_set, Pmode, ep->from);
else if (elimination_map[ep->from] == ep)
{
/* Prevent the hard register into which we eliminate from
the usage for pseudos. */
if (ep->from != ep->to)
- SET_HARD_REG_BIT (temp_hard_reg_set, ep->to);
+ add_to_hard_reg_set (_hard_reg_set, Pmode, ep->to);
if (maybe_ne (ep->previous_offset, ep->offset))
{
bitmap_ior_into (insns_with_changed_offsets,
diff --git a/gcc/lra-lives.c b/gcc/lra-lives.c
index 588bc09cb8e..920fd02b997 100644
--- a/gcc/lra-lives.c
+++ b/gcc/lra-lives.c
@@ -581,7 +581,8 @@ check_pseudos_live_through_calls (int regno,
for (hr = 0; hr < FIRST_PSEUDO_REGISTER; hr++)
if (targetm.hard_regno_call_part_clobbered (hr,
PSEUDO_REGNO_MODE (regno)))
- SET_HARD_REG_BIT (lra_reg_info[regno].conflict_hard_regs, hr);
+ add_to_hard_reg_set (_reg_info[regno].conflict_hard_regs,
+ PSEUDO_REGNO_MODE (regno), hr);
lra_reg_info[regno].call_p = true;
if (! sparseset_bit_p (pseudos_live_through_setjumps, regno))
return;
--
2.11.0
Re: [PATCH 11/11] Increase MAX_MAX_OPERANDS limit
On петък, 22 юни 2018 г. 19:41:55 EEST Jakub Jelinek wrote: > On Fri, Jun 22, 2018 at 11:33:06AM -0600, Jeff Law wrote: > > On 06/13/2018 12:58 PM, Dimitar Dimitrov wrote: > > > The PRU load/store instructions can access memory with byte > > > > > > granularity for all 30 of its 32-bit GP registers. Examples: > > ># Load 17 bytes from address r0[0] into registers r10.b1-r14.b2 > > >lbbo r10.b1, r0, 0, 17 > > > > > ># Load 100 bytes from address r28[0] into registers r0-r25 > > >lbbo r0.b0, r28, 0, 100 > > > > > > The load/store multiple patterns declare all subsequent registers > > > as distinct operands. Hence the need to increase the limit. > > Can't you have a look on how other targets, e.g. arm, aarch64, s390x > etc. handle load/store multiple patterns, e.g. with match_parallel or > match_par_dup? > The instructions then don't have dozens of operands, and the predicate > is just supposed to check everything is the way it should be. I took arm/ldmstm.md as an inspiration. See attached machine description for PRU that requires the increase. I omitted this machine-generated MD file from my first patch set, but per comments will include it in v2. PRU has a total of 32 32-bit registers with flexible subregister addressing. The PRU GCC port represents the register file as 128 individual 8-bit registers. Rationale: http://gcc.gnu.org/ml/gcc/2017-01/msg00217.html Load/store instructions can load anywhere between 1 and 124 consecutive 8-bit registers. The load/store-multiple patterns seem to require const_int_operand offsets for each loaded register, hence the explosion of operands. I make no distintion for class - patterns accept any GP register. Regards, Dimitar pru-ldst-multiple.md.gz Description: application/gzip
Re: [PATCH 10/11] Fix LRA to handle multi-word eliminable registers
On петък, 22 юни 2018 г. 10:37:10 EEST Jeff Law wrote:
> On 06/21/2018 10:01 PM, Dimitar Dimitrov wrote:
> > On четвъртък, 21 юни 2018 г. 17:03:55 EEST Jeff Law wrote:
> >> On 06/21/2018 11:44 AM, Vladimir Makarov wrote:
> >>> On 06/13/2018 02:58 PM, Dimitar Dimitrov wrote:
> >>>> From: Dimitar Dimitrov
> >>>>
> >>>> For some targets, Pmode != UNITS_PER_WORD. Take this into account
> >>>> when marking hard registers as being used.
> >>>>
> >>>> I tested C and C++ testsuits for x86_64 with and without this
> >>>> patch. There was no regression, i.e. gcc.sum and g++.sum matched
> >>>> exactly.
> >>>>
> >>>> gcc/ChangeLog:
> >>>>
> >>>> 2018-06-13 Dimitar Dimitrov
> >>>>
> >>>> * lra-eliminations.c (set_ptr_hard_reg_bits): New function.
> >>>> (update_reg_eliminate): Mark all spanning hw registers.
> >>>>
> >>>> gcc/testsuite/ChangeLog:
> >>>>
> >>>> 2018-06-13 Dimitar Dimitrov
> >>>>
> >>>> * gcc.target/pru/lra-framepointer-fragmentation-1.c: New test.
> >>>> * gcc.target/pru/lra-framepointer-fragmentation-2.c: New test.
> >>>>
> >>>> Cc: Vladimir Makarov
> >>>> Cc: Peter Bergner
> >>>> Cc: Kenneth Zadeck
> >>>> Cc: Seongbae Park
> >>>> Signed-off-by: Dimitar Dimitrov
> >>>> ---
> >>>>
> >>>> gcc/lra-eliminations.c | 14 -
> >>>> .../pru/lra-framepointer-fragmentation-1.c | 33
> >>>> .../pru/lra-framepointer-fragmentation-2.c | 61
> >>>>
> >>>> ++
> >>>>
> >>>> 3 files changed, 106 insertions(+), 2 deletions(-)
> >>>> create mode 100644
> >>>>
> >>>> gcc/testsuite/gcc.target/pru/lra-framepointer-fragmentation-1.c
> >>>>
> >>>> create mode 100644
> >>>>
> >>>> gcc/testsuite/gcc.target/pru/lra-framepointer-fragmentation-2.c
> >>>>
> >>>> diff --git a/gcc/lra-eliminations.c b/gcc/lra-eliminations.c
> >>>> index 21d8d5f8018..566cc2c8248 100644
> >>>> --- a/gcc/lra-eliminations.c
> >>>> +++ b/gcc/lra-eliminations.c
> >>>> @@ -1180,6 +1180,16 @@ spill_pseudos (HARD_REG_SET set)
> >>>>
> >>>> bitmap_clear (_process);
> >>>>
> >>>> }
> >>>> +static void set_ptr_hard_reg_bits (HARD_REG_SET *hard_reg_set, int
> >>>> r)
> >>>>
> >>>> +{
> >>>> + int w;
> >>>> +
> >>>> + for (w = 0; w < GET_MODE_SIZE (Pmode); w += UNITS_PER_WORD, r++)
> >>>> +{
> >>>> + SET_HARD_REG_BIT (*hard_reg_set, r);
> >>>> +}
> >>>> +}
> >>>> +
> >>>
> >>> The patch itself is ok but for uniformity I'd use
> >>>
> >>> for (int i = hard_regno_nregs (r, Pmode) - 1; i >= 0; i--)
> >>>
> >>> SET_HARD_REG_BIT (*hard_reg_set, r + i);
> >>
> >> I'm a bit surprised we don't already have a utility function to do this.
> >> Hmmm
> >>
> >> add_to_hard_reg_set (hard_reg_set, Pmode, r)
> >>
> >> So instead LRA ought to be using that function in the places where calls
> >> to set_ptr_hard_reg_bits were introduced.
> >>
> >> Dimitar, can you verify that change works?
> >
> > Thank you. I'll test it and will update the patch.
>
> And go ahead and either break out the two new tests. I suspect we'll
> want to install the LRA patch immediately since it's an independent bugfix.
I verified that add_to_hard_reg_set() fixes the failing tests for PRU.
>
> > The SET_HARD_REG_BIT call in check_pseudos_live_through_calls also seems
> > suspicous to me. I'll try to come up with a regression test case to
> > justify
> > its upgrade to add_to_hard_reg_set().
>
> If you can construct a test, great, but from my reading it's clearly
> wrong as well and we ought to fix it too.
I'll send a standalone LRA fix, without PRU tests.
>
> Jeff
>
> ps. Do you have a copyright assignment on file with the FSF for GCC work?
Yes. FSF has my copyright assignment since November 2016 for GCC, Binutils and
GDB.
Regards,
Dimitar
Re: [PATCH 02/11] Initial TI PRU libgcc port
On петък, 22 юни 2018 г. 10:55:29 EEST Jeff Law wrote: > On 06/13/2018 12:57 PM, Dimitar Dimitrov wrote: > > The floating point support has been borrowed from C6X libgcc port > > to help with TI PRU toolchain ABI compatibility. > > > > libgcc/ChangeLog: > > > > 2018-06-13 Dimitar Dimitrov > > > > * config.host: Add PRU target. > > * config/pru/asri.c: New file. > > * config/pru/eqd.c: New file. > > * config/pru/eqf.c: New file. > > * config/pru/ged.c: New file. > > * config/pru/gef.c: New file. > > * config/pru/gtd.c: New file. > > * config/pru/gtf.c: New file. > > * config/pru/led.c: New file. > > * config/pru/lef.c: New file. > > * config/pru/lib2bitcountHI.c: New file. > > * config/pru/lib2divHI.c: New file. > > * config/pru/lib2divQI.c: New file. > > * config/pru/lib2divSI.c: New file. > > * config/pru/libgcc-eabi.ver: New file. > > * config/pru/ltd.c: New file. > > * config/pru/ltf.c: New file. > > * config/pru/mpyll.S: New file. > > * config/pru/pru-abi.h: New file. > > * config/pru/pru-asm.h: New file. > > * config/pru/pru-divmod.h: New file. > > * config/pru/sfp-machine.h: New file. > > * config/pru/t-pru: New file. > > I don't see anything particularly concerning here. It looks like the > floating point stuff is a direct copy from the c6x port. I'm going to > assume the assembly code you've written in the various files is correct. > I'm also assuming we're trying to be compatible with another toolchain > or published ABI, hence the exposure of the new symbols for low level > operations. > > So I'll this too. Obviously it needs to wait for the main port patch to > be reviewed as well. That is correct, my main goal has been to be ABI compatible with the proprietary TI PRU toolchain. Luckily, TI folks reused c6x floating point ABI for PRU. Regards, Dimitar
Re: [PATCH 10/11] Fix LRA to handle multi-word eliminable registers
On четвъртък, 21 юни 2018 г. 17:03:55 EEST Jeff Law wrote:
> On 06/21/2018 11:44 AM, Vladimir Makarov wrote:
> > On 06/13/2018 02:58 PM, Dimitar Dimitrov wrote:
> >> From: Dimitar Dimitrov
> >>
> >> For some targets, Pmode != UNITS_PER_WORD. Take this into account
> >> when marking hard registers as being used.
> >>
> >> I tested C and C++ testsuits for x86_64 with and without this
> >> patch. There was no regression, i.e. gcc.sum and g++.sum matched
> >> exactly.
> >>
> >> gcc/ChangeLog:
> >>
> >> 2018-06-13 Dimitar Dimitrov
> >>
> >> * lra-eliminations.c (set_ptr_hard_reg_bits): New function.
> >> (update_reg_eliminate): Mark all spanning hw registers.
> >>
> >> gcc/testsuite/ChangeLog:
> >>
> >> 2018-06-13 Dimitar Dimitrov
> >>
> >> * gcc.target/pru/lra-framepointer-fragmentation-1.c: New test.
> >> * gcc.target/pru/lra-framepointer-fragmentation-2.c: New test.
> >>
> >> Cc: Vladimir Makarov
> >> Cc: Peter Bergner
> >> Cc: Kenneth Zadeck
> >> Cc: Seongbae Park
> >> Signed-off-by: Dimitar Dimitrov
> >> ---
> >> gcc/lra-eliminations.c | 14 -
> >> .../pru/lra-framepointer-fragmentation-1.c | 33
> >> .../pru/lra-framepointer-fragmentation-2.c | 61
> >> ++
> >> 3 files changed, 106 insertions(+), 2 deletions(-)
> >> create mode 100644
> >> gcc/testsuite/gcc.target/pru/lra-framepointer-fragmentation-1.c
> >> create mode 100644
> >> gcc/testsuite/gcc.target/pru/lra-framepointer-fragmentation-2.c
> >>
> >> diff --git a/gcc/lra-eliminations.c b/gcc/lra-eliminations.c
> >> index 21d8d5f8018..566cc2c8248 100644
> >> --- a/gcc/lra-eliminations.c
> >> +++ b/gcc/lra-eliminations.c
> >> @@ -1180,6 +1180,16 @@ spill_pseudos (HARD_REG_SET set)
> >> bitmap_clear (_process);
> >> }
> >> +static void set_ptr_hard_reg_bits (HARD_REG_SET *hard_reg_set, int r)
> >> +{
> >> + int w;
> >> +
> >> + for (w = 0; w < GET_MODE_SIZE (Pmode); w += UNITS_PER_WORD, r++)
> >> +{
> >> + SET_HARD_REG_BIT (*hard_reg_set, r);
> >> +}
> >> +}
> >> +
> >
> > The patch itself is ok but for uniformity I'd use
> >
> > for (int i = hard_regno_nregs (r, Pmode) - 1; i >= 0; i--)
> > SET_HARD_REG_BIT (*hard_reg_set, r + i);
>
> I'm a bit surprised we don't already have a utility function to do this.
> Hmmm
>
> add_to_hard_reg_set (hard_reg_set, Pmode, r)
>
> So instead LRA ought to be using that function in the places where calls
> to set_ptr_hard_reg_bits were introduced.
>
> Dimitar, can you verify that change works?
Thank you. I'll test it and will update the patch.
The SET_HARD_REG_BIT call in check_pseudos_live_through_calls also seems
suspicous to me. I'll try to come up with a regression test case to justify
its upgrade to add_to_hard_reg_set().
Regards,
Dimitar
Re: [PATCH 01/11] Initial TI PRU GCC port
On сряда, 13 юни 2018 г. 19:44:16 EEST Joseph Myers wrote:
> On Wed, 13 Jun 2018, Dimitar Dimitrov wrote:
> > + error ("__delay_cycles() only takes constant arguments");
>
> As in documentation, diagnostics should not use () to indicate that a name
> refers to a function (as opposed to referring to a call with no
> arguments). However, function names, option names and any other literal
> source code text in diagnostics, both this and other diagnostics in the
> port, should be enclosed in %< and %> to quote them in the diagnostic
> output.
>
> > + error ("__delay_cycles only takes non-negative cycle counts.");
> >
> > + error ("__delay_cycles is limited to 32-bit loop counts.");
>
> No '.' at end of diagnostics (and use %<__delay_cycles%>, as above).
Thank you for the prompt review. I'll fix and resend patch v2.
Regards,
Dimitar
[PATCH 08/11] testsuite: Mark that PRU has one-cycle jumps
gcc/testsuite/ChangeLog:
2018-06-13 Dimitar Dimitrov
* gcc.dg/tree-ssa/20040204-1.c: XFAIL on pru.
* gcc.dg/tree-ssa/reassoc-33.c: Ditto.
* gcc.dg/tree-ssa/reassoc-34.c: Ditto.
* gcc.dg/tree-ssa/reassoc-35.c: Ditto.
* gcc.dg/tree-ssa/reassoc-36.c: Ditto.
* gcc.dg/tree-ssa/ssa-thread-14.c: Ditto.
Signed-off-by: Dimitar Dimitrov
---
gcc/testsuite/gcc.dg/tree-ssa/20040204-1.c| 2 +-
gcc/testsuite/gcc.dg/tree-ssa/reassoc-33.c| 2 +-
gcc/testsuite/gcc.dg/tree-ssa/reassoc-34.c| 2 +-
gcc/testsuite/gcc.dg/tree-ssa/reassoc-35.c| 2 +-
gcc/testsuite/gcc.dg/tree-ssa/reassoc-36.c| 2 +-
gcc/testsuite/gcc.dg/tree-ssa/ssa-thread-14.c | 2 +-
6 files changed, 6 insertions(+), 6 deletions(-)
diff --git a/gcc/testsuite/gcc.dg/tree-ssa/20040204-1.c
b/gcc/testsuite/gcc.dg/tree-ssa/20040204-1.c
index a1237cf839b..06b83029fd3 100644
--- a/gcc/testsuite/gcc.dg/tree-ssa/20040204-1.c
+++ b/gcc/testsuite/gcc.dg/tree-ssa/20040204-1.c
@@ -33,4 +33,4 @@ void test55 (int x, int y)
that the && should be emitted (based on BRANCH_COST). Fix this
by teaching dom to look through && and register all components
as true. */
-/* { dg-final { scan-tree-dump-times "link_error" 0 "optimized" { xfail { !
"alpha*-*-* arm*-*-* aarch64*-*-* powerpc*-*-* cris-*-* crisv32-*-* hppa*-*-*
i?86-*-* mmix-*-* mips*-*-* m68k*-*-* moxie-*-* nds32*-*-* s390*-*-* sh*-*-*
sparc*-*-* spu-*-* visium-*-* x86_64-*-* riscv*-*-*" } } } } */
+/* { dg-final { scan-tree-dump-times "link_error" 0 "optimized" { xfail { !
"alpha*-*-* arm*-*-* aarch64*-*-* powerpc*-*-* cris-*-* crisv32-*-* hppa*-*-*
i?86-*-* mmix-*-* mips*-*-* m68k*-*-* moxie-*-* nds32*-*-* s390*-*-* sh*-*-*
sparc*-*-* spu-*-* visium-*-* x86_64-*-* riscv*-*-* pru*-*-*" } } } } */
diff --git a/gcc/testsuite/gcc.dg/tree-ssa/reassoc-33.c
b/gcc/testsuite/gcc.dg/tree-ssa/reassoc-33.c
index 5572df4ae24..5e1cd1a6fa7 100644
--- a/gcc/testsuite/gcc.dg/tree-ssa/reassoc-33.c
+++ b/gcc/testsuite/gcc.dg/tree-ssa/reassoc-33.c
@@ -1,4 +1,4 @@
-/* { dg-do run { target { ! "m68k*-*-* mmix*-*-* bfin*-*-* v850*-*-*
moxie*-*-* cris*-*-* m32c*-*-* fr30*-*-* mcore*-*-* powerpc*-*-* xtensa*-*-*
hppa*-*-* nios2*-*-*"} } } */
+/* { dg-do run { target { ! "m68k*-*-* mmix*-*-* bfin*-*-* v850*-*-*
moxie*-*-* cris*-*-* m32c*-*-* fr30*-*-* mcore*-*-* powerpc*-*-* xtensa*-*-*
hppa*-*-* nios2*-*-* pru*-*-*"} } } */
/* { dg-options "-O2 -fno-inline -fdump-tree-reassoc1-details" } */
/* { dg-additional-options "-mbranch-cost=2" { target branch_cost } } */
diff --git a/gcc/testsuite/gcc.dg/tree-ssa/reassoc-34.c
b/gcc/testsuite/gcc.dg/tree-ssa/reassoc-34.c
index 9b45f1cd9be..a59df6a7244 100644
--- a/gcc/testsuite/gcc.dg/tree-ssa/reassoc-34.c
+++ b/gcc/testsuite/gcc.dg/tree-ssa/reassoc-34.c
@@ -1,4 +1,4 @@
-/* { dg-do run { target { ! "m68k*-*-* mmix*-*-* bfin*-*-* v850*-*-*
moxie*-*-* cris*-*-* m32c*-*-* fr30*-*-* mcore*-*-* powerpc*-*-* xtensa*-*-*
hppa*-*-* nios2*-*-*"} } } */
+/* { dg-do run { target { ! "m68k*-*-* mmix*-*-* bfin*-*-* v850*-*-*
moxie*-*-* cris*-*-* m32c*-*-* fr30*-*-* mcore*-*-* powerpc*-*-* xtensa*-*-*
hppa*-*-* nios2*-*-* pru*-*-*"} } } */
/* { dg-options "-O2 -fno-inline -fdump-tree-reassoc1-details" } */
/* { dg-additional-options "-mbranch-cost=2" { target branch_cost } } */
diff --git a/gcc/testsuite/gcc.dg/tree-ssa/reassoc-35.c
b/gcc/testsuite/gcc.dg/tree-ssa/reassoc-35.c
index 9ee3abca04e..21239372709 100644
--- a/gcc/testsuite/gcc.dg/tree-ssa/reassoc-35.c
+++ b/gcc/testsuite/gcc.dg/tree-ssa/reassoc-35.c
@@ -1,4 +1,4 @@
-/* { dg-do run { target { ! "m68k*-*-* mmix*-*-* bfin*-*-* v850*-*-*
moxie*-*-* cris*-*-* m32c*-*-* fr30*-*-* mcore*-*-* powerpc*-*-* xtensa*-*-*
hppa*-*-* nios2*-*-*"} } } */
+/* { dg-do run { target { ! "m68k*-*-* mmix*-*-* bfin*-*-* v850*-*-*
moxie*-*-* cris*-*-* m32c*-*-* fr30*-*-* mcore*-*-* powerpc*-*-* xtensa*-*-*
hppa*-*-* nios2*-*-* pru*-*-*"} } } */
/* { dg-options "-O2 -fno-inline -fdump-tree-reassoc1-details" } */
/* { dg-additional-options "-mbranch-cost=2" { target branch_cost } } */
diff --git a/gcc/testsuite/gcc.dg/tree-ssa/reassoc-36.c
b/gcc/testsuite/gcc.dg/tree-ssa/reassoc-36.c
index ac3a04291b7..f8eb0954ae7 100644
--- a/gcc/testsuite/gcc.dg/tree-ssa/reassoc-36.c
+++ b/gcc/testsuite/gcc.dg/tree-ssa/reassoc-36.c
@@ -1,4 +1,4 @@
-/* { dg-do run { target { ! "m68k*-*-* mmix*-*-* bfin*-*-* v850*-*-*
moxie*-*-* cris*-*-* m32c*-*-* fr30*-*-* mcore*-*-* powerpc*-*-* xtensa*-*-*
hppa*-*-* nios2*-*-*"} } } */
+/* { dg-do run { target { ! "m68k*-*-* mmix*-*-* bfin*-*-* v850*-*-*
moxie*-*-* cris*-*-* m32c*-*-* fr30*-*-* mcore*-*-* powerpc*-*-* xtensa*-*-*
hppa*-*-* nios2*-*-* pru*-*-*"} } } */
/* { dg-options "-O2 -fno-inline -fdump-tree-r
