[PATCH] Initial Granite Rapids D Support
Hi all, This patch is to add initial support for Granite Rapids D for GCC. The link of related information is listed below: https://www.intel.com/content/www/us/en/develop/download/intel-architecture-instruction-set-extensions-programming-reference.html Also, the patch of removing AMX-COMPLEX from Granite Rapids will be backported to GCC13. This has been tested on x86_64-pc-linux-gnu. Is this ok for trunk? Thank you. Sincerely, Zewei Mo gcc/ChangeLog: * common/config/i386/cpuinfo.h (get_intel_cpu): Handle Granite Rapids D. * common/config/i386/i386-common.cc: (processor_names): Add graniterapids-d. (processor_alias_table): Ditto. * common/config/i386/i386-cpuinfo.h (enum processor_subtypes): Add INTEL_GRANITERAPIDS_D. * config.gcc: Add -march=graniterapids-d. * config/i386/driver-i386.cc (host_detect_local_cpu): Handle graniterapids-d. * config/i386/i386-c.cc (ix86_target_macros_internal): Ditto. * config/i386/i386-options.cc (m_GRANITERAPIDSD): New. (processor_cost_table): Add graniterapids-d. * config/i386/i386.h (enum processor_type): Add PROCESSOR_GRANITERAPIDS_D. * doc/extend.texi: Add graniterapids-d. * doc/invoke.texi: Ditto. gcc/testsuite/ChangeLog: * g++.target/i386/mv16.C: Add graniterapids-d. * gcc.target/i386/funcspec-56.inc: Handle new march. --- gcc/common/config/i386/cpuinfo.h | 9 - gcc/common/config/i386/i386-common.cc | 3 +++ gcc/common/config/i386/i386-cpuinfo.h | 1 + gcc/config.gcc| 2 +- gcc/config/i386/driver-i386.cc| 3 +++ gcc/config/i386/i386-c.cc | 7 +++ gcc/config/i386/i386-options.cc | 4 +++- gcc/config/i386/i386.h| 5 - gcc/doc/extend.texi | 3 +++ gcc/doc/invoke.texi | 11 +++ gcc/testsuite/g++.target/i386/mv16.C | 6 ++ gcc/testsuite/gcc.target/i386/funcspec-56.inc | 1 + 12 files changed, 51 insertions(+), 4 deletions(-) diff --git a/gcc/common/config/i386/cpuinfo.h b/gcc/common/config/i386/cpuinfo.h index ae48bc17771..7c2565c1d93 100644 --- a/gcc/common/config/i386/cpuinfo.h +++ b/gcc/common/config/i386/cpuinfo.h @@ -565,7 +565,6 @@ get_intel_cpu (struct __processor_model *cpu_model, cpu_model->__cpu_type = INTEL_SIERRAFOREST; break; case 0xad: -case 0xae: /* Granite Rapids. */ cpu = "graniterapids"; CHECK___builtin_cpu_is ("corei7"); @@ -573,6 +572,14 @@ get_intel_cpu (struct __processor_model *cpu_model, cpu_model->__cpu_type = INTEL_COREI7; cpu_model->__cpu_subtype = INTEL_COREI7_GRANITERAPIDS; break; +case 0xae: + /* Granite Rapids D. */ + cpu = "graniterapids-d"; + CHECK___builtin_cpu_is ("corei7"); + CHECK___builtin_cpu_is ("graniterapids-d"); + cpu_model->__cpu_type = INTEL_COREI7; + cpu_model->__cpu_subtype = INTEL_COREI7_GRANITERAPIDS_D; + break; case 0xb6: /* Grand Ridge. */ cpu = "grandridge"; diff --git a/gcc/common/config/i386/i386-common.cc b/gcc/common/config/i386/i386-common.cc index bf126f14073..5a337c5b8be 100644 --- a/gcc/common/config/i386/i386-common.cc +++ b/gcc/common/config/i386/i386-common.cc @@ -1971,6 +1971,7 @@ const char *const processor_names[] = "alderlake", "rocketlake", "graniterapids", + "graniterapids-d", "intel", "lujiazui", "geode", @@ -2094,6 +2095,8 @@ const pta processor_alias_table[] = M_CPU_SUBTYPE (INTEL_COREI7_ALDERLAKE), P_PROC_AVX2}, {"graniterapids", PROCESSOR_GRANITERAPIDS, CPU_HASWELL, PTA_GRANITERAPIDS, M_CPU_SUBTYPE (INTEL_COREI7_GRANITERAPIDS), P_PROC_AVX512F}, + {"graniterapids-d", PROCESSOR_GRANITERAPIDS_D, CPU_HASWELL, PTA_GRANITERAPIDS_D, +M_CPU_SUBTYPE (INTEL_COREI7_GRANITERAPIDS_D), P_PROC_AVX512F}, {"bonnell", PROCESSOR_BONNELL, CPU_ATOM, PTA_BONNELL, M_CPU_TYPE (INTEL_BONNELL), P_PROC_SSSE3}, {"atom", PROCESSOR_BONNELL, CPU_ATOM, PTA_BONNELL, diff --git a/gcc/common/config/i386/i386-cpuinfo.h b/gcc/common/config/i386/i386-cpuinfo.h index 2dafbb25a49..254dfec70e5 100644 --- a/gcc/common/config/i386/i386-cpuinfo.h +++ b/gcc/common/config/i386/i386-cpuinfo.h @@ -98,6 +98,7 @@ enum processor_subtypes ZHAOXIN_FAM7H_LUJIAZUI, AMDFAM19H_ZNVER4, INTEL_COREI7_GRANITERAPIDS, + INTEL_COREI7_GRANITERAPIDS_D, CPU_SUBTYPE_MAX }; diff --git a/gcc/config.gcc b/gcc/config.gcc index d88071773c9..1446eb2b3ca 100644 --- a/gcc/config.gcc +++ b/gcc/config.gcc @@ -682,7 +682,7 @@ silvermont knl knm skylake-avx512 cannonlake icelake-client icelake-server \ skylake goldmont goldmont-plus tremont cascadelake tigerlake cooperlake \ sapphirerapids alderlake rocketlake eden-x2 nano nano-1000 nano-2000 nano-3000 \ nano-x2 eden-x4 nano-x4 lujiazui x8
[PATCH] Initial Granite Rapids D Support
Hi all, This patch is to add initial support for Granite Rapids D for GCC. The link of related information is listed below: https://www.intel.com/content/www/us/en/develop/download/intel-architecture-instruction-set-extensions-programming-reference.html Also, the patch of removing AMX-COMPLEX from Granite Rapids will be backported to GCC13. This has been tested on x86_64-pc-linux-gnu. Is this ok for trunk? Thank you. Sincerely, Zewei Mo gcc/ChangeLog: * common/config/i386/cpuinfo.h (get_intel_cpu): Handle Granite Rapids D. * common/config/i386/i386-common.cc: (processor_alias_table): Add graniterapids-d. * common/config/i386/i386-cpuinfo.h (enum processor_subtypes): Add INTEL_COREI7_GRANITERAPIDS_D. * config.gcc: Add -march=graniterapids-d. * config/i386/driver-i386.cc (host_detect_local_cpu): Handle graniterapids-d. * gcc/config/i386/i386.h: (PTA_GRANITERAPIDS_D): New. * doc/extend.texi: Add graniterapids-d. * doc/invoke.texi: Ditto. gcc/testsuite/ChangeLog: * g++.target/i386/mv16.C: Add graniterapids-d. * gcc.target/i386/funcspec-56.inc: Handle new march. --- gcc/common/config/i386/cpuinfo.h | 9 - gcc/common/config/i386/i386-common.cc | 2 ++ gcc/common/config/i386/i386-cpuinfo.h | 1 + gcc/config.gcc| 2 +- gcc/config/i386/driver-i386.cc| 3 +++ gcc/config/i386/i386.h| 4 +++- gcc/doc/extend.texi | 3 +++ gcc/doc/invoke.texi | 11 +++ gcc/testsuite/g++.target/i386/mv16.C | 6 ++ gcc/testsuite/gcc.target/i386/funcspec-56.inc | 1 + 10 files changed, 39 insertions(+), 3 deletions(-) diff --git a/gcc/common/config/i386/cpuinfo.h b/gcc/common/config/i386/cpuinfo.h index ae48bc17771..7c2565c1d93 100644 --- a/gcc/common/config/i386/cpuinfo.h +++ b/gcc/common/config/i386/cpuinfo.h @@ -565,7 +565,6 @@ get_intel_cpu (struct __processor_model *cpu_model, cpu_model->__cpu_type = INTEL_SIERRAFOREST; break; case 0xad: -case 0xae: /* Granite Rapids. */ cpu = "graniterapids"; CHECK___builtin_cpu_is ("corei7"); @@ -573,6 +572,14 @@ get_intel_cpu (struct __processor_model *cpu_model, cpu_model->__cpu_type = INTEL_COREI7; cpu_model->__cpu_subtype = INTEL_COREI7_GRANITERAPIDS; break; +case 0xae: + /* Granite Rapids D. */ + cpu = "graniterapids-d"; + CHECK___builtin_cpu_is ("corei7"); + CHECK___builtin_cpu_is ("graniterapids-d"); + cpu_model->__cpu_type = INTEL_COREI7; + cpu_model->__cpu_subtype = INTEL_COREI7_GRANITERAPIDS_D; + break; case 0xb6: /* Grand Ridge. */ cpu = "grandridge"; diff --git a/gcc/common/config/i386/i386-common.cc b/gcc/common/config/i386/i386-common.cc index bf126f14073..8cea3669239 100644 --- a/gcc/common/config/i386/i386-common.cc +++ b/gcc/common/config/i386/i386-common.cc @@ -2094,6 +2094,8 @@ const pta processor_alias_table[] = M_CPU_SUBTYPE (INTEL_COREI7_ALDERLAKE), P_PROC_AVX2}, {"graniterapids", PROCESSOR_GRANITERAPIDS, CPU_HASWELL, PTA_GRANITERAPIDS, M_CPU_SUBTYPE (INTEL_COREI7_GRANITERAPIDS), P_PROC_AVX512F}, + {"graniterapids-d", PROCESSOR_GRANITERAPIDS, CPU_HASWELL, PTA_GRANITERAPIDS_D, +M_CPU_SUBTYPE (INTEL_COREI7_GRANITERAPIDS_D), P_PROC_AVX512F}, {"bonnell", PROCESSOR_BONNELL, CPU_ATOM, PTA_BONNELL, M_CPU_TYPE (INTEL_BONNELL), P_PROC_SSSE3}, {"atom", PROCESSOR_BONNELL, CPU_ATOM, PTA_BONNELL, diff --git a/gcc/common/config/i386/i386-cpuinfo.h b/gcc/common/config/i386/i386-cpuinfo.h index 2dafbb25a49..254dfec70e5 100644 --- a/gcc/common/config/i386/i386-cpuinfo.h +++ b/gcc/common/config/i386/i386-cpuinfo.h @@ -98,6 +98,7 @@ enum processor_subtypes ZHAOXIN_FAM7H_LUJIAZUI, AMDFAM19H_ZNVER4, INTEL_COREI7_GRANITERAPIDS, + INTEL_COREI7_GRANITERAPIDS_D, CPU_SUBTYPE_MAX }; diff --git a/gcc/config.gcc b/gcc/config.gcc index d88071773c9..1446eb2b3ca 100644 --- a/gcc/config.gcc +++ b/gcc/config.gcc @@ -682,7 +682,7 @@ silvermont knl knm skylake-avx512 cannonlake icelake-client icelake-server \ skylake goldmont goldmont-plus tremont cascadelake tigerlake cooperlake \ sapphirerapids alderlake rocketlake eden-x2 nano nano-1000 nano-2000 nano-3000 \ nano-x2 eden-x4 nano-x4 lujiazui x86-64 x86-64-v2 x86-64-v3 x86-64-v4 \ -sierraforest graniterapids grandridge native" +sierraforest graniterapids graniterapids-d grandridge native" # Additional x86 processors supported by --with-cpu=. Each processor # MUST be separated by exactly one space. diff --git a/gcc/config/i386/driver-i386.cc b/gcc/config/i386/driver-i386.cc index 54c019a7fa3..4c362ffcfa3 100644 --- a/gcc/config/i386/driver-i386.cc +++ b/gcc/config/i386/driver-i386.cc @@ -594,6 +594,9 @@ const char *host_detect_local_cpu (int argc, const char **argv)
[PATCH] Initial Lunar Lake, Arrow Lake and Arrow Lake S Support
Hi all, This patch is to add initial support for Lunar Lake, Arrow Lake and Arrow Lake S for GCC. This link of related information is listed below: https://www.intel.com/content/www/us/en/develop/download/intel-architecture-instruction-set-extensions-programming-reference.html This has been tested on x86_64-pc-linux-gnu. Is this ok for trunk? Thank you. gcc/ChangeLog: * common/config/i386/cpuinfo.h (get_intel_cpu): Handle Lunar Lake, Arrow Lake and Arrow Lake S. * common/config/i386/i386-common.cc: (processor_name): Add arrowlake. (processor_alias_table): Add arrow lake, arrow lake s and lunar lake. * common/config/i386/i386-cpuinfo.h (enum processor_subtypes): Add INTEL_COREI7_ARROWLAKE and INTEL_COREI7_ARROWLAKE_S. * config.gcc: Add -march=arrowlake and -march=arrowlake-s. * config/i386/driver-i386.cc (host_detect_local_cpu): Handle arrowlake-s. * config/i386/i386-options.cc (m_ARROWLAKE): New. (processor_cost_table): Add arrowlake. * config/i386/i386.h (enum processor_type): Add PROCESSOR_ARROWLAKE. * doc/extend.texi: Add arrowlake and arrowlake-s. * doc/invoke.texi: Ditto. gcc/testsuite/ChangeLog: * g++.target/i386/mv16.C: Add arrowlake and arrowlake-s. * gcc.target/i386/funcspec-56.inc: Handle new march. --- gcc/common/config/i386/cpuinfo.h | 18 gcc/common/config/i386/i386-common.cc | 7 ++ gcc/common/config/i386/i386-cpuinfo.h | 2 + gcc/config.gcc| 2 +- gcc/config/i386/driver-i386.cc| 5 +- gcc/config/i386/i386-c.cc | 7 ++ gcc/config/i386/i386-options.cc | 2 + gcc/config/i386/i386.h| 4 + gcc/config/i386/x86-tune.def | 92 +++ gcc/doc/extend.texi | 6 ++ gcc/doc/invoke.texi | 17 gcc/testsuite/g++.target/i386/mv16.C | 12 +++ gcc/testsuite/gcc.target/i386/funcspec-56.inc | 2 + 13 files changed, 135 insertions(+), 41 deletions(-) diff --git a/gcc/common/config/i386/cpuinfo.h b/gcc/common/config/i386/cpuinfo.h index 159e5f03f0b..e6f1a0ac0a1 100644 --- a/gcc/common/config/i386/cpuinfo.h +++ b/gcc/common/config/i386/cpuinfo.h @@ -579,6 +579,24 @@ get_intel_cpu (struct __processor_model *cpu_model, CHECK___builtin_cpu_is ("grandridge"); cpu_model->__cpu_type = INTEL_GRANDRIDGE; break; +case 0xc5: + /* Arrow Lake. */ + cpu = "arrowlake"; + CHECK___builtin_cpu_is ("corei7"); + CHECK___builtin_cpu_is ("arrowlake"); + cpu_model->__cpu_type = INTEL_COREI7; + cpu_model->__cpu_subtype = INTEL_COREI7_ARROWLAKE; + break; +case 0xc6: + /* Arrow Lake S. */ +case 0xbd: + /* Lunar Lake. */ + cpu = "arrowlake-s"; + CHECK___builtin_cpu_is ("corei7"); + CHECK___builtin_cpu_is ("arrowlake-s"); + cpu_model->__cpu_type = INTEL_COREI7; + cpu_model->__cpu_subtype = INTEL_COREI7_ARROWLAKE_S; + break; case 0x17: case 0x1d: /* Penryn. */ diff --git a/gcc/common/config/i386/i386-common.cc b/gcc/common/config/i386/i386-common.cc index 9b45ad61239..541f1441db8 100644 --- a/gcc/common/config/i386/i386-common.cc +++ b/gcc/common/config/i386/i386-common.cc @@ -2044,6 +2044,7 @@ const char *const processor_names[] = "alderlake", "rocketlake", "graniterapids", + "arrowlake", "intel", "lujiazui", "geode", @@ -2167,6 +2168,12 @@ const pta processor_alias_table[] = M_CPU_SUBTYPE (INTEL_COREI7_ALDERLAKE), P_PROC_AVX2}, {"graniterapids", PROCESSOR_GRANITERAPIDS, CPU_HASWELL, PTA_GRANITERAPIDS, M_CPU_SUBTYPE (INTEL_COREI7_GRANITERAPIDS), P_PROC_AVX512F}, + {"arrowlake", PROCESSOR_ARROWLAKE, CPU_HASWELL, PTA_ARROWLAKE, +M_CPU_SUBTYPE (INTEL_COREI7_ARROWLAKE), P_PROC_AVX2}, + {"arrowlake-s", PROCESSOR_ARROWLAKE, CPU_HASWELL, PTA_ARROWLAKE_S, +M_CPU_SUBTYPE (INTEL_COREI7_ARROWLAKE_S), P_PROC_AVX2}, + {"lunarlake", PROCESSOR_ARROWLAKE, CPU_HASWELL, PTA_ARROWLAKE_S, +M_CPU_SUBTYPE (INTEL_COREI7_ARROWLAKE_S), P_PROC_AVX2}, {"bonnell", PROCESSOR_BONNELL, CPU_ATOM, PTA_BONNELL, M_CPU_TYPE (INTEL_BONNELL), P_PROC_SSSE3}, {"atom", PROCESSOR_BONNELL, CPU_ATOM, PTA_BONNELL, diff --git a/gcc/common/config/i386/i386-cpuinfo.h b/gcc/common/config/i386/i386-cpuinfo.h index e6385dd56a3..b371fb792ec 100644 --- a/gcc/common/config/i386/i386-cpuinfo.h +++ b/gcc/common/config/i386/i386-cpuinfo.h @@ -98,6 +98,8 @@ enum processor_subtypes ZHAOXIN_FAM7H_LUJIAZUI, AMDFAM19H_ZNVER4, INTEL_COREI7_GRANITERAPIDS, + INTEL_COREI7_ARROWLAKE, + INTEL_COREI7_ARROWLAKE_S, CPU_SUBTYPE_MAX }; diff --git a/gcc/config.gcc b/gcc/config.gcc index 93b6e0709af..6c373a478e6 100644 --- a/gcc/config.gcc +++ b/gcc/config.gcc @@ -683,7 +683,7 @@ silvermont knl knm skylake-avx512 c
[PATCH] Re-arrange sections of i386 cpuid
Re-order i386 cpuid based on the order of CPUID. gcc/ChangeLog: * config/i386/cpuid.h: Open a new section for Extended Features Leaf (%eax == 7, %ecx == 0) and Extended Features Sub-leaf (%eax == 7, %ecx == 1). --- gcc/config/i386/cpuid.h | 35 +++ 1 file changed, 19 insertions(+), 16 deletions(-) diff --git a/gcc/config/i386/cpuid.h b/gcc/config/i386/cpuid.h index be162dd8c78..971781c2b91 100644 --- a/gcc/config/i386/cpuid.h +++ b/gcc/config/i386/cpuid.h @@ -24,15 +24,6 @@ #ifndef _CPUID_H_INCLUDED #define _CPUID_H_INCLUDED -/* %eax */ -#define bit_RAOINT (1 << 3) -#define bit_AVXVNNI(1 << 4) -#define bit_AVX512BF16 (1 << 5) -#define bit_CMPCCXADD (1 << 7) -#define bit_AMX_FP16 (1 << 21) -#define bit_HRESET (1 << 22) -#define bit_AVXIFMA(1 << 23) - /* %ecx */ #define bit_SSE3 (1 << 0) #define bit_PCLMUL (1 << 1) @@ -52,10 +43,7 @@ #define bit_RDRND (1 << 30) /* %edx */ -#define bit_AVXVNNIINT8 (1 << 4) -#define bit_AVXNECONVERT (1 << 5) #define bit_CMPXCHG8B (1 << 8) -#define bit_PREFETCHI (1 << 14) #define bit_CMOV (1 << 15) #define bit_MMX(1 << 23) #define bit_FXSAVE (1 << 24) @@ -84,7 +72,7 @@ #define bit_CLZERO (1 << 0) #define bit_WBNOINVD (1 << 9) -/* Extended Features (%eax == 7) */ +/* Extended Features Leaf (%eax == 7, %ecx == 0) */ /* %ebx */ #define bit_FSGSBASE (1 << 0) #define bit_SGX (1 << 2) @@ -132,9 +120,9 @@ #define bit_AVX5124VNNIW (1 << 2) #define bit_AVX5124FMAPS (1 << 3) #define bit_AVX512VP2INTERSECT (1 << 8) -#define bit_AVX512FP16 (1 << 23) -#define bit_IBT(1 << 20) -#define bit_UINTR (1 << 5) +#define bit_AVX512FP16 (1 << 23) +#define bit_IBT (1 << 20) +#define bit_UINTR (1 << 5) #define bit_PCONFIG(1 << 18) #define bit_SERIALIZE (1 << 14) #define bit_TSXLDTRK(1 << 16) @@ -142,6 +130,21 @@ #define bit_AMX_TILE(1 << 24) #define bit_AMX_INT8(1 << 25) +/* Extended Features Sub-leaf (%eax == 7, %ecx == 1) */ +/* %eax */ +#define bit_RAOINT (1 << 3) +#define bit_AVXVNNI (1 << 4) +#define bit_AVX512BF16 (1 << 5) +#define bit_CMPCCXADD (1 << 7) +#define bit_AMX_FP16(1 << 21) +#define bit_HRESET (1 << 22) +#define bit_AVXIFMA (1 << 23) + +/* %edx */ +#define bit_AVXVNNIINT8 (1 << 4) +#define bit_AVXNECONVERT (1 << 5) +#define bit_PREFETCHI (1 << 14) + /* Extended State Enumeration Sub-leaf (%eax == 0xd, %ecx == 1) */ #define bit_XSAVEOPT (1 << 0) #define bit_XSAVEC (1 << 1) -- 2.31.1