Re: [[ARM/AArch64][testsuite] 01/36] Add explicit dependency on Neon Cumulative Saturation flag (QC).

[Tejas Belagod]

On 13/01/15 15:17, Christophe Lyon wrote:

__set_neon_cumulative_sat() modifies the contents on the QC flag, and
some intrinsics do so too: this patch adds the explicit dependency on
the asm statement, to avoid code reordering or removal.

When writing QC, the asm statement now has a fake input dependency,
which is the output of the intrinsic being tested. Modifying the
__set_neon_cumulative_sat macro is necessary, to be able to accept all
the possible input types.

Update the generic code in unary_sat_op.inc and binary_sat_op.inc
accordingly.

* gcc.target/aarch64/advsimd-intrinsics/arm-neon-ref.h
(Set_Neon_Cumulative_Sat): Add parameter.
(__set_neon_cumulative_sat): Support new parameter.
* gcc.target/aarch64/advsimd-intrinsics/binary_sat_op.inc
(TEST_BINARY_SAT_OP1): Call Set_Neon_Cumulative_Sat with new
argument.
* gcc.target/aarch64/advsimd-intrinsics/unary_sat_op.inc
(TEST_UNARY_SAT_OP1): Call Set_Neon_Cumulative_Sat with new
argument.

diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/arm-neon-ref.h 
b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/arm-neon-ref.h
index 8ea1f26..6464c66 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/arm-neon-ref.h
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/arm-neon-ref.h
@@ -255,7 +255,11 @@ typedef union {
  #endif /* __ORDER_BIG_ENDIAN__ */

  #define Neon_Cumulative_Sat  __read_neon_cumulative_sat()
-#define Set_Neon_Cumulative_Sat(x)  __set_neon_cumulative_sat((x))
+/* We need a fake dependency to ensure correct ordering of asm
+   statements to preset the QC flag value, and Neon operators writing
+   to QC. */
+#define Set_Neon_Cumulative_Sat(x, depend) \
+  __set_neon_cumulative_sat((x), (depend))

  #if defined(__aarch64__)
  static volatile int __read_neon_cumulative_sat (void) {
@@ -263,13 +267,12 @@ static volatile int __read_neon_cumulative_sat (void) {
  asm volatile (mrs %0,fpsr : =r (_afpscr_for_qc));
  return _afpscr_for_qc.b.QC;
  }
-static void __set_neon_cumulative_sat (int x) {
-_ARM_FPSCR _afpscr_for_qc;
-asm volatile (mrs %0,fpsr : =r (_afpscr_for_qc));
-_afpscr_for_qc.b.QC = x;
-asm volatile (msr fpsr,%0 : : r (_afpscr_for_qc));
-return;
-}
+#define __set_neon_cumulative_sat(x, depend) { \
+_ARM_FPSCR _afpscr_for_qc; \
+asm volatile (mrs %0,fpsr : =r (_afpscr_for_qc));  \
+_afpscr_for_qc.b.QC = x;   \
+asm volatile (msr fpsr,%1 : =X (depend) : r (_afpscr_for_qc)); \
+  }
  #else
  static volatile int __read_neon_cumulative_sat (void) {
  _ARM_FPSCR _afpscr_for_qc;
@@ -277,13 +280,12 @@ static volatile int __read_neon_cumulative_sat (void) {
  return _afpscr_for_qc.b.QC;
  }

-static void __set_neon_cumulative_sat (int x) {
-_ARM_FPSCR _afpscr_for_qc;
-asm volatile (vmrs %0,fpscr : =r (_afpscr_for_qc));
-_afpscr_for_qc.b.QC = x;
-asm volatile (vmsr fpscr,%0 : : r (_afpscr_for_qc));
-return;
-}
+#define __set_neon_cumulative_sat(x, depend) { \
+_ARM_FPSCR _afpscr_for_qc; \
+asm volatile (vmrs %0,fpscr : =r (_afpscr_for_qc));\
+_afpscr_for_qc.b.QC = x;   \
+asm volatile (vmsr fpscr,%1 : =X (depend) : r (_afpscr_for_qc)); \
+  }
  #endif

  /* Declare expected cumulative saturation results, one for each
diff --git 
a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/binary_sat_op.inc 
b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/binary_sat_op.inc
index 35d7701..c09a468 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/binary_sat_op.inc
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/binary_sat_op.inc
@@ -18,7 +18,7 @@ void FNNAME (INSN_NAME) (void)
/* vector_res = OP(vector1,vector2), then store the result.  */

  #define TEST_BINARY_SAT_OP1(INSN, Q, T1, T2, W, N, EXPECTED_CUMULATIVE_SAT, 
CMT) \
-  Set_Neon_Cumulative_Sat(0);  \
+  Set_Neon_Cumulative_Sat(0, VECT_VAR(vector_res, T1, W, N));  \
VECT_VAR(vector_res, T1, W, N) =\
  INSN##Q##_##T2##W(VECT_VAR(vector1, T1, W, N),\
  VECT_VAR(vector2, T1, W, N)); \
diff --git 
a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/unary_sat_op.inc 
b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/unary_sat_op.inc
index 3f6d984..0da1426 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/unary_sat_op.inc
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/unary_sat_op.inc
@@ -17,7 +17,7 @@ void FNNAME (INSN_NAME) (void)
  {
/* y=OP(x), then store the result.  */
  #define TEST_UNARY_SAT_OP1(INSN, Q, T1, T2, W, N, EXPECTED_CUMULATIVE_SAT, 
CMT) \
-  

Re: [[ARM/AArch64][testsuite] 01/36] Add explicit dependency on Neon Cumulative Saturation flag (QC).

[Marcus Shawcroft]

On 13 January 2015 at 15:17, Christophe Lyon christophe.l...@linaro.org wrote:

 * gcc.target/aarch64/advsimd-intrinsics/arm-neon-ref.h
 (Set_Neon_Cumulative_Sat): Add parameter.
 (__set_neon_cumulative_sat): Support new parameter.
 * gcc.target/aarch64/advsimd-intrinsics/binary_sat_op.inc
 (TEST_BINARY_SAT_OP1): Call Set_Neon_Cumulative_Sat with new
 argument.
 * gcc.target/aarch64/advsimd-intrinsics/unary_sat_op.inc
 (TEST_UNARY_SAT_OP1): Call Set_Neon_Cumulative_Sat with new
 argument.

OK, provided no regressions and no new fails for aarch64, aarch64_be and arm.
/Marcus

[[ARM/AArch64][testsuite] 01/36] Add explicit dependency on Neon Cumulative Saturation flag (QC).

[Christophe Lyon]

__set_neon_cumulative_sat() modifies the contents on the QC flag, and
some intrinsics do so too: this patch adds the explicit dependency on
the asm statement, to avoid code reordering or removal.

When writing QC, the asm statement now has a fake input dependency,
which is the output of the intrinsic being tested. Modifying the
__set_neon_cumulative_sat macro is necessary, to be able to accept all
the possible input types.

Update the generic code in unary_sat_op.inc and binary_sat_op.inc
accordingly.

* gcc.target/aarch64/advsimd-intrinsics/arm-neon-ref.h
(Set_Neon_Cumulative_Sat): Add parameter.
(__set_neon_cumulative_sat): Support new parameter.
* gcc.target/aarch64/advsimd-intrinsics/binary_sat_op.inc
(TEST_BINARY_SAT_OP1): Call Set_Neon_Cumulative_Sat with new
argument.
* gcc.target/aarch64/advsimd-intrinsics/unary_sat_op.inc
(TEST_UNARY_SAT_OP1): Call Set_Neon_Cumulative_Sat with new
argument.

diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/arm-neon-ref.h 
b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/arm-neon-ref.h
index 8ea1f26..6464c66 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/arm-neon-ref.h
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/arm-neon-ref.h
@@ -255,7 +255,11 @@ typedef union {
 #endif /* __ORDER_BIG_ENDIAN__ */
 
 #define Neon_Cumulative_Sat  __read_neon_cumulative_sat()
-#define Set_Neon_Cumulative_Sat(x)  __set_neon_cumulative_sat((x))
+/* We need a fake dependency to ensure correct ordering of asm
+   statements to preset the QC flag value, and Neon operators writing
+   to QC. */
+#define Set_Neon_Cumulative_Sat(x, depend) \
+  __set_neon_cumulative_sat((x), (depend))
 
 #if defined(__aarch64__)
 static volatile int __read_neon_cumulative_sat (void) {
@@ -263,13 +267,12 @@ static volatile int __read_neon_cumulative_sat (void) {
 asm volatile (mrs %0,fpsr : =r (_afpscr_for_qc));
 return _afpscr_for_qc.b.QC;
 }
-static void __set_neon_cumulative_sat (int x) {
-_ARM_FPSCR _afpscr_for_qc;
-asm volatile (mrs %0,fpsr : =r (_afpscr_for_qc));
-_afpscr_for_qc.b.QC = x;
-asm volatile (msr fpsr,%0 : : r (_afpscr_for_qc));
-return;
-}
+#define __set_neon_cumulative_sat(x, depend) { \
+_ARM_FPSCR _afpscr_for_qc; \
+asm volatile (mrs %0,fpsr : =r (_afpscr_for_qc));  \
+_afpscr_for_qc.b.QC = x;   \
+asm volatile (msr fpsr,%1 : =X (depend) : r (_afpscr_for_qc)); \
+  }
 #else
 static volatile int __read_neon_cumulative_sat (void) {
 _ARM_FPSCR _afpscr_for_qc;
@@ -277,13 +280,12 @@ static volatile int __read_neon_cumulative_sat (void) {
 return _afpscr_for_qc.b.QC;
 }
 
-static void __set_neon_cumulative_sat (int x) {
-_ARM_FPSCR _afpscr_for_qc;
-asm volatile (vmrs %0,fpscr : =r (_afpscr_for_qc));
-_afpscr_for_qc.b.QC = x;
-asm volatile (vmsr fpscr,%0 : : r (_afpscr_for_qc));
-return;
-}
+#define __set_neon_cumulative_sat(x, depend) { \
+_ARM_FPSCR _afpscr_for_qc; \
+asm volatile (vmrs %0,fpscr : =r (_afpscr_for_qc));\
+_afpscr_for_qc.b.QC = x;   \
+asm volatile (vmsr fpscr,%1 : =X (depend) : r (_afpscr_for_qc)); \
+  }
 #endif
 
 /* Declare expected cumulative saturation results, one for each
diff --git 
a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/binary_sat_op.inc 
b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/binary_sat_op.inc
index 35d7701..c09a468 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/binary_sat_op.inc
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/binary_sat_op.inc
@@ -18,7 +18,7 @@ void FNNAME (INSN_NAME) (void)
   /* vector_res = OP(vector1,vector2), then store the result.  */
 
 #define TEST_BINARY_SAT_OP1(INSN, Q, T1, T2, W, N, EXPECTED_CUMULATIVE_SAT, 
CMT) \
-  Set_Neon_Cumulative_Sat(0);  \
+  Set_Neon_Cumulative_Sat(0, VECT_VAR(vector_res, T1, W, N));  \
   VECT_VAR(vector_res, T1, W, N) = \
 INSN##Q##_##T2##W(VECT_VAR(vector1, T1, W, N), \
  VECT_VAR(vector2, T1, W, N)); \
diff --git 
a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/unary_sat_op.inc 
b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/unary_sat_op.inc
index 3f6d984..0da1426 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/unary_sat_op.inc
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/unary_sat_op.inc
@@ -17,7 +17,7 @@ void FNNAME (INSN_NAME) (void)
 {
   /* y=OP(x), then store the result.  */
 #define TEST_UNARY_SAT_OP1(INSN, Q, T1, T2, W, N, EXPECTED_CUMULATIVE_SAT, 
CMT) \
-  Set_Neon_Cumulative_Sat(0);