On Mon, Sep 21, 2015 at 12:12:21PM +0100, Matthew Wahab wrote:
> On 18/09/15 09:05, James Greenhalgh wrote:
> > On Thu, Sep 17, 2015 at 05:40:48PM +0100, Matthew Wahab wrote:
> >> Hello,
> >>
> >> ARMv8.1 adds atomic swap and atomic load-operate instructions with
> >> optional memory ordering specifiers. This patch adds an expander to
> >> generate a BIC instruction that can be explicitly called when
> >> implementing the atomic__fetch pattern to calculate the value to
> >> be returned by the operation.
> >>
> >
> > Why not make the "*_one_cmpl_3" pattern
> > named (remove the leading *) and call that in your atomic__fetch
> > patterns as:
> >
> >and_one_cmpl_3
> >
> > I'd rather that than to add a pettern that simply expands to the same
> > thing.
>
> I overlooked that pattern when I was trying to find the bic emitter. I've
> attached an
> updated patch.
>
> Tested as part of the series for aarch64-none-linux-gnu with native bootstrap
> and
> make check. Also tested for aarch64-none-elf with cross-compiled
> check-gcc on an ARMv8.1 emulator with +lse enabled by default.
>
> Ok for trunk?
> Matthew
OK.
Thanks,
James
>
> 2015-09-21 Matthew Wahab
>
> * config/aarch64/aarch64.md
> (_one_cmpl_3): Make a named
> pattern.
>
> From 0e2ae8739d70e4d1c14fa848f67847b1ecf94f71 Mon Sep 17 00:00:00 2001
> From: Matthew Wahab
> Date: Mon, 17 Aug 2015 17:48:27 +0100
> Subject: [PATCH 2/5] Make BIC, other logical instructions, available for use.
>
> Change-Id: Ibef049bfa1bfe5e168feada3dc358f28383e6410
> ---
> gcc/config/aarch64/aarch64.md | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/gcc/config/aarch64/aarch64.md b/gcc/config/aarch64/aarch64.md
> index 88ba72e..72384ce 100644
> --- a/gcc/config/aarch64/aarch64.md
> +++ b/gcc/config/aarch64/aarch64.md
> @@ -3392,7 +3392,7 @@
>[(set_attr "type" "logics_reg")]
> )
>
> -(define_insn "*_one_cmpl_3"
> +(define_insn "_one_cmpl_3"
>[(set (match_operand:GPI 0 "register_operand" "=r")
> (LOGICAL:GPI (not:GPI
> (SHIFT:GPI
> --
> 2.1.4
>
