Now with the patch :-)
VP.
On Mon, Sep 11, 2017 at 03:20:12PM +0100, Vidya Praveen wrote:
> Hello,
>
> The following two related patches need to be reverted as it causes
> cross-native
> builds to fail with the following message:
>
> g++ -c -DIN_GCC -DGENERATOR_FILE -I. [...] \
> -o build/genpreds.o /path/to/src/gcc/gcc/genpreds.c
> In file included from ./options.h:8:0,
> from ./tm.h:23,
> from /path/to/src/gcc/gcc/genpreds.c:26:
> /path/to/src/gcc/gcc/config/arm/arm-opts.h:29:21: fatal error: arm-isa.h: No
> such file or directory
> #include "arm-isa.h"
> ^
> genpreds depends on GTM_H which does not depend on options.h, or any of its
> dependencies. Nevertheless, it still tries to include options.h when reading
> tm.h, so we miss the rule to build arm-isa.h. It is unclear why it is only an
> issue with the cross-native builds.
>
> For now, in order to keep the builds going, I am reverting these patches.
>
>
> r251800 | rearnsha | 2017-09-06 14:42:54 +0100 (Wed, 06 Sep 2017) | 16 lines
>
> [arm] Improve error checking in parsecpu.awk
>
> This patch adds a bit more error checking to parsecpu.awk to ensure
> that statements are not missing arguments or have excess arguments
> beyond those permitted. It also slightly improves the handling of
> errors so that we terminate properly if parsing fails and be as
> helpful as we can while in the parsing phase.
>
> * config/arm/parsecpu.awk (fatal): Note that we've encountered an
> error. Only quit immediately if parsing is complete.
> (BEGIN): Initialize fatal_err and parse_done.
> (begin fpu, end fpu): Check number of arguments.
> (begin arch, end arch): Likewise.
> (begin cpu, end cpu): Likewise.
> (cname, tune for, tune flags, architecture, fpu, option): Likewise.
> (optalias): Likewise.
>
> r251799 | rearnsha | 2017-09-06 14:42:46 +0100 (Wed, 06 Sep 2017) | 31 lines
>
> [arm] auto-generate arm-isa.h from CPU descriptions
>
> This patch autogenerates arm-isa.h from new entries in arm-cpus.in.
> This has the primary advantage that it makes the description file more
> self-contained, but it also solves the 'array dimensioning' problem
> that Tamar recently encountered. It adds two new constructs to
> arm-cpus.in: features and fgroups. Fgroups are simply a way of naming
> a group of feature bits so that they can be referenced together. We
> follow the convention that feature bits are all lower case, while
> fgroups are (predominantly) upper case. This is helpful as in some
> contexts they share the same namespace. Most of the minor changes in
> this patch are related to adopting this new naming convention.
>
> * config.gcc (arm*-*-*): Don't add arm-isa.h to tm_p_file.
> * config/arm/arm-isa.h: Delete. Move definitions to ...
> * arm-cpus.in: ... here. Use new feature and fgroup values.
> * config/arm/arm.c (arm_option_override): Use lower case for feature
> bit names.
> * config/arm/arm.h (TARGET_HARD_FLOAT): Likewise.
> (TARGET_VFP3, TARGET_VFP5, TARGET_FMA): Likewise.
> * config/arm/parsecpu.awk (END): Add new command 'isa'.
> (isa_pfx): Delete.
> (print_isa_bits_for): New function.
> (gen_isa): New function.
> (gen_comm_data): Use print_isa_bits_for.
> (define feature): New keyword.
> (define fgroup): New keyword.
> * config/arm/t-arm (OPTIONS_H_EXTRA): Add arm-isa.h
> (arm-isa.h): Add rule to generate file.
> * common/config/arm/arm-common.c: (arm_canon_arch_option): Use lower
> case for feature bit names.
>
> Regards,
> VP.
>
>
> gcc/ChangeLog:
>
> 2017-09-11 Vidya Praveen
>
> Revert r251800 and r251799.
diff --git a/gcc/common/config/arm/arm-common.c b/gcc/common/config/arm/arm-common.c
index 7cb99ec..38bd3a7 100644
--- a/gcc/common/config/arm/arm-common.c
+++ b/gcc/common/config/arm/arm-common.c
@@ -574,7 +574,7 @@ arm_canon_arch_option (int argc, const char **argv)
{
/* The easiest and safest way to remove the default fpu
capabilities is to look for a '+no..' option that removes
- the base FPU bit (isa_bit_vfpv2). If that doesn't exist
+ the base FPU bit (isa_bit_VFPv2). If that doesn't exist
then the best we can do is strip out all the bits that
might be part of the most capable FPU we know about,
which is "crypto-neon-fp-armv8". */
@@ -586,7 +586,7 @@ arm_canon_arch_option (int argc, const char **argv)
++ext)
{
if (ext->remove
- && check_isa_bits_for (ext->isa_bits, isa_bit_vfpv2))
+ && check_isa_bits_for (ext->isa_bits, isa_bit_VFPv2))
{
arm_initialize_isa (fpu_isa, ext->isa_bits);
bitmap_and_compl (target_isa, target_isa, fpu_isa);
@@ -620,7 +620,7 @@ arm_canon_arch_option (int argc, const char **argv)
{
/* Clearing the VFPv2
