Re: Re: [Committed] RISC-V: Fix Demand comparison bug[VSETVL PASS]
Yes. We could wait for a more few days to backport. juzhe.zh...@rivai.ai From: Kito Cheng Date: 2023-09-21 00:41 To: Juzhe-Zhong CC: GCC Patches; Kito Cheng; Jeff Law; Robin Dapp Subject: Re: [Committed] RISC-V: Fix Demand comparison bug[VSETVL PASS] Does it also happened on gcc 13 branch? If so plz backport :) Juzhe-Zhong 於 2023年9月20日 週三 11:09 寫道： This bug is exposed when we support VLS integer conversion patterns. FAIL: c-c++-common/torture/pr53505.c execution. This is because incorrect vsetvl elimination by Phase 4: 10318: 0d207057vsetvli zero,zero,e32,m4,ta,ma 1031c: 5e003e57vmv.v.i v28,0 .: missed e8,m1 vsetvl 10320: 7b07b057vmsgtu.vi v0,v16,15 10324: 03083157vadd.vi v2,v16,-16 Regression on release version GCC no surprise difference. Committed. gcc/ChangeLog: * config/riscv/riscv-vsetvl.cc (vector_insn_info::operator==): Fix bug. --- gcc/config/riscv/riscv-vsetvl.cc | 9 + 1 file changed, 5 insertions(+), 4 deletions(-) diff --git a/gcc/config/riscv/riscv-vsetvl.cc b/gcc/config/riscv/riscv-vsetvl.cc index df980b6770e..e0f61148ef3 100644 --- a/gcc/config/riscv/riscv-vsetvl.cc +++ b/gcc/config/riscv/riscv-vsetvl.cc @@ -1799,10 +1799,11 @@ vector_insn_info::operator== (const vector_insn_info ) const if (m_demands[i] != other.demand_p ((enum demand_type) i)) return false; - if (vector_config_insn_p (m_insn->rtl ()) - || vector_config_insn_p (other.get_insn ()->rtl ())) -if (m_insn != other.get_insn ()) - return false; + /* We should consider different INSN demands as different + expression. Otherwise, we will be doing incorrect vsetvl + elimination. */ + if (m_insn != other.get_insn ()) +return false; if (!same_avl_p (other)) return false; -- 2.36.3
Re: [Committed] RISC-V: Fix Demand comparison bug[VSETVL PASS]
Does it also happened on gcc 13 branch? If so plz backport :) Juzhe-Zhong 於 2023年9月20日 週三 11:09 寫道： > This bug is exposed when we support VLS integer conversion patterns. > > FAIL: c-c++-common/torture/pr53505.c execution. > > This is because incorrect vsetvl elimination by Phase 4: > >10318: 0d207057vsetvli zero,zero,e32,m4,ta,ma >1031c: 5e003e57vmv.v.i v28,0 >.: missed e8,m1 vsetvl >10320: 7b07b057vmsgtu.vi v0,v16,15 >10324: 03083157vadd.vi v2,v16,-16 > > Regression on release version GCC no surprise difference. > > Committed. > > gcc/ChangeLog: > > * config/riscv/riscv-vsetvl.cc (vector_insn_info::operator==): Fix > bug. > > --- > gcc/config/riscv/riscv-vsetvl.cc | 9 + > 1 file changed, 5 insertions(+), 4 deletions(-) > > diff --git a/gcc/config/riscv/riscv-vsetvl.cc > b/gcc/config/riscv/riscv-vsetvl.cc > index df980b6770e..e0f61148ef3 100644 > --- a/gcc/config/riscv/riscv-vsetvl.cc > +++ b/gcc/config/riscv/riscv-vsetvl.cc > @@ -1799,10 +1799,11 @@ vector_insn_info::operator== (const > vector_insn_info ) const > if (m_demands[i] != other.demand_p ((enum demand_type) i)) >return false; > > - if (vector_config_insn_p (m_insn->rtl ()) > - || vector_config_insn_p (other.get_insn ()->rtl ())) > -if (m_insn != other.get_insn ()) > - return false; > + /* We should consider different INSN demands as different > + expression. Otherwise, we will be doing incorrect vsetvl > + elimination. */ > + if (m_insn != other.get_insn ()) > +return false; > >if (!same_avl_p (other)) > return false; > -- > 2.36.3 > >
[Committed] RISC-V: Fix Demand comparison bug[VSETVL PASS]
This bug is exposed when we support VLS integer conversion patterns. FAIL: c-c++-common/torture/pr53505.c execution. This is because incorrect vsetvl elimination by Phase 4: 10318: 0d207057vsetvli zero,zero,e32,m4,ta,ma 1031c: 5e003e57vmv.v.i v28,0 .: missed e8,m1 vsetvl 10320: 7b07b057vmsgtu.vi v0,v16,15 10324: 03083157vadd.vi v2,v16,-16 Regression on release version GCC no surprise difference. Committed. gcc/ChangeLog: * config/riscv/riscv-vsetvl.cc (vector_insn_info::operator==): Fix bug. --- gcc/config/riscv/riscv-vsetvl.cc | 9 + 1 file changed, 5 insertions(+), 4 deletions(-) diff --git a/gcc/config/riscv/riscv-vsetvl.cc b/gcc/config/riscv/riscv-vsetvl.cc index df980b6770e..e0f61148ef3 100644 --- a/gcc/config/riscv/riscv-vsetvl.cc +++ b/gcc/config/riscv/riscv-vsetvl.cc @@ -1799,10 +1799,11 @@ vector_insn_info::operator== (const vector_insn_info ) const if (m_demands[i] != other.demand_p ((enum demand_type) i)) return false; - if (vector_config_insn_p (m_insn->rtl ()) - || vector_config_insn_p (other.get_insn ()->rtl ())) -if (m_insn != other.get_insn ()) - return false; + /* We should consider different INSN demands as different + expression. Otherwise, we will be doing incorrect vsetvl + elimination. */ + if (m_insn != other.get_insn ()) +return false; if (!same_avl_p (other)) return false; -- 2.36.3
