Re: [PATCH ARM iWMMXt 2/5] intrinsic head file change
I've only had a brief look at this and point out certain stylistic
issues that I noticed and would like another set of eyes on this and
the next patch.
On 29 May 2012 05:13, Matt Turner wrote:
> From: Xinyu Qi
>
> gcc/
> * config/arm/mmintrin.h: Use __IWMMXT__ to enable iWMMXt intrinsics.
> Use __IWMMXT2__ to enable iWMMXt2 intrinsics.
> Use C name-mangling for intrinsics.
> (__v8qi): Redefine.
> (_mm_cvtsi32_si64, _mm_andnot_si64, _mm_sad_pu8): Revise.
> (_mm_sad_pu16, _mm_align_si64, _mm_setwcx, _mm_getwcx): Likewise.
> (_m_from_int): Likewise.
> (_mm_sada_pu8, _mm_sada_pu16): New intrinsic.
> (_mm_alignr0_si64, _mm_alignr1_si64, _mm_alignr2_si64): Likewise.
> (_mm_alignr3_si64, _mm_tandcb, _mm_tandch, _mm_tandcw): Likewise.
> (_mm_textrcb, _mm_textrch, _mm_textrcw, _mm_torcb): Likewise.
> (_mm_torch, _mm_torcw, _mm_tbcst_pi8, _mm_tbcst_pi16): Likewise.
> (_mm_tbcst_pi32): Likewise.
> (_mm_abs_pi8, _mm_abs_pi16, _mm_abs_pi32): New iWMMXt2 intrinsic.
> (_mm_addsubhx_pi16, _mm_absdiff_pu8, _mm_absdiff_pu16): Likewise.
> (_mm_absdiff_pu32, _mm_addc_pu16, _mm_addc_pu32): Likewise.
> (_mm_avg4_pu8, _mm_avg4r_pu8, _mm_maddx_pi16, _mm_maddx_pu16):
> Likewise.
> (_mm_msub_pi16, _mm_msub_pu16, _mm_mulhi_pi32): Likewise.
> (_mm_mulhi_pu32, _mm_mulhir_pi16, _mm_mulhir_pi32): Likewise.
> (_mm_mulhir_pu16, _mm_mulhir_pu32, _mm_mullo_pi32): Likewise.
> (_mm_qmulm_pi16, _mm_qmulm_pi32, _mm_qmulmr_pi16): Likewise.
> (_mm_qmulmr_pi32, _mm_subaddhx_pi16, _mm_addbhusl_pu8): Likewise.
> (_mm_addbhusm_pu8, _mm_qmiabb_pi32, _mm_qmiabbn_pi32): Likewise.
> (_mm_qmiabt_pi32, _mm_qmiabtn_pi32, _mm_qmiatb_pi32): Likewise.
> (_mm_qmiatbn_pi32, _mm_qmiatt_pi32, _mm_qmiattn_pi32): Likewise.
> (_mm_wmiabb_si64, _mm_wmiabbn_si64, _mm_wmiabt_si64): Likewise.
> (_mm_wmiabtn_si64, _mm_wmiatb_si64, _mm_wmiatbn_si64): Likewise.
> (_mm_wmiatt_si64, _mm_wmiattn_si64, _mm_wmiawbb_si64): Likewise.
> (_mm_wmiawbbn_si64, _mm_wmiawbt_si64, _mm_wmiawbtn_si64): Likewise.
> (_mm_wmiawtb_si64, _mm_wmiawtbn_si64, _mm_wmiawtt_si64): Likewise.
> (_mm_wmiawttn_si64, _mm_merge_si64): Likewise.
> (_mm_torvscb, _mm_torvsch, _mm_torvscw): Likewise.
> (_m_to_int): New define.
> ---
> gcc/config/arm/mmintrin.h | 649
> ++---
> 1 files changed, 614 insertions(+), 35 deletions(-)
>
> diff --git a/gcc/config/arm/mmintrin.h b/gcc/config/arm/mmintrin.h
> index 2cc500d..0fe551d 100644
> --- a/gcc/config/arm/mmintrin.h
> +++ b/gcc/config/arm/mmintrin.h
> @@ -24,16 +24,30 @@
> #ifndef _MMINTRIN_H_INCLUDED
> #define _MMINTRIN_H_INCLUDED
>
> +#ifndef __IWMMXT__
> +#error You must enable WMMX/WMMX2 instructions (e.g. -march=iwmmxt or
> -march=iwmmxt2) to use iWMMXt/iWMMXt2 intrinsics
> +#else
> +
> +#ifndef __IWMMXT2__
> +#warning You only enable iWMMXt intrinsics. Extended iWMMXt2 intrinsics
> available only if WMMX2 instructions enabled (e.g. -march=iwmmxt2)
> +#endif
> +
Extra newline.
> +
> +#if defined __cplusplus
> +extern "C" { /* Begin "C" */
> +/* Intrinsics use C name-mangling. */
> +#endif /* __cplusplus */
> +
> /* The data type intended for user use. */
> typedef unsigned long long __m64, __int64;
>
> /* Internal data types for implementing the intrinsics. */
> typedef int __v2si __attribute__ ((vector_size (8)));
> typedef short __v4hi __attribute__ ((vector_size (8)));
> -typedef char __v8qi __attribute__ ((vector_size (8)));
> +typedef signed char __v8qi __attribute__ ((vector_size (8)));
>
> /* "Convert" __m64 and __int64 into each other. */
> -static __inline __m64
> +static __inline __m64
> _mm_cvtsi64_m64 (__int64 __i)
> {
> return __i;
> @@ -54,7 +68,7 @@ _mm_cvtsi64_si32 (__int64 __i)
> static __inline __int64
> _mm_cvtsi32_si64 (int __i)
> {
> - return __i;
> + return (__i & 0x);
> }
>
> /* Pack the four 16-bit values from M1 into the lower four 8-bit values of
> @@ -603,7 +617,7 @@ _mm_and_si64 (__m64 __m1, __m64 __m2)
> static __inline __m64
> _mm_andnot_si64 (__m64 __m1, __m64 __m2)
> {
> - return __builtin_arm_wandn (__m1, __m2);
> + return __builtin_arm_wandn (__m2, __m1);
> }
>
> /* Bit-wise inclusive OR the 64-bit values in M1 and M2. */
> @@ -935,7 +949,13 @@ _mm_avg2_pu16 (__m64 __A, __m64 __B)
> static __inline __m64
> _mm_sad_pu8 (__m64 __A, __m64 __B)
> {
> - return (__m64) __builtin_arm_wsadb ((__v8qi)__A, (__v8qi)__B);
> + return (__m64) __builtin_arm_wsadbz ((__v8qi)__A, (__v8qi)__B);
> +}
> +
> +static __inline __m64
> +_mm_sada_pu8 (__m64 __A, __m64 __B, __m64 __C)
> +{
> + return (__m64) __builtin_arm_wsadb ((__v2si)__A, (__v8qi)__B, (__v8qi)__C);
> }
>
> /* Compute the sum of the absolute differences of the unsigned 16-bit
> @@ -944,9 +964,16 @@ _mm_sad_pu8 (__m64 __A, __m64 __B)
> static __inline _
[PATCH ARM iWMMXt 2/5] intrinsic head file change
From: Xinyu Qi
gcc/
* config/arm/mmintrin.h: Use __IWMMXT__ to enable iWMMXt intrinsics.
Use __IWMMXT2__ to enable iWMMXt2 intrinsics.
Use C name-mangling for intrinsics.
(__v8qi): Redefine.
(_mm_cvtsi32_si64, _mm_andnot_si64, _mm_sad_pu8): Revise.
(_mm_sad_pu16, _mm_align_si64, _mm_setwcx, _mm_getwcx): Likewise.
(_m_from_int): Likewise.
(_mm_sada_pu8, _mm_sada_pu16): New intrinsic.
(_mm_alignr0_si64, _mm_alignr1_si64, _mm_alignr2_si64): Likewise.
(_mm_alignr3_si64, _mm_tandcb, _mm_tandch, _mm_tandcw): Likewise.
(_mm_textrcb, _mm_textrch, _mm_textrcw, _mm_torcb): Likewise.
(_mm_torch, _mm_torcw, _mm_tbcst_pi8, _mm_tbcst_pi16): Likewise.
(_mm_tbcst_pi32): Likewise.
(_mm_abs_pi8, _mm_abs_pi16, _mm_abs_pi32): New iWMMXt2 intrinsic.
(_mm_addsubhx_pi16, _mm_absdiff_pu8, _mm_absdiff_pu16): Likewise.
(_mm_absdiff_pu32, _mm_addc_pu16, _mm_addc_pu32): Likewise.
(_mm_avg4_pu8, _mm_avg4r_pu8, _mm_maddx_pi16, _mm_maddx_pu16): Likewise.
(_mm_msub_pi16, _mm_msub_pu16, _mm_mulhi_pi32): Likewise.
(_mm_mulhi_pu32, _mm_mulhir_pi16, _mm_mulhir_pi32): Likewise.
(_mm_mulhir_pu16, _mm_mulhir_pu32, _mm_mullo_pi32): Likewise.
(_mm_qmulm_pi16, _mm_qmulm_pi32, _mm_qmulmr_pi16): Likewise.
(_mm_qmulmr_pi32, _mm_subaddhx_pi16, _mm_addbhusl_pu8): Likewise.
(_mm_addbhusm_pu8, _mm_qmiabb_pi32, _mm_qmiabbn_pi32): Likewise.
(_mm_qmiabt_pi32, _mm_qmiabtn_pi32, _mm_qmiatb_pi32): Likewise.
(_mm_qmiatbn_pi32, _mm_qmiatt_pi32, _mm_qmiattn_pi32): Likewise.
(_mm_wmiabb_si64, _mm_wmiabbn_si64, _mm_wmiabt_si64): Likewise.
(_mm_wmiabtn_si64, _mm_wmiatb_si64, _mm_wmiatbn_si64): Likewise.
(_mm_wmiatt_si64, _mm_wmiattn_si64, _mm_wmiawbb_si64): Likewise.
(_mm_wmiawbbn_si64, _mm_wmiawbt_si64, _mm_wmiawbtn_si64): Likewise.
(_mm_wmiawtb_si64, _mm_wmiawtbn_si64, _mm_wmiawtt_si64): Likewise.
(_mm_wmiawttn_si64, _mm_merge_si64): Likewise.
(_mm_torvscb, _mm_torvsch, _mm_torvscw): Likewise.
(_m_to_int): New define.
---
gcc/config/arm/mmintrin.h | 649 ++---
1 files changed, 614 insertions(+), 35 deletions(-)
diff --git a/gcc/config/arm/mmintrin.h b/gcc/config/arm/mmintrin.h
index 2cc500d..0fe551d 100644
--- a/gcc/config/arm/mmintrin.h
+++ b/gcc/config/arm/mmintrin.h
@@ -24,16 +24,30 @@
#ifndef _MMINTRIN_H_INCLUDED
#define _MMINTRIN_H_INCLUDED
+#ifndef __IWMMXT__
+#error You must enable WMMX/WMMX2 instructions (e.g. -march=iwmmxt or
-march=iwmmxt2) to use iWMMXt/iWMMXt2 intrinsics
+#else
+
+#ifndef __IWMMXT2__
+#warning You only enable iWMMXt intrinsics. Extended iWMMXt2 intrinsics
available only if WMMX2 instructions enabled (e.g. -march=iwmmxt2)
+#endif
+
+
+#if defined __cplusplus
+extern "C" { /* Begin "C" */
+/* Intrinsics use C name-mangling. */
+#endif /* __cplusplus */
+
/* The data type intended for user use. */
typedef unsigned long long __m64, __int64;
/* Internal data types for implementing the intrinsics. */
typedef int __v2si __attribute__ ((vector_size (8)));
typedef short __v4hi __attribute__ ((vector_size (8)));
-typedef char __v8qi __attribute__ ((vector_size (8)));
+typedef signed char __v8qi __attribute__ ((vector_size (8)));
/* "Convert" __m64 and __int64 into each other. */
-static __inline __m64
+static __inline __m64
_mm_cvtsi64_m64 (__int64 __i)
{
return __i;
@@ -54,7 +68,7 @@ _mm_cvtsi64_si32 (__int64 __i)
static __inline __int64
_mm_cvtsi32_si64 (int __i)
{
- return __i;
+ return (__i & 0x);
}
/* Pack the four 16-bit values from M1 into the lower four 8-bit values of
@@ -603,7 +617,7 @@ _mm_and_si64 (__m64 __m1, __m64 __m2)
static __inline __m64
_mm_andnot_si64 (__m64 __m1, __m64 __m2)
{
- return __builtin_arm_wandn (__m1, __m2);
+ return __builtin_arm_wandn (__m2, __m1);
}
/* Bit-wise inclusive OR the 64-bit values in M1 and M2. */
@@ -935,7 +949,13 @@ _mm_avg2_pu16 (__m64 __A, __m64 __B)
static __inline __m64
_mm_sad_pu8 (__m64 __A, __m64 __B)
{
- return (__m64) __builtin_arm_wsadb ((__v8qi)__A, (__v8qi)__B);
+ return (__m64) __builtin_arm_wsadbz ((__v8qi)__A, (__v8qi)__B);
+}
+
+static __inline __m64
+_mm_sada_pu8 (__m64 __A, __m64 __B, __m64 __C)
+{
+ return (__m64) __builtin_arm_wsadb ((__v2si)__A, (__v8qi)__B, (__v8qi)__C);
}
/* Compute the sum of the absolute differences of the unsigned 16-bit
@@ -944,9 +964,16 @@ _mm_sad_pu8 (__m64 __A, __m64 __B)
static __inline __m64
_mm_sad_pu16 (__m64 __A, __m64 __B)
{
- return (__m64) __builtin_arm_wsadh ((__v4hi)__A, (__v4hi)__B);
+ return (__m64) __builtin_arm_wsadhz ((__v4hi)__A, (__v4hi)__B);
}
+static __inline __m64
+_mm_sada_pu16 (__m64 __A, __m64 __B, __m64 __C)
+{
+ return (__m64) __builtin_arm_wsadh ((__v2si)__A, (__v4hi)__B, (__v4hi)__C);
+}
+
+
/* Compute the sum of the absolute differences of th
RE: PING: [PATCH, ARM, iWMMXt][2/5]: intrinsic head file change
PING At 2012-02-03 10:05:22,"Xinyu Qi" wrote: > PING > > http://gcc.gnu.org/ml/gcc-patches/2011-12/msg01788.html > > At 2011-12-29 14:22:50,"Xinyu Qi" wrote: > > * config/arm/mmintrin.h: Use __IWMMXT__ to enable iWMMXt > > intrinsics. > > Use __IWMMXT2__ to enable iWMMXt2 intrinsics. > > Use C name-mangling for intrinsics. > > (__v8qi): Redefine. > > (_mm_cvtsi32_si64, _mm_andnot_si64, _mm_sad_pu8): Revise. > > (_mm_sad_pu16, _mm_align_si64, _mm_setwcx, _mm_getwcx): > > Likewise. > > (_m_from_int): Likewise. > > (_mm_sada_pu8, _mm_sada_pu16): New intrinsic. > > (_mm_alignr0_si64, _mm_alignr1_si64, _mm_alignr2_si64): Likewise. > > (_mm_alignr3_si64, _mm_tandcb, _mm_tandch, _mm_tandcw): Likewise. > > (_mm_textrcb, _mm_textrch, _mm_textrcw, _mm_torcb): Likewise. > > (_mm_torch, _mm_torcw, _mm_tbcst_pi8, _mm_tbcst_pi16): Likewise. > > (_mm_tbcst_pi32): Likewise. > > (_mm_abs_pi8, _mm_abs_pi16, _mm_abs_pi32): New iWMMXt2 > > intrinsic. > > (_mm_addsubhx_pi16, _mm_absdiff_pu8, _mm_absdiff_pu16): Likewise. > > (_mm_absdiff_pu32, _mm_addc_pu16, _mm_addc_pu32): Likewise. > > (_mm_avg4_pu8, _mm_avg4r_pu8, _mm_maddx_pi16, > > _mm_maddx_pu16): Likewise. > > (_mm_msub_pi16, _mm_msub_pu16, _mm_mulhi_pi32): Likewise. > > (_mm_mulhi_pu32, _mm_mulhir_pi16, _mm_mulhir_pi32): Likewise. > > (_mm_mulhir_pu16, _mm_mulhir_pu32, _mm_mullo_pi32): Likewise. > > (_mm_qmulm_pi16, _mm_qmulm_pi32, _mm_qmulmr_pi16): Likewise. > > (_mm_qmulmr_pi32, _mm_subaddhx_pi16, _mm_addbhusl_pu8): > > Likewise. > > (_mm_addbhusm_pu8, _mm_qmiabb_pi32, _mm_qmiabbn_pi32): > > Likewise. > > (_mm_qmiabt_pi32, _mm_qmiabtn_pi32, _mm_qmiatb_pi32): Likewise. > > (_mm_qmiatbn_pi32, _mm_qmiatt_pi32, _mm_qmiattn_pi32): Likewise. > > (_mm_wmiabb_si64, _mm_wmiabbn_si64, _mm_wmiabt_si64): Likewise. > > (_mm_wmiabtn_si64, _mm_wmiatb_si64, _mm_wmiatbn_si64): > > Likewise. > > (_mm_wmiatt_si64, _mm_wmiattn_si64, _mm_wmiawbb_si64): > > Likewise. > > (_mm_wmiawbbn_si64, _mm_wmiawbt_si64, _mm_wmiawbtn_si64): > > Likewise. > > (_mm_wmiawtb_si64, _mm_wmiawtbn_si64, _mm_wmiawtt_si64): > > Likewise. > > (_mm_wmiawttn_si64, _mm_merge_si64): Likewise. > > (_mm_torvscb, _mm_torvsch, _mm_torvscw): Likewise. > > (_m_to_int): New define. > > > > Thanks, > > Xinyu
RE: PING: [PATCH, ARM, iWMMXt][2/5]: intrinsic head file change
PING http://gcc.gnu.org/ml/gcc-patches/2011-12/msg01788.html At 2011-12-29 14:22:50,"Xinyu Qi" wrote: > * config/arm/mmintrin.h: Use __IWMMXT__ to enable iWMMXt > intrinsics. > Use __IWMMXT2__ to enable iWMMXt2 intrinsics. > Use C name-mangling for intrinsics. > (__v8qi): Redefine. > (_mm_cvtsi32_si64, _mm_andnot_si64, _mm_sad_pu8): Revise. > (_mm_sad_pu16, _mm_align_si64, _mm_setwcx, _mm_getwcx): > Likewise. > (_m_from_int): Likewise. > (_mm_sada_pu8, _mm_sada_pu16): New intrinsic. > (_mm_alignr0_si64, _mm_alignr1_si64, _mm_alignr2_si64): Likewise. > (_mm_alignr3_si64, _mm_tandcb, _mm_tandch, _mm_tandcw): Likewise. > (_mm_textrcb, _mm_textrch, _mm_textrcw, _mm_torcb): Likewise. > (_mm_torch, _mm_torcw, _mm_tbcst_pi8, _mm_tbcst_pi16): Likewise. > (_mm_tbcst_pi32): Likewise. > (_mm_abs_pi8, _mm_abs_pi16, _mm_abs_pi32): New iWMMXt2 > intrinsic. > (_mm_addsubhx_pi16, _mm_absdiff_pu8, _mm_absdiff_pu16): Likewise. > (_mm_absdiff_pu32, _mm_addc_pu16, _mm_addc_pu32): Likewise. > (_mm_avg4_pu8, _mm_avg4r_pu8, _mm_maddx_pi16, > _mm_maddx_pu16): Likewise. > (_mm_msub_pi16, _mm_msub_pu16, _mm_mulhi_pi32): Likewise. > (_mm_mulhi_pu32, _mm_mulhir_pi16, _mm_mulhir_pi32): Likewise. > (_mm_mulhir_pu16, _mm_mulhir_pu32, _mm_mullo_pi32): Likewise. > (_mm_qmulm_pi16, _mm_qmulm_pi32, _mm_qmulmr_pi16): Likewise. > (_mm_qmulmr_pi32, _mm_subaddhx_pi16, _mm_addbhusl_pu8): > Likewise. > (_mm_addbhusm_pu8, _mm_qmiabb_pi32, _mm_qmiabbn_pi32): > Likewise. > (_mm_qmiabt_pi32, _mm_qmiabtn_pi32, _mm_qmiatb_pi32): Likewise. > (_mm_qmiatbn_pi32, _mm_qmiatt_pi32, _mm_qmiattn_pi32): Likewise. > (_mm_wmiabb_si64, _mm_wmiabbn_si64, _mm_wmiabt_si64): Likewise. > (_mm_wmiabtn_si64, _mm_wmiatb_si64, _mm_wmiatbn_si64): > Likewise. > (_mm_wmiatt_si64, _mm_wmiattn_si64, _mm_wmiawbb_si64): > Likewise. > (_mm_wmiawbbn_si64, _mm_wmiawbt_si64, _mm_wmiawbtn_si64): > Likewise. > (_mm_wmiawtb_si64, _mm_wmiawtbn_si64, _mm_wmiawtt_si64): > Likewise. > (_mm_wmiawttn_si64, _mm_merge_si64): Likewise. > (_mm_torvscb, _mm_torvsch, _mm_torvscw): Likewise. > (_m_to_int): New define. > > Thanks, > Xinyu
RE: PING: [PATCH, ARM, iWMMXt][2/5]: intrinsic head file change
* config/arm/mmintrin.h: Use __IWMMXT__ to enable iWMMXt intrinsics. Use __IWMMXT2__ to enable iWMMXt2 intrinsics. Use C name-mangling for intrinsics. (__v8qi): Redefine. (_mm_cvtsi32_si64, _mm_andnot_si64, _mm_sad_pu8): Revise. (_mm_sad_pu16, _mm_align_si64, _mm_setwcx, _mm_getwcx): Likewise. (_m_from_int): Likewise. (_mm_sada_pu8, _mm_sada_pu16): New intrinsic. (_mm_alignr0_si64, _mm_alignr1_si64, _mm_alignr2_si64): Likewise. (_mm_alignr3_si64, _mm_tandcb, _mm_tandch, _mm_tandcw): Likewise. (_mm_textrcb, _mm_textrch, _mm_textrcw, _mm_torcb): Likewise. (_mm_torch, _mm_torcw, _mm_tbcst_pi8, _mm_tbcst_pi16): Likewise. (_mm_tbcst_pi32): Likewise. (_mm_abs_pi8, _mm_abs_pi16, _mm_abs_pi32): New iWMMXt2 intrinsic. (_mm_addsubhx_pi16, _mm_absdiff_pu8, _mm_absdiff_pu16): Likewise. (_mm_absdiff_pu32, _mm_addc_pu16, _mm_addc_pu32): Likewise. (_mm_avg4_pu8, _mm_avg4r_pu8, _mm_maddx_pi16, _mm_maddx_pu16): Likewise. (_mm_msub_pi16, _mm_msub_pu16, _mm_mulhi_pi32): Likewise. (_mm_mulhi_pu32, _mm_mulhir_pi16, _mm_mulhir_pi32): Likewise. (_mm_mulhir_pu16, _mm_mulhir_pu32, _mm_mullo_pi32): Likewise. (_mm_qmulm_pi16, _mm_qmulm_pi32, _mm_qmulmr_pi16): Likewise. (_mm_qmulmr_pi32, _mm_subaddhx_pi16, _mm_addbhusl_pu8): Likewise. (_mm_addbhusm_pu8, _mm_qmiabb_pi32, _mm_qmiabbn_pi32): Likewise. (_mm_qmiabt_pi32, _mm_qmiabtn_pi32, _mm_qmiatb_pi32): Likewise. (_mm_qmiatbn_pi32, _mm_qmiatt_pi32, _mm_qmiattn_pi32): Likewise. (_mm_wmiabb_si64, _mm_wmiabbn_si64, _mm_wmiabt_si64): Likewise. (_mm_wmiabtn_si64, _mm_wmiatb_si64, _mm_wmiatbn_si64): Likewise. (_mm_wmiatt_si64, _mm_wmiattn_si64, _mm_wmiawbb_si64): Likewise. (_mm_wmiawbbn_si64, _mm_wmiawbt_si64, _mm_wmiawbtn_si64): Likewise. (_mm_wmiawtb_si64, _mm_wmiawtbn_si64, _mm_wmiawtt_si64): Likewise. (_mm_wmiawttn_si64, _mm_merge_si64): Likewise. (_mm_torvscb, _mm_torvsch, _mm_torvscw): Likewise. (_m_to_int): New define. Thanks, Xinyu 2_mmintrin.diff Description: 2_mmintrin.diff
RE: PING: [PATCH, ARM, iWMMXt][2/5]: intrinsic head file change
Ping http://gcc.gnu.org/ml/gcc-patches/2011-08/msg01963.html * config/arm/mmintrin.h: Revise.
RE: PING: [PATCH, ARM, iWMMXt][2/5]: intrinsic head file change
Ping
http://gcc.gnu.org/ml/gcc-patches/2011-08/msg01963.html
* config/arm/mmintrin.h: Revise.
At 2011-08-24 16:14:30,"Xinyu Qi" wrote:
> At 2011-08-18 09:33:27,"Ramana Radhakrishnan"
> wrote:
> > On 6 July 2011 11:11, Xinyu Qi wrote:
> > > Hi,
> > >
> > > It is the second part of iWMMXt maintenance.
> > >
> > > *config/arm/mmintrin.h:
> > > Revise the iWMMXt intrinsics head file. Fix some intrinsics and add some
> > new intrinsics
> >
> > Is there a document somewhere that lists these intrinsics and what
> > each of these are supposed to be doing ? Missing details again . We
> > seem to be changing quite a few things.
>
> Hi,
> The intrinsic_doc.txt is attached. It is the piece of iWMMXt intrinsic details
> doc picked out from "Intel Wireless MMX Technology Intrinsic Support" with
> some
> modification.
>
> > > +
> > > +/* We will treat __int64 as a long long type
> > > +and __m64 as an unsigned long long type to conform to VSC++. */Is
> > > +typedef unsigned long long __m64;
> > > +typedef long long __int64;
> >
> > Interesting this sort of a change with these cases where you are
> > changing the type to conform to VSC++ ? This just means old code that
> > uses this is pretty much broken. Not that I have much hope of that
> > happening by default - -flax-conversions appears to be needed even
> > with a trunk compiler.
>
> I couldn't find any material to show why __int64 needs to be redefined. And
> all the tests are passed without this change. So decide to discard this
> change.
>
> >
> > > @@ -54,7 +63,7 @@ _mm_cvtsi64_si32 (__int64 __i)
> > > static __inline __int64
> > > _mm_cvtsi32_si64 (int __i)
> > > {
> > > - return __i;
> > > + return (__i & 0x);
> > > }
> >
> > Eh ? why the & 0x before promotion rules. Is this set of
> > intrinsics documented some place ? What is missing and could be the
> > subject of a follow-up patch is a set of tests for the wMMX intrinsics
> >
>
> See the intrinsics doc. It says the description of _mm_cvtsi32_si64 is "The
> integer value is zero-extended to 64 bits.
> If r = _mm_cvtsi32_si64(i), then the action is
> r [0:31] = i;
> r[32:63] = 0;"
>
> >
> > What's the behaviour of wandn supposed to be ? Does wandn x, y, z
> > imply x = y & ~z or x = ~y & z ? If the former then your intrinsic
> > expansion is wrong unless the meaning of this has changed ? Whats the
> > behaviour of the intrinsic __mm_and_not_si64 . ?
>
> The description of _mm_andnot_si64 is "Performs a logical NOT on the 64-bit
> value in m1 and use the result in a bitwise AND with the 64-bit value in m2."
> And, "wandn wRd, wRn, wRm" means "wRd = wRn & ~wRm"
> I think __builtin_arm_wandn had better directly match the behavior of wandn.
> Therefore, match _mm_andnot_si64 (m1, m2) to __builtin_arm_wandn (m2, m1).
>
>
>
> > @@ -985,44 +1004,83 @@ _mm_setzero_si64 (void)
> > static __inline void
> > _mm_setwcx (const int __value, const int __regno)
> > {
> > > + /*Since gcc has the imformation of all wcgr regs
> > > +in arm backend, use builtin to access them instead
> > > +of throw asm directly. Thus, gcc could do some
> > > +optimization on them. */
> > > +
> >
> > Also this comment is contradictory to what follows in the patch .
> > You've prima-facie replaced them with bits of inline assembler. I'm
> > not sure this comment makes a lot of sense on its own.
>
> Sorry. This comment should be removed.
>
> The modified diff is attached.
>
> Thanks,
> Xinyu
>
Re: [PATCH, ARM, iWMMXt][2/5]: intrinsic head file change
On 6 July 2011 11:11, Xinyu Qi wrote:
> Hi,
>
> It is the second part of iWMMXt maintenance.
>
> *config/arm/mmintrin.h:
> Revise the iWMMXt intrinsics head file. Fix some intrinsics and add some new
> intrinsics
Is there a document somewhere that lists these intrinsics and what
each of these are supposed to be doing ? Missing details again . We
seem to be changing quite a few things.
> +
> +/* We will treat __int64 as a long long type
> +and __m64 as an unsigned long long type to conform to VSC++. */Is
> +typedef unsigned long long __m64;
> +typedef long long __int64;
Interesting this sort of a change with these cases where you are
changing the type to conform to VSC++ ? This just means old code that
uses this is pretty much broken. Not that I have much hope of that
happening by default - -flax-conversions appears to be needed even
with a trunk compiler.
> @@ -54,7 +63,7 @@ _mm_cvtsi64_si32 (__int64 __i)
> static __inline __int64
> _mm_cvtsi32_si64 (int __i)
> {
> - return __i;
> + return (__i & 0x);
> }
Eh ? why the & 0x before promotion rules. Is this set of
intrinsics documented some place ? What is missing and could be the
subject of a follow-up patch is a set of tests for the wMMX intrinsics
What's the behaviour of wandn supposed to be ? Does wandn x, y, z
imply x = y & ~z or x = ~y & z ? If the former then your intrinsic
expansion is wrong unless the meaning of this has changed ? Whats the
behaviour of the intrinsic __mm_and_not_si64 . ?
@@ -985,44 +1004,83 @@ _mm_setzero_si64 (void)
static __inline void
_mm_setwcx (const int __value, const int __regno)
{
> + /*Since gcc has the imformation of all wcgr regs
> +in arm backend, use builtin to access them instead
> +of throw asm directly. Thus, gcc could do some
> +optimization on them. */
> +
Also this comment is contradictory to what follows in the patch .
You've prima-facie replaced them with bits of inline assembler. I'm
not sure this comment makes a lot of sense on its own.
Ramana
RE: PING: [PATCH, ARM, iWMMXt][2/5]: intrinsic head file change
Ping. http://gcc.gnu.org/ml/gcc-patches/2011-07/msg01101.html At 2011-07-14 15:38:04,"Xinyu Qi" wrote: > > Hi, > > > > It is the second part of iWMMXt maintenance. > > > *config/arm/mmintrin.h: Revise. > > Thanks, > Xinyu
RE: [PATCH, ARM, iWMMXt][2/5]: intrinsic head file change
> > Hi, > > It is the second part of iWMMXt maintenance. *config/arm/mmintrin.h: Revise. Thanks, Xinyu 2_mmintrin.diff Description: 2_mmintrin.diff
[PATCH, ARM, iWMMXt][2/5]: intrinsic head file change
Hi, It is the second part of iWMMXt maintenance. *config/arm/mmintrin.h: Revise the iWMMXt intrinsics head file. Fix some intrinsics and add some new intrinsics. Thanks, Xinyu 2_mmintrin.diff Description: 2_mmintrin.diff
