Re: [PATCH, i386][Updated] Add native support for VIA C7, Eden and Nano CPUs

2016-06-16 Thread Uros Bizjak
On Thu, Jun 16, 2016 at 11:12 AM, J. Mayer  wrote:
> The following patch adds support and native detection for C7, Eden
> "Samuel2", Eden "Nehemiah", Eden "Esther", Eden x2, Eden x4, Nano 1xxx,
> Nano 2xxx, Nano 3xxx, Nano x2 and Nano x4 VIA CPUs.
>
> This patch has been updated against current repository.
> It contains documentation and Changelog updates.
>
> Please CC me to any comment / review / change request.

The patch is OK, modulo redundant

: Pass c7, nehemiah or samuel-2 for signature_CENTAUR_ebx.

The  should not be reached for new processors. This part is a
safety net, intended for "strange" targets - emulators, prehistoric
parts or simply for the cases where the precise details shouldn't
matter.

Attached is the patch I have committed to SVN repository.

2016-06-16  Jocelyn Mayer  

* config/i386/driver-i386.c (host_detect_local_cpu): Set
PROCESSOR_K8 for signature_CENTAUR_ebx with has_longmode.
: Pass nano-3000, nano, eden-x2 or k8 for
signature_CENTAUR_ebx.
* config/i386/i386.c (ix86_option_override_internal): Add
definitions for VIA c7, samuel-2, nehemiah, esther, eden-x2, eden-x4,
nano, nano-1000, nano-2000, nano-3000, nano-x2 and nano-x4.
* doc/invoke.texi: Document new VIA -march entries.

Bootstrapped and regression tested on x86_64-linux-gnu {,-m32},
committed to mainline.

BTW: Can you please prepare an entry for the release notes (something
like [1]) mentioning new options? (Release notes are not yet present
for 7.0 development branch, so there is quite some time available ;) )

[1] https://gcc.gnu.org/gcc-6/changes.html

Uros.
Index: config/i386/driver-i386.c
===
--- config/i386/driver-i386.c   (revision 237528)
+++ config/i386/driver-i386.c   (working copy)
@@ -651,7 +651,9 @@
  break;
 
case 6:
- if (model > 9 || has_longmode)
+ if (has_longmode)
+   processor = PROCESSOR_K8;
+ else if (model > 9)
/* Use the default detection procedure.  */
;
  else if (model == 9)
@@ -869,9 +871,30 @@
cpu = "athlon";
   break;
 case PROCESSOR_K8:
-  if (arch && has_sse3)
-   cpu = "k8-sse3";
+  if (arch)
+   {
+ if (vendor == signature_CENTAUR_ebx)
+   {
+ if (has_sse4_1)
+   /* Nano 3000 | Nano dual / quad core | Eden X4 */
+   cpu = "nano-3000";
+ else if (has_ssse3)
+   /* Nano 1000 | Nano 2000 */
+   cpu = "nano";
+ else if (has_sse3)
+   /* Eden X2 */
+   cpu = "eden-x2";
+ else
+   /* Default to k8 */
+   cpu = "k8";
+   }
+ else if (has_sse3)
+   cpu = "k8-sse3";
+ else
+   cpu = "k8";
+   }
   else
+   /* For -mtune, we default to -mtune=k8 */
cpu = "k8";
   break;
 case PROCESSOR_AMDFAM10:
Index: config/i386/i386.c
===
--- config/i386/i386.c  (revision 237528)
+++ config/i386/i386.c  (working copy)
@@ -4783,8 +4783,15 @@
   {"winchip-c6", PROCESSOR_I486, CPU_NONE, PTA_MMX},
   {"winchip2", PROCESSOR_I486, CPU_NONE, PTA_MMX | PTA_3DNOW | PTA_PRFCHW},
   {"c3", PROCESSOR_I486, CPU_NONE, PTA_MMX | PTA_3DNOW | PTA_PRFCHW},
+  {"samuel-2", PROCESSOR_I486, CPU_NONE, PTA_MMX | PTA_3DNOW | PTA_PRFCHW},
   {"c3-2", PROCESSOR_PENTIUMPRO, CPU_PENTIUMPRO,
PTA_MMX | PTA_SSE | PTA_FXSR},
+  {"nehemiah", PROCESSOR_PENTIUMPRO, CPU_PENTIUMPRO,
+PTA_MMX | PTA_SSE | PTA_FXSR},
+  {"c7", PROCESSOR_PENTIUMPRO, CPU_PENTIUMPRO,
+PTA_MMX | PTA_SSE | PTA_SSE2 | PTA_SSE3 | PTA_FXSR},
+  {"esther", PROCESSOR_PENTIUMPRO, CPU_PENTIUMPRO,
+PTA_MMX | PTA_SSE | PTA_SSE2 | PTA_SSE3 | PTA_FXSR},
   {"i686", PROCESSOR_PENTIUMPRO, CPU_PENTIUMPRO, 0},
   {"pentiumpro", PROCESSOR_PENTIUMPRO, CPU_PENTIUMPRO, 0},
   {"pentium2", PROCESSOR_PENTIUMPRO, CPU_PENTIUMPRO, PTA_MMX | PTA_FXSR},
@@ -4843,6 +4850,29 @@
PTA_MMX | PTA_3DNOW | PTA_3DNOW_A | PTA_SSE | PTA_PRFCHW | PTA_FXSR},
   {"x86-64", PROCESSOR_K8, CPU_K8,
PTA_64BIT | PTA_MMX | PTA_SSE | PTA_SSE2 | PTA_NO_SAHF | PTA_FXSR},
+  {"eden-x2", PROCESSOR_K8, CPU_K8,
+PTA_64BIT | PTA_MMX | PTA_SSE | PTA_SSE2 | PTA_SSE3 | PTA_FXSR},
+  {"nano", PROCESSOR_K8, CPU_K8,
+PTA_64BIT | PTA_MMX | PTA_SSE | PTA_SSE2 | PTA_SSE3
+| PTA_SSSE3 | PTA_FXSR},
+  {"nano-1000", PROCESSOR_K8, CPU_K8,
+PTA_64BIT | PTA_MMX | PTA_SSE | PTA_SSE2 | PTA_SSE3
+| PTA_SSSE3 | PTA_FXSR},
+  {"nano-2000", PROCESSOR_K8, CPU_K8,
+PTA_64BIT | PTA_MMX | PTA_SSE | PTA_SSE2 | PTA_SSE3
+| PTA_SSSE3 | PTA_FXSR},
+  {"nano-3000", PROCESSOR_K8, CPU_K8,
+PTA_64BIT | PTA_MMX | PTA_SSE | PTA_SSE2 | PTA_SSE3
+| PTA_SSSE3 | PTA_SSE4_1 | PTA_FXSR},

[PATCH, i386][Updated] Add native support for VIA C7, Eden and Nano CPUs

2016-06-16 Thread J. Mayer
The following patch adds support and native detection for C7, Eden
"Samuel2", Eden "Nehemiah", Eden "Esther", Eden x2, Eden x4, Nano 1xxx,
Nano 2xxx, Nano 3xxx, Nano x2 and Nano x4 VIA CPUs.

This patch has been updated against current repository.
It contains documentation and Changelog updates.

Please CC me to any comment / review / change request.

---

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 2650405..05b450a 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,15 @@
+2016-06-16  Jocelyn Mayer 
+
+   * gcc/config/i386/driver-i386.c (host_detect_local_cpu): Set
+   PROCESSOR_K8 for signature_CENTAUR_ebx with has_longmode.
+   : Pass nano-3000, nano, eden-x2 or k8 for
+   signature_CENTAUR_ebx.
+   : Pass c7, nehemiah or samuel-2 for
signature_CENTAUR_ebx.
+   * gcc/config/i386/i386.c (ix86_option_override_internal): Add
+   definitions for VIA c7, samuel-2, nehemiah, esther, eden-x2,
eden-x4,
+   nano, nano-1000, nano-2000, nano-3000, nano-x2 and nano-x4.
+   * gcc/doc/invoke.texi: Document new VIA -march entries.
+
 2016-06-15  Michael Meissner  
 
* config/rs6000/vsx.md (VSINT_84): Add DImode to enable loading
diff --git a/gcc/config/i386/driver-i386.c b/gcc/config/i386/driver-
i386.c
index a9d5135..d2c4c4c 100644
--- a/gcc/config/i386/driver-i386.c
+++ b/gcc/config/i386/driver-i386.c
@@ -651,7 +651,9 @@ const char *host_detect_local_cpu (int argc, const
char **argv)
  break;
 
case 6:
- if (model > 9 || has_longmode)
+ if (has_longmode)
+   processor = PROCESSOR_K8;
+ else if (model > 9)
/* Use the default detection procedure.  */
;
  else if (model == 9)
@@ -869,9 +871,30 @@ const char *host_detect_local_cpu (int argc, const
char **argv)
cpu = "athlon";
   break;
 case PROCESSOR_K8:
-  if (arch && has_sse3)
-   cpu = "k8-sse3";
+  if (arch)
+   {
+ if (vendor == signature_CENTAUR_ebx)
+   {
+ if (has_sse4_1)
+   /* Nano 3000 | Nano dual / quad core | Eden X4 */
+   cpu = "nano-3000";
+ else if (has_ssse3)
+   /* Nano 1000 | Nano 2000 */
+   cpu = "nano";
+ else if (has_sse3)
+   /* Eden X2 */
+   cpu = "eden-x2";
+ else
+   /* Default to k8 */
+   cpu = "k8";
+   }
+ else if (has_sse3)
+   cpu = "k8-sse3";
+ else
+   cpu = "k8";
+   }
   else
+   /* For -mtune, we default to -mtune=k8 */
cpu = "k8";
   break;
 case PROCESSOR_AMDFAM10:
@@ -903,7 +926,22 @@ const char *host_detect_local_cpu (int argc, const
char **argv)
   /* Use something reasonable.  */
   if (arch)
{
- if (has_ssse3)
+ if (vendor == signature_CENTAUR_ebx)
+   {
+ if (has_sse3) {
+   /* C7 / Eden "Esther" */
+   cpu = "c7";
+ } else if (has_sse) {
+   /* Eden "Nehemiah" */
+   cpu = "nehemiah";
+ } else if (has_3dnow) {
+   /* Eden "Samuel2" */
+   cpu = "samuel-2";
+ } else {
+   /* We have no idea: default to generic i386 */
+ }
+   }
+ else if (has_ssse3)
cpu = "core2";
  else if (has_sse3)
{
diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c
index c5e5e12..3c88912 100644
--- a/gcc/config/i386/i386.c
+++ b/gcc/config/i386/i386.c
@@ -4783,8 +4783,15 @@ ix86_option_override_internal (bool main_args_p,
   {"winchip-c6", PROCESSOR_I486, CPU_NONE, PTA_MMX},
   {"winchip2", PROCESSOR_I486, CPU_NONE, PTA_MMX | PTA_3DNOW |
PTA_PRFCHW},
   {"c3", PROCESSOR_I486, CPU_NONE, PTA_MMX | PTA_3DNOW |
PTA_PRFCHW},
+  {"samuel-2", PROCESSOR_I486, CPU_NONE, PTA_MMX | PTA_3DNOW |
PTA_PRFCHW},
   {"c3-2", PROCESSOR_PENTIUMPRO, CPU_PENTIUMPRO,
PTA_MMX | PTA_SSE | PTA_FXSR},
+  {"nehemiah", PROCESSOR_PENTIUMPRO, CPU_PENTIUMPRO,
+   PTA_MMX | PTA_SSE | PTA_FXSR},
+  {"c7", PROCESSOR_PENTIUMPRO, CPU_PENTIUMPRO,
+   PTA_MMX | PTA_SSE | PTA_SSE2 | PTA_SSE3 | PTA_FXSR},
+  {"esther", PROCESSOR_PENTIUMPRO, CPU_PENTIUMPRO,
+   PTA_MMX | PTA_SSE | PTA_SSE2 | PTA_SSE3 | PTA_FXSR},
   {"i686", PROCESSOR_PENTIUMPRO, CPU_PENTIUMPRO, 0},
   {"pentiumpro", PROCESSOR_PENTIUMPRO, CPU_PENTIUMPRO, 0},
   {"pentium2", PROCESSOR_PENTIUMPRO, CPU_PENTIUMPRO, PTA_MMX |
PTA_FXSR},
@@ -4915,6 +4922,30 @@ ix86_option_override_internal (bool main_args_p,
| PTA_SSE4_2 | PTA_AES | PTA_PCLMUL | PTA_AVX
| PTA_BMI | PTA_F16C | PTA_MOVBE | PTA_PRFCHW
| PTA_FXSR | PTA_XSAVE | PTA_XSAVEOPT},
+  {"eden-x2", PROCESSOR_K8, CPU_K8,
+   PTA_64BIT | PTA_MMX | PTA_SSE | PTA_SSE2 | PTA_SSE3
+| PTA_FXSR},
+  {"eden-x4", PROCESSOR_K8, CPU_K8,
+   PTA_64BIT | P

[PATCH, i386][updated] Add native support for VIA C7, Eden and Nano CPUs

2016-06-14 Thread J. Mayer
The following patch adds support and native detection for C7, Eden
"Samuel2", Eden "Nehemiah", Eden "Esther", Eden x2, Eden x4, Nano 1xxx,
Nano 2xxx, Nano 3xxx, Nano x2 and Nano x4 VIA CPUs.

Please CC me to any comment / review / change request.

---

diff --git a/gcc/config/i386/driver-i386.c b/gcc/config/i386/driver-
i386.c
index a9d5135..d2c4c4c 100644
--- a/gcc/config/i386/driver-i386.c
+++ b/gcc/config/i386/driver-i386.c
@@ -651,7 +651,9 @@ const char *host_detect_local_cpu (int argc, const
char **argv)
  break;
 
case 6:
- if (model > 9 || has_longmode)
+ if (has_longmode)
+   processor = PROCESSOR_K8;
+ else if (model > 9)
/* Use the default detection procedure.  */
;
  else if (model == 9)
@@ -869,9 +871,30 @@ const char *host_detect_local_cpu (int argc, const
char **argv)
cpu = "athlon";
   break;
 case PROCESSOR_K8:
-  if (arch && has_sse3)
-   cpu = "k8-sse3";
+  if (arch)
+   {
+ if (vendor == signature_CENTAUR_ebx)
+   {
+ if (has_sse4_1)
+   /* Nano 3000 | Nano dual / quad core | Eden X4 */
+   cpu = "nano-3000";
+ else if (has_ssse3)
+   /* Nano 1000 | Nano 2000 */
+   cpu = "nano";
+ else if (has_sse3)
+   /* Eden X2 */
+   cpu = "eden-x2";
+ else
+   /* Default to k8 */
+   cpu = "k8";
+   }
+ else if (has_sse3)
+   cpu = "k8-sse3";
+ else
+   cpu = "k8";
+   }
   else
+   /* For -mtune, we default to -mtune=k8 */
cpu = "k8";
   break;
 case PROCESSOR_AMDFAM10:
@@ -903,7 +926,22 @@ const char *host_detect_local_cpu (int argc, const
char **argv)
   /* Use something reasonable.  */
   if (arch)
{
- if (has_ssse3)
+ if (vendor == signature_CENTAUR_ebx)
+   {
+ if (has_sse3) {
+   /* C7 / Eden "Esther" */
+   cpu = "c7";
+ } else if (has_sse) {
+   /* Eden "Nehemiah" */
+   cpu = "nehemiah";
+ } else if (has_3dnow) {
+   /* Eden "Samuel2" */
+   cpu = "samuel-2";
+ } else {
+   /* We have no idea: default to generic i386 */
+ }
+   }
+ else if (has_ssse3)
cpu = "core2";
  else if (has_sse3)
{
diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c
index c5e5e12..3c88912 100644
--- a/gcc/config/i386/i386.c
+++ b/gcc/config/i386/i386.c
@@ -4783,8 +4783,15 @@ ix86_option_override_internal (bool main_args_p,
   {"winchip-c6", PROCESSOR_I486, CPU_NONE, PTA_MMX},
   {"winchip2", PROCESSOR_I486, CPU_NONE, PTA_MMX | PTA_3DNOW |
PTA_PRFCHW},
   {"c3", PROCESSOR_I486, CPU_NONE, PTA_MMX | PTA_3DNOW |
PTA_PRFCHW},
+  {"samuel-2", PROCESSOR_I486, CPU_NONE, PTA_MMX | PTA_3DNOW |
PTA_PRFCHW},
   {"c3-2", PROCESSOR_PENTIUMPRO, CPU_PENTIUMPRO,
PTA_MMX | PTA_SSE | PTA_FXSR},
+  {"nehemiah", PROCESSOR_PENTIUMPRO, CPU_PENTIUMPRO,
+   PTA_MMX | PTA_SSE | PTA_FXSR},
+  {"c7", PROCESSOR_PENTIUMPRO, CPU_PENTIUMPRO,
+   PTA_MMX | PTA_SSE | PTA_SSE2 | PTA_SSE3 | PTA_FXSR},
+  {"esther", PROCESSOR_PENTIUMPRO, CPU_PENTIUMPRO,
+   PTA_MMX | PTA_SSE | PTA_SSE2 | PTA_SSE3 | PTA_FXSR},
   {"i686", PROCESSOR_PENTIUMPRO, CPU_PENTIUMPRO, 0},
   {"pentiumpro", PROCESSOR_PENTIUMPRO, CPU_PENTIUMPRO, 0},
   {"pentium2", PROCESSOR_PENTIUMPRO, CPU_PENTIUMPRO, PTA_MMX |
PTA_FXSR},
@@ -4915,6 +4922,30 @@ ix86_option_override_internal (bool main_args_p,
| PTA_SSE4_2 | PTA_AES | PTA_PCLMUL | PTA_AVX
| PTA_BMI | PTA_F16C | PTA_MOVBE | PTA_PRFCHW
| PTA_FXSR | PTA_XSAVE | PTA_XSAVEOPT},
+  {"eden-x2", PROCESSOR_K8, CPU_K8,
+   PTA_64BIT | PTA_MMX | PTA_SSE | PTA_SSE2 | PTA_SSE3
+| PTA_FXSR},
+  {"eden-x4", PROCESSOR_K8, CPU_K8,
+   PTA_64BIT | PTA_MMX | PTA_SSE | PTA_SSE2 | PTA_SSE3
+| PTA_SSSE3 | PTA_SSE4_1 | PTA_FXSR},
+  {"nano", PROCESSOR_K8, CPU_K8,
+   PTA_64BIT | PTA_MMX | PTA_SSE | PTA_SSE2 | PTA_SSE3
+| PTA_SSSE3 | PTA_FXSR},
+  {"nano-1000", PROCESSOR_K8, CPU_K8,
+   PTA_64BIT | PTA_MMX | PTA_SSE | PTA_SSE2 | PTA_SSE3
+| PTA_SSSE3 | PTA_FXSR},
+  {"nano-2000", PROCESSOR_K8, CPU_K8,
+   PTA_64BIT | PTA_MMX | PTA_SSE | PTA_SSE2 | PTA_SSE3
+| PTA_SSSE3 | PTA_FXSR},
+  {"nano-3000", PROCESSOR_K8, CPU_K8,
+   PTA_64BIT | PTA_MMX | PTA_SSE | PTA_SSE2 | PTA_SSE3
+| PTA_SSSE3 | PTA_SSE4_1 | PTA_FXSR},
+  {"nano-x2", PROCESSOR_K8, CPU_K8,
+   PTA_64BIT | PTA_MMX | PTA_SSE | PTA_SSE2 | PTA_SSE3
+| PTA_SSSE3 | PTA_SSE4_1 | PTA_FXSR},
+  {"nano-x4", PROCESSOR_K8, CPU_K8,
+   PTA_64BIT | PTA_MMX | PTA_SSE | PTA_SSE2 | PTA_SSE3
+| PTA_SSSE3 | PTA_SSE4_1 | PTA_FXSR},