Re: [PATCH, rs6000] Add support for __builtin_cpu_is() and __builtin_cpu_supports()

2016-01-20 Thread David Edelsohn 
On Thu, Jan 14, 2016 at 10:50 PM, Peter Bergner  wrote:
> This patch adds support for __builtin_cpu_init(), __builtin_cpu_is() and
> __builtin_cpu_supports() builtins for PowerPC.  We use the same API as the
> x86* builtins of the same name.  These builtins uses the new GLIBC 2.23
> feature where we store the AT_PLATFORM, AT_HWCAP and AT_HWCAP2 values in the
> Thread Control Block (TCB) which offers very fast access to these values.
>
> As part of the agreement with the GLIBC community, we always emit a reference
> to a special symbol exported by LIBCs that support the AT_PLATFORM/AT_HWCAP*
> values in the TCB, whenever we expand one of the CPU builtins.  We do this
> so that we will never attempt to access the TCB on old LIBCs.  Joseph also
> asked that we conditionalize the enabling of this code with a configure time
> check for GLIBC's version and that is included here.
>
> I'll note that since GLIBC initializes the TCB before the application gets
> control, we don't actually need __builtin_cpu_init(), but we have implemented
> it anyway, to keep the same API as x86.  It's just our init expands to 
> nothing.
>
> This passes bootstrap and regtesting with no errors.  Ok for mainline?
>
> Peter
>
>
> gcc/
> * config/rs6000/ppc-auxv.h: New file.
> * config/rs6000/rs6000-builtin.def (cpu_init): Add new builtin.
> (cpu_is): Likewise.
> (cpu_supports): Likewise.
> * config/rs6000/rs6000.c: include "ppc-auxv.h".
> (cpu_is_info): New variable.
> (cpu_supports_info): Likewise.
> (tcb_verification_symbol): Likewise.
> (cpu_builtin_p): Likewise.
> (cpu_expand_builtin): New function.
> (rs6000_expand_ternop_builtin): Add support for CPU builtin functions.
> (rs6000_init_builtins): Likewise.
> (rs6000_elf_file_end): Emit HWCAP in TCB verification symbol.
> * config/rs6000/rs6000.h (TLS_REGNUM): New define.
> * configure.ac (gcc_cv_libc_provides_hwcap_in_tcb): New test.
> * configure: Regenerate.
> * config.in: Likewise.
>
> gcc/testsuite/
> * gcc.target/powerpc/cpu-builtin-1.c: New test.

>* doc/extend.texi (PowerPC Built-in Functions): Document
 >   __builtin_cpu_init, __builtin_cpu_is and __builtin_cpu_supports.

This is okay.

Thanks, David

Re: [PATCH, rs6000] Add support for __builtin_cpu_is() and __builtin_cpu_supports()

2016-01-20 Thread Peter Bergner 
On Wed, 2016-01-20 at 15:15 -0500, David Edelsohn wrote:
> On Thu, Jan 14, 2016 at 10:50 PM, Peter Bergner  wrote:
> > gcc/
> > * config/rs6000/ppc-auxv.h: New file.
> > * config/rs6000/rs6000-builtin.def (cpu_init): Add new builtin.
> > (cpu_is): Likewise.
> > (cpu_supports): Likewise.
> > * config/rs6000/rs6000.c: include "ppc-auxv.h".
> > (cpu_is_info): New variable.
> > (cpu_supports_info): Likewise.
> > (tcb_verification_symbol): Likewise.
> > (cpu_builtin_p): Likewise.
> > (cpu_expand_builtin): New function.
> > (rs6000_expand_ternop_builtin): Add support for CPU builtin 
> > functions.
> > (rs6000_init_builtins): Likewise.
> > (rs6000_elf_file_end): Emit HWCAP in TCB verification symbol.
> > * config/rs6000/rs6000.h (TLS_REGNUM): New define.
> > * configure.ac (gcc_cv_libc_provides_hwcap_in_tcb): New test.
> > * configure: Regenerate.
> > * config.in: Likewise.
> > 
> > gcc/testsuite/
> > * gcc.target/powerpc/cpu-builtin-1.c: New test.
> 
> >* doc/extend.texi (PowerPC Built-in Functions): Document
> >   __builtin_cpu_init, __builtin_cpu_is and __builtin_cpu_supports.
> 
> This is okay.
> 

Thanks, committed as revision 232634.

Peter

Re: [PATCH, rs6000] Add support for __builtin_cpu_is() and __builtin_cpu_supports()

2016-01-15 Thread Peter Bergner 
On Thu, 2016-01-14 at 21:50 -0600, Peter Bergner wrote:
> This patch adds support for __builtin_cpu_init(), __builtin_cpu_is() and
> __builtin_cpu_supports() builtins for PowerPC.  We use the same API as the
> x86* builtins of the same name.  These builtins uses the new GLIBC 2.23
> feature where we store the AT_PLATFORM, AT_HWCAP and AT_HWCAP2 values in the
> Thread Control Block (TCB) which offers very fast access to these values.

Sorry, I forgot the documentation for the builtins.  Here they are.

Peter

* doc/extend.texi (PowerPC Built-in Functions): Document
__builtin_cpu_init, __builtin_cpu_is and __builtin_cpu_supports.

Index: gcc/doc/extend.texi
===
--- gcc/doc/extend.texi (revision 232359)
+++ gcc/doc/extend.texi (working copy)
@@ -13527,6 +13527,162 @@
 @node PowerPC Built-in Functions
 @subsection PowerPC Built-in Functions
 
+The following built-in functions are always available and can be used to
+check the PowerPC target platform type:
+
+@deftypefn {Built-in Function} void __builtin_cpu_init (void)
+This function is a @code{nop} on the PowerPC platform and is included solely
+to maintain API compatibility with the x86 builtins.
+@end deftypefn
+
+@deftypefn {Built-in Function} int __builtin_cpu_is (const char *@var{cpuname})
+This function returns a value of @code{1} if the run-time CPU is of type
+@var{cpuname} and returns @code{0} otherwise. The following CPU names can be
+detected:
+
+@table @samp
+@item power9
+IBM POWER9 Server CPU.
+@item power8
+IBM POWER8 Server CPU.
+@item power7
+IBM POWER7 Server CPU.
+@item power6x
+IBM POWER6 Server CPU (RAW mode).
+@item power6
+IBM POWER6 Server CPU (Architected mode).
+@item power5+
+IBM POWER5+ Server CPU.
+@item power5
+IBM POWER5 Server CPU.
+@item ppc970
+IBM 970 Server CPU (ie, Apple G5).
+@item power4
+IBM POWER4 Server CPU.
+@item ppca2
+IBM A2 64-bit Embedded CPU
+@item ppc476
+IBM PowerPC 476FP 32-bit Embedded CPU.
+@item ppc464
+IBM PowerPC 464 32-bit Embedded CPU.
+@item ppc440
+PowerPC 440 32-bit Embedded CPU.
+@item ppc405
+PowerPC 405 32-bit Embedded CPU.
+@item ppc-cell-be
+IBM PowerPC Cell Broadband Engine Architecture CPU.
+@end table
+
+Here is an example:
+@smallexample
+if (__builtin_cpu_is ("power8"))
+  @{
+ do_power8 (); // POWER8 specific implementation.
+  @}
+else
+  @{
+ do_generic (); // Generic implementation.
+  @}
+@end smallexample
+@end deftypefn
+
+@deftypefn {Built-in Function} int __builtin_cpu_supports (const char 
*@var{feature})
+This function returns a value of @code{1} if the run-time CPU supports the 
HWCAP
+feature @var{feature} and returns @code{0} otherwise. The following features 
can be
+detected:
+
+@table @samp
+@item 4xxmac
+4xx CPU has a Multiply Accumulator.
+@item altivec
+CPU has a SIMD/Vector Unit.
+@item arch_2_05
+CPU supports ISA 2.05 (eg, POWER6)
+@item arch_2_06
+CPU supports ISA 2.06 (eg, POWER7)
+@item arch_2_07
+CPU supports ISA 2.07 (eg, POWER8)
+@item arch_3_00
+CPU supports ISA 3.00 (eg, POWER9)
+@item archpmu
+CPU supports the set of compatible performance monitoring events.
+@item booke
+CPU supports the Embedded ISA category.
+@item cellbe
+CPU has a CELL broadband engine.
+@item dfp
+CPU has a decimal floating point unit.
+@item dscr
+CPU supports the data stream control register.
+@item ebb
+CPU supports event base branching.
+@item efpdouble
+CPU has a SPE double precision floating point unit.
+@item efpsingle
+CPU has a SPE single precision floating point unit.
+@item fpu
+CPU has a floating point unit.
+@item htm
+CPU has hardware transaction memory instructions.
+@item htm-nosc
+Kernel aborts hardware transactions when a syscall is made.
+@item ic_snoop
+CPU supports icache snooping capabilities.
+@item ieee128
+CPU supports 128-bit IEEE binary floating point instructions.
+@item isel
+CPU supports the integer select instruction.
+@item mmu
+CPU has a memory management unit.
+@item notb
+CPU does not have a timebase (eg, 601 and 403gx).
+@item pa6t
+CPU supports the PA Semi 6T CORE ISA.
+@item power4
+CPU supports ISA 2.00 (eg, POWER4)
+@item power5
+CPU supports ISA 2.02 (eg, POWER5)
+@item power5+
+CPU supports ISA 2.03 (eg, POWER5+)
+@item power6x
+CPU supports ISA 2.05 (eg, POWER6) extended opcodes mffgpr and mftgpr.
+@item ppc32
+CPU supports 32-bit mode execution.
+@item ppc601
+CPU supports the old POWER ISA (eg, 601)
+@item ppc64
+CPU supports 64-bit mode execution.
+@item ppcle
+CPU supports a little-endian mode that uses address swizzling.
+@item smt
+CPU support simultaneous multi-threading.
+@item spe
+CPU has a signal processing extension unit.
+@item tar
+CPU supports the target address register.
+@item true_le
+CPU supports true little-endian mode.
+@item ucache
+CPU has unified I/D cache.
+@item vcrypto
+CPU supports the vector cryptography instructions.
+@item vsx
+CPU supports the vector-scalar extension.
+@end table
+
+Here is an example:
+@smallexample
+if

[PATCH, rs6000] Add support for __builtin_cpu_is() and __builtin_cpu_supports()

2016-01-14 Thread Peter Bergner 
This patch adds support for __builtin_cpu_init(), __builtin_cpu_is() and
__builtin_cpu_supports() builtins for PowerPC.  We use the same API as the
x86* builtins of the same name.  These builtins uses the new GLIBC 2.23
feature where we store the AT_PLATFORM, AT_HWCAP and AT_HWCAP2 values in the
Thread Control Block (TCB) which offers very fast access to these values.

As part of the agreement with the GLIBC community, we always emit a reference
to a special symbol exported by LIBCs that support the AT_PLATFORM/AT_HWCAP*
values in the TCB, whenever we expand one of the CPU builtins.  We do this
so that we will never attempt to access the TCB on old LIBCs.  Joseph also
asked that we conditionalize the enabling of this code with a configure time
check for GLIBC's version and that is included here.

I'll note that since GLIBC initializes the TCB before the application gets
control, we don't actually need __builtin_cpu_init(), but we have implemented
it anyway, to keep the same API as x86.  It's just our init expands to nothing.

This passes bootstrap and regtesting with no errors.  Ok for mainline?

Peter


gcc/
* config/rs6000/ppc-auxv.h: New file.
* config/rs6000/rs6000-builtin.def (cpu_init): Add new builtin.
(cpu_is): Likewise.
(cpu_supports): Likewise.
* config/rs6000/rs6000.c: include "ppc-auxv.h".
(cpu_is_info): New variable.
(cpu_supports_info): Likewise.
(tcb_verification_symbol): Likewise.
(cpu_builtin_p): Likewise.
(cpu_expand_builtin): New function.
(rs6000_expand_ternop_builtin): Add support for CPU builtin functions.
(rs6000_init_builtins): Likewise.
(rs6000_elf_file_end): Emit HWCAP in TCB verification symbol.
* config/rs6000/rs6000.h (TLS_REGNUM): New define.
* configure.ac (gcc_cv_libc_provides_hwcap_in_tcb): New test.
* configure: Regenerate.
* config.in: Likewise.

gcc/testsuite/
* gcc.target/powerpc/cpu-builtin-1.c: New test.

Index: gcc/config/rs6000/ppc-auxv.h
===
--- gcc/config/rs6000/ppc-auxv.h(revision 0)
+++ gcc/config/rs6000/ppc-auxv.h(working copy)
@@ -0,0 +1,105 @@
+/* PowerPC support for accessing the AUXV AT_PLATFORM, AT_HWCAP and AT_HWCAP2
+   values from the Thread Control Block (TCB).
+
+   Copyright (C) 2016 Free Software Foundation, Inc.
+   Contributed by Peter Bergner .
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   .  */
+
+#ifndef _PPC_AUXV_H
+#define _PPC_AUXV_H
+
+/* The PLATFORM value stored in the TCB is offset by _DL_FIRST_PLATFORM.  */
+#define _DL_FIRST_PLATFORM 32
+
+/* AT_PLATFORM bits.  These must match the values defined in GLIBC. */
+#define PPC_PLATFORM_POWER40
+#define PPC_PLATFORM_PPC9701
+#define PPC_PLATFORM_POWER52
+#define PPC_PLATFORM_POWER5_PLUS   3
+#define PPC_PLATFORM_POWER64
+#define PPC_PLATFORM_CELL_BE   5
+#define PPC_PLATFORM_POWER6X   6
+#define PPC_PLATFORM_POWER77
+#define PPC_PLATFORM_PPCA2 8
+#define PPC_PLATFORM_PPC4059
+#define PPC_PLATFORM_PPC44010
+#define PPC_PLATFORM_PPC46411
+#define PPC_PLATFORM_PPC47612
+#define PPC_PLATFORM_POWER813
+#define PPC_PLATFORM_POWER914
+
+/* AT_HWCAP bits.  These must match the values defined in the Linux kernel.  */
+#define PPC_FEATURE_32  0x8000
+#define PPC_FEATURE_64  0x4000
+#define PPC_FEATURE_601_INSTR   0x2000
+#define PPC_FEATURE_HAS_ALTIVEC 0x1000
+#define PPC_FEATURE_HAS_FPU 0x0800
+#define PPC_FEATURE_HAS_MMU 0x0400
+#define PPC_FEATURE_HAS_4xxMAC  0x0200
+#define PPC_FEATURE_UNIFIED_CACHE   0x0100
+#define PPC_FEATURE_HAS_SPE 0x0080
+#define PPC_FEATURE_HAS_EFP_SINGLE  0x0040
+#define PPC_FEATURE_HAS_EFP_DOUBLE  0x0020
+#define PPC_FEATURE_NO_TB   0x0010