This patch to rs6000.md (which is essentially the same as #3) fixes the problem
by removing the early clobber. The patches to predicates.md, and the fusion
tests revert my changes on February 9th that originally 'solved' the problem by
not allowing fusion of ADDI values. We have tested the fix using a combine
profiled and LTO bootstrap build and it does not cause any regressions.
Because machine independent changes can mask the bug at times, we also did a
profiled/LTO build on the subversion revision that showed up the problem. Is
this ok to install in the trunk?
Since gcc 5 contains the exact same early clobber, I would like to also back
port the change to GCC 5.
[gcc]
2016-02-18 Michael Meissner
PR target/68404
* config/rs6000/predicates.md (fusion_gpr_addis): Revert
2016-02-09 change.
* config/rs6000/rs6000.md (fusion_gpr_load_): Remove
earlyclobber from target. Use wF constraint for fused memory
address.
(fusion_gpr___load): Likewise.
[gcc/testsuites]
2016-02-18 Michael Meissner
PR target/68404
* gcc.target/powerpc/fusion.c: Revert the 2016-02-09 change.
* gcc.target/powerpc/fusion3.c: Likewise.
--
Michael Meissner, IBM
IBM, M/S 2506R, 550 King Street, Littleton, MA 01460-6245, USA
email: meiss...@linux.vnet.ibm.com, phone: +1 (978) 899-4797
Index: gcc/config/rs6000/predicates.md
===
--- gcc/config/rs6000/predicates.md (revision 233351)
+++ gcc/config/rs6000/predicates.md (working copy)
@@ -1708,14 +1708,23 @@ (define_predicate "fusion_gpr_addis"
(match_code "const_int,high,plus")
{
HOST_WIDE_INT value;
+ rtx int_const;
if (GET_CODE (op) == HIGH)
return 1;
- if (!CONST_INT_P (op))
+ if (CONST_INT_P (op))
+int_const = op;
+
+ else if (GET_CODE (op) == PLUS
+ && base_reg_operand (XEXP (op, 0), Pmode)
+ && CONST_INT_P (XEXP (op, 1)))
+int_const = XEXP (op, 1);
+
+ else
return 0;
- value = INTVAL (op);
+ value = INTVAL (int_const);
if ((value & (HOST_WIDE_INT)0x) != 0)
return 0;
Index: gcc/config/rs6000/rs6000.md
===
--- gcc/config/rs6000/rs6000.md (revision 233351)
+++ gcc/config/rs6000/rs6000.md (working copy)
@@ -12915,8 +12915,8 @@ (define_peephole2
;; reload)
(define_insn "fusion_gpr_load_"
- [(set (match_operand:INT1 0 "base_reg_operand" "=")
- (unspec:INT1 [(match_operand:INT1 1 "fusion_addis_mem_combo_load" "")]
+ [(set (match_operand:INT1 0 "base_reg_operand" "=b")
+ (unspec:INT1 [(match_operand:INT1 1 "fusion_addis_mem_combo_load" "wF")]
UNSPEC_FUSION_GPR))]
"TARGET_P8_FUSION"
{
@@ -12987,7 +12987,7 @@ (define_insn "fusion_gpr__