Re: [PATCH][AArch32] MVE: Split refactoring of remaining complex instrinsics
On Fri, 18 Dec 2020 at 17:20, Tamar Christina wrote: > > Hi Christoph, > > > -Original Message- > > From: Christophe Lyon > > Sent: Friday, December 18, 2020 2:22 PM > > To: Tamar Christina > > Cc: gcc Patches ; Richard Earnshaw > > ; nd ; Ramana Radhakrishnan > > > > Subject: Re: [PATCH][AArch32] MVE: Split refactoring of remaining complex > > instrinsics > > > > On Wed, 16 Dec 2020 at 21:43, Tamar Christina via Gcc-patches > patc...@gcc.gnu.org> wrote: > > > > > > Hi All, > > > > > > This refactors the complex numbers bits of MVE to go through the same > > > unspecs as the NEON variant. > > > > > > This is pre-work to allow code to be shared between NEON and MVE for > > > the complex vectorization patches. > > > > > > Bootstrapped Regtested on arm-none-linux-gnueabihf and no issues. > > > Codegen tested for -march=armv8.1-m.main+mve.fp -mfloat-abi=hard > > > -mfpu=auto and no issues. > > > > > > > Hi Tamar, > > > > This patch causes regressions for me: > > gcc.target/arm/mve/intrinsics/vcmulq_f16.c (test for excess errors) > > gcc.target/arm/mve/intrinsics/vcmulq_f32.c (test for excess errors) > > gcc.target/arm/mve/intrinsics/vcmulq_rot180_f16.c (test for excess > > errors) > > gcc.target/arm/mve/intrinsics/vcmulq_rot180_f32.c (test for excess > > errors) > > gcc.target/arm/mve/intrinsics/vcmulq_rot270_f16.c (test for excess > > errors) > > gcc.target/arm/mve/intrinsics/vcmulq_rot270_f32.c (test for excess > > errors) > > gcc.target/arm/mve/intrinsics/vcmulq_rot90_f16.c (test for excess > > errors) > > gcc.target/arm/mve/intrinsics/vcmulq_rot90_f32.c (test for excess > > errors) > > > > I can see: > > FAIL: gcc.target/arm/mve/intrinsics/vcmulq_f16.c (test for excess errors) > > Excess errors: > > vcmulq_f16.s:40: Warning: missing operand; zero assumed > > vcmulq_f16.s:61: Warning: missing operand; zero assumed > > > > I didn't check the code manually yet, and I am using binutils-2.34: > > has something > > related to this changed in more recent gas? > > No, A hunk didn't get committed. This should be fixed now. > Yeah, I saw your other patch, cool this was an easy fix! Thanks > Thanks, > Tamar > > > > > Thanks > > > > Christophe > > > > > This is just a splitting of a previously approved patch due to it > > > having a dependency on the AArch64 bits which have been requested to > > be reworked. > > > > > > Will commit under the previous approval. > > > > > > Thanks, > > > Tamar > > > > > > gcc/ChangeLog: > > > > > > * config/arm/arm_mve.h (__arm_vcmulq_rot90_f16): > > > (__arm_vcmulq_rot270_f16, _arm_vcmulq_rot180_f16, > > __arm_vcmulq_f16, > > > __arm_vcmulq_rot90_f32, __arm_vcmulq_rot270_f32, > > > __arm_vcmulq_rot180_f32, __arm_vcmulq_f32, __arm_vcmlaq_f16, > > > __arm_vcmlaq_rot180_f16, __arm_vcmlaq_rot270_f16, > > > __arm_vcmlaq_rot90_f16, __arm_vcmlaq_f32, > > __arm_vcmlaq_rot180_f32, > > > __arm_vcmlaq_rot270_f32, __arm_vcmlaq_rot90_f32): Update builtin > > calls. > > > * config/arm/arm_mve_builtins.def (vcmulq_f, vcmulq_rot90_f, > > > vcmulq_rot180_f, vcmulq_rot270_f, vcmlaq_f, vcmlaq_rot90_f, > > > vcmlaq_rot180_f, vcmlaq_rot270_f): Removed. > > > (vcmulq, vcmulq_rot90, vcmulq_rot180, vcmulq_rot270, vcmlaq, > > > vcmlaq_rot90, vcmlaq_rot180, vcmlaq_rot270): New. > > > * config/arm/iterators.md (mve_rot): Add UNSPEC_VCMLA, > > UNSPEC_VCMLA90, > > > UNSPEC_VCMLA180, UNSPEC_VCMLA270, UNSPEC_VCMUL, > > UNSPEC_VCMUL90, > > > UNSPEC_VCMUL180, UNSPEC_VCMUL270. > > > (VCMUL): New. > > > * config/arm/mve.md (mve_vcmulq_f > mve_vcmulq_rot180_f, > > > mve_vcmulq_rot270_f, mve_vcmulq_rot90_f, > > mve_vcmlaq_f, > > > mve_vcmlaq_rot180_f, mve_vcmlaq_rot270_f, > > > mve_vcmlaq_rot90_f): Removed. > > > (mve_vcmlaq, mve_vcmulq, > > > mve_vcaddq, cadd3, > > mve_vcaddq): > > > New. > > > * config/arm/unspecs.md (UNSPEC_VCMUL90, UNSPEC_VCMUL270, > > UNSPEC_VCMUL, > > > UNSPEC_VCMUL180): New. > > > (VCMULQ_F, VCMULQ_ROT180_F, VCMULQ_ROT270_F, > > VCMULQ_ROT
RE: [PATCH][AArch32] MVE: Split refactoring of remaining complex instrinsics
Hi Christoph,
> -Original Message-
> From: Christophe Lyon
> Sent: Friday, December 18, 2020 2:22 PM
> To: Tamar Christina
> Cc: gcc Patches ; Richard Earnshaw
> ; nd ; Ramana Radhakrishnan
>
> Subject: Re: [PATCH][AArch32] MVE: Split refactoring of remaining complex
> instrinsics
>
> On Wed, 16 Dec 2020 at 21:43, Tamar Christina via Gcc-patches patc...@gcc.gnu.org> wrote:
> >
> > Hi All,
> >
> > This refactors the complex numbers bits of MVE to go through the same
> > unspecs as the NEON variant.
> >
> > This is pre-work to allow code to be shared between NEON and MVE for
> > the complex vectorization patches.
> >
> > Bootstrapped Regtested on arm-none-linux-gnueabihf and no issues.
> > Codegen tested for -march=armv8.1-m.main+mve.fp -mfloat-abi=hard
> > -mfpu=auto and no issues.
> >
>
> Hi Tamar,
>
> This patch causes regressions for me:
> gcc.target/arm/mve/intrinsics/vcmulq_f16.c (test for excess errors)
> gcc.target/arm/mve/intrinsics/vcmulq_f32.c (test for excess errors)
> gcc.target/arm/mve/intrinsics/vcmulq_rot180_f16.c (test for excess errors)
> gcc.target/arm/mve/intrinsics/vcmulq_rot180_f32.c (test for excess errors)
> gcc.target/arm/mve/intrinsics/vcmulq_rot270_f16.c (test for excess errors)
> gcc.target/arm/mve/intrinsics/vcmulq_rot270_f32.c (test for excess errors)
> gcc.target/arm/mve/intrinsics/vcmulq_rot90_f16.c (test for excess errors)
> gcc.target/arm/mve/intrinsics/vcmulq_rot90_f32.c (test for excess errors)
>
> I can see:
> FAIL: gcc.target/arm/mve/intrinsics/vcmulq_f16.c (test for excess errors)
> Excess errors:
> vcmulq_f16.s:40: Warning: missing operand; zero assumed
> vcmulq_f16.s:61: Warning: missing operand; zero assumed
>
> I didn't check the code manually yet, and I am using binutils-2.34:
> has something
> related to this changed in more recent gas?
No, A hunk didn't get committed. This should be fixed now.
Thanks,
Tamar
>
> Thanks
>
> Christophe
>
> > This is just a splitting of a previously approved patch due to it
> > having a dependency on the AArch64 bits which have been requested to
> be reworked.
> >
> > Will commit under the previous approval.
> >
> > Thanks,
> > Tamar
> >
> > gcc/ChangeLog:
> >
> > * config/arm/arm_mve.h (__arm_vcmulq_rot90_f16):
> > (__arm_vcmulq_rot270_f16, _arm_vcmulq_rot180_f16,
> __arm_vcmulq_f16,
> > __arm_vcmulq_rot90_f32, __arm_vcmulq_rot270_f32,
> > __arm_vcmulq_rot180_f32, __arm_vcmulq_f32, __arm_vcmlaq_f16,
> > __arm_vcmlaq_rot180_f16, __arm_vcmlaq_rot270_f16,
> > __arm_vcmlaq_rot90_f16, __arm_vcmlaq_f32,
> __arm_vcmlaq_rot180_f32,
> > __arm_vcmlaq_rot270_f32, __arm_vcmlaq_rot90_f32): Update builtin
> calls.
> > * config/arm/arm_mve_builtins.def (vcmulq_f, vcmulq_rot90_f,
> > vcmulq_rot180_f, vcmulq_rot270_f, vcmlaq_f, vcmlaq_rot90_f,
> > vcmlaq_rot180_f, vcmlaq_rot270_f): Removed.
> > (vcmulq, vcmulq_rot90, vcmulq_rot180, vcmulq_rot270, vcmlaq,
> > vcmlaq_rot90, vcmlaq_rot180, vcmlaq_rot270): New.
> > * config/arm/iterators.md (mve_rot): Add UNSPEC_VCMLA,
> UNSPEC_VCMLA90,
> > UNSPEC_VCMLA180, UNSPEC_VCMLA270, UNSPEC_VCMUL,
> UNSPEC_VCMUL90,
> > UNSPEC_VCMUL180, UNSPEC_VCMUL270.
> > (VCMUL): New.
> > * config/arm/mve.md (mve_vcmulq_f mve_vcmulq_rot180_f,
> > mve_vcmulq_rot270_f, mve_vcmulq_rot90_f,
> mve_vcmlaq_f,
> > mve_vcmlaq_rot180_f, mve_vcmlaq_rot270_f,
> > mve_vcmlaq_rot90_f): Removed.
> > (mve_vcmlaq, mve_vcmulq,
> > mve_vcaddq, cadd3,
> mve_vcaddq):
> > New.
> > * config/arm/unspecs.md (UNSPEC_VCMUL90, UNSPEC_VCMUL270,
> UNSPEC_VCMUL,
> > UNSPEC_VCMUL180): New.
> > (VCMULQ_F, VCMULQ_ROT180_F, VCMULQ_ROT270_F,
> VCMULQ_ROT90_F,
> > VCMLAQ_F, VCMLAQ_ROT180_F, VCMLAQ_ROT90_F,
> VCMLAQ_ROT270_F): Removed.
> >
> > --- inline copy of patch --
> > diff --git a/gcc/config/arm/arm_mve.h b/gcc/config/arm/arm_mve.h index
> >
> 987495dd234ad96ba1163a1f482fe183a46ff437..45014621f2533497e90ddf5257
> fb
> > 04e1fd9325b4 100644
> > --- a/gcc/config/arm/arm_mve.h
> > +++ b/gcc/config/arm/arm_mve.h
> > @@ -17348,28 +17348,28 @@ __extension__ extern __inline float16x8_t
> > __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
> > __arm_vcmulq_rot90_f16 (float16x8_t __a, float16x8_t __b) {
> > - return __builtin_mve_
RE: [PATCH][AArch32] MVE: Split refactoring of remaining complex instrinsics
Hi Christophe,
> -Original Message-
> From: Christophe Lyon
> Sent: Friday, December 18, 2020 2:22 PM
> To: Tamar Christina
> Cc: gcc Patches ; Richard Earnshaw
> ; nd ; Ramana Radhakrishnan
>
> Subject: Re: [PATCH][AArch32] MVE: Split refactoring of remaining complex
> instrinsics
>
> On Wed, 16 Dec 2020 at 21:43, Tamar Christina via Gcc-patches patc...@gcc.gnu.org> wrote:
> >
> > Hi All,
> >
> > This refactors the complex numbers bits of MVE to go through the same
> > unspecs as the NEON variant.
> >
> > This is pre-work to allow code to be shared between NEON and MVE for
> > the complex vectorization patches.
> >
> > Bootstrapped Regtested on arm-none-linux-gnueabihf and no issues.
> > Codegen tested for -march=armv8.1-m.main+mve.fp -mfloat-abi=hard
> > -mfpu=auto and no issues.
> >
>
> Hi Tamar,
>
> This patch causes regressions for me:
> gcc.target/arm/mve/intrinsics/vcmulq_f16.c (test for excess errors)
> gcc.target/arm/mve/intrinsics/vcmulq_f32.c (test for excess errors)
> gcc.target/arm/mve/intrinsics/vcmulq_rot180_f16.c (test for excess errors)
> gcc.target/arm/mve/intrinsics/vcmulq_rot180_f32.c (test for excess errors)
> gcc.target/arm/mve/intrinsics/vcmulq_rot270_f16.c (test for excess errors)
> gcc.target/arm/mve/intrinsics/vcmulq_rot270_f32.c (test for excess errors)
> gcc.target/arm/mve/intrinsics/vcmulq_rot90_f16.c (test for excess errors)
> gcc.target/arm/mve/intrinsics/vcmulq_rot90_f32.c (test for excess errors)
>
> I can see:
> FAIL: gcc.target/arm/mve/intrinsics/vcmulq_f16.c (test for excess errors)
> Excess errors:
> vcmulq_f16.s:40: Warning: missing operand; zero assumed
> vcmulq_f16.s:61: Warning: missing operand; zero assumed
That's quite odd.
I'll check it out thanks.
Regards,
Tamar
>
> I didn't check the code manually yet, and I am using binutils-2.34:
> has something
> related to this changed in more recent gas?
>
> Thanks
>
> Christophe
>
> > This is just a splitting of a previously approved patch due to it
> > having a dependency on the AArch64 bits which have been requested to
> be reworked.
> >
> > Will commit under the previous approval.
> >
> > Thanks,
> > Tamar
> >
> > gcc/ChangeLog:
> >
> > * config/arm/arm_mve.h (__arm_vcmulq_rot90_f16):
> > (__arm_vcmulq_rot270_f16, _arm_vcmulq_rot180_f16,
> __arm_vcmulq_f16,
> > __arm_vcmulq_rot90_f32, __arm_vcmulq_rot270_f32,
> > __arm_vcmulq_rot180_f32, __arm_vcmulq_f32, __arm_vcmlaq_f16,
> > __arm_vcmlaq_rot180_f16, __arm_vcmlaq_rot270_f16,
> > __arm_vcmlaq_rot90_f16, __arm_vcmlaq_f32,
> __arm_vcmlaq_rot180_f32,
> > __arm_vcmlaq_rot270_f32, __arm_vcmlaq_rot90_f32): Update builtin
> calls.
> > * config/arm/arm_mve_builtins.def (vcmulq_f, vcmulq_rot90_f,
> > vcmulq_rot180_f, vcmulq_rot270_f, vcmlaq_f, vcmlaq_rot90_f,
> > vcmlaq_rot180_f, vcmlaq_rot270_f): Removed.
> > (vcmulq, vcmulq_rot90, vcmulq_rot180, vcmulq_rot270, vcmlaq,
> > vcmlaq_rot90, vcmlaq_rot180, vcmlaq_rot270): New.
> > * config/arm/iterators.md (mve_rot): Add UNSPEC_VCMLA,
> UNSPEC_VCMLA90,
> > UNSPEC_VCMLA180, UNSPEC_VCMLA270, UNSPEC_VCMUL,
> UNSPEC_VCMUL90,
> > UNSPEC_VCMUL180, UNSPEC_VCMUL270.
> > (VCMUL): New.
> > * config/arm/mve.md (mve_vcmulq_f mve_vcmulq_rot180_f,
> > mve_vcmulq_rot270_f, mve_vcmulq_rot90_f,
> mve_vcmlaq_f,
> > mve_vcmlaq_rot180_f, mve_vcmlaq_rot270_f,
> > mve_vcmlaq_rot90_f): Removed.
> > (mve_vcmlaq, mve_vcmulq,
> > mve_vcaddq, cadd3,
> mve_vcaddq):
> > New.
> > * config/arm/unspecs.md (UNSPEC_VCMUL90, UNSPEC_VCMUL270,
> UNSPEC_VCMUL,
> > UNSPEC_VCMUL180): New.
> > (VCMULQ_F, VCMULQ_ROT180_F, VCMULQ_ROT270_F,
> VCMULQ_ROT90_F,
> > VCMLAQ_F, VCMLAQ_ROT180_F, VCMLAQ_ROT90_F,
> VCMLAQ_ROT270_F): Removed.
> >
> > --- inline copy of patch --
> > diff --git a/gcc/config/arm/arm_mve.h b/gcc/config/arm/arm_mve.h index
> >
> 987495dd234ad96ba1163a1f482fe183a46ff437..45014621f2533497e90ddf5257
> fb
> > 04e1fd9325b4 100644
> > --- a/gcc/config/arm/arm_mve.h
> > +++ b/gcc/config/arm/arm_mve.h
> > @@ -17348,28 +17348,28 @@ __extension__ extern __inline float16x8_t
> > __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
> > __arm_vcmulq_rot90_f16 (float16x8_t __a, float16x8_t __b) {
> > - return __builtin_mve_vcmulq_rot90_fv8hf (__a, _
Re: [PATCH][AArch32] MVE: Split refactoring of remaining complex instrinsics
On Wed, 16 Dec 2020 at 21:43, Tamar Christina via Gcc-patches
wrote:
>
> Hi All,
>
> This refactors the complex numbers bits of MVE to go through the same unspecs
> as the NEON variant.
>
> This is pre-work to allow code to be shared between NEON and MVE for the
> complex
> vectorization patches.
>
> Bootstrapped Regtested on arm-none-linux-gnueabihf and no issues.
> Codegen tested for -march=armv8.1-m.main+mve.fp -mfloat-abi=hard -mfpu=auto
> and no issues.
>
Hi Tamar,
This patch causes regressions for me:
gcc.target/arm/mve/intrinsics/vcmulq_f16.c (test for excess errors)
gcc.target/arm/mve/intrinsics/vcmulq_f32.c (test for excess errors)
gcc.target/arm/mve/intrinsics/vcmulq_rot180_f16.c (test for excess errors)
gcc.target/arm/mve/intrinsics/vcmulq_rot180_f32.c (test for excess errors)
gcc.target/arm/mve/intrinsics/vcmulq_rot270_f16.c (test for excess errors)
gcc.target/arm/mve/intrinsics/vcmulq_rot270_f32.c (test for excess errors)
gcc.target/arm/mve/intrinsics/vcmulq_rot90_f16.c (test for excess errors)
gcc.target/arm/mve/intrinsics/vcmulq_rot90_f32.c (test for excess errors)
I can see:
FAIL: gcc.target/arm/mve/intrinsics/vcmulq_f16.c (test for excess errors)
Excess errors:
vcmulq_f16.s:40: Warning: missing operand; zero assumed
vcmulq_f16.s:61: Warning: missing operand; zero assumed
I didn't check the code manually yet, and I am using binutils-2.34:
has something
related to this changed in more recent gas?
Thanks
Christophe
> This is just a splitting of a previously approved patch due to it having a
> dependency on the AArch64 bits which have been requested to be reworked.
>
> Will commit under the previous approval.
>
> Thanks,
> Tamar
>
> gcc/ChangeLog:
>
> * config/arm/arm_mve.h (__arm_vcmulq_rot90_f16):
> (__arm_vcmulq_rot270_f16, _arm_vcmulq_rot180_f16, __arm_vcmulq_f16,
> __arm_vcmulq_rot90_f32, __arm_vcmulq_rot270_f32,
> __arm_vcmulq_rot180_f32, __arm_vcmulq_f32, __arm_vcmlaq_f16,
> __arm_vcmlaq_rot180_f16, __arm_vcmlaq_rot270_f16,
> __arm_vcmlaq_rot90_f16, __arm_vcmlaq_f32, __arm_vcmlaq_rot180_f32,
> __arm_vcmlaq_rot270_f32, __arm_vcmlaq_rot90_f32): Update builtin
> calls.
> * config/arm/arm_mve_builtins.def (vcmulq_f, vcmulq_rot90_f,
> vcmulq_rot180_f, vcmulq_rot270_f, vcmlaq_f, vcmlaq_rot90_f,
> vcmlaq_rot180_f, vcmlaq_rot270_f): Removed.
> (vcmulq, vcmulq_rot90, vcmulq_rot180, vcmulq_rot270, vcmlaq,
> vcmlaq_rot90, vcmlaq_rot180, vcmlaq_rot270): New.
> * config/arm/iterators.md (mve_rot): Add UNSPEC_VCMLA, UNSPEC_VCMLA90,
> UNSPEC_VCMLA180, UNSPEC_VCMLA270, UNSPEC_VCMUL, UNSPEC_VCMUL90,
> UNSPEC_VCMUL180, UNSPEC_VCMUL270.
> (VCMUL): New.
> * config/arm/mve.md (mve_vcmulq_f,
> mve_vcmulq_rot270_f, mve_vcmulq_rot90_f,
> mve_vcmlaq_f,
> mve_vcmlaq_rot180_f, mve_vcmlaq_rot270_f,
> mve_vcmlaq_rot90_f): Removed.
> (mve_vcmlaq, mve_vcmulq,
> mve_vcaddq, cadd3,
> mve_vcaddq):
> New.
> * config/arm/unspecs.md (UNSPEC_VCMUL90, UNSPEC_VCMUL270,
> UNSPEC_VCMUL,
> UNSPEC_VCMUL180): New.
> (VCMULQ_F, VCMULQ_ROT180_F, VCMULQ_ROT270_F, VCMULQ_ROT90_F,
> VCMLAQ_F, VCMLAQ_ROT180_F, VCMLAQ_ROT90_F, VCMLAQ_ROT270_F): Removed.
>
> --- inline copy of patch --
> diff --git a/gcc/config/arm/arm_mve.h b/gcc/config/arm/arm_mve.h
> index
> 987495dd234ad96ba1163a1f482fe183a46ff437..45014621f2533497e90ddf5257fb04e1fd9325b4
> 100644
> --- a/gcc/config/arm/arm_mve.h
> +++ b/gcc/config/arm/arm_mve.h
> @@ -17348,28 +17348,28 @@ __extension__ extern __inline float16x8_t
> __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
> __arm_vcmulq_rot90_f16 (float16x8_t __a, float16x8_t __b)
> {
> - return __builtin_mve_vcmulq_rot90_fv8hf (__a, __b);
> + return __builtin_mve_vcmulq_rot90v8hf (__a, __b);
> }
>
> __extension__ extern __inline float16x8_t
> __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
> __arm_vcmulq_rot270_f16 (float16x8_t __a, float16x8_t __b)
> {
> - return __builtin_mve_vcmulq_rot270_fv8hf (__a, __b);
> + return __builtin_mve_vcmulq_rot270v8hf (__a, __b);
> }
>
> __extension__ extern __inline float16x8_t
> __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
> __arm_vcmulq_rot180_f16 (float16x8_t __a, float16x8_t __b)
> {
> - return __builtin_mve_vcmulq_rot180_fv8hf (__a, __b);
> + return __builtin_mve_vcmulq_rot180v8hf (__a, __b);
> }
>
> __extension__ extern __inline float16x8_t
> __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
> __arm_vcmulq_f16 (float16x8_t __a, float16x8_t __b)
> {
> - return __builtin_mve_vcmulq_fv8hf (__a, __b);
> + return __builtin_mve_vcmulqv8hf (__a, __b);
> }
>
> __extension__ extern __inline float16x8_t
> @@ -17600,28 +17600,28 @@ __extension__ extern __inline float32x4_t
> __attribute__ ((__always_inline__, __gnu_inline__, __art
[PATCH][AArch32] MVE: Split refactoring of remaining complex instrinsics
Hi All,
This refactors the complex numbers bits of MVE to go through the same unspecs
as the NEON variant.
This is pre-work to allow code to be shared between NEON and MVE for the complex
vectorization patches.
Bootstrapped Regtested on arm-none-linux-gnueabihf and no issues.
Codegen tested for -march=armv8.1-m.main+mve.fp -mfloat-abi=hard -mfpu=auto
and no issues.
This is just a splitting of a previously approved patch due to it having a
dependency on the AArch64 bits which have been requested to be reworked.
Will commit under the previous approval.
Thanks,
Tamar
gcc/ChangeLog:
* config/arm/arm_mve.h (__arm_vcmulq_rot90_f16):
(__arm_vcmulq_rot270_f16, _arm_vcmulq_rot180_f16, __arm_vcmulq_f16,
__arm_vcmulq_rot90_f32, __arm_vcmulq_rot270_f32,
__arm_vcmulq_rot180_f32, __arm_vcmulq_f32, __arm_vcmlaq_f16,
__arm_vcmlaq_rot180_f16, __arm_vcmlaq_rot270_f16,
__arm_vcmlaq_rot90_f16, __arm_vcmlaq_f32, __arm_vcmlaq_rot180_f32,
__arm_vcmlaq_rot270_f32, __arm_vcmlaq_rot90_f32): Update builtin calls.
* config/arm/arm_mve_builtins.def (vcmulq_f, vcmulq_rot90_f,
vcmulq_rot180_f, vcmulq_rot270_f, vcmlaq_f, vcmlaq_rot90_f,
vcmlaq_rot180_f, vcmlaq_rot270_f): Removed.
(vcmulq, vcmulq_rot90, vcmulq_rot180, vcmulq_rot270, vcmlaq,
vcmlaq_rot90, vcmlaq_rot180, vcmlaq_rot270): New.
* config/arm/iterators.md (mve_rot): Add UNSPEC_VCMLA, UNSPEC_VCMLA90,
UNSPEC_VCMLA180, UNSPEC_VCMLA270, UNSPEC_VCMUL, UNSPEC_VCMUL90,
UNSPEC_VCMUL180, UNSPEC_VCMUL270.
(VCMUL): New.
* config/arm/mve.md (mve_vcmulq_f,
mve_vcmulq_rot270_f, mve_vcmulq_rot90_f, mve_vcmlaq_f,
mve_vcmlaq_rot180_f, mve_vcmlaq_rot270_f,
mve_vcmlaq_rot90_f): Removed.
(mve_vcmlaq, mve_vcmulq,
mve_vcaddq, cadd3, mve_vcaddq):
New.
* config/arm/unspecs.md (UNSPEC_VCMUL90, UNSPEC_VCMUL270, UNSPEC_VCMUL,
UNSPEC_VCMUL180): New.
(VCMULQ_F, VCMULQ_ROT180_F, VCMULQ_ROT270_F, VCMULQ_ROT90_F,
VCMLAQ_F, VCMLAQ_ROT180_F, VCMLAQ_ROT90_F, VCMLAQ_ROT270_F): Removed.
--- inline copy of patch --
diff --git a/gcc/config/arm/arm_mve.h b/gcc/config/arm/arm_mve.h
index
987495dd234ad96ba1163a1f482fe183a46ff437..45014621f2533497e90ddf5257fb04e1fd9325b4
100644
--- a/gcc/config/arm/arm_mve.h
+++ b/gcc/config/arm/arm_mve.h
@@ -17348,28 +17348,28 @@ __extension__ extern __inline float16x8_t
__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
__arm_vcmulq_rot90_f16 (float16x8_t __a, float16x8_t __b)
{
- return __builtin_mve_vcmulq_rot90_fv8hf (__a, __b);
+ return __builtin_mve_vcmulq_rot90v8hf (__a, __b);
}
__extension__ extern __inline float16x8_t
__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
__arm_vcmulq_rot270_f16 (float16x8_t __a, float16x8_t __b)
{
- return __builtin_mve_vcmulq_rot270_fv8hf (__a, __b);
+ return __builtin_mve_vcmulq_rot270v8hf (__a, __b);
}
__extension__ extern __inline float16x8_t
__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
__arm_vcmulq_rot180_f16 (float16x8_t __a, float16x8_t __b)
{
- return __builtin_mve_vcmulq_rot180_fv8hf (__a, __b);
+ return __builtin_mve_vcmulq_rot180v8hf (__a, __b);
}
__extension__ extern __inline float16x8_t
__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
__arm_vcmulq_f16 (float16x8_t __a, float16x8_t __b)
{
- return __builtin_mve_vcmulq_fv8hf (__a, __b);
+ return __builtin_mve_vcmulqv8hf (__a, __b);
}
__extension__ extern __inline float16x8_t
@@ -17600,28 +17600,28 @@ __extension__ extern __inline float32x4_t
__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
__arm_vcmulq_rot90_f32 (float32x4_t __a, float32x4_t __b)
{
- return __builtin_mve_vcmulq_rot90_fv4sf (__a, __b);
+ return __builtin_mve_vcmulq_rot90v4sf (__a, __b);
}
__extension__ extern __inline float32x4_t
__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
__arm_vcmulq_rot270_f32 (float32x4_t __a, float32x4_t __b)
{
- return __builtin_mve_vcmulq_rot270_fv4sf (__a, __b);
+ return __builtin_mve_vcmulq_rot270v4sf (__a, __b);
}
__extension__ extern __inline float32x4_t
__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
__arm_vcmulq_rot180_f32 (float32x4_t __a, float32x4_t __b)
{
- return __builtin_mve_vcmulq_rot180_fv4sf (__a, __b);
+ return __builtin_mve_vcmulq_rot180v4sf (__a, __b);
}
__extension__ extern __inline float32x4_t
__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
__arm_vcmulq_f32 (float32x4_t __a, float32x4_t __b)
{
- return __builtin_mve_vcmulq_fv4sf (__a, __b);
+ return __builtin_mve_vcmulqv4sf (__a, __b);
}
__extension__ extern __inline float32x4_t
@@ -17790,28 +17790,28 @@ __extension__ extern __inline float16x8_t
__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
__arm_vcmlaq_f16 (float16x8_t __a, float16x8_t __b, float16x8_t
