Re: [PATCH][ARM] Use Cortex-A17 tuning parameters for Cortex-A12

[Ramana Radhakrishnan]

On Thu, Nov 13, 2014 at 5:25 PM, Kyrill Tkachov kyrylo.tkac...@arm.com wrote:
 Hi all,

 The Cortex-A12 very close to the Cortex-A17 and this patch updates the
 tuning struct
 parameters to match the Cortex-A17 ones.

 This has improved performance in a number of benchmarks that I tried.
 The instruction scheduling is also changed to match the Cortex-A17
 scheduling

 Tested arm-none-eabi.

 Ok for trunk once the Cortex-A17 patch goes in?


Ok.

Ramana

 Thanks,
 Kyrill

 2014-11-13  Kyrylo Tkachov  kyrylo.tkac...@arm.com

 * config/arm/arm.c (arm_cortex_a12_tune): Update entries to match
 Cortex-A17 tuning parameters.
 * config/arm/arm-cores.def (cortex-a12): Schedule for cortex-a17.

[PATCH][ARM] Use Cortex-A17 tuning parameters for Cortex-A12

[Kyrill Tkachov]

Hi all,

The Cortex-A12 very close to the Cortex-A17 and this patch updates the 
tuning struct

parameters to match the Cortex-A17 ones.

This has improved performance in a number of benchmarks that I tried.
The instruction scheduling is also changed to match the Cortex-A17 
scheduling


Tested arm-none-eabi.

Ok for trunk once the Cortex-A17 patch goes in?

Thanks,
Kyrill

2014-11-13  Kyrylo Tkachov  kyrylo.tkac...@arm.com

* config/arm/arm.c (arm_cortex_a12_tune): Update entries to match
Cortex-A17 tuning parameters.
* config/arm/arm-cores.def (cortex-a12): Schedule for cortex-a17.commit 49be51d8e41840459a815f214c9b76075988b156
Author: Kyrylo Tkachov kyrylo.tkac...@arm.com
Date:   Tue Nov 4 09:09:48 2014 +

[ARM] Use Cortex-A17 tuning settings for Cortex-A12

diff --git a/gcc/config/arm/arm-cores.def b/gcc/config/arm/arm-cores.def
index f239e61..0ef8c66 100644
--- a/gcc/config/arm/arm-cores.def
+++ b/gcc/config/arm/arm-cores.def
@@ -148,7 +148,7 @@ ARM_CORE(cortex-a5,		cortexa5, cortexa5,		7A,  FL_LDSCHED, cortex_a5)
 ARM_CORE(cortex-a7,		cortexa7, cortexa7,		7A,  FL_LDSCHED | FL_THUMB_DIV | FL_ARM_DIV, cortex_a7)
 ARM_CORE(cortex-a8,		cortexa8, cortexa8,		7A,  FL_LDSCHED, cortex_a8)
 ARM_CORE(cortex-a9,		cortexa9, cortexa9,		7A,  FL_LDSCHED, cortex_a9)
-ARM_CORE(cortex-a12,	  	cortexa12, cortexa15,		7A,  FL_LDSCHED | FL_THUMB_DIV | FL_ARM_DIV, cortex_a12)
+ARM_CORE(cortex-a12,	  	cortexa12, cortexa17,		7A,  FL_LDSCHED | FL_THUMB_DIV | FL_ARM_DIV, cortex_a12)
 ARM_CORE(cortex-a15,		cortexa15, cortexa15,		7A,  FL_LDSCHED | FL_THUMB_DIV | FL_ARM_DIV, cortex_a15)
 ARM_CORE(cortex-a17,		cortexa17, cortexa17,		7A,  FL_LDSCHED | FL_THUMB_DIV | FL_ARM_DIV, cortex_a12)
 ARM_CORE(cortex-r4,		cortexr4, cortexr4,		7R,  FL_LDSCHED, cortex)
diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c
index 6feb4b8..8d163e3 100644
--- a/gcc/config/arm/arm.c
+++ b/gcc/config/arm/arm.c
@@ -2014,17 +2014,17 @@ const struct tune_params arm_cortex_a12_tune =
 {
   arm_9e_rtx_costs,
   cortexa12_extra_costs,
-  NULL,
+  NULL,		/* Sched adj cost.  */
   1,		/* Constant limit.  */
-  5,		/* Max cond insns.  */
-  ARM_PREFETCH_BENEFICIAL(4,32,32),
+  2,		/* Max cond insns.  */
+  ARM_PREFETCH_NOT_BENEFICIAL,
   false,	/* Prefer constant pool.  */
   arm_default_branch_cost,
   true,		/* Prefer LDRD/STRD.  */
   {true, true},	/* Prefer non short circuit.  */
   arm_default_vec_cost,/* Vectorizer costs.  */
   false,/* Prefer Neon for 64-bits bitops.  */
-  false, false, /* Prefer 32-bit encodings.  */
+  true, true,   /* Prefer 32-bit encodings.  */
   true,		/* Prefer Neon for stringops.  */
   8,		/* Maximum insns to inline memset.  */
   ARM_FUSE_MOVW_MOVT/* Fuseable pairs of instructions.  */