Re: [PATCH] In the ready lists of pipeline, put unrecog insns (such as CLOBBER, USE) at the latest to issue.
On 3/27/23 11:01, Richard Sandiford wrote: Jin Ma via Gcc-patches writes: Unrecog insns (such as CLOBBER, USE) does not represent real instructions, but in the process of pipeline optimization, they will wait for transmission in ready list like other insns, without considering resource conflicts and cycles. This results in a multi-issue CPU architecture that can be issued at any time if other regular insns have resource conflicts or cannot be launched for other reasons. As a result, its position is advanced in the generated insns sequence, which will affect register allocation and often lead to more redundant mov instructions. Is it the clobber rather than the use case that is causing problems? I would expect that scheduling a use ASAP would be better for register pressure, since it might close off the associated live range and so reduce the number of conflicts. Agreed. Issuing USES as soon as possible seems advisable from a register pressure standpoint. A clobber can close off a range as well, but I suspect that is the exception rather than the norm. I.e. is the problem that, when a live range starts with a clobber, the current code will tend to move the clobber up and so extend the associated live range? If so, that sounds like something we should address more directly, for two reasons: Agreed as well. I would expect the normal case for clobbers is that deferring them as late as possible is best as I would expect they typically open a live range. (1) We should try to prevent clobbers that start a live range from being moved up even if first_cycle_insn_p. Yes. (2) Clobbers can also be used to close off a live range, which is useful if a pseudo is only written to in parts. The current behaviour is probably better for those clobbers. I thought these sequences started with a clobber, then the component sets. In which case the clobber isn't closing a live range, but opening one and deferring it is advisable. jeff
Re: [PATCH] In the ready lists of pipeline, put unrecog insns (such as CLOBBER, USE) at the latest to issue.
Jin Ma via Gcc-patches writes:
> Unrecog insns (such as CLOBBER, USE) does not represent real instructions,
> but in the
> process of pipeline optimization, they will wait for transmission in ready
> list like
> other insns, without considering resource conflicts and cycles. This results
> in a
> multi-issue CPU architecture that can be issued at any time if other regular
> insns
> have resource conflicts or cannot be launched for other reasons. As a result,
> its
> position is advanced in the generated insns sequence, which will affect
> register
> allocation and often lead to more redundant mov instructions.
Is it the clobber rather than the use case that is causing problems?
I would expect that scheduling a use ASAP would be better for register
pressure, since it might close off the associated live range and so
reduce the number of conflicts.
I.e. is the problem that, when a live range starts with a clobber,
the current code will tend to move the clobber up and so extend
the associated live range? If so, that sounds like something we
should address more directly, for two reasons:
(1) We should try to prevent clobbers that start a live range from being
moved up even if first_cycle_insn_p.
(2) Clobbers can also be used to close off a live range, which is useful
if a pseudo is only written to in parts. The current behaviour is
probably better for those clobbers.
In general, if you're hitting register pressure problems with scheduling,
have you tried enabling -fsched-pressure by default, possibly with
--param=sched-pressure-algorithm=2 (but try with the default algo too)?
Thanks,
Richard
>
> gcc/ChangeLog:
>
> * haifa-sched.cc (prune_ready_list): Consider unrecog insns(CLOBBER and
> USE)
> in pruning ready lists.
> ---
> gcc/haifa-sched.cc | 8
> 1 file changed, 8 insertions(+)
>
> diff --git a/gcc/haifa-sched.cc b/gcc/haifa-sched.cc
> index 48b53776fa9..72c4c44da76 100644
> --- a/gcc/haifa-sched.cc
> +++ b/gcc/haifa-sched.cc
> @@ -6318,6 +6318,14 @@ prune_ready_list (state_t temp_state, bool
> first_cycle_insn_p,
> cost = 1;
> reason = "not a shadow";
> }
> + else if (recog_memoized (insn) < 0
> + && (GET_CODE (PATTERN (insn)) == CLOBBER
> + || GET_CODE (PATTERN (insn)) == USE))
> + {
> + if (!first_cycle_insn_p)
> + cost = 1;
> + reason = "unrecog insn";
> + }
> else if (recog_memoized (insn) < 0)
> {
> if (!first_cycle_insn_p
[PATCH] In the ready lists of pipeline, put unrecog insns (such as CLOBBER, USE) at the latest to issue.
Unrecog insns (such as CLOBBER, USE) does not represent real instructions,
but in the
process of pipeline optimization, they will wait for transmission in ready list
like
other insns, without considering resource conflicts and cycles. This results in
a
multi-issue CPU architecture that can be issued at any time if other regular
insns
have resource conflicts or cannot be launched for other reasons. As a result,
its
position is advanced in the generated insns sequence, which will affect register
allocation and often lead to more redundant mov instructions.
gcc/ChangeLog:
* haifa-sched.cc (prune_ready_list): Consider unrecog insns(CLOBBER and
USE)
in pruning ready lists.
---
gcc/haifa-sched.cc | 8
1 file changed, 8 insertions(+)
diff --git a/gcc/haifa-sched.cc b/gcc/haifa-sched.cc
index 48b53776fa9..72c4c44da76 100644
--- a/gcc/haifa-sched.cc
+++ b/gcc/haifa-sched.cc
@@ -6318,6 +6318,14 @@ prune_ready_list (state_t temp_state, bool
first_cycle_insn_p,
cost = 1;
reason = "not a shadow";
}
+ else if (recog_memoized (insn) < 0
+ && (GET_CODE (PATTERN (insn)) == CLOBBER
+ || GET_CODE (PATTERN (insn)) == USE))
+ {
+ if (!first_cycle_insn_p)
+ cost = 1;
+ reason = "unrecog insn";
+ }
else if (recog_memoized (insn) < 0)
{
if (!first_cycle_insn_p
--
2.17.1
