LGTM.
Nit: it should be "storing" floating-point zero into MEM, not "loading".
On Sat, 2023-09-02 at 12:47 +0800, Guo Jie wrote:
> gcc/ChangeLog:
>
> * config/loongarch/loongarch.md: Support 'G' -> 'k' in
> movsf_hardfloat and movdf_hardfloat.
>
> gcc/testsuite/ChangeLog:
>
> * gcc.target/loongarch/const-double-zero-stx.c: New test.
>
> ---
> gcc/config/loongarch/loongarch.md | 12 ++--
> .../loongarch/const-double-zero-stx.c | 18 ++
> 2 files changed, 24 insertions(+), 6 deletions(-)
> create mode 100644 gcc/testsuite/gcc.target/loongarch/const-double-zero-stx.c
>
> diff --git a/gcc/config/loongarch/loongarch.md
> b/gcc/config/loongarch/loongarch.md
> index b37e070660f..6f47c23a79c 100644
> --- a/gcc/config/loongarch/loongarch.md
> +++ b/gcc/config/loongarch/loongarch.md
> @@ -1915,13 +1915,13 @@ (define_expand "movsf"
> })
>
> (define_insn "*movsf_hardfloat"
> - [(set (match_operand:SF 0 "nonimmediate_operand"
> "=f,f,f,m,f,k,m,*f,*r,*r,*r,*m")
> - (match_operand:SF 1 "move_operand" "f,G,m,f,k,f,G,*r,*f,*G*r,*m,*r"))]
> + [(set (match_operand:SF 0 "nonimmediate_operand"
> "=f,f,f,m,f,k,m,k,*f,*r,*r,*r,*m")
> + (match_operand:SF 1 "move_operand"
> "f,G,m,f,k,f,G,G,*r,*f,*G*r,*m,*r"))]
> "TARGET_HARD_FLOAT
> && (register_operand (operands[0], SFmode)
> || reg_or_0_operand (operands[1], SFmode))"
> { return loongarch_output_move (operands[0], operands[1]); }
> - [(set_attr "move_type"
> "fmove,mgtf,fpload,fpstore,fpload,fpstore,store,mgtf,mftg,move,load,store")
> + [(set_attr "move_type"
> "fmove,mgtf,fpload,fpstore,fpload,fpstore,store,store,mgtf,mftg,move,load,store")
> (set_attr "mode" "SF")])
>
> (define_insn "*movsf_softfloat"
> @@ -1946,13 +1946,13 @@ (define_expand "movdf"
> })
>
> (define_insn "*movdf_hardfloat"
> - [(set (match_operand:DF 0 "nonimmediate_operand"
> "=f,f,f,m,f,k,m,*f,*r,*r,*r,*m")
> - (match_operand:DF 1 "move_operand" "f,G,m,f,k,f,G,*r,*f,*r*G,*m,*r"))]
> + [(set (match_operand:DF 0 "nonimmediate_operand"
> "=f,f,f,m,f,k,m,k,*f,*r,*r,*r,*m")
> + (match_operand:DF 1 "move_operand"
> "f,G,m,f,k,f,G,G,*r,*f,*r*G,*m,*r"))]
> "TARGET_DOUBLE_FLOAT
> && (register_operand (operands[0], DFmode)
> || reg_or_0_operand (operands[1], DFmode))"
> { return loongarch_output_move (operands[0], operands[1]); }
> - [(set_attr "move_type"
> "fmove,mgtf,fpload,fpstore,fpload,fpstore,store,mgtf,mftg,move,load,store")
> + [(set_attr "move_type"
> "fmove,mgtf,fpload,fpstore,fpload,fpstore,store,store,mgtf,mftg,move,load,store")
> (set_attr "mode" "DF")])
>
> (define_insn "*movdf_softfloat"
> diff --git a/gcc/testsuite/gcc.target/loongarch/const-double-zero-stx.c
> b/gcc/testsuite/gcc.target/loongarch/const-double-zero-stx.c
> new file mode 100644
> index 000..8fb04be8ff5
> --- /dev/null
> +++ b/gcc/testsuite/gcc.target/loongarch/const-double-zero-stx.c
> @@ -0,0 +1,18 @@
> +/* { dg-do compile } */
> +/* { dg-options "-O2" } */
> +/* { dg-final { scan-assembler-times {stx\..\t\$r0} 2 } } */
> +
> +extern float arr_f[];
> +extern double arr_d[];
> +
> +void
> +test_f (int base, int index)
> +{
> + arr_f[base + index] = 0.0;
> +}
> +
> +void
> +test_d (int base, int index)
> +{
> + arr_d[base + index] = 0.0;
> +}
--
Xi Ruoyao
School of Aerospace Science and Technology, Xidian University
