Re: [PATCH] V11 patch #4 of 15, Update 'Q' constraint documentation.

2019-12-22 Thread Segher Boessenkool
On Fri, Dec 20, 2019 at 06:49:30PM -0500, Michael Meissner wrote:
> In doing V11 patch #3, I noticed that the documentation for the 'Q' was
> misleading.

It originally was used just for lswi/stswi, which can access up to the
first 32 bytes of storage pointed to by the register.  But yes, the
current comment is confusing.

>   * config/rs6000/constraints.md (Q constraint): Update
>   documentation.
>   * doc/md.tet (PowerPC constraints): Update 'Q' constraint
>   documentation.

"md.tet"?  That's an interesting typo :-)

>  (define_memory_constraint "Q"
> -  "Memory operand that is an offset from a register (it is usually better
> -to use @samp{m} or @samp{es} in @code{asm} statements)"
> +  "A memory operand whose address which uses a single register with no 
> offset."

Arm has

(define_memory_constraint "Q"
 "@internal
  An address that is a single base register."
 (and (match_code "mem")
  (match_test "REG_P (XEXP (op, 0))")))

which is more correct for us (the register cannot be r0!)

But it is not an address.

Maybe "A memory operand addressed by just a base register." ?

Okay for trunk like that.  Thanks!


Segher


[PATCH] V11 patch #4 of 15, Update 'Q' constraint documentation.

2019-12-20 Thread Michael Meissner
In doing V11 patch #3, I noticed that the documentation for the 'Q' was
misleading.  This patch updates the documentation.  Can I check this patch into
the trunk?

2019-12-20  Michael Meissner  

* config/rs6000/constraints.md (Q constraint): Update
documentation.
* doc/md.tet (PowerPC constraints): Update 'Q' constraint
documentation.

Index: gcc/config/rs6000/constraints.md
===
--- gcc/config/rs6000/constraints.md(revision 279547)
+++ gcc/config/rs6000/constraints.md(working copy)
@@ -211,8 +211,7 @@ several times, or that might not access
(match_test "GET_RTX_CLASS (GET_CODE (XEXP (op, 0))) != RTX_AUTOINC")))
 
 (define_memory_constraint "Q"
-  "Memory operand that is an offset from a register (it is usually better
-to use @samp{m} or @samp{es} in @code{asm} statements)"
+  "A memory operand whose address which uses a single register with no offset."
   (and (match_code "mem")
(match_test "REG_P (XEXP (op, 0))")))
 
Index: gcc/doc/md.texi
===
--- gcc/doc/md.texi (revision 279547)
+++ gcc/doc/md.texi (working copy)
@@ -3381,8 +3381,7 @@ allowed when @samp{<} or @samp{>} is use
 as @samp{m} without @samp{<} and @samp{>}.
 
 @item Q
-Memory operand that is an offset from a register (it is usually better
-to use @samp{m} or @samp{es} in @code{asm} statements)
+A memory operand whose address which uses a single register with no offset.
 
 @item Z
 Memory operand that is an indexed or indirect from a register (it is

-- 
Michael Meissner, IBM
IBM, M/S 2506R, 550 King Street, Littleton, MA 01460-6245, USA
email: meiss...@linux.ibm.com, phone: +1 (978) 899-4797