[PATCH] arm: remove error in CPP_SPEC when float-abi soft and hard are used together
arm.h has had this error message since 1997, and was never updated to take softfp into account. Anyway, it seems it was useful long ago, but it is no longer needed since option parsing has been improved: -mfloat-abi is handled via arm.opt and updates the var_float_abi variable. So, the last instance of -mfloat-abi= on the command line wins. This patch just removes this error message, thus enabling many more tests to pass on arm-eabi: * with -mcpu=cortex-a7/-mfloat-abi=soft/-march=armv7ve+simd (2 more passes) gcc.target/arm/pr52375.c g++.target/arm/pr99593.C (test for excess errors) * with -mthumb/-mfloat-abi=soft/-march=armv6s-m (115 more passes in C, 90 more in C++) gcc.target/arm/armv8_1m-fp16-move-1.c (test for excess errors) gcc.target/arm/armv8_1m-fp32-move-1.c (test for excess errors) gcc.target/arm/armv8_1m-fp64-move-1.c (test for excess errors) gcc.target/arm/armv8_2-fp16-move-1.c (test for excess errors) gcc.target/arm/cortex-m55-nodsp-flag-hard.c (test for excess errors) gcc.target/arm/cortex-m55-nofp-flag-hard.c (test for excess errors) gcc.target/arm/cortex-m55-nomve-flag-hard.c (test for excess errors) gcc.target/arm/cortex-m55-nomve.fp-flag-hard.c (test for excess errors) g++.target/arm/no_unique_address_1.C g++.target/arm/no_unique_address_2.C * with -mthumb/-mfloat-abi=soft/-march=armv7-m (153 more passes in C, 90 more in C++) gcc.dg/pr59418.c (test for excess errors) gcc.target/arm/armv8_1m-fp16-move-1.c (test for excess errors) gcc.target/arm/armv8_1m-fp32-move-1.c (test for excess errors) gcc.target/arm/armv8_1m-fp64-move-1.c (test for excess errors) gcc.target/arm/armv8_2-fp16-move-1.c (test for excess errors) gcc.target/arm/bfloat16_scalar_2_1.c (test for excess errors) gcc.target/arm/bfloat16_scalar_3_1.c (test for excess errors) gcc.target/arm/cortex-m55-nodsp-flag-hard.c (test for excess errors) gcc.target/arm/cortex-m55-nofp-flag-hard.c (test for excess errors) gcc.target/arm/cortex-m55-nomve-flag-hard.c (test for excess errors) gcc.target/arm/cortex-m55-nomve.fp-flag-hard.c (test for excess errors) gcc.target/arm/pr52375.c (test for excess errors) gcc.target/arm/simd/vld1_bf16_1.c (test for excess errors) gcc.target/arm/simd/vldn_lane_bf16_1.c (test for excess errors) gcc.target/arm/simd/vst1_bf16_1.c (test for excess errors) gcc.target/arm/simd/vstn_lane_bf16_1.c (test for excess errors) g++.target/arm/no_unique_address_1.C g++.target/arm/no_unique_address_2.C * with -mthumb/-mfloat-abi=hard/-march=armv7e-m+fp (65 more passes) gcc.target/arm/atomic-comp-swap-release-acquire-3.c (test for excess errors) gcc.target/arm/atomic-comp-swap-release-acquire-3.c scan-assembler-not dmb gcc.target/arm/atomic-comp-swap-release-acquire-3.c scan-assembler-times ldaex 4 gcc.target/arm/atomic-comp-swap-release-acquire-3.c scan-assembler-times stlex 4 gcc.target/arm/atomic-op-acq_rel-3.c (test for excess errors) gcc.target/arm/atomic-op-acq_rel-3.c scan-assembler-not dmb gcc.target/arm/atomic-op-acq_rel-3.c scan-assembler-times ldaex\tr[0-9]+, \\[r[0-9]+\\] 6 gcc.target/arm/atomic-op-acq_rel-3.c scan-assembler-times stlex\t...?, r[0-9]+, \\[r[0-9]+\\] 6 gcc.target/arm/atomic-op-acquire-3.c (test for excess errors) gcc.target/arm/atomic-op-acquire-3.c scan-assembler-not dmb gcc.target/arm/atomic-op-acquire-3.c scan-assembler-times ldaex\tr[0-9]+, \\[r[0-9]+\\] 6 gcc.target/arm/atomic-op-acquire-3.c scan-assembler-times strex\t...?, r[0-9]+, \\[r[0-9]+\\] 6 gcc.target/arm/atomic-op-char-3.c (test for excess errors) gcc.target/arm/atomic-op-char-3.c scan-assembler-not dmb gcc.target/arm/atomic-op-char-3.c scan-assembler-times ldrexb\tr[0-9]+, \\[r[0-9]+\\] 6 gcc.target/arm/atomic-op-char-3.c scan-assembler-times strexb\t...?, r[0-9]+, \\[r[0-9]+\\] 6 gcc.target/arm/atomic-op-consume-3.c (test for excess errors) gcc.target/arm/atomic-op-consume-3.c scan-assembler-not dmb gcc.target/arm/atomic-op-consume-3.c scan-assembler-times ldaex\tr[0-9]+, \\[r[0-9]+\\] 6 gcc.target/arm/atomic-op-consume-3.c scan-assembler-times strex\t...?, r[0-9]+, \\[r[0-9]+\\] 6 gcc.target/arm/atomic-op-int-3.c (test for excess errors) gcc.target/arm/atomic-op-int-3.c scan-assembler-not dmb gcc.target/arm/atomic-op-int-3.c scan-assembler-times ldrex\tr[0-9]+, \\[r[0-9]+\\] 6 gcc.target/arm/atomic-op-int-3.c scan-assembler-times strex\t...?, r[0-9]+, \\[r[0-9]+\\] 6 gcc.target/arm/atomic-op-relaxed-3.c (test for excess errors) gcc.target/arm/atomic-op-relaxed-3.c scan-assembler-not dmb gcc.target/arm/atomic-op-relaxed-3.c scan-assembler-times ldrex\tr[0-9]+, \\[r[0-9]+\\] 6 gcc.target/arm/atomic-op-relaxed-3.c scan-assembler-times strex\t...?, r[0-9]+, \\[r[0-9]+\\] 6 gcc.target/arm/atomic-op-release-3.c (test for excess errors) gcc.target/arm/atomic-op-release-3.c scan-assembler-not dmb gcc.target/arm/atomic-op-release-3.c scan-assembler-times ldrex\tr[0-9]+, \\[r[0-9]+\\] 6 gcc.target/arm/atomic-op-release-3.c scan-assembler-times stlex\t...?, r[0-9]+, \\[r[0-9]+\\] 6 gcc.target/arm/atomic-op-seq_cst-3.c
Re: [PATCH] arm: remove error in CPP_SPEC when float-abi soft and hard are used together
On 22/04/2021 08:01, Christophe Lyon via Gcc-patches wrote: arm.h has had this error message since 1997, and was never updated to take softfp into account. Anyway, it seems it was useful long ago, but it is no longer needed since option parsing has been improved: -mfloat-abi is handled via arm.opt and updates the var_float_abi variable. So, the last instance of -mfloat-abi= on the command line wins. Yeah, at the time it was added, the specs lines were used to directly add preprocessor values and it was impossible at the time to deal with a command-line where both variants were specified in terms of adding (or not adding the correct defines). As you say, things have improved significantly in that area and we can now eliminate this error. I may have missed it, but do you have a similar patch for eliminating the big/little endian error? That was added for the same basic reason, but is now redundant as well. This patch just removes this error message, thus enabling many more tests to pass on arm-eabi: * with -mcpu=cortex-a7/-mfloat-abi=soft/-march=armv7ve+simd (2 more passes) gcc.target/arm/pr52375.c g++.target/arm/pr99593.C (test for excess errors) * with -mthumb/-mfloat-abi=soft/-march=armv6s-m (115 more passes in C, 90 more in C++) gcc.target/arm/armv8_1m-fp16-move-1.c (test for excess errors) gcc.target/arm/armv8_1m-fp32-move-1.c (test for excess errors) gcc.target/arm/armv8_1m-fp64-move-1.c (test for excess errors) gcc.target/arm/armv8_2-fp16-move-1.c (test for excess errors) gcc.target/arm/cortex-m55-nodsp-flag-hard.c (test for excess errors) gcc.target/arm/cortex-m55-nofp-flag-hard.c (test for excess errors) gcc.target/arm/cortex-m55-nomve-flag-hard.c (test for excess errors) gcc.target/arm/cortex-m55-nomve.fp-flag-hard.c (test for excess errors) g++.target/arm/no_unique_address_1.C g++.target/arm/no_unique_address_2.C * with -mthumb/-mfloat-abi=soft/-march=armv7-m (153 more passes in C, 90 more in C++) gcc.dg/pr59418.c (test for excess errors) gcc.target/arm/armv8_1m-fp16-move-1.c (test for excess errors) gcc.target/arm/armv8_1m-fp32-move-1.c (test for excess errors) gcc.target/arm/armv8_1m-fp64-move-1.c (test for excess errors) gcc.target/arm/armv8_2-fp16-move-1.c (test for excess errors) gcc.target/arm/bfloat16_scalar_2_1.c (test for excess errors) gcc.target/arm/bfloat16_scalar_3_1.c (test for excess errors) gcc.target/arm/cortex-m55-nodsp-flag-hard.c (test for excess errors) gcc.target/arm/cortex-m55-nofp-flag-hard.c (test for excess errors) gcc.target/arm/cortex-m55-nomve-flag-hard.c (test for excess errors) gcc.target/arm/cortex-m55-nomve.fp-flag-hard.c (test for excess errors) gcc.target/arm/pr52375.c (test for excess errors) gcc.target/arm/simd/vld1_bf16_1.c (test for excess errors) gcc.target/arm/simd/vldn_lane_bf16_1.c (test for excess errors) gcc.target/arm/simd/vst1_bf16_1.c (test for excess errors) gcc.target/arm/simd/vstn_lane_bf16_1.c (test for excess errors) g++.target/arm/no_unique_address_1.C g++.target/arm/no_unique_address_2.C * with -mthumb/-mfloat-abi=hard/-march=armv7e-m+fp (65 more passes) gcc.target/arm/atomic-comp-swap-release-acquire-3.c (test for excess errors) gcc.target/arm/atomic-comp-swap-release-acquire-3.c scan-assembler-not dmb gcc.target/arm/atomic-comp-swap-release-acquire-3.c scan-assembler-times ldaex 4 gcc.target/arm/atomic-comp-swap-release-acquire-3.c scan-assembler-times stlex 4 gcc.target/arm/atomic-op-acq_rel-3.c (test for excess errors) gcc.target/arm/atomic-op-acq_rel-3.c scan-assembler-not dmb gcc.target/arm/atomic-op-acq_rel-3.c scan-assembler-times ldaex\tr[0-9]+, \\[r[0-9]+\\] 6 gcc.target/arm/atomic-op-acq_rel-3.c scan-assembler-times stlex\t...?, r[0-9]+, \\[r[0-9]+\\] 6 gcc.target/arm/atomic-op-acquire-3.c (test for excess errors) gcc.target/arm/atomic-op-acquire-3.c scan-assembler-not dmb gcc.target/arm/atomic-op-acquire-3.c scan-assembler-times ldaex\tr[0-9]+, \\[r[0-9]+\\] 6 gcc.target/arm/atomic-op-acquire-3.c scan-assembler-times strex\t...?, r[0-9]+, \\[r[0-9]+\\] 6 gcc.target/arm/atomic-op-char-3.c (test for excess errors) gcc.target/arm/atomic-op-char-3.c scan-assembler-not dmb gcc.target/arm/atomic-op-char-3.c scan-assembler-times ldrexb\tr[0-9]+, \\[r[0-9]+\\] 6 gcc.target/arm/atomic-op-char-3.c scan-assembler-times strexb\t...?, r[0-9]+, \\[r[0-9]+\\] 6 gcc.target/arm/atomic-op-consume-3.c (test for excess errors) gcc.target/arm/atomic-op-consume-3.c scan-assembler-not dmb gcc.target/arm/atomic-op-consume-3.c scan-assembler-times ldaex\tr[0-9]+, \\[r[0-9]+\\] 6 gcc.target/arm/atomic-op-consume-3.c scan-assembler-times strex\t...?, r[0-9]+, \\[r[0-9]+\\] 6 gcc.target/arm/atomic-op-int-3.c (test for excess errors) gcc.target/arm/atomic-op-int-3.c scan-assembler-not dmb gcc.target/arm/atomic-op-int-3.c scan-assembler-times ldrex\tr[0-9]+, \\[r[0-9]+\\] 6 gcc.target/arm/atomic-op-int-3.c scan-assembler-times strex\t...?, r[0-9]+, \\[r[0-9]+\\] 6 gcc.target/arm/atomic-op-relaxed-3.c (test for excess errors)
Re: [PATCH] arm: remove error in CPP_SPEC when float-abi soft and hard are used together
On Mon, 10 May 2021 at 18:32, Richard Earnshaw wrote: > > > > On 22/04/2021 08:01, Christophe Lyon via Gcc-patches wrote: > > arm.h has had this error message since 1997, and was never updated to > > take softfp into account. Anyway, it seems it was useful long ago, but > > it is no longer needed since option parsing has been improved: > > -mfloat-abi is handled via arm.opt and updates the var_float_abi > > variable. So, the last instance of -mfloat-abi= on the command line > > wins. > > > > Yeah, at the time it was added, the specs lines were used to directly > add preprocessor values and it was impossible at the time to deal with a > command-line where both variants were specified in terms of adding (or > not adding the correct defines). As you say, things have improved > significantly in that area and we can now eliminate this error. > > I may have missed it, but do you have a similar patch for eliminating > the big/little endian error? That was added for the same basic reason, > but is now redundant as well. No, because I didn't see any undesirable error related to that in validation logs, but sure I can prepare one. > > > This patch just removes this error message, thus enabling many more > > tests to pass on arm-eabi: > > > > * with -mcpu=cortex-a7/-mfloat-abi=soft/-march=armv7ve+simd (2 more passes) > > gcc.target/arm/pr52375.c > > g++.target/arm/pr99593.C (test for excess errors) > > > > * with -mthumb/-mfloat-abi=soft/-march=armv6s-m (115 more passes in C, 90 > > more in C++) > > gcc.target/arm/armv8_1m-fp16-move-1.c (test for excess errors) > > gcc.target/arm/armv8_1m-fp32-move-1.c (test for excess errors) > > gcc.target/arm/armv8_1m-fp64-move-1.c (test for excess errors) > > gcc.target/arm/armv8_2-fp16-move-1.c (test for excess errors) > > gcc.target/arm/cortex-m55-nodsp-flag-hard.c (test for excess errors) > > gcc.target/arm/cortex-m55-nofp-flag-hard.c (test for excess errors) > > gcc.target/arm/cortex-m55-nomve-flag-hard.c (test for excess errors) > > gcc.target/arm/cortex-m55-nomve.fp-flag-hard.c (test for excess errors) > > g++.target/arm/no_unique_address_1.C > > g++.target/arm/no_unique_address_2.C > > > > * with -mthumb/-mfloat-abi=soft/-march=armv7-m (153 more passes in C, 90 > > more in C++) > > gcc.dg/pr59418.c (test for excess errors) > > gcc.target/arm/armv8_1m-fp16-move-1.c (test for excess errors) > > gcc.target/arm/armv8_1m-fp32-move-1.c (test for excess errors) > > gcc.target/arm/armv8_1m-fp64-move-1.c (test for excess errors) > > gcc.target/arm/armv8_2-fp16-move-1.c (test for excess errors) > > gcc.target/arm/bfloat16_scalar_2_1.c (test for excess errors) > > gcc.target/arm/bfloat16_scalar_3_1.c (test for excess errors) > > gcc.target/arm/cortex-m55-nodsp-flag-hard.c (test for excess errors) > > gcc.target/arm/cortex-m55-nofp-flag-hard.c (test for excess errors) > > gcc.target/arm/cortex-m55-nomve-flag-hard.c (test for excess errors) > > gcc.target/arm/cortex-m55-nomve.fp-flag-hard.c (test for excess errors) > > gcc.target/arm/pr52375.c (test for excess errors) > > gcc.target/arm/simd/vld1_bf16_1.c (test for excess errors) > > gcc.target/arm/simd/vldn_lane_bf16_1.c (test for excess errors) > > gcc.target/arm/simd/vst1_bf16_1.c (test for excess errors) > > gcc.target/arm/simd/vstn_lane_bf16_1.c (test for excess errors) > > g++.target/arm/no_unique_address_1.C > > g++.target/arm/no_unique_address_2.C > > > > * with -mthumb/-mfloat-abi=hard/-march=armv7e-m+fp (65 more passes) > > gcc.target/arm/atomic-comp-swap-release-acquire-3.c (test for excess errors) > > gcc.target/arm/atomic-comp-swap-release-acquire-3.c scan-assembler-not dmb > > gcc.target/arm/atomic-comp-swap-release-acquire-3.c scan-assembler-times > > ldaex 4 > > gcc.target/arm/atomic-comp-swap-release-acquire-3.c scan-assembler-times > > stlex 4 > > gcc.target/arm/atomic-op-acq_rel-3.c (test for excess errors) > > gcc.target/arm/atomic-op-acq_rel-3.c scan-assembler-not dmb > > gcc.target/arm/atomic-op-acq_rel-3.c scan-assembler-times ldaex\tr[0-9]+, > > \\[r[0-9]+\\] 6 > > gcc.target/arm/atomic-op-acq_rel-3.c scan-assembler-times stlex\t...?, > > r[0-9]+, \\[r[0-9]+\\] 6 > > gcc.target/arm/atomic-op-acquire-3.c (test for excess errors) > > gcc.target/arm/atomic-op-acquire-3.c scan-assembler-not dmb > > gcc.target/arm/atomic-op-acquire-3.c scan-assembler-times ldaex\tr[0-9]+, > > \\[r[0-9]+\\] 6 > > gcc.target/arm/atomic-op-acquire-3.c scan-assembler-times strex\t...?, > > r[0-9]+, \\[r[0-9]+\\] 6 > > gcc.target/arm/atomic-op-char-3.c (test for excess errors) > > gcc.target/arm/atomic-op-char-3.c scan-assembler-not dmb > > gcc.target/arm/atomic-op-char-3.c scan-assembler-times ldrexb\tr[0-9]+, > > \\[r[0-9]+\\] 6 > > gcc.target/arm/atomic-op-char-3.c scan-assembler-times strexb\t...?, > > r[0-9]+, \\[r[0-9]+\\] 6 > > gcc.target/arm/atomic-op-consume-3.c (test for excess errors) > > gcc.target/arm/atomic-op-consume-3.c scan-assembler-not dmb > > gcc.target/arm/atomic-op-consume-3.c scan-assembler-times ldae
Re: [PATCH] arm: remove error in CPP_SPEC when float-abi soft and hard are used together
ping? On Thu, 22 Apr 2021 at 09:01, Christophe Lyon wrote: > > arm.h has had this error message since 1997, and was never updated to > take softfp into account. Anyway, it seems it was useful long ago, but > it is no longer needed since option parsing has been improved: > -mfloat-abi is handled via arm.opt and updates the var_float_abi > variable. So, the last instance of -mfloat-abi= on the command line > wins. > > This patch just removes this error message, thus enabling many more > tests to pass on arm-eabi: > > * with -mcpu=cortex-a7/-mfloat-abi=soft/-march=armv7ve+simd (2 more passes) > gcc.target/arm/pr52375.c > g++.target/arm/pr99593.C (test for excess errors) > > * with -mthumb/-mfloat-abi=soft/-march=armv6s-m (115 more passes in C, 90 > more in C++) > gcc.target/arm/armv8_1m-fp16-move-1.c (test for excess errors) > gcc.target/arm/armv8_1m-fp32-move-1.c (test for excess errors) > gcc.target/arm/armv8_1m-fp64-move-1.c (test for excess errors) > gcc.target/arm/armv8_2-fp16-move-1.c (test for excess errors) > gcc.target/arm/cortex-m55-nodsp-flag-hard.c (test for excess errors) > gcc.target/arm/cortex-m55-nofp-flag-hard.c (test for excess errors) > gcc.target/arm/cortex-m55-nomve-flag-hard.c (test for excess errors) > gcc.target/arm/cortex-m55-nomve.fp-flag-hard.c (test for excess errors) > g++.target/arm/no_unique_address_1.C > g++.target/arm/no_unique_address_2.C > > * with -mthumb/-mfloat-abi=soft/-march=armv7-m (153 more passes in C, 90 more > in C++) > gcc.dg/pr59418.c (test for excess errors) > gcc.target/arm/armv8_1m-fp16-move-1.c (test for excess errors) > gcc.target/arm/armv8_1m-fp32-move-1.c (test for excess errors) > gcc.target/arm/armv8_1m-fp64-move-1.c (test for excess errors) > gcc.target/arm/armv8_2-fp16-move-1.c (test for excess errors) > gcc.target/arm/bfloat16_scalar_2_1.c (test for excess errors) > gcc.target/arm/bfloat16_scalar_3_1.c (test for excess errors) > gcc.target/arm/cortex-m55-nodsp-flag-hard.c (test for excess errors) > gcc.target/arm/cortex-m55-nofp-flag-hard.c (test for excess errors) > gcc.target/arm/cortex-m55-nomve-flag-hard.c (test for excess errors) > gcc.target/arm/cortex-m55-nomve.fp-flag-hard.c (test for excess errors) > gcc.target/arm/pr52375.c (test for excess errors) > gcc.target/arm/simd/vld1_bf16_1.c (test for excess errors) > gcc.target/arm/simd/vldn_lane_bf16_1.c (test for excess errors) > gcc.target/arm/simd/vst1_bf16_1.c (test for excess errors) > gcc.target/arm/simd/vstn_lane_bf16_1.c (test for excess errors) > g++.target/arm/no_unique_address_1.C > g++.target/arm/no_unique_address_2.C > > * with -mthumb/-mfloat-abi=hard/-march=armv7e-m+fp (65 more passes) > gcc.target/arm/atomic-comp-swap-release-acquire-3.c (test for excess errors) > gcc.target/arm/atomic-comp-swap-release-acquire-3.c scan-assembler-not dmb > gcc.target/arm/atomic-comp-swap-release-acquire-3.c scan-assembler-times > ldaex 4 > gcc.target/arm/atomic-comp-swap-release-acquire-3.c scan-assembler-times > stlex 4 > gcc.target/arm/atomic-op-acq_rel-3.c (test for excess errors) > gcc.target/arm/atomic-op-acq_rel-3.c scan-assembler-not dmb > gcc.target/arm/atomic-op-acq_rel-3.c scan-assembler-times ldaex\tr[0-9]+, > \\[r[0-9]+\\] 6 > gcc.target/arm/atomic-op-acq_rel-3.c scan-assembler-times stlex\t...?, > r[0-9]+, \\[r[0-9]+\\] 6 > gcc.target/arm/atomic-op-acquire-3.c (test for excess errors) > gcc.target/arm/atomic-op-acquire-3.c scan-assembler-not dmb > gcc.target/arm/atomic-op-acquire-3.c scan-assembler-times ldaex\tr[0-9]+, > \\[r[0-9]+\\] 6 > gcc.target/arm/atomic-op-acquire-3.c scan-assembler-times strex\t...?, > r[0-9]+, \\[r[0-9]+\\] 6 > gcc.target/arm/atomic-op-char-3.c (test for excess errors) > gcc.target/arm/atomic-op-char-3.c scan-assembler-not dmb > gcc.target/arm/atomic-op-char-3.c scan-assembler-times ldrexb\tr[0-9]+, > \\[r[0-9]+\\] 6 > gcc.target/arm/atomic-op-char-3.c scan-assembler-times strexb\t...?, r[0-9]+, > \\[r[0-9]+\\] 6 > gcc.target/arm/atomic-op-consume-3.c (test for excess errors) > gcc.target/arm/atomic-op-consume-3.c scan-assembler-not dmb > gcc.target/arm/atomic-op-consume-3.c scan-assembler-times ldaex\tr[0-9]+, > \\[r[0-9]+\\] 6 > gcc.target/arm/atomic-op-consume-3.c scan-assembler-times strex\t...?, > r[0-9]+, \\[r[0-9]+\\] 6 > gcc.target/arm/atomic-op-int-3.c (test for excess errors) > gcc.target/arm/atomic-op-int-3.c scan-assembler-not dmb > gcc.target/arm/atomic-op-int-3.c scan-assembler-times ldrex\tr[0-9]+, > \\[r[0-9]+\\] 6 > gcc.target/arm/atomic-op-int-3.c scan-assembler-times strex\t...?, r[0-9]+, > \\[r[0-9]+\\] 6 > gcc.target/arm/atomic-op-relaxed-3.c (test for excess errors) > gcc.target/arm/atomic-op-relaxed-3.c scan-assembler-not dmb > gcc.target/arm/atomic-op-relaxed-3.c scan-assembler-times ldrex\tr[0-9]+, > \\[r[0-9]+\\] 6 > gcc.target/arm/atomic-op-relaxed-3.c scan-assembler-times strex\t...?, > r[0-9]+, \\[r[0-9]+\\] 6 > gcc.target/arm/atomic-op-release-3.c (test for excess errors) > gcc.target/arm/atomic-op-release-3.c s
