Re: [pushed][PATCH] wwwdocs: gcc-14/changes.html: Add Loongarch changes.

2024-04-24 Thread Lulu Cheng



在 2024/4/23 上午11:43, Lulu Cheng 写道:

---
  htdocs/gcc-14/changes.html | 156 +
  1 file changed, 156 insertions(+)

diff --git a/htdocs/gcc-14/changes.html b/htdocs/gcc-14/changes.html
index 9509487c..f0f0efe0 100644
--- a/htdocs/gcc-14/changes.html
+++ b/htdocs/gcc-14/changes.html
@@ -877,6 +877,162 @@ __asm (".global __flmap_lock"  "\n\t"

  
  
+LoongArch

+
+  Support for the following
+  https://gcc.gnu.org/onlinedocs/gcc/LoongArch-Options.html#index-march-7;>
+  -march parameters has been added:
+  
+la64v1.0
+la64v1.1
+la664
+  
+  It is now recommended to use -march=la64v1.0 as the only
+  compiler option to describe the target ISA when building binaries for
+  distribution. For more information on LoongArch ISA versions, see
+  https://github.com/loongson/la-toolchain-conventions/;>
+  Toolchain Conventions of the LoongArch™ Architecture.
+  
+  Support for the following
+  https://gcc.gnu.org/onlinedocs/gcc/LoongArch-Options.html#index-mtune-8;>
+  -mtune parameters has been added:
+  
+generic
+la664
+  
+  
+  New ISA Extension
+
+  LSX (Loongson SIMD Extension): Support 128-bit vector instructions
+  and the intrinsics.
+  
+  LASX (Loongson Advanced SIMD Extension): Support 256-bit vector
+  instructions and the intrinsics.
+  
+  FRECIPE: Support frecipe.{s/d} and
+  frsqrte.{s/d} instructions and the intrinsics.
+  
+  DIV32: Support div.w[u] and mod.w[u]
+  instructions with inputs not sign-extended.
+  
+  LAM_BH: Support am{swap/add}[_db].{b/h} instructions.
+  
+  LAMCAS: Support amcas[_db].{b/h/w/d} instructions.
+  
+
+  
+  New Built-in Macros
+
+  __loongarch_arch: Target ISA preset as specified by
+  -march=. For example, compiling with
+  -march=la64v1.0, the value of 
__loongarch_arch
+  is "la64v1.0".
+  
+  __loongarch_tune: Processor model as specified by
+  -mtune or its default value.
+  
+  __loongarch_{simd,sx,asx}: These macros are not defined,
+  or defined as 1.
+  
+  __loongarch_simd_width: The maximum SIMD bit-width
+  enabled by the compiler. (128 for lsx, and 256 for lasx).
+  
+  __loongarch_frecipe: It's defined to 1 or undefined.
+  
+  __loongarch_div32: It's defined to 1 or undefined.
+  __loongarch_lam_bh: It's defined to 1 or undefined.
+  __loongarch_lamcas: It's defined to 1 or undefined.
+  __loongarch_ld_seq_sa: It's defined to 1 or undefined.
+  
+  __loongarch_version_major:
+  The minimally required LoongArch ISA version (major) to run the
+  compiled program, defined to 1 or undefined (iff no such version is
+  known to the compiler).
+  
+  __loongarch_version_minor:
+  The minimally required LoongArch ISA version (minor) to run the
+  compiled program, defined to 0 1 or undefined (iff
+  __loongarch_version_major is undefined).
+  
+  __FLOAT128_TYPE: It's defined to 1.
+
+  
+  New Intrinsics
+
+  https://gcc.gnu.org/onlinedocs/gcc/LoongArch-Base-Built-in-Functions.html;>
+  __builtin_thread_pointer
+  
+  https://gcc.gnu.org/onlinedocs/gcc/LoongArch-SX-Vector-Intrinsics.html;>
+  __lsx_*
+  
+  https://gcc.gnu.org/onlinedocs/gcc/LoongArch-ASX-Vector-Intrinsics.html;>
+  __lasx_*
+  
+  https://gcc.gnu.org/onlinedocs/gcc/LoongArch-Base-Built-in-Functions.html;>
+  __frecipe_{s/d} and __frsqrte_{s/d}
+  
+
+  
+  New Compiler Option
+
+  https://gcc.gnu.org/onlinedocs/gcc/LoongArch-Options.html#index-ml_005ba_005dsx;>
+  -m[no-]lsx
+  
+  https://gcc.gnu.org/onlinedocs/gcc/LoongArch-Options.html#index-ml_005ba_005dsx;>
+  -m[no-]lasx
+  
+  https://gcc.gnu.org/onlinedocs/gcc/LoongArch-Options.html#index-mfrecipe;>
+  -m[no-]frecipe
+  
+  https://gcc.gnu.org/onlinedocs/gcc/LoongArch-Options.html#index-mdiv32;>
+  -m[no-]div32
+  
+  https://gcc.gnu.org/onlinedocs/gcc/LoongArch-Options.html#index-mlam-bh;>
+  -m[no-]lam-bh
+  
+  https://gcc.gnu.org/onlinedocs/gcc/LoongArch-Options.html#index-mlamcas;>
+  -m[no-]lamcas
+  
+  https://gcc.gnu.org/onlinedocs/gcc/LoongArch-Options.html#index-mld-seq-sa;>
+  -m[no-]ld-seq-sa
+  
+  https://gcc.gnu.org/onlinedocs/gcc/LoongArch-Options.html#index-mrecip_003dopt;>
+  -mrecip=
+  
+  https://gcc.gnu.org/onlinedocs/gcc/LoongArch-Options.html#index-mrecip;>
+  -m[no-]recip
+  
+  https://gcc.gnu.org/onlinedocs/gcc/LoongArch-Options.html#index-mexplicit-relocs-1;>
+  -mexplicit-relocs={none,always,auto}
+  
+  

[PATCH] wwwdocs: gcc-14/changes.html: Add Loongarch changes.

2024-04-22 Thread Lulu Cheng
---
 htdocs/gcc-14/changes.html | 156 +
 1 file changed, 156 insertions(+)

diff --git a/htdocs/gcc-14/changes.html b/htdocs/gcc-14/changes.html
index 9509487c..f0f0efe0 100644
--- a/htdocs/gcc-14/changes.html
+++ b/htdocs/gcc-14/changes.html
@@ -877,6 +877,162 @@ __asm (".global __flmap_lock"  "\n\t"
   
 
 
+LoongArch
+
+  Support for the following
+  https://gcc.gnu.org/onlinedocs/gcc/LoongArch-Options.html#index-march-7;>
+  -march parameters has been added:
+  
+la64v1.0
+la64v1.1
+la664
+  
+  It is now recommended to use -march=la64v1.0 as the only
+  compiler option to describe the target ISA when building binaries for
+  distribution. For more information on LoongArch ISA versions, see
+  https://github.com/loongson/la-toolchain-conventions/;>
+  Toolchain Conventions of the LoongArch™ Architecture.
+  
+  Support for the following
+  https://gcc.gnu.org/onlinedocs/gcc/LoongArch-Options.html#index-mtune-8;>
+  -mtune parameters has been added:
+  
+generic
+la664
+  
+  
+  New ISA Extension
+
+  LSX (Loongson SIMD Extension): Support 128-bit vector instructions
+  and the intrinsics.
+  
+  LASX (Loongson Advanced SIMD Extension): Support 256-bit vector
+  instructions and the intrinsics.
+  
+  FRECIPE: Support frecipe.{s/d} and
+  frsqrte.{s/d} instructions and the intrinsics.
+  
+  DIV32: Support div.w[u] and mod.w[u]
+  instructions with inputs not sign-extended.
+  
+  LAM_BH: Support am{swap/add}[_db].{b/h} instructions.
+  
+  LAMCAS: Support amcas[_db].{b/h/w/d} instructions.
+  
+
+  
+  New Built-in Macros
+
+  __loongarch_arch: Target ISA preset as specified by
+  -march=. For example, compiling with
+  -march=la64v1.0, the value of 
__loongarch_arch
+  is "la64v1.0".
+  
+  __loongarch_tune: Processor model as specified by
+  -mtune or its default value.
+  
+  __loongarch_{simd,sx,asx}: These macros are not defined,
+  or defined as 1.
+  
+  __loongarch_simd_width: The maximum SIMD bit-width
+  enabled by the compiler. (128 for lsx, and 256 for lasx).
+  
+  __loongarch_frecipe: It's defined to 1 or undefined.
+  
+  __loongarch_div32: It's defined to 1 or undefined.
+  __loongarch_lam_bh: It's defined to 1 or undefined.
+  __loongarch_lamcas: It's defined to 1 or undefined.
+  __loongarch_ld_seq_sa: It's defined to 1 or undefined.
+  
+  __loongarch_version_major:
+  The minimally required LoongArch ISA version (major) to run the
+  compiled program, defined to 1 or undefined (iff no such version is
+  known to the compiler).
+  
+  __loongarch_version_minor:
+  The minimally required LoongArch ISA version (minor) to run the
+  compiled program, defined to 0 1 or undefined (iff
+  __loongarch_version_major is undefined).
+  
+  __FLOAT128_TYPE: It's defined to 1.
+
+  
+  New Intrinsics
+
+  https://gcc.gnu.org/onlinedocs/gcc/LoongArch-Base-Built-in-Functions.html;>
+  __builtin_thread_pointer
+  
+  https://gcc.gnu.org/onlinedocs/gcc/LoongArch-SX-Vector-Intrinsics.html;>
+  __lsx_*
+  
+  https://gcc.gnu.org/onlinedocs/gcc/LoongArch-ASX-Vector-Intrinsics.html;>
+  __lasx_*
+  
+  https://gcc.gnu.org/onlinedocs/gcc/LoongArch-Base-Built-in-Functions.html;>
+  __frecipe_{s/d} and __frsqrte_{s/d}
+  
+
+  
+  New Compiler Option
+
+  https://gcc.gnu.org/onlinedocs/gcc/LoongArch-Options.html#index-ml_005ba_005dsx;>
+  -m[no-]lsx
+  
+  https://gcc.gnu.org/onlinedocs/gcc/LoongArch-Options.html#index-ml_005ba_005dsx;>
+  -m[no-]lasx
+  
+  https://gcc.gnu.org/onlinedocs/gcc/LoongArch-Options.html#index-mfrecipe;>
+  -m[no-]frecipe
+  
+  https://gcc.gnu.org/onlinedocs/gcc/LoongArch-Options.html#index-mdiv32;>
+  -m[no-]div32
+  
+  https://gcc.gnu.org/onlinedocs/gcc/LoongArch-Options.html#index-mlam-bh;>
+  -m[no-]lam-bh
+  
+  https://gcc.gnu.org/onlinedocs/gcc/LoongArch-Options.html#index-mlamcas;>
+  -m[no-]lamcas
+  
+  https://gcc.gnu.org/onlinedocs/gcc/LoongArch-Options.html#index-mld-seq-sa;>
+  -m[no-]ld-seq-sa
+  
+  https://gcc.gnu.org/onlinedocs/gcc/LoongArch-Options.html#index-mrecip_003dopt;>
+  -mrecip=
+  
+  https://gcc.gnu.org/onlinedocs/gcc/LoongArch-Options.html#index-mrecip;>
+  -m[no-]recip
+  
+  https://gcc.gnu.org/onlinedocs/gcc/LoongArch-Options.html#index-mexplicit-relocs-1;>
+  -mexplicit-relocs={none,always,auto}
+  
+  https://gcc.gnu.org/onlinedocs/gcc/LoongArch-Options.html#index-mrelax-2;>
+  -m[no-]relax
+  
+