Re: [PATCH 1/2] Allow subtarget customization of CC1_SPEC

2022-11-21 Thread Jeff Law via Gcc-patches



On 11/21/22 00:26, Sebastian Huber wrote:

On 20/11/2022 17:57, Jeff Law wrote:


On 10/26/22 03:34, Sebastian Huber wrote:

On 04/10/2022 11:47, Sebastian Huber wrote:

On 08/09/2022 07:33, Sebastian Huber wrote:

On 04/08/2022 15:02, Sebastian Huber wrote:

On 22/07/2022 15:02, Sebastian Huber wrote:

gcc/ChangeLog:

* gcc.cc (SUBTARGET_CC1_SPEC): Define if not defined.
(CC1_SPEC): Define to SUBTARGET_CC1_SPEC.
* config/arm/arm.h (CC1_SPEC): Remove.
* config/arc/arc.h (CC1_SPEC): Append SUBTARGET_CC1_SPEC.
* config/cris/cris.h (CC1_SPEC): Likewise.
* config/frv/frv.h (CC1_SPEC): Likewise.
* config/i386/i386.h (CC1_SPEC): Likewise.
* config/ia64/ia64.h (CC1_SPEC): Likewise.
* config/lm32/lm32.h (CC1_SPEC): Likewise.
* config/m32r/m32r.h (CC1_SPEC): Likewise.
* config/mcore/mcore.h (CC1_SPEC): Likewise.
* config/microblaze/microblaze.h: Likewise.
* config/nds32/nds32.h (CC1_SPEC): Likewise.
* config/nios2/nios2.h (CC1_SPEC): Likewise.
* config/pa/pa.h (CC1_SPEC): Likewise.
* config/rs6000/sysv4.h (CC1_SPEC): Likewise.
* config/rx/rx.h (CC1_SPEC): Likewise.
* config/sparc/sparc.h (CC1_SPEC): Likewise.


Could someone please have a look at this patch set?


Ping


Would someone mind having a look at this patch set? If there is a 
better approach to customize the default TLS model, then please let 
me know.


It would be nice if someone could review the patch before the Stage 
1 ends at November 13th.


Just a reminder.  The guidelines are a patch needs to be posted 
before the end of stage1 to make the deadline.  Review & integration 
can happen after the deadline.


I realize the idea here is to allow RTEMS to change the default TLS 
model.  But does it also happen to make it possible to solve Keith 
Packard's issues with picolibc?  See the Aug/Sep gcc-patches archives.


It looks sensible.  I assume you did a "find" to identify all the 
CC1_SPECs to change.



OK for the trunk,


Thanks for having a look at the patch. After looking at the patch 
again, I think it can be simplified to:


https://gcc.gnu.org/pipermail/gcc-patches/2022-November/606841.html


That's fine as well.
Jeff




Re: [PATCH 1/2] Allow subtarget customization of CC1_SPEC

2022-11-20 Thread Sebastian Huber

On 20/11/2022 17:57, Jeff Law wrote:


On 10/26/22 03:34, Sebastian Huber wrote:

On 04/10/2022 11:47, Sebastian Huber wrote:

On 08/09/2022 07:33, Sebastian Huber wrote:

On 04/08/2022 15:02, Sebastian Huber wrote:

On 22/07/2022 15:02, Sebastian Huber wrote:

gcc/ChangeLog:

* gcc.cc (SUBTARGET_CC1_SPEC): Define if not defined.
(CC1_SPEC): Define to SUBTARGET_CC1_SPEC.
* config/arm/arm.h (CC1_SPEC): Remove.
* config/arc/arc.h (CC1_SPEC): Append SUBTARGET_CC1_SPEC.
* config/cris/cris.h (CC1_SPEC): Likewise.
* config/frv/frv.h (CC1_SPEC): Likewise.
* config/i386/i386.h (CC1_SPEC): Likewise.
* config/ia64/ia64.h (CC1_SPEC): Likewise.
* config/lm32/lm32.h (CC1_SPEC): Likewise.
* config/m32r/m32r.h (CC1_SPEC): Likewise.
* config/mcore/mcore.h (CC1_SPEC): Likewise.
* config/microblaze/microblaze.h: Likewise.
* config/nds32/nds32.h (CC1_SPEC): Likewise.
* config/nios2/nios2.h (CC1_SPEC): Likewise.
* config/pa/pa.h (CC1_SPEC): Likewise.
* config/rs6000/sysv4.h (CC1_SPEC): Likewise.
* config/rx/rx.h (CC1_SPEC): Likewise.
* config/sparc/sparc.h (CC1_SPEC): Likewise.


Could someone please have a look at this patch set?


Ping


Would someone mind having a look at this patch set? If there is a 
better approach to customize the default TLS model, then please let 
me know.


It would be nice if someone could review the patch before the Stage 1 
ends at November 13th.


Just a reminder.  The guidelines are a patch needs to be posted before 
the end of stage1 to make the deadline.  Review & integration can happen 
after the deadline.


I realize the idea here is to allow RTEMS to change the default TLS 
model.  But does it also happen to make it possible to solve Keith 
Packard's issues with picolibc?  See the Aug/Sep gcc-patches archives.


It looks sensible.  I assume you did a "find" to identify all the 
CC1_SPECs to change.



OK for the trunk,


Thanks for having a look at the patch. After looking at the patch again, 
I think it can be simplified to:


https://gcc.gnu.org/pipermail/gcc-patches/2022-November/606841.html



Jeff


Anyway, does this also solve some of the issue Keith Packard was try to 
nail down for picolibc?


I had a look at this, however, I think this is a slightly different 
problem since LIB_SPEC needs to be replaced and not extended.


--
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Re: [PATCH 1/2] Allow subtarget customization of CC1_SPEC

2022-11-20 Thread Jeff Law via Gcc-patches



On 10/26/22 03:34, Sebastian Huber wrote:

On 04/10/2022 11:47, Sebastian Huber wrote:

On 08/09/2022 07:33, Sebastian Huber wrote:

On 04/08/2022 15:02, Sebastian Huber wrote:

On 22/07/2022 15:02, Sebastian Huber wrote:

gcc/ChangeLog:

* gcc.cc (SUBTARGET_CC1_SPEC): Define if not defined.
(CC1_SPEC): Define to SUBTARGET_CC1_SPEC.
* config/arm/arm.h (CC1_SPEC): Remove.
* config/arc/arc.h (CC1_SPEC): Append SUBTARGET_CC1_SPEC.
* config/cris/cris.h (CC1_SPEC): Likewise.
* config/frv/frv.h (CC1_SPEC): Likewise.
* config/i386/i386.h (CC1_SPEC): Likewise.
* config/ia64/ia64.h (CC1_SPEC): Likewise.
* config/lm32/lm32.h (CC1_SPEC): Likewise.
* config/m32r/m32r.h (CC1_SPEC): Likewise.
* config/mcore/mcore.h (CC1_SPEC): Likewise.
* config/microblaze/microblaze.h: Likewise.
* config/nds32/nds32.h (CC1_SPEC): Likewise.
* config/nios2/nios2.h (CC1_SPEC): Likewise.
* config/pa/pa.h (CC1_SPEC): Likewise.
* config/rs6000/sysv4.h (CC1_SPEC): Likewise.
* config/rx/rx.h (CC1_SPEC): Likewise.
* config/sparc/sparc.h (CC1_SPEC): Likewise.


Could someone please have a look at this patch set?


Ping


Would someone mind having a look at this patch set? If there is a 
better approach to customize the default TLS model, then please let 
me know.


It would be nice if someone could review the patch before the Stage 1 
ends at November 13th.


Just a reminder.  The guidelines are a patch needs to be posted before 
the end of stage1 to make the deadline.  Review & integration can happen 
after the deadline.


I realize the idea here is to allow RTEMS to change the default TLS 
model.  But does it also happen to make it possible to solve Keith 
Packard's issues with picolibc?  See the Aug/Sep gcc-patches archives.


It looks sensible.  I assume you did a "find" to identify all the 
CC1_SPECs to change.



OK for the trunk,

Jeff


Anyway, does this also solve some of the issue Keith Packard was try to 
nail down for picolibc?




Re: [PATCH 1/2] Allow subtarget customization of CC1_SPEC

2022-10-26 Thread Sebastian Huber

On 04/10/2022 11:47, Sebastian Huber wrote:

On 08/09/2022 07:33, Sebastian Huber wrote:

On 04/08/2022 15:02, Sebastian Huber wrote:

On 22/07/2022 15:02, Sebastian Huber wrote:

gcc/ChangeLog:

* gcc.cc (SUBTARGET_CC1_SPEC): Define if not defined.
(CC1_SPEC): Define to SUBTARGET_CC1_SPEC.
* config/arm/arm.h (CC1_SPEC): Remove.
* config/arc/arc.h (CC1_SPEC): Append SUBTARGET_CC1_SPEC.
* config/cris/cris.h (CC1_SPEC): Likewise.
* config/frv/frv.h (CC1_SPEC): Likewise.
* config/i386/i386.h (CC1_SPEC): Likewise.
* config/ia64/ia64.h (CC1_SPEC): Likewise.
* config/lm32/lm32.h (CC1_SPEC): Likewise.
* config/m32r/m32r.h (CC1_SPEC): Likewise.
* config/mcore/mcore.h (CC1_SPEC): Likewise.
* config/microblaze/microblaze.h: Likewise.
* config/nds32/nds32.h (CC1_SPEC): Likewise.
* config/nios2/nios2.h (CC1_SPEC): Likewise.
* config/pa/pa.h (CC1_SPEC): Likewise.
* config/rs6000/sysv4.h (CC1_SPEC): Likewise.
* config/rx/rx.h (CC1_SPEC): Likewise.
* config/sparc/sparc.h (CC1_SPEC): Likewise.


Could someone please have a look at this patch set?


Ping.


Would someone mind having a look at this patch set? If there is a better 
approach to customize the default TLS model, then please let me know.


It would be nice if someone could review the patch before the Stage 1 
ends at November 13th.


--
embedded brains GmbH
Herr Sebastian HUBER
Dornierstr. 4
82178 Puchheim
Germany
email: sebastian.hu...@embedded-brains.de
phone: +49-89-18 94 741 - 16
fax:   +49-89-18 94 741 - 08

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Registernummer: HRB 157899
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Unsere Datenschutzerklärung finden Sie hier:
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Re: [PATCH 1/2] Allow subtarget customization of CC1_SPEC

2022-10-04 Thread Sebastian Huber

On 08/09/2022 07:33, Sebastian Huber wrote:

On 04/08/2022 15:02, Sebastian Huber wrote:

On 22/07/2022 15:02, Sebastian Huber wrote:

gcc/ChangeLog:

* gcc.cc (SUBTARGET_CC1_SPEC): Define if not defined.
(CC1_SPEC): Define to SUBTARGET_CC1_SPEC.
* config/arm/arm.h (CC1_SPEC): Remove.
* config/arc/arc.h (CC1_SPEC): Append SUBTARGET_CC1_SPEC.
* config/cris/cris.h (CC1_SPEC): Likewise.
* config/frv/frv.h (CC1_SPEC): Likewise.
* config/i386/i386.h (CC1_SPEC): Likewise.
* config/ia64/ia64.h (CC1_SPEC): Likewise.
* config/lm32/lm32.h (CC1_SPEC): Likewise.
* config/m32r/m32r.h (CC1_SPEC): Likewise.
* config/mcore/mcore.h (CC1_SPEC): Likewise.
* config/microblaze/microblaze.h: Likewise.
* config/nds32/nds32.h (CC1_SPEC): Likewise.
* config/nios2/nios2.h (CC1_SPEC): Likewise.
* config/pa/pa.h (CC1_SPEC): Likewise.
* config/rs6000/sysv4.h (CC1_SPEC): Likewise.
* config/rx/rx.h (CC1_SPEC): Likewise.
* config/sparc/sparc.h (CC1_SPEC): Likewise.


Could someone please have a look at this patch set?


Ping.


Would someone mind having a look at this patch set? If there is a better 
approach to customize the default TLS model, then please let me know.


--
embedded brains GmbH
Herr Sebastian HUBER
Dornierstr. 4
82178 Puchheim
Germany
email: sebastian.hu...@embedded-brains.de
phone: +49-89-18 94 741 - 16
fax:   +49-89-18 94 741 - 08

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Registernummer: HRB 157899
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Unsere Datenschutzerklärung finden Sie hier:
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Re: [PATCH 1/2] Allow subtarget customization of CC1_SPEC

2022-09-07 Thread Sebastian Huber

On 04/08/2022 15:02, Sebastian Huber wrote:

On 22/07/2022 15:02, Sebastian Huber wrote:

gcc/ChangeLog:

* gcc.cc (SUBTARGET_CC1_SPEC): Define if not defined.
(CC1_SPEC): Define to SUBTARGET_CC1_SPEC.
* config/arm/arm.h (CC1_SPEC): Remove.
* config/arc/arc.h (CC1_SPEC): Append SUBTARGET_CC1_SPEC.
* config/cris/cris.h (CC1_SPEC): Likewise.
* config/frv/frv.h (CC1_SPEC): Likewise.
* config/i386/i386.h (CC1_SPEC): Likewise.
* config/ia64/ia64.h (CC1_SPEC): Likewise.
* config/lm32/lm32.h (CC1_SPEC): Likewise.
* config/m32r/m32r.h (CC1_SPEC): Likewise.
* config/mcore/mcore.h (CC1_SPEC): Likewise.
* config/microblaze/microblaze.h: Likewise.
* config/nds32/nds32.h (CC1_SPEC): Likewise.
* config/nios2/nios2.h (CC1_SPEC): Likewise.
* config/pa/pa.h (CC1_SPEC): Likewise.
* config/rs6000/sysv4.h (CC1_SPEC): Likewise.
* config/rx/rx.h (CC1_SPEC): Likewise.
* config/sparc/sparc.h (CC1_SPEC): Likewise.


Could someone please have a look at this patch set?


Ping.

--
embedded brains GmbH
Herr Sebastian HUBER
Dornierstr. 4
82178 Puchheim
Germany
email: sebastian.hu...@embedded-brains.de
phone: +49-89-18 94 741 - 16
fax:   +49-89-18 94 741 - 08

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Re: [PATCH 1/2] Allow subtarget customization of CC1_SPEC

2022-08-04 Thread Sebastian Huber

On 22/07/2022 15:02, Sebastian Huber wrote:

gcc/ChangeLog:

* gcc.cc (SUBTARGET_CC1_SPEC): Define if not defined.
(CC1_SPEC): Define to SUBTARGET_CC1_SPEC.
* config/arm/arm.h (CC1_SPEC): Remove.
* config/arc/arc.h (CC1_SPEC): Append SUBTARGET_CC1_SPEC.
* config/cris/cris.h (CC1_SPEC): Likewise.
* config/frv/frv.h (CC1_SPEC): Likewise.
* config/i386/i386.h (CC1_SPEC): Likewise.
* config/ia64/ia64.h (CC1_SPEC): Likewise.
* config/lm32/lm32.h (CC1_SPEC): Likewise.
* config/m32r/m32r.h (CC1_SPEC): Likewise.
* config/mcore/mcore.h (CC1_SPEC): Likewise.
* config/microblaze/microblaze.h: Likewise.
* config/nds32/nds32.h (CC1_SPEC): Likewise.
* config/nios2/nios2.h (CC1_SPEC): Likewise.
* config/pa/pa.h (CC1_SPEC): Likewise.
* config/rs6000/sysv4.h (CC1_SPEC): Likewise.
* config/rx/rx.h (CC1_SPEC): Likewise.
* config/sparc/sparc.h (CC1_SPEC): Likewise.


Could someone please have a look at this patch set?

--
embedded brains GmbH
Herr Sebastian HUBER
Dornierstr. 4
82178 Puchheim
Germany
email: sebastian.hu...@embedded-brains.de
phone: +49-89-18 94 741 - 16
fax:   +49-89-18 94 741 - 08

Registergericht: Amtsgericht München
Registernummer: HRB 157899
Vertretungsberechtigte Geschäftsführer: Peter Rasmussen, Thomas Dörfler
Unsere Datenschutzerklärung finden Sie hier:
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Re: [PATCH 1/2] Allow subtarget customization of CC1_SPEC

2022-07-25 Thread Iain Sandoe via Gcc-patches
Hi Sebastian,

> On 25 Jul 2022, at 06:59, Sebastian Huber 
>  wrote:

> On 22/07/2022 16:02, Jose E. Marchesi wrote:
>> I find "subtarget" confusing in this context.
>> If it is about rtems.h, linux.h or sol2.h, wouldn't this be better
>> called OS_CC1_SPEC or similar?  These files specify configurations that
>> apply to a set of targets, not to a subset of a target...
> 
> Iain Sandoe told me that for the GCC implementation the OSs are sub-targets 
> of the architecture:
> 
> https://gcc.gnu.org/pipermail/gcc/2022-July/239158.html

There is, however, a precedent for the SUBTARGET_ use, however, I agree with 
Jose that it is somewhat confusing - since (as mentioned before) to the OS the 
arches are the sub-targets, so maybe OS_xxx would be more clear.

Perhaps Joseph (CC-d) would weigh in here.

Iain



Re: [PATCH 1/2] Allow subtarget customization of CC1_SPEC

2022-07-25 Thread Sebastian Huber

Hallo Jose,

On 22/07/2022 16:02, Jose E. Marchesi wrote:

I find "subtarget" confusing in this context.

If it is about rtems.h, linux.h or sol2.h, wouldn't this be better
called OS_CC1_SPEC or similar?  These files specify configurations that
apply to a set of targets, not to a subset of a target...


Iain Sandoe told me that for the GCC implementation the OSs are 
sub-targets of the architecture:


https://gcc.gnu.org/pipermail/gcc/2022-July/239158.html

--
embedded brains GmbH
Herr Sebastian HUBER
Dornierstr. 4
82178 Puchheim
Germany
email: sebastian.hu...@embedded-brains.de
phone: +49-89-18 94 741 - 16
fax:   +49-89-18 94 741 - 08

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Re: [PATCH 1/2] Allow subtarget customization of CC1_SPEC

2022-07-22 Thread Jose E. Marchesi via Gcc-patches


Hi Sebastian.

I find "subtarget" confusing in this context.

If it is about rtems.h, linux.h or sol2.h, wouldn't this be better
called OS_CC1_SPEC or similar?  These files specify configurations that
apply to a set of targets, not to a subset of a target...

> gcc/ChangeLog:
>
>   * gcc.cc (SUBTARGET_CC1_SPEC): Define if not defined.
>   (CC1_SPEC): Define to SUBTARGET_CC1_SPEC.
>   * config/arm/arm.h (CC1_SPEC): Remove.
>   * config/arc/arc.h (CC1_SPEC): Append SUBTARGET_CC1_SPEC.
>   * config/cris/cris.h (CC1_SPEC): Likewise.
>   * config/frv/frv.h (CC1_SPEC): Likewise.
>   * config/i386/i386.h (CC1_SPEC): Likewise.
>   * config/ia64/ia64.h (CC1_SPEC): Likewise.
>   * config/lm32/lm32.h (CC1_SPEC): Likewise.
>   * config/m32r/m32r.h (CC1_SPEC): Likewise.
>   * config/mcore/mcore.h (CC1_SPEC): Likewise.
>   * config/microblaze/microblaze.h: Likewise.
>   * config/nds32/nds32.h (CC1_SPEC): Likewise.
>   * config/nios2/nios2.h (CC1_SPEC): Likewise.
>   * config/pa/pa.h (CC1_SPEC): Likewise.
>   * config/rs6000/sysv4.h (CC1_SPEC): Likewise.
>   * config/rx/rx.h (CC1_SPEC): Likewise.
>   * config/sparc/sparc.h (CC1_SPEC): Likewise.
> ---
>  gcc/config/arc/arc.h   | 3 ++-
>  gcc/config/arm/arm.h   | 4 
>  gcc/config/cris/cris.h | 3 ++-
>  gcc/config/frv/frv.h   | 2 +-
>  gcc/config/i386/i386.h | 2 +-
>  gcc/config/ia64/ia64.h | 2 +-
>  gcc/config/lm32/lm32.h | 2 +-
>  gcc/config/m32r/m32r.h | 2 +-
>  gcc/config/mcore/mcore.h   | 2 +-
>  gcc/config/microblaze/microblaze.h | 3 ++-
>  gcc/config/nds32/nds32.h   | 2 +-
>  gcc/config/nios2/nios2.h   | 2 +-
>  gcc/config/pa/pa.h | 2 +-
>  gcc/config/rs6000/sysv4.h  | 3 ++-
>  gcc/config/rx/rx.h | 3 ++-
>  gcc/config/sparc/sparc.h   | 2 +-
>  gcc/gcc.cc | 8 +++-
>  17 files changed, 27 insertions(+), 20 deletions(-)
>
> diff --git a/gcc/config/arc/arc.h b/gcc/config/arc/arc.h
> index 539a1662084..177287b11aa 100644
> --- a/gcc/config/arc/arc.h
> +++ b/gcc/config/arc/arc.h
> @@ -68,7 +68,8 @@ along with GCC; see the file COPYING3.  If not see
>  #define CC1_SPEC "%{EB:%{EL:%emay not use both -EB and -EL}} \
>  %{EB:-mbig-endian} %{EL:-mlittle-endian} \
>  %{G*}\
> -"
> +"\
> +SUBTARGET_CC1_SPEC
>  extern const char *arc_cpu_to_as (int argc, const char **argv);
>  
>  #define EXTRA_SPEC_FUNCTIONS \
> diff --git a/gcc/config/arm/arm.h b/gcc/config/arm/arm.h
> index f479540812a..24fdf7fde23 100644
> --- a/gcc/config/arm/arm.h
> +++ b/gcc/config/arm/arm.h
> @@ -91,10 +91,6 @@ extern tree arm_bf16_ptr_type_node;
>  #undef  CPP_SPEC
>  #define CPP_SPEC "%(subtarget_cpp_spec)"
>  
> -#ifndef CC1_SPEC
> -#define CC1_SPEC ""
> -#endif
> -
>  /* This macro defines names of additional specifications to put in the specs
> that can be used in various specifications like CC1_SPEC.  Its definition
> is an initializer with a subgrouping for each command option.
> diff --git a/gcc/config/cris/cris.h b/gcc/config/cris/cris.h
> index 6edfe13d92c..ed89b3fa6b0 100644
> --- a/gcc/config/cris/cris.h
> +++ b/gcc/config/cris/cris.h
> @@ -135,7 +135,8 @@ extern int cris_cpu_version;
>%{metrax100:-march=v8}\
>%{march=*:-march=%*}\
>%{mcpu=*:-mcpu=%*}\
> -  %(cc1_subtarget)"
> +  %(cc1_subtarget)" \
> +  SUBTARGET_CC1_SPEC
>  
>  /* For the cris-*-elf subtarget.  */
>  #define CRIS_CC1_SUBTARGET_SPEC \
> diff --git a/gcc/config/frv/frv.h b/gcc/config/frv/frv.h
> index 8cd67f75b09..b0f39ee238e 100644
> --- a/gcc/config/frv/frv.h
> +++ b/gcc/config/frv/frv.h
> @@ -115,7 +115,7 @@
>  
> Do not define this macro if it does not need to do anything.  */
>  /* For ABI compliance, we need to put bss data into the normal data section. 
>  */
> -#define CC1_SPEC "%{G*}"
> +#define CC1_SPEC "%{G*}" SUBTARGET_CC1_SPEC
>  
>  #undef   LINK_SPEC
>  #define LINK_SPEC "\
> diff --git a/gcc/config/i386/i386.h b/gcc/config/i386/i386.h
> index f16df633e84..f1ceb6b2557 100644
> --- a/gcc/config/i386/i386.h
> +++ b/gcc/config/i386/i386.h
> @@ -614,7 +614,7 @@ extern const char *host_detect_local_cpu (int argc, const 
> char **argv);
>  #define TARGET_D_HAS_STDCALL_CONVENTION ix86_d_has_stdcall_convention
>  
>  #ifndef CC1_SPEC
> -#define CC1_SPEC "%(cc1_cpu) "
> +#define CC1_SPEC "%(cc1_cpu) " SUBTARGET_CC1_SPEC
>  #endif
>  
>  /* This macro defines names of additional specifications to put in the
> diff --git a/gcc/config/ia64/ia64.h b/gcc/config/ia64/ia64.h
> index bd0ef35e9a4..0e11cef0edc 100644
> --- a/gcc/config/ia64/ia64.h
> +++ b/gcc/config/ia64/ia64.h
> @@ -51,7 +51,7 @@ do {\
>{ "asm_extra", 

[PATCH 1/2] Allow subtarget customization of CC1_SPEC

2022-07-22 Thread Sebastian Huber
gcc/ChangeLog:

* gcc.cc (SUBTARGET_CC1_SPEC): Define if not defined.
(CC1_SPEC): Define to SUBTARGET_CC1_SPEC.
* config/arm/arm.h (CC1_SPEC): Remove.
* config/arc/arc.h (CC1_SPEC): Append SUBTARGET_CC1_SPEC.
* config/cris/cris.h (CC1_SPEC): Likewise.
* config/frv/frv.h (CC1_SPEC): Likewise.
* config/i386/i386.h (CC1_SPEC): Likewise.
* config/ia64/ia64.h (CC1_SPEC): Likewise.
* config/lm32/lm32.h (CC1_SPEC): Likewise.
* config/m32r/m32r.h (CC1_SPEC): Likewise.
* config/mcore/mcore.h (CC1_SPEC): Likewise.
* config/microblaze/microblaze.h: Likewise.
* config/nds32/nds32.h (CC1_SPEC): Likewise.
* config/nios2/nios2.h (CC1_SPEC): Likewise.
* config/pa/pa.h (CC1_SPEC): Likewise.
* config/rs6000/sysv4.h (CC1_SPEC): Likewise.
* config/rx/rx.h (CC1_SPEC): Likewise.
* config/sparc/sparc.h (CC1_SPEC): Likewise.
---
 gcc/config/arc/arc.h   | 3 ++-
 gcc/config/arm/arm.h   | 4 
 gcc/config/cris/cris.h | 3 ++-
 gcc/config/frv/frv.h   | 2 +-
 gcc/config/i386/i386.h | 2 +-
 gcc/config/ia64/ia64.h | 2 +-
 gcc/config/lm32/lm32.h | 2 +-
 gcc/config/m32r/m32r.h | 2 +-
 gcc/config/mcore/mcore.h   | 2 +-
 gcc/config/microblaze/microblaze.h | 3 ++-
 gcc/config/nds32/nds32.h   | 2 +-
 gcc/config/nios2/nios2.h   | 2 +-
 gcc/config/pa/pa.h | 2 +-
 gcc/config/rs6000/sysv4.h  | 3 ++-
 gcc/config/rx/rx.h | 3 ++-
 gcc/config/sparc/sparc.h   | 2 +-
 gcc/gcc.cc | 8 +++-
 17 files changed, 27 insertions(+), 20 deletions(-)

diff --git a/gcc/config/arc/arc.h b/gcc/config/arc/arc.h
index 539a1662084..177287b11aa 100644
--- a/gcc/config/arc/arc.h
+++ b/gcc/config/arc/arc.h
@@ -68,7 +68,8 @@ along with GCC; see the file COPYING3.  If not see
 #define CC1_SPEC "%{EB:%{EL:%emay not use both -EB and -EL}}   \
 %{EB:-mbig-endian} %{EL:-mlittle-endian}   \
 %{G*}  \
-"
+"  \
+SUBTARGET_CC1_SPEC
 extern const char *arc_cpu_to_as (int argc, const char **argv);
 
 #define EXTRA_SPEC_FUNCTIONS   \
diff --git a/gcc/config/arm/arm.h b/gcc/config/arm/arm.h
index f479540812a..24fdf7fde23 100644
--- a/gcc/config/arm/arm.h
+++ b/gcc/config/arm/arm.h
@@ -91,10 +91,6 @@ extern tree arm_bf16_ptr_type_node;
 #undef  CPP_SPEC
 #define CPP_SPEC "%(subtarget_cpp_spec)"
 
-#ifndef CC1_SPEC
-#define CC1_SPEC ""
-#endif
-
 /* This macro defines names of additional specifications to put in the specs
that can be used in various specifications like CC1_SPEC.  Its definition
is an initializer with a subgrouping for each command option.
diff --git a/gcc/config/cris/cris.h b/gcc/config/cris/cris.h
index 6edfe13d92c..ed89b3fa6b0 100644
--- a/gcc/config/cris/cris.h
+++ b/gcc/config/cris/cris.h
@@ -135,7 +135,8 @@ extern int cris_cpu_version;
   %{metrax100:-march=v8}\
   %{march=*:-march=%*}\
   %{mcpu=*:-mcpu=%*}\
-  %(cc1_subtarget)"
+  %(cc1_subtarget)" \
+  SUBTARGET_CC1_SPEC
 
 /* For the cris-*-elf subtarget.  */
 #define CRIS_CC1_SUBTARGET_SPEC \
diff --git a/gcc/config/frv/frv.h b/gcc/config/frv/frv.h
index 8cd67f75b09..b0f39ee238e 100644
--- a/gcc/config/frv/frv.h
+++ b/gcc/config/frv/frv.h
@@ -115,7 +115,7 @@
 
Do not define this macro if it does not need to do anything.  */
 /* For ABI compliance, we need to put bss data into the normal data section.  
*/
-#define CC1_SPEC "%{G*}"
+#define CC1_SPEC "%{G*}" SUBTARGET_CC1_SPEC
 
 #undef LINK_SPEC
 #define LINK_SPEC "\
diff --git a/gcc/config/i386/i386.h b/gcc/config/i386/i386.h
index f16df633e84..f1ceb6b2557 100644
--- a/gcc/config/i386/i386.h
+++ b/gcc/config/i386/i386.h
@@ -614,7 +614,7 @@ extern const char *host_detect_local_cpu (int argc, const 
char **argv);
 #define TARGET_D_HAS_STDCALL_CONVENTION ix86_d_has_stdcall_convention
 
 #ifndef CC1_SPEC
-#define CC1_SPEC "%(cc1_cpu) "
+#define CC1_SPEC "%(cc1_cpu) " SUBTARGET_CC1_SPEC
 #endif
 
 /* This macro defines names of additional specifications to put in the
diff --git a/gcc/config/ia64/ia64.h b/gcc/config/ia64/ia64.h
index bd0ef35e9a4..0e11cef0edc 100644
--- a/gcc/config/ia64/ia64.h
+++ b/gcc/config/ia64/ia64.h
@@ -51,7 +51,7 @@ do {  \
   { "asm_extra", ASM_EXTRA_SPEC }, \
   SUBTARGET_EXTRA_SPECS
 
-#define CC1_SPEC "%(cc1_cpu) "
+#define CC1_SPEC "%(cc1_cpu) " SUBTARGET_CC1_SPEC
 
 #define ASM_EXTRA_SPEC ""
 
diff --git a/gcc/config/lm32/lm32.h b/gcc/config/lm32/lm32.h
index 23f66c90446..65a9141cd94 100644
--- a/gcc/config/lm32/lm32.h
+++ b/gcc/config/lm32/lm32.h
@@ -63,7 +63,7 @@
 #define LIB_SPEC "%{!T*:-T sim.ld}"
 
 #undef  CC1_SPEC
-#define CC1_SPEC "%{G*}"
+#define CC1_SPEC "%{G*}" SUBTARGET_CC1_SPEC