Re: [PATCH 10/10] x86: drop redundant "prefix_data16" attributes

[Hongtao Liu via Gcc-patches]

On Thu, Aug 3, 2023 at 4:17 PM Jan Beulich via Gcc-patches
 wrote:
>
> The attribute defaults to 1 for TI-mode insns of type sselog, sselog1,
> sseiadd, sseimul, and sseishft.
>
> In *v8hi3 [smaxmin] and *v16qi3 [umaxmin] also drop the
> similarly stray "prefix_extra" at this occasion. These two max/min
> flavors are encoded in 0f space.
Ok.
>
> gcc/
>
> * config/i386/mmx.md (*mmx_pinsrd): Drop "prefix_data16".
> (*mmx_pinsrb): Likewise.
> (*mmx_pextrb): Likewise.
> (*mmx_pextrb_zext): Likewise.
> (mmx_pshufbv8qi3): Likewise.
> (mmx_pshufbv4qi3): Likewise.
> (mmx_pswapdv2si2): Likewise.
> (*pinsrb): Likewise.
> (*pextrb): Likewise.
> (*pextrb_zext): Likewise.
> * config/i386/sse.md (*sse4_1_mulv2siv2di3): Likewise.
> (*sse2_eq3): Likewise.
> (*sse2_gt3): Likewise.
> (_pinsr): Likewise.
> (*vec_extract): Likewise.
> (*vec_extract_zext): Likewise.
> (*vec_extractv16qi_zext): Likewise.
> (ssse3_phwv8hi3): Likewise.
> (ssse3_pmaddubsw128): Likewise.
> (*_pmulhrsw3): Likewise.
> (_pshufb3): Likewise.
> (_psign3): Likewise.
> (_palignr): Likewise.
> (*abs2): Likewise.
> (sse4_2_pcmpestr): Likewise.
> (sse4_2_pcmpestri): Likewise.
> (sse4_2_pcmpestrm): Likewise.
> (sse4_2_pcmpestr_cconly): Likewise.
> (sse4_2_pcmpistr): Likewise.
> (sse4_2_pcmpistri): Likewise.
> (sse4_2_pcmpistrm): Likewise.
> (sse4_2_pcmpistr_cconly): Likewise.
> (vgf2p8affineinvqb_): Likewise.
> (vgf2p8affineqb_): Likewise.
> (vgf2p8mulb_): Likewise.
> (*v8hi3 [smaxmin]): Drop "prefix_data16" and
> "prefix_extra".
> (*v16qi3 [umaxmin]): Likewise.
>
> --- a/gcc/config/i386/mmx.md
> +++ b/gcc/config/i386/mmx.md
> @@ -3863,7 +3863,6 @@
>  }
>  }
>[(set_attr "isa" "noavx,avx")
> -   (set_attr "prefix_data16" "1")
> (set_attr "prefix_extra" "1")
> (set_attr "type" "sselog")
> (set_attr "length_immediate" "1")
> @@ -3950,7 +3949,6 @@
>  }
>[(set_attr "isa" "noavx,avx")
> (set_attr "type" "sselog")
> -   (set_attr "prefix_data16" "1")
> (set_attr "prefix_extra" "1")
> (set_attr "length_immediate" "1")
> (set_attr "prefix" "orig,vex")
> @@ -4002,7 +4000,6 @@
> %vpextrb\t{%2, %1, %k0|%k0, %1, %2}
> %vpextrb\t{%2, %1, %0|%0, %1, %2}"
>[(set_attr "type" "sselog1")
> -   (set_attr "prefix_data16" "1")
> (set_attr "prefix_extra" "1")
> (set_attr "length_immediate" "1")
> (set_attr "prefix" "maybe_vex")
> @@ -4017,7 +4014,6 @@
>"TARGET_SSE4_1 && TARGET_MMX_WITH_SSE"
>"%vpextrb\t{%2, %1, %k0|%k0, %1, %2}"
>[(set_attr "type" "sselog1")
> -   (set_attr "prefix_data16" "1")
> (set_attr "prefix_extra" "1")
> (set_attr "length_immediate" "1")
> (set_attr "prefix" "maybe_vex")
> @@ -4035,7 +4031,6 @@
> vpshufb\t{%2, %1, %0|%0, %1, %2}"
>[(set_attr "isa" "noavx,avx")
> (set_attr "type" "sselog1")
> -   (set_attr "prefix_data16" "1,*")
> (set_attr "prefix_extra" "1")
> (set_attr "prefix" "orig,maybe_evex")
> (set_attr "btver2_decode" "vector")
> @@ -4053,7 +4048,6 @@
> vpshufb\t{%2, %1, %0|%0, %1, %2}"
>[(set_attr "isa" "noavx,avx")
> (set_attr "type" "sselog1")
> -   (set_attr "prefix_data16" "1,*")
> (set_attr "prefix_extra" "1")
> (set_attr "prefix" "orig,maybe_evex")
> (set_attr "btver2_decode" "vector")
> @@ -4191,7 +4185,6 @@
> (set_attr "mmx_isa" "native,*")
> (set_attr "type" "mmxcvt,sselog1")
> (set_attr "prefix_extra" "1,*")
> -   (set_attr "prefix_data16" "*,1")
> (set_attr "length_immediate" "*,1")
> (set_attr "mode" "DI,TI")])
>
> @@ -4531,7 +4524,6 @@
>  }
>[(set_attr "isa" "noavx,avx")
> (set_attr "type" "sselog")
> -   (set_attr "prefix_data16" "1")
> (set_attr "prefix_extra" "1")
> (set_attr "length_immediate" "1")
> (set_attr "prefix" "orig,vex")
> @@ -4575,7 +4567,6 @@
> %vpextrb\t{%2, %1, %k0|%k0, %1, %2}
> %vpextrb\t{%2, %1, %0|%0, %1, %2}"
>[(set_attr "type" "sselog1")
> -   (set_attr "prefix_data16" "1")
> (set_attr "prefix_extra" "1")
> (set_attr "length_immediate" "1")
> (set_attr "prefix" "maybe_vex")
> @@ -4590,7 +4581,6 @@
>"TARGET_SSE4_1"
>"%vpextrb\t{%2, %1, %k0|%k0, %1, %2}"
>[(set_attr "type" "sselog1")
> -   (set_attr "prefix_data16" "1")
> (set_attr "prefix_extra" "1")
> (set_attr "length_immediate" "1")
> (set_attr "prefix" "maybe_vex")
> --- a/gcc/config/i386/sse.md
> +++ b/gcc/config/i386/sse.md
> @@ -15614,7 +15614,6 @@
> vpmuldq\t{%2, %1, %0|%0, %1, %2}"
>[(set_attr "isa" "noavx,noavx,avx")
> (set_attr "type" "sseimul")
> -   (set_attr "prefix_data16" "1,1,*")
> (set_attr "prefix_extra" "1")
> (set_attr "prefix" "orig,orig,vex")
> (set_attr "mode" "TI")])
> @@ -16688,8 +16687,6 @@
>

[PATCH 10/10] x86: drop redundant "prefix_data16" attributes

[Jan Beulich via Gcc-patches]

The attribute defaults to 1 for TI-mode insns of type sselog, sselog1,
sseiadd, sseimul, and sseishft.

In *v8hi3 [smaxmin] and *v16qi3 [umaxmin] also drop the
similarly stray "prefix_extra" at this occasion. These two max/min
flavors are encoded in 0f space.

gcc/

* config/i386/mmx.md (*mmx_pinsrd): Drop "prefix_data16".
(*mmx_pinsrb): Likewise.
(*mmx_pextrb): Likewise.
(*mmx_pextrb_zext): Likewise.
(mmx_pshufbv8qi3): Likewise.
(mmx_pshufbv4qi3): Likewise.
(mmx_pswapdv2si2): Likewise.
(*pinsrb): Likewise.
(*pextrb): Likewise.
(*pextrb_zext): Likewise.
* config/i386/sse.md (*sse4_1_mulv2siv2di3): Likewise.
(*sse2_eq3): Likewise.
(*sse2_gt3): Likewise.
(_pinsr): Likewise.
(*vec_extract): Likewise.
(*vec_extract_zext): Likewise.
(*vec_extractv16qi_zext): Likewise.
(ssse3_phwv8hi3): Likewise.
(ssse3_pmaddubsw128): Likewise.
(*_pmulhrsw3): Likewise.
(_pshufb3): Likewise.
(_psign3): Likewise.
(_palignr): Likewise.
(*abs2): Likewise.
(sse4_2_pcmpestr): Likewise.
(sse4_2_pcmpestri): Likewise.
(sse4_2_pcmpestrm): Likewise.
(sse4_2_pcmpestr_cconly): Likewise.
(sse4_2_pcmpistr): Likewise.
(sse4_2_pcmpistri): Likewise.
(sse4_2_pcmpistrm): Likewise.
(sse4_2_pcmpistr_cconly): Likewise.
(vgf2p8affineinvqb_): Likewise.
(vgf2p8affineqb_): Likewise.
(vgf2p8mulb_): Likewise.
(*v8hi3 [smaxmin]): Drop "prefix_data16" and
"prefix_extra".
(*v16qi3 [umaxmin]): Likewise.

--- a/gcc/config/i386/mmx.md
+++ b/gcc/config/i386/mmx.md
@@ -3863,7 +3863,6 @@
 }
 }
   [(set_attr "isa" "noavx,avx")
-   (set_attr "prefix_data16" "1")
(set_attr "prefix_extra" "1")
(set_attr "type" "sselog")
(set_attr "length_immediate" "1")
@@ -3950,7 +3949,6 @@
 }
   [(set_attr "isa" "noavx,avx")
(set_attr "type" "sselog")
-   (set_attr "prefix_data16" "1")
(set_attr "prefix_extra" "1")
(set_attr "length_immediate" "1")
(set_attr "prefix" "orig,vex")
@@ -4002,7 +4000,6 @@
%vpextrb\t{%2, %1, %k0|%k0, %1, %2}
%vpextrb\t{%2, %1, %0|%0, %1, %2}"
   [(set_attr "type" "sselog1")
-   (set_attr "prefix_data16" "1")
(set_attr "prefix_extra" "1")
(set_attr "length_immediate" "1")
(set_attr "prefix" "maybe_vex")
@@ -4017,7 +4014,6 @@
   "TARGET_SSE4_1 && TARGET_MMX_WITH_SSE"
   "%vpextrb\t{%2, %1, %k0|%k0, %1, %2}"
   [(set_attr "type" "sselog1")
-   (set_attr "prefix_data16" "1")
(set_attr "prefix_extra" "1")
(set_attr "length_immediate" "1")
(set_attr "prefix" "maybe_vex")
@@ -4035,7 +4031,6 @@
vpshufb\t{%2, %1, %0|%0, %1, %2}"
   [(set_attr "isa" "noavx,avx")
(set_attr "type" "sselog1")
-   (set_attr "prefix_data16" "1,*")
(set_attr "prefix_extra" "1")
(set_attr "prefix" "orig,maybe_evex")
(set_attr "btver2_decode" "vector")
@@ -4053,7 +4048,6 @@
vpshufb\t{%2, %1, %0|%0, %1, %2}"
   [(set_attr "isa" "noavx,avx")
(set_attr "type" "sselog1")
-   (set_attr "prefix_data16" "1,*")
(set_attr "prefix_extra" "1")
(set_attr "prefix" "orig,maybe_evex")
(set_attr "btver2_decode" "vector")
@@ -4191,7 +4185,6 @@
(set_attr "mmx_isa" "native,*")
(set_attr "type" "mmxcvt,sselog1")
(set_attr "prefix_extra" "1,*")
-   (set_attr "prefix_data16" "*,1")
(set_attr "length_immediate" "*,1")
(set_attr "mode" "DI,TI")])
 
@@ -4531,7 +4524,6 @@
 }
   [(set_attr "isa" "noavx,avx")
(set_attr "type" "sselog")
-   (set_attr "prefix_data16" "1")
(set_attr "prefix_extra" "1")
(set_attr "length_immediate" "1")
(set_attr "prefix" "orig,vex")
@@ -4575,7 +4567,6 @@
%vpextrb\t{%2, %1, %k0|%k0, %1, %2}
%vpextrb\t{%2, %1, %0|%0, %1, %2}"
   [(set_attr "type" "sselog1")
-   (set_attr "prefix_data16" "1")
(set_attr "prefix_extra" "1")
(set_attr "length_immediate" "1")
(set_attr "prefix" "maybe_vex")
@@ -4590,7 +4581,6 @@
   "TARGET_SSE4_1"
   "%vpextrb\t{%2, %1, %k0|%k0, %1, %2}"
   [(set_attr "type" "sselog1")
-   (set_attr "prefix_data16" "1")
(set_attr "prefix_extra" "1")
(set_attr "length_immediate" "1")
(set_attr "prefix" "maybe_vex")
--- a/gcc/config/i386/sse.md
+++ b/gcc/config/i386/sse.md
@@ -15614,7 +15614,6 @@
vpmuldq\t{%2, %1, %0|%0, %1, %2}"
   [(set_attr "isa" "noavx,noavx,avx")
(set_attr "type" "sseimul")
-   (set_attr "prefix_data16" "1,1,*")
(set_attr "prefix_extra" "1")
(set_attr "prefix" "orig,orig,vex")
(set_attr "mode" "TI")])
@@ -16688,8 +16687,6 @@
vpw\t{%2, %1, %0|%0, %1, %2}"
   [(set_attr "isa" "noavx,avx")
(set_attr "type" "sseiadd")
-   (set_attr "prefix_data16" "1,*")
-   (set_attr "prefix_extra" "*,1")
(set_attr "prefix" "orig,vex")
(set_attr "mode" "TI")])
 
@@ -16772,8 +16769,6 @@
vpb\t{%2, %1, %0|%0, %1, %2}"
   [(set_attr "isa" "noavx,avx")
(set_attr "type" "sse