Re: [PATCH 3/3] RISC-V: Support version controling for ISA standard extensions

2020-12-16 Thread Kito Cheng via Gcc-patches 
Hi Gerald:

Thanks for notifying me, we'll update that page soon :)

On Tue, Dec 15, 2020 at 4:08 PM Gerald Pfeifer  wrote:
>
> On Fri, 13 Nov 2020, Kito Cheng wrote:
> >  - New option -misa-spec support: -misa-spec=[2.2|20190608|20191213] and
> >corresponding configuration option --with-isa-spec.
>
> I noticed https://gcc.gnu.org/gcc-11/changes.html is currently empty.
>
> Are you planning to add updates for the GCC 11 release?  (It may be
> useful to add them as they happen, so they we won't miss them and
> also for the benefit of users tracking development.)
>
> Gerald

Re: [PATCH 3/3] RISC-V: Support version controling for ISA standard extensions

2020-12-15 Thread Gerald Pfeifer 
On Fri, 13 Nov 2020, Kito Cheng wrote:
>  - New option -misa-spec support: -misa-spec=[2.2|20190608|20191213] and
>corresponding configuration option --with-isa-spec.

I noticed https://gcc.gnu.org/gcc-11/changes.html is currently empty.

Are you planning to add updates for the GCC 11 release?  (It may be
useful to add them as they happen, so they we won't miss them and
also for the benefit of users tracking development.)

Gerald

Re: [PATCH 3/3] RISC-V: Support version controling for ISA standard extensions

2020-11-17 Thread Kito Cheng via Gcc-patches 
On Wed, Nov 18, 2020 at 5:29 AM Jim Wilson  wrote:
>
> On Thu, Nov 12, 2020 at 11:28 PM Kito Cheng  wrote:
>>
>> +#ifndef HAVE_AS_MARCH_ZIFENCE
>> +  /* Skip since older binutils don't recognize zifencei,
>> + we mad a mistake that is binutils 2.35 support zicsr but not support
>> + zifencei.  */
>> +  skip_zifencei = true;
>> +#endif
>
>
> I'd suggest something like "Skip since older binutils doesn't recognize 
> zifencei, we made a mistake in that binutils 2.35 supports zicsr but not 
> zifencei."

Thanks for suggestions :)

>>
>> diff --git a/gcc/config/riscv/riscv.h b/gcc/config/riscv/riscv.h
>> index 172c7ca7c98..9dec5415eab 100644
>> --- a/gcc/config/riscv/riscv.h
>> +++ b/gcc/config/riscv/riscv.h
>> @@ -70,13 +70,20 @@ extern const char *riscv_default_mtune (int argc, const 
>> char **argv);
>>  #define TARGET_64BIT   (__riscv_xlen == 64)
>>  #endif /* IN_LIBGCC2 */
>>
>> +#ifdef HAVE_AS_MISA_SPEC
>> +#define ASM_MISA_SPEC ""
>> +#else
>> +#define ASM_MISA_SPEC "%{misa-spec=*}"
>> +#endif
>
>
> This is backwards.  We do want to pass -misa-spec to the assembler if it 
> supports it.  Or maybe you meant ifndef?

Oh, it should be ifndef here.

Re: [PATCH 3/3] RISC-V: Support version controling for ISA standard extensions

2020-11-17 Thread Jim Wilson 
On Thu, Nov 12, 2020 at 11:28 PM Kito Cheng  wrote:

> +#ifndef HAVE_AS_MARCH_ZIFENCE
> +  /* Skip since older binutils don't recognize zifencei,
> + we mad a mistake that is binutils 2.35 support zicsr but not support
> + zifencei.  */
> +  skip_zifencei = true;
> +#endif
>

I'd suggest something like "Skip since older binutils doesn't recognize
zifencei, we made a mistake in that binutils 2.35 supports zicsr but not
zifencei."

> diff --git a/gcc/config/riscv/riscv.h b/gcc/config/riscv/riscv.h
> index 172c7ca7c98..9dec5415eab 100644
> --- a/gcc/config/riscv/riscv.h
> +++ b/gcc/config/riscv/riscv.h
> @@ -70,13 +70,20 @@ extern const char *riscv_default_mtune (int argc,
> const char **argv);
>  #define TARGET_64BIT   (__riscv_xlen == 64)
>  #endif /* IN_LIBGCC2 */
>
> +#ifdef HAVE_AS_MISA_SPEC
> +#define ASM_MISA_SPEC ""
> +#else
> +#define ASM_MISA_SPEC "%{misa-spec=*}"
> +#endif
>

This is backwards.  We do want to pass -misa-spec to the assembler if it
supports it.  Or maybe you meant ifndef?

Jim

Re: [PATCH 3/3] RISC-V: Support version controling for ISA standard extensions

2020-11-12 Thread Kito Cheng via Gcc-patches 
Oh I was dry-run but cc to gcc patches accidentally, but the patch set
is right, it just sent twice the same patch set.



On Fri, Nov 13, 2020 at 3:29 PM Kito Cheng  wrote:
>
>  - New option -misa-spec support: -misa-spec=[2.2|20190608|20191213] and
>corresponding configuration option --with-isa-spec.
>
>  - Current default ISA spec set to 2.2, but we intend to bump this to
>20191213 or later in next release.
>
> gcc/ChangeLog:
>
> * common/config/riscv/riscv-common.c (riscv_ext_version): New.
> (riscv_ext_version_table): Ditto.
> (get_default_version): Ditto.
> (riscv_subset_t::implied_p): New field.
> (riscv_subset_t::riscv_subset_t): Init implied_p.
> (riscv_subset_list::add): New.
> (riscv_subset_list::handle_implied_ext): Pass riscv_subset_t
> instead of separated argument.
> (riscv_subset_list::to_string): Handle zifencei and zicsr, and
> omit version if version is unknown.
> (riscv_subset_list::parsing_subset_version): New argument `ext`,
> remove default_major_version and default_minor_version, get
> default version info via get_default_version.
> (riscv_subset_list::parse_std_ext): Update argument for
> parsing_subset_version calls.
> Handle 2.2 ISA spec, always enable zicsr and zifencei, they are
> included in baseline ISA in that time.
> (riscv_subset_list::parse_multiletter_ext): Update argument for
> `parsing_subset_version` and `add` calls.
> (riscv_subset_list::parse): Adjust argument for
> riscv_subset_list::handle_implied_ext call.
> * config.gcc (riscv*-*-*): Handle --with-isa-spec=.
> * config.in (HAVE_AS_MISA_SPEC): New.
> (HAVE_AS_MARCH_ZIFENCEI): Ditto.
> * config/riscv/riscv-opts.h (riscv_isa_spec_class): New.
> (riscv_isa_spec): Ditto.
> * config/riscv/riscv.h (HAVE_AS_MISA_SPEC): New.
> (ASM_SPEC): Pass -misa-spec if gas supported.
> * config/riscv/riscv.opt (riscv_isa_spec_class) New.
> * configure.ac (HAVE_AS_MARCH_ZIFENCEI): New test.
> (HAVE_AS_MISA_SPEC): Ditto.
> * configure: Regen.
>
> gcc/testsuite/ChangeLog:
>
> * gcc.target/riscv/arch-9.c: New.
> * gcc.target/riscv/arch-10.c: Ditto.
> * gcc.target/riscv/arch-11.c: Ditto.
> * gcc.target/riscv/attribute-6.c: Remove, we don't support G
> with version anymore.
> * gcc.target/riscv/attribute-8.c: Reorder arch string to fit canonical
> ordering.
> * gcc.target/riscv/attribute-9.c: We don't emit version for
> unknown extensions now.
> * gcc.target/riscv/attribute-11.c: Add -misa-spec=2.2 flags.
> * gcc.target/riscv/attribute-12.c: Ditto.
> * gcc.target/riscv/attribute-13.c: Ditto.
> * gcc.target/riscv/attribute-14.c: Ditto.
> * gcc.target/riscv/attribute-15.c: New.
> * gcc.target/riscv/attribute-16.c: Ditto.
> * gcc.target/riscv/attribute-17.c: Ditto.
> ---
>  gcc/common/config/riscv/riscv-common.c| 288 +-
>  gcc/config.gcc|  17 +-
>  gcc/config.in |  12 +
>  gcc/config/riscv/riscv-opts.h |  10 +
>  gcc/config/riscv/riscv.h  |   9 +-
>  gcc/config/riscv/riscv.opt|  17 ++
>  gcc/configure |  62 
>  gcc/configure.ac  |  10 +
>  gcc/testsuite/gcc.target/riscv/arch-10.c  |   6 +
>  gcc/testsuite/gcc.target/riscv/arch-11.c  |   5 +
>  gcc/testsuite/gcc.target/riscv/arch-9.c   |   6 +
>  gcc/testsuite/gcc.target/riscv/attribute-11.c |   2 +-
>  gcc/testsuite/gcc.target/riscv/attribute-12.c |   2 +-
>  gcc/testsuite/gcc.target/riscv/attribute-13.c |   2 +-
>  gcc/testsuite/gcc.target/riscv/attribute-14.c |   4 +-
>  gcc/testsuite/gcc.target/riscv/attribute-15.c |   6 +
>  gcc/testsuite/gcc.target/riscv/attribute-16.c |   6 +
>  gcc/testsuite/gcc.target/riscv/attribute-17.c |   6 +
>  gcc/testsuite/gcc.target/riscv/attribute-6.c  |   6 -
>  gcc/testsuite/gcc.target/riscv/attribute-8.c  |   4 +-
>  gcc/testsuite/gcc.target/riscv/attribute-9.c  |   2 +-
>  21 files changed, 394 insertions(+), 88 deletions(-)
>  create mode 100644 gcc/testsuite/gcc.target/riscv/arch-10.c
>  create mode 100644 gcc/testsuite/gcc.target/riscv/arch-11.c
>  create mode 100644 gcc/testsuite/gcc.target/riscv/arch-9.c
>  create mode 100644 gcc/testsuite/gcc.target/riscv/attribute-15.c
>  create mode 100644 gcc/testsuite/gcc.target/riscv/attribute-16.c
>  create mode 100644 gcc/testsuite/gcc.target/riscv/attribute-17.c
>  delete mode 100644 gcc/testsuite/gcc.target/riscv/attribute-6.c
>
> diff --git a/gcc/common/config/riscv/riscv-common.c 
> b/gcc/common/config/riscv/riscv-common.c
> index ca88ca1dacd..ea2d516bb36 100644
> ---

[PATCH 3/3] RISC-V: Support version controling for ISA standard extensions

2020-11-12 Thread Kito Cheng 
 - New option -misa-spec support: -misa-spec=[2.2|20190608|20191213] and
   corresponding configuration option --with-isa-spec.

 - Current default ISA spec set to 2.2, but we intend to bump this to
   20191213 or later in next release.

gcc/ChangeLog:

* common/config/riscv/riscv-common.c (riscv_ext_version): New.
(riscv_ext_version_table): Ditto.
(get_default_version): Ditto.
(riscv_subset_t::implied_p): New field.
(riscv_subset_t::riscv_subset_t): Init implied_p.
(riscv_subset_list::add): New.
(riscv_subset_list::handle_implied_ext): Pass riscv_subset_t
instead of separated argument.
(riscv_subset_list::to_string): Handle zifencei and zicsr, and
omit version if version is unknown.
(riscv_subset_list::parsing_subset_version): New argument `ext`,
remove default_major_version and default_minor_version, get
default version info via get_default_version.
(riscv_subset_list::parse_std_ext): Update argument for
parsing_subset_version calls.
Handle 2.2 ISA spec, always enable zicsr and zifencei, they are
included in baseline ISA in that time.
(riscv_subset_list::parse_multiletter_ext): Update argument for
`parsing_subset_version` and `add` calls.
(riscv_subset_list::parse): Adjust argument for
riscv_subset_list::handle_implied_ext call.
* config.gcc (riscv*-*-*): Handle --with-isa-spec=.
* config.in (HAVE_AS_MISA_SPEC): New.
(HAVE_AS_MARCH_ZIFENCEI): Ditto.
* config/riscv/riscv-opts.h (riscv_isa_spec_class): New.
(riscv_isa_spec): Ditto.
* config/riscv/riscv.h (HAVE_AS_MISA_SPEC): New.
(ASM_SPEC): Pass -misa-spec if gas supported.
* config/riscv/riscv.opt (riscv_isa_spec_class) New.
* configure.ac (HAVE_AS_MARCH_ZIFENCEI): New test.
(HAVE_AS_MISA_SPEC): Ditto.
* configure: Regen.

gcc/testsuite/ChangeLog:

* gcc.target/riscv/arch-9.c: New.
* gcc.target/riscv/arch-10.c: Ditto.
* gcc.target/riscv/arch-11.c: Ditto.
* gcc.target/riscv/attribute-6.c: Remove, we don't support G
with version anymore.
* gcc.target/riscv/attribute-8.c: Reorder arch string to fit canonical
ordering.
* gcc.target/riscv/attribute-9.c: We don't emit version for
unknown extensions now.
* gcc.target/riscv/attribute-11.c: Add -misa-spec=2.2 flags.
* gcc.target/riscv/attribute-12.c: Ditto.
* gcc.target/riscv/attribute-13.c: Ditto.
* gcc.target/riscv/attribute-14.c: Ditto.
* gcc.target/riscv/attribute-15.c: New.
* gcc.target/riscv/attribute-16.c: Ditto.
* gcc.target/riscv/attribute-17.c: Ditto.
---
 gcc/common/config/riscv/riscv-common.c| 288 +-
 gcc/config.gcc|  17 +-
 gcc/config.in |  12 +
 gcc/config/riscv/riscv-opts.h |  10 +
 gcc/config/riscv/riscv.h  |   9 +-
 gcc/config/riscv/riscv.opt|  17 ++
 gcc/configure |  62 
 gcc/configure.ac  |  10 +
 gcc/testsuite/gcc.target/riscv/arch-10.c  |   6 +
 gcc/testsuite/gcc.target/riscv/arch-11.c  |   5 +
 gcc/testsuite/gcc.target/riscv/arch-9.c   |   6 +
 gcc/testsuite/gcc.target/riscv/attribute-11.c |   2 +-
 gcc/testsuite/gcc.target/riscv/attribute-12.c |   2 +-
 gcc/testsuite/gcc.target/riscv/attribute-13.c |   2 +-
 gcc/testsuite/gcc.target/riscv/attribute-14.c |   4 +-
 gcc/testsuite/gcc.target/riscv/attribute-15.c |   6 +
 gcc/testsuite/gcc.target/riscv/attribute-16.c |   6 +
 gcc/testsuite/gcc.target/riscv/attribute-17.c |   6 +
 gcc/testsuite/gcc.target/riscv/attribute-6.c  |   6 -
 gcc/testsuite/gcc.target/riscv/attribute-8.c  |   4 +-
 gcc/testsuite/gcc.target/riscv/attribute-9.c  |   2 +-
 21 files changed, 394 insertions(+), 88 deletions(-)
 create mode 100644 gcc/testsuite/gcc.target/riscv/arch-10.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/arch-11.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/arch-9.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/attribute-15.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/attribute-16.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/attribute-17.c
 delete mode 100644 gcc/testsuite/gcc.target/riscv/attribute-6.c

diff --git a/gcc/common/config/riscv/riscv-common.c 
b/gcc/common/config/riscv/riscv-common.c
index ca88ca1dacd..ea2d516bb36 100644
--- a/gcc/common/config/riscv/riscv-common.c
+++ b/gcc/common/config/riscv/riscv-common.c
@@ -44,6 +44,7 @@ struct riscv_subset_t
   struct riscv_subset_t *next;
 
   bool explicit_version_p;
+  bool implied_p;
 };
 
 /* Type for implied ISA info.  */
@@ -62,6 +63,58 @@ static const riscv_implied_info_t riscv_implied_info[] =
   {NULL, NULL}
 };
 
+/* This structure holds version information

[PATCH 3/3] RISC-V: Support version controling for ISA standard extensions

2020-11-12 Thread Kito Cheng 
 - New option -misa-spec support: -misa-spec=[2.2|20190608|20191213] and
   corresponding configuration option --with-isa-spec.

 - Current default ISA spec set to 2.2, but we intend to bump this to
   20191213 or later in next release.

gcc/ChangeLog:

* common/config/riscv/riscv-common.c (riscv_ext_version): New.
(riscv_ext_version_table): Ditto.
(get_default_version): Ditto.
(riscv_subset_t::implied_p): New field.
(riscv_subset_t::riscv_subset_t): Init implied_p.
(riscv_subset_list::add): New.
(riscv_subset_list::handle_implied_ext): Pass riscv_subset_t
instead of separated argument.
(riscv_subset_list::to_string): Handle zifencei and zicsr, and
omit version if version is unknown.
(riscv_subset_list::parsing_subset_version): New argument `ext`,
remove default_major_version and default_minor_version, get
default version info via get_default_version.
(riscv_subset_list::parse_std_ext): Update argument for
parsing_subset_version calls.
Handle 2.2 ISA spec, always enable zicsr and zifencei, they are
included in baseline ISA in that time.
(riscv_subset_list::parse_multiletter_ext): Update argument for
`parsing_subset_version` and `add` calls.
(riscv_subset_list::parse): Adjust argument for
riscv_subset_list::handle_implied_ext call.
* config.gcc (riscv*-*-*): Handle --with-isa-spec=.
* config.in (HAVE_AS_MISA_SPEC): New.
(HAVE_AS_MARCH_ZIFENCEI): Ditto.
* config/riscv/riscv-opts.h (riscv_isa_spec_class): New.
(riscv_isa_spec): Ditto.
* config/riscv/riscv.h (HAVE_AS_MISA_SPEC): New.
(ASM_SPEC): Pass -misa-spec if gas supported.
* config/riscv/riscv.opt (riscv_isa_spec_class) New.
* configure.ac (HAVE_AS_MARCH_ZIFENCEI): New test.
(HAVE_AS_MISA_SPEC): Ditto.
* configure: Regen.

gcc/testsuite/ChangeLog:

* gcc.target/riscv/arch-9.c: New.
* gcc.target/riscv/arch-10.c: Ditto.
* gcc.target/riscv/arch-11.c: Ditto.
* gcc.target/riscv/attribute-6.c: Remove, we don't support G
with version anymore.
* gcc.target/riscv/attribute-8.c: Reorder arch string to fit canonical
ordering.
* gcc.target/riscv/attribute-9.c: We don't emit version for
unknown extensions now.
* gcc.target/riscv/attribute-11.c: Add -misa-spec=2.2 flags.
* gcc.target/riscv/attribute-12.c: Ditto.
* gcc.target/riscv/attribute-13.c: Ditto.
* gcc.target/riscv/attribute-14.c: Ditto.
* gcc.target/riscv/attribute-15.c: New.
* gcc.target/riscv/attribute-16.c: Ditto.
* gcc.target/riscv/attribute-17.c: Ditto.
---
 gcc/common/config/riscv/riscv-common.c| 288 +-
 gcc/config.gcc|  17 +-
 gcc/config.in |  12 +
 gcc/config/riscv/riscv-opts.h |  10 +
 gcc/config/riscv/riscv.h  |   9 +-
 gcc/config/riscv/riscv.opt|  17 ++
 gcc/configure |  62 
 gcc/configure.ac  |  10 +
 gcc/testsuite/gcc.target/riscv/arch-10.c  |   6 +
 gcc/testsuite/gcc.target/riscv/arch-11.c  |   5 +
 gcc/testsuite/gcc.target/riscv/arch-9.c   |   6 +
 gcc/testsuite/gcc.target/riscv/attribute-11.c |   2 +-
 gcc/testsuite/gcc.target/riscv/attribute-12.c |   2 +-
 gcc/testsuite/gcc.target/riscv/attribute-13.c |   2 +-
 gcc/testsuite/gcc.target/riscv/attribute-14.c |   4 +-
 gcc/testsuite/gcc.target/riscv/attribute-15.c |   6 +
 gcc/testsuite/gcc.target/riscv/attribute-16.c |   6 +
 gcc/testsuite/gcc.target/riscv/attribute-17.c |   6 +
 gcc/testsuite/gcc.target/riscv/attribute-6.c  |   6 -
 gcc/testsuite/gcc.target/riscv/attribute-8.c  |   4 +-
 gcc/testsuite/gcc.target/riscv/attribute-9.c  |   2 +-
 21 files changed, 394 insertions(+), 88 deletions(-)
 create mode 100644 gcc/testsuite/gcc.target/riscv/arch-10.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/arch-11.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/arch-9.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/attribute-15.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/attribute-16.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/attribute-17.c
 delete mode 100644 gcc/testsuite/gcc.target/riscv/attribute-6.c

diff --git a/gcc/common/config/riscv/riscv-common.c 
b/gcc/common/config/riscv/riscv-common.c
index ca88ca1dacd..ea2d516bb36 100644
--- a/gcc/common/config/riscv/riscv-common.c
+++ b/gcc/common/config/riscv/riscv-common.c
@@ -44,6 +44,7 @@ struct riscv_subset_t
   struct riscv_subset_t *next;
 
   bool explicit_version_p;
+  bool implied_p;
 };
 
 /* Type for implied ISA info.  */
@@ -62,6 +63,58 @@ static const riscv_implied_info_t riscv_implied_info[] =
   {NULL, NULL}
 };
 
+/* This structure holds version information