RE: [PATCH V2] RISC-V: Enable COND_LEN_FMA auto-vectorization

2023-07-14 Thread Li, Pan2 via Gcc-patches
Committed, thanks Kito and Robin.

Pan

-Original Message-
From: Gcc-patches  On Behalf 
Of Kito Cheng via Gcc-patches
Sent: Friday, July 14, 2023 8:33 PM
To: Robin Dapp 
Cc: Juzhe-Zhong ; GCC Patches ; 
Kito Cheng ; Palmer Dabbelt ; Jeff 
Law 
Subject: Re: [PATCH V2] RISC-V: Enable COND_LEN_FMA auto-vectorization

LGTM

Robin Dapp via Gcc-patches  於 2023年7月14日 週五 15:05
寫道:

> Hi Juzhe,
>
> thanks, looks good to me now - did before already actually ;).
>
> Regards
>  Robin
>


Re: [PATCH V2] RISC-V: Enable COND_LEN_FMA auto-vectorization

2023-07-14 Thread Kito Cheng via Gcc-patches
LGTM

Robin Dapp via Gcc-patches  於 2023年7月14日 週五 15:05
寫道:

> Hi Juzhe,
>
> thanks, looks good to me now - did before already actually ;).
>
> Regards
>  Robin
>


Re: [PATCH V2] RISC-V: Enable COND_LEN_FMA auto-vectorization

2023-07-14 Thread Robin Dapp via Gcc-patches
Hi Juzhe,

thanks, looks good to me now - did before already actually ;).

Regards
 Robin


[PATCH V2] RISC-V: Enable COND_LEN_FMA auto-vectorization

2023-07-13 Thread Juzhe-Zhong
Add comments as Robin's suggestion in scatter_store_run-7.c

Enable COND_LEN_FMA auto-vectorization for floating-point FMA 
auto-vectorization **NO** ffast-math.

Since the middle-end support has been approved and I will merge it after I 
finished bootstrap && regression on X86.
https://gcc.gnu.org/pipermail/gcc-patches/2023-July/624395.html

Now, it's time to send this patch.

Consider this following case:

#define TEST_TYPE(TYPE)\
  __attribute__ ((noipa)) void ternop_##TYPE (TYPE *__restrict dst,\
  TYPE *__restrict a,  \
  TYPE *__restrict b, int n)   \
  {\
for (int i = 0; i < n; i++)\
  dst[i] += a[i] * b[i];   \
  }

#define TEST_ALL() TEST_TYPE (double)

TEST_ALL ()

Before this patch:

ternop_double:
ble a3,zero,.L5
mv  a6,a0
.L3:
vsetvli a5,a3,e64,m1,tu,ma
sllia4,a5,3
vle64.v v1,0(a0)
vle64.v v2,0(a1)
vle64.v v3,0(a2)
sub a3,a3,a5
vfmul.vvv2,v2,v3
vfadd.vvv1,v1,v2
vse64.v v1,0(a6)
add a0,a0,a4
add a1,a1,a4
add a2,a2,a4
add a6,a6,a4
bne a3,zero,.L3
.L5:
ret

After this patch:

ternop_double:
ble a3,zero,.L5
mv  a6,a0
.L3:
vsetvli a5,a3,e64,m1,tu,ma
sllia4,a5,3
vle64.v v1,0(a0)
vle64.v v2,0(a1)
vle64.v v3,0(a2)
sub a3,a3,a5
vfmacc.vv   v1,v3,v2
vse64.v v1,0(a6)
add a0,a0,a4
add a1,a1,a4
add a2,a2,a4
add a6,a6,a4
bne a3,zero,.L3
.L5:
ret

Notice: This patch only supports COND_LEN_FMA, **NO** COND_LEN_FNMA, ... etc 
since I didn't support them
in the middle-end yet.

Will support them in the following patches soon.

gcc/ChangeLog:

* config/riscv/autovec.md (cond_len_fma): New pattern.
* config/riscv/riscv-protos.h (enum insn_type): New enum.
(expand_cond_len_ternop): New function.
* config/riscv/riscv-v.cc (emit_nonvlmax_fp_ternary_tu_insn): Ditto.
(expand_cond_len_ternop): Ditto.

gcc/testsuite/ChangeLog:

* gcc.target/riscv/rvv/autovec/gather-scatter/scatter_store_run-7.c: 
Adapt testcase for link fail.
* gcc.target/riscv/rvv/autovec/ternop/ternop_nofm-1.c: New test.
* gcc.target/riscv/rvv/autovec/ternop/ternop_nofm-2.c: New test.
* gcc.target/riscv/rvv/autovec/ternop/ternop_nofm-3.c: New test.
* gcc.target/riscv/rvv/autovec/ternop/ternop_nofm_run-1.c: New test.
* gcc.target/riscv/rvv/autovec/ternop/ternop_nofm_run-2.c: New test.
* gcc.target/riscv/rvv/autovec/ternop/ternop_nofm_run-3.c: New test.

---
 gcc/config/riscv/autovec.md   | 23 +
 gcc/config/riscv/riscv-protos.h   |  2 +
 gcc/config/riscv/riscv-v.cc   | 49 +++
 .../gather-scatter/scatter_store_run-7.c  |  6 ++-
 .../riscv/rvv/autovec/ternop/ternop_nofm-1.c  |  7 +++
 .../riscv/rvv/autovec/ternop/ternop_nofm-2.c  | 11 +
 .../riscv/rvv/autovec/ternop/ternop_nofm-3.c  |  9 
 .../rvv/autovec/ternop/ternop_nofm_run-1.c|  4 ++
 .../rvv/autovec/ternop/ternop_nofm_run-2.c|  4 ++
 .../rvv/autovec/ternop/ternop_nofm_run-3.c|  4 ++
 10 files changed, 118 insertions(+), 1 deletion(-)
 create mode 100644 
gcc/testsuite/gcc.target/riscv/rvv/autovec/ternop/ternop_nofm-1.c
 create mode 100644 
gcc/testsuite/gcc.target/riscv/rvv/autovec/ternop/ternop_nofm-2.c
 create mode 100644 
gcc/testsuite/gcc.target/riscv/rvv/autovec/ternop/ternop_nofm-3.c
 create mode 100644 
gcc/testsuite/gcc.target/riscv/rvv/autovec/ternop/ternop_nofm_run-1.c
 create mode 100644 
gcc/testsuite/gcc.target/riscv/rvv/autovec/ternop/ternop_nofm_run-2.c
 create mode 100644 
gcc/testsuite/gcc.target/riscv/rvv/autovec/ternop/ternop_nofm_run-3.c

diff --git a/gcc/config/riscv/autovec.md b/gcc/config/riscv/autovec.md
index 0476b1dea45..64a41bd7101 100644
--- a/gcc/config/riscv/autovec.md
+++ b/gcc/config/riscv/autovec.md
@@ -1531,3 +1531,26 @@
   riscv_vector::expand_cond_len_binop (, operands);
   DONE;
 })
+
+;; -
+;;  [FP] Conditional ternary operations
+;; -
+;; Includes:
+;; - vfmacc/...
+;; -
+
+(define_expand "cond_len_fma"
+  [(match_operand:VF 0 "register_operand")
+   (match_operand: 1 "vector_mask_operand")
+   (match_operand:VF 2 "register_operand")
+