Re: [PATCH i386 AVX512] [60/n] Update 128bit ashrv insn pattern.

2014-10-03 Thread Uros Bizjak 
On Fri, Oct 3, 2014 at 12:26 PM, Kirill Yukhin  wrote:
> Hello Uroš,
> On 29 Sep 09:54, Uros Bizjak wrote:
>> > +(define_expand "vashrv2di3"
>> > +  [(set (match_operand:V2DI 0 "register_operand")
>> > +   (ashiftrt:V2DI
>> > + (match_operand:V2DI 1 "register_operand")
>> > + (match_operand:V2DI 2 "nonimmediate_operand")))]
>> > +  "TARGET_XOP || TARGET_AVX512VL"
>> > +{
>> > +  if (!TARGET_XOP)
>>
>> This condition is wrong. Please re-test the patch.
> Great catch! Didn't tested whole i386.exp, so XOP tests didn't run.
> Fixed. Patch in the bottom. XOP tests are now pass.
> Is it ok for trunk now?

OK.

Thanks,
Uros.

Re: [PATCH i386 AVX512] [60/n] Update 128bit ashrv insn pattern.

2014-10-03 Thread Kirill Yukhin 
Hello Uroš,
On 29 Sep 09:54, Uros Bizjak wrote:
> > +(define_expand "vashrv2di3"
> > +  [(set (match_operand:V2DI 0 "register_operand")
> > +   (ashiftrt:V2DI
> > + (match_operand:V2DI 1 "register_operand")
> > + (match_operand:V2DI 2 "nonimmediate_operand")))]
> > +  "TARGET_XOP || TARGET_AVX512VL"
> > +{
> > +  if (!TARGET_XOP)
> 
> This condition is wrong. Please re-test the patch.
Great catch! Didn't tested whole i386.exp, so XOP tests didn't run.
Fixed. Patch in the bottom. XOP tests are now pass.
Is it ok for trunk now?

--
Thanks, K

diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md
index 625a2e0..63fc7b5 100644
--- a/gcc/config/i386/sse.md
+++ b/gcc/config/i386/sse.md
@@ -498,7 +498,6 @@
 (define_mode_iterator VI12_128 [V16QI V8HI])
 (define_mode_iterator VI14_128 [V16QI V4SI])
 (define_mode_iterator VI124_128 [V16QI V8HI V4SI])
-(define_mode_iterator VI128_128 [V16QI V8HI V2DI])
 (define_mode_iterator VI24_128 [V8HI V4SI])
 (define_mode_iterator VI248_128 [V8HI V4SI V2DI])
 (define_mode_iterator VI48_128 [V4SI V2DI])
@@ -15720,17 +15719,36 @@
  (match_operand:VI48_256 2 "nonimmediate_operand")))]
   "TARGET_AVX2")
 
-(define_expand "vashr3"
-  [(set (match_operand:VI128_128 0 "register_operand")
-   (ashiftrt:VI128_128
- (match_operand:VI128_128 1 "register_operand")
- (match_operand:VI128_128 2 "nonimmediate_operand")))]
-  "TARGET_XOP"
+(define_expand "vashr3"
+  [(set (match_operand:VI12_128 0 "register_operand")
+   (ashiftrt:VI12_128
+ (match_operand:VI12_128 1 "register_operand")
+ (match_operand:VI12_128 2 "nonimmediate_operand")))]
+  "TARGET_XOP || (TARGET_AVX512BW && TARGET_AVX512VL)"
 {
-  rtx neg = gen_reg_rtx (mode);
-  emit_insn (gen_neg2 (neg, operands[2]));
-  emit_insn (gen_xop_sha3 (operands[0], operands[1], neg));
-  DONE;
+  if (TARGET_XOP)
+{
+  rtx neg = gen_reg_rtx (mode);
+  emit_insn (gen_neg2 (neg, operands[2]));
+  emit_insn (gen_xop_sha3 (operands[0], operands[1], neg));
+  DONE;
+}
+})
+
+(define_expand "vashrv2di3"
+  [(set (match_operand:V2DI 0 "register_operand")
+   (ashiftrt:V2DI
+ (match_operand:V2DI 1 "register_operand")
+ (match_operand:V2DI 2 "nonimmediate_operand")))]
+  "TARGET_XOP || TARGET_AVX512VL"
+{
+  if (TARGET_XOP)
+{
+  rtx neg = gen_reg_rtx (V2DImode);
+  emit_insn (gen_negv2di2 (neg, operands[2]));
+  emit_insn (gen_xop_shav2di3 (operands[0], operands[1], neg));
+  DONE;
+}
 })
 
 (define_expand "vashrv4si3"

Re: [PATCH i386 AVX512] [60/n] Update 128bit ashrv insn pattern.

2014-09-29 Thread Uros Bizjak 
On Fri, Sep 26, 2014 at 1:13 PM, Kirill Yukhin  wrote:
> Hello,
> This tiny patch extends 128bit ashrv expander.
>
> Bootstrapped.
> AVX-512* tests on top of patch-set all pass
> under simulator.
>
> Is it ok for trunk?
>
> gcc/
> * config/i386/sse.md
> (define_mode_iterator VI128_128 [V16QI V8HI V2DI]): Delete.
> (define_expand "vashr3"): Add masking,
> use VI12_128 mode iterator.
> (define_expand "ashrv2di3"): New.
>
> --
> Thanks, K
>
> diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md
> index 625a2e0..91d6778 100644
> --- a/gcc/config/i386/sse.md
> +++ b/gcc/config/i386/sse.md
> @@ -498,7 +498,6 @@
>  (define_mode_iterator VI12_128 [V16QI V8HI])
>  (define_mode_iterator VI14_128 [V16QI V4SI])
>  (define_mode_iterator VI124_128 [V16QI V8HI V4SI])
> -(define_mode_iterator VI128_128 [V16QI V8HI V2DI])
>  (define_mode_iterator VI24_128 [V8HI V4SI])
>  (define_mode_iterator VI248_128 [V8HI V4SI V2DI])
>  (define_mode_iterator VI48_128 [V4SI V2DI])
> @@ -15720,17 +15719,36 @@
>   (match_operand:VI48_256 2 "nonimmediate_operand")))]
>"TARGET_AVX2")
>
> -(define_expand "vashr3"
> -  [(set (match_operand:VI128_128 0 "register_operand")
> -   (ashiftrt:VI128_128
> - (match_operand:VI128_128 1 "register_operand")
> - (match_operand:VI128_128 2 "nonimmediate_operand")))]
> -  "TARGET_XOP"
> +(define_expand "vashr3"
> +  [(set (match_operand:VI12_128 0 "register_operand")
> +   (ashiftrt:VI12_128
> + (match_operand:VI12_128 1 "register_operand")
> + (match_operand:VI12_128 2 "nonimmediate_operand")))]
> +  "TARGET_XOP || (TARGET_AVX512BW && TARGET_AVX512VL)"
>  {
> -  rtx neg = gen_reg_rtx (mode);
> -  emit_insn (gen_neg2 (neg, operands[2]));
> -  emit_insn (gen_xop_sha3 (operands[0], operands[1], neg));
> -  DONE;
> +  if (TARGET_XOP)
> +{
> +  rtx neg = gen_reg_rtx (mode);
> +  emit_insn (gen_neg2 (neg, operands[2]));
> +  emit_insn (gen_xop_sha3 (operands[0], operands[1], neg));
> +  DONE;
> +}
> +})
> +
> +(define_expand "vashrv2di3"
> +  [(set (match_operand:V2DI 0 "register_operand")
> +   (ashiftrt:V2DI
> + (match_operand:V2DI 1 "register_operand")
> + (match_operand:V2DI 2 "nonimmediate_operand")))]
> +  "TARGET_XOP || TARGET_AVX512VL"
> +{
> +  if (!TARGET_XOP)

This condition is wrong. Please re-test the patch.

> +{
> +  rtx neg = gen_reg_rtx (V2DImode);
> +  emit_insn (gen_negv2di2 (neg, operands[2]));
> +  emit_insn (gen_xop_shav2di3 (operands[0], operands[1], neg));
> +  DONE;
> +}
>  })
>
>  (define_expand "vashrv4si3"

[PATCH i386 AVX512] [60/n] Update 128bit ashrv insn pattern.

2014-09-26 Thread Kirill Yukhin 
Hello,
This tiny patch extends 128bit ashrv expander.

Bootstrapped.
AVX-512* tests on top of patch-set all pass
under simulator.

Is it ok for trunk?

gcc/
* config/i386/sse.md
(define_mode_iterator VI128_128 [V16QI V8HI V2DI]): Delete.
(define_expand "vashr3"): Add masking,
use VI12_128 mode iterator.
(define_expand "ashrv2di3"): New.

--
Thanks, K

diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md
index 625a2e0..91d6778 100644
--- a/gcc/config/i386/sse.md
+++ b/gcc/config/i386/sse.md
@@ -498,7 +498,6 @@
 (define_mode_iterator VI12_128 [V16QI V8HI])
 (define_mode_iterator VI14_128 [V16QI V4SI])
 (define_mode_iterator VI124_128 [V16QI V8HI V4SI])
-(define_mode_iterator VI128_128 [V16QI V8HI V2DI])
 (define_mode_iterator VI24_128 [V8HI V4SI])
 (define_mode_iterator VI248_128 [V8HI V4SI V2DI])
 (define_mode_iterator VI48_128 [V4SI V2DI])
@@ -15720,17 +15719,36 @@
  (match_operand:VI48_256 2 "nonimmediate_operand")))]
   "TARGET_AVX2")
 
-(define_expand "vashr3"
-  [(set (match_operand:VI128_128 0 "register_operand")
-   (ashiftrt:VI128_128
- (match_operand:VI128_128 1 "register_operand")
- (match_operand:VI128_128 2 "nonimmediate_operand")))]
-  "TARGET_XOP"
+(define_expand "vashr3"
+  [(set (match_operand:VI12_128 0 "register_operand")
+   (ashiftrt:VI12_128
+ (match_operand:VI12_128 1 "register_operand")
+ (match_operand:VI12_128 2 "nonimmediate_operand")))]
+  "TARGET_XOP || (TARGET_AVX512BW && TARGET_AVX512VL)"
 {
-  rtx neg = gen_reg_rtx (mode);
-  emit_insn (gen_neg2 (neg, operands[2]));
-  emit_insn (gen_xop_sha3 (operands[0], operands[1], neg));
-  DONE;
+  if (TARGET_XOP)
+{
+  rtx neg = gen_reg_rtx (mode);
+  emit_insn (gen_neg2 (neg, operands[2]));
+  emit_insn (gen_xop_sha3 (operands[0], operands[1], neg));
+  DONE;
+}
+})
+
+(define_expand "vashrv2di3"
+  [(set (match_operand:V2DI 0 "register_operand")
+   (ashiftrt:V2DI
+ (match_operand:V2DI 1 "register_operand")
+ (match_operand:V2DI 2 "nonimmediate_operand")))]
+  "TARGET_XOP || TARGET_AVX512VL"
+{
+  if (!TARGET_XOP)
+{
+  rtx neg = gen_reg_rtx (V2DImode);
+  emit_insn (gen_negv2di2 (neg, operands[2]));
+  emit_insn (gen_xop_shav2di3 (operands[0], operands[1], neg));
+  DONE;
+}
 })
 
 (define_expand "vashrv4si3"