RE: [PATCH v1] RISC-V: Support FP MAX/MIN autovec for VLS mode
Committed, thanks Kito. Pan From: Kito Cheng Sent: Saturday, September 2, 2023 11:41 PM To: Li, Pan2 Cc: gcc-patches@gcc.gnu.org; juzhe.zh...@rivai.ai; Wang, Yanzhang Subject: Re: [PATCH v1] RISC-V: Support FP MAX/MIN autovec for VLS mode Ok Pan Li via Gcc-patches mailto:gcc-patches@gcc.gnu.org>>於 2023年9月2日 週六,16:54寫道: From: Pan Li mailto:pan2...@intel.com>> This patch would like to allow the VLS mode autovec for the floating-point binary operation MAX/MIN. Given below code example: test (float *out, float *in1, float *in2) { for (int i = 0; i < 128; i++) out[i] = in1[i] > in2[i] ? in1[i] : in2[i]; // Or out[i] = fmax (in1[i], in2[i]); } Before this patch: test: csrra4,vlenb sllia4,a4,1 li a5,128 bleua5,a4,.L2 mv a5,a4 .L2: vsetvli zero,a5,e32,m8,ta,ma vle32.v v16,0(a1) vle32.v v8,0(a2) vsetvli a3,zero,e32,m8,ta,ma vmfgt.vvv0,v16,v8 vmerge.vvm v8,v8,v16,v0 vsetvli zero,a5,e32,m8,ta,ma vse32.v v8,0(a0) ret After this patch: test: li a5,128 vsetvli zero,a5,e32,m1,ta,ma vle32.v v1,0(a1) vle32.v v2,0(a2) vfmax.vvv1,v1,v2 vse32.v v1,0(a0) ret This MAX/MIN autovec acts on function call like fmaxf/fmax in math.h too. And it depends on the option -ffast-math. Signed-off-by: Pan Li mailto:pan2...@intel.com>> gcc/ChangeLog: * config/riscv/autovec-vls.md (3): New pattern for fmax/fmin * config/riscv/vector.md: Add VLS modes to vfmax/vfmin. gcc/testsuite/ChangeLog: * gcc.target/riscv/rvv/autovec/vls/def.h: New macros. * gcc.target/riscv/rvv/autovec/vls/floating-point-max-1.c: New test. * gcc.target/riscv/rvv/autovec/vls/floating-point-max-2.c: New test. * gcc.target/riscv/rvv/autovec/vls/floating-point-max-3.c: New test. * gcc.target/riscv/rvv/autovec/vls/floating-point-max-4.c: New test. * gcc.target/riscv/rvv/autovec/vls/floating-point-max-5.c: New test. * gcc.target/riscv/rvv/autovec/vls/floating-point-min-1.c: New test. * gcc.target/riscv/rvv/autovec/vls/floating-point-min-2.c: New test. * gcc.target/riscv/rvv/autovec/vls/floating-point-min-3.c: New test. * gcc.target/riscv/rvv/autovec/vls/floating-point-min-4.c: New test. * gcc.target/riscv/rvv/autovec/vls/floating-point-min-5.c: New test. --- gcc/config/riscv/autovec-vls.md | 23 ++ gcc/config/riscv/vector.md| 12 +++--- .../gcc.target/riscv/rvv/autovec/vls/def.h| 16 +++ .../rvv/autovec/vls/floating-point-max-1.c| 43 +++ .../rvv/autovec/vls/floating-point-max-2.c| 43 +++ .../rvv/autovec/vls/floating-point-max-3.c| 43 +++ .../rvv/autovec/vls/floating-point-max-4.c| 43 +++ .../rvv/autovec/vls/floating-point-max-5.c| 31 + .../rvv/autovec/vls/floating-point-min-1.c| 43 +++ .../rvv/autovec/vls/floating-point-min-2.c| 43 +++ .../rvv/autovec/vls/floating-point-min-3.c| 43 +++ .../rvv/autovec/vls/floating-point-min-4.c| 43 +++ .../rvv/autovec/vls/floating-point-min-5.c| 31 + 13 files changed, 451 insertions(+), 6 deletions(-) create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/floating-point-max-1.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/floating-point-max-2.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/floating-point-max-3.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/floating-point-max-4.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/floating-point-max-5.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/floating-point-min-1.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/floating-point-min-2.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/floating-point-min-3.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/floating-point-min-4.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/floating-point-min-5.c diff --git a/gcc/config/riscv/autovec-vls.md b/gcc/config/riscv/autovec-vls.md index 4ca640c11e2..7ef29637e33 100644 --- a/gcc/config/riscv/autovec-vls.md +++ b/gcc/config/riscv/autovec-vls.md @@ -232,6 +232,29 @@ (define_insn_and_split "3" [(set_attr "type" "vector")] ) +;; - +;; Includes: +;; - vfmin.vv/vfmax.vv +;; - vfmin.vf/vfmax.vf +;; - fmax/fmaxf in math.h +;; - +(define_insn_and_split "3" + [(set (match_operand:VLSF 0 "register_operand") +(any_float_binop_nofrm:VLSF + (match_operand:VLSF 1 "") + (match_operand:VLSF 2 &
Re: [PATCH v1] RISC-V: Support FP MAX/MIN autovec for VLS mode
Ok Pan Li via Gcc-patches 於 2023年9月2日 週六,16:54寫道: > From: Pan Li > > This patch would like to allow the VLS mode autovec for the > floating-point binary operation MAX/MIN. > > Given below code example: > > test (float *out, float *in1, float *in2) > { > for (int i = 0; i < 128; i++) > out[i] = in1[i] > in2[i] ? in1[i] : in2[i]; > // Or out[i] = fmax (in1[i], in2[i]); > } > > Before this patch: > test: > csrra4,vlenb > sllia4,a4,1 > li a5,128 > bleua5,a4,.L2 > mv a5,a4 > .L2: > vsetvli zero,a5,e32,m8,ta,ma > vle32.v v16,0(a1) > vle32.v v8,0(a2) > vsetvli a3,zero,e32,m8,ta,ma > vmfgt.vvv0,v16,v8 > vmerge.vvm v8,v8,v16,v0 > vsetvli zero,a5,e32,m8,ta,ma > vse32.v v8,0(a0) > ret > > After this patch: > test: > li a5,128 > vsetvli zero,a5,e32,m1,ta,ma > vle32.v v1,0(a1) > vle32.v v2,0(a2) > vfmax.vvv1,v1,v2 > vse32.v v1,0(a0) > ret > > This MAX/MIN autovec acts on function call like fmaxf/fmax in math.h > too. And it depends on the option -ffast-math. > > Signed-off-by: Pan Li > > gcc/ChangeLog: > > * config/riscv/autovec-vls.md (3): New pattern for > fmax/fmin > * config/riscv/vector.md: Add VLS modes to vfmax/vfmin. > > gcc/testsuite/ChangeLog: > > * gcc.target/riscv/rvv/autovec/vls/def.h: New macros. > * gcc.target/riscv/rvv/autovec/vls/floating-point-max-1.c: New > test. > * gcc.target/riscv/rvv/autovec/vls/floating-point-max-2.c: New > test. > * gcc.target/riscv/rvv/autovec/vls/floating-point-max-3.c: New > test. > * gcc.target/riscv/rvv/autovec/vls/floating-point-max-4.c: New > test. > * gcc.target/riscv/rvv/autovec/vls/floating-point-max-5.c: New > test. > * gcc.target/riscv/rvv/autovec/vls/floating-point-min-1.c: New > test. > * gcc.target/riscv/rvv/autovec/vls/floating-point-min-2.c: New > test. > * gcc.target/riscv/rvv/autovec/vls/floating-point-min-3.c: New > test. > * gcc.target/riscv/rvv/autovec/vls/floating-point-min-4.c: New > test. > * gcc.target/riscv/rvv/autovec/vls/floating-point-min-5.c: New > test. > --- > gcc/config/riscv/autovec-vls.md | 23 ++ > gcc/config/riscv/vector.md| 12 +++--- > .../gcc.target/riscv/rvv/autovec/vls/def.h| 16 +++ > .../rvv/autovec/vls/floating-point-max-1.c| 43 +++ > .../rvv/autovec/vls/floating-point-max-2.c| 43 +++ > .../rvv/autovec/vls/floating-point-max-3.c| 43 +++ > .../rvv/autovec/vls/floating-point-max-4.c| 43 +++ > .../rvv/autovec/vls/floating-point-max-5.c| 31 + > .../rvv/autovec/vls/floating-point-min-1.c| 43 +++ > .../rvv/autovec/vls/floating-point-min-2.c| 43 +++ > .../rvv/autovec/vls/floating-point-min-3.c| 43 +++ > .../rvv/autovec/vls/floating-point-min-4.c| 43 +++ > .../rvv/autovec/vls/floating-point-min-5.c| 31 + > 13 files changed, 451 insertions(+), 6 deletions(-) > create mode 100644 > gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/floating-point-max-1.c > create mode 100644 > gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/floating-point-max-2.c > create mode 100644 > gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/floating-point-max-3.c > create mode 100644 > gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/floating-point-max-4.c > create mode 100644 > gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/floating-point-max-5.c > create mode 100644 > gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/floating-point-min-1.c > create mode 100644 > gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/floating-point-min-2.c > create mode 100644 > gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/floating-point-min-3.c > create mode 100644 > gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/floating-point-min-4.c > create mode 100644 > gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/floating-point-min-5.c > > diff --git a/gcc/config/riscv/autovec-vls.md > b/gcc/config/riscv/autovec-vls.md > index 4ca640c11e2..7ef29637e33 100644 > --- a/gcc/config/riscv/autovec-vls.md > +++ b/gcc/config/riscv/autovec-vls.md > @@ -232,6 +232,29 @@ (define_insn_and_split "3" > [(set_attr "type" "vector")] > ) > > +;; > - > +;; Includes: > +;; - vfmin.vv/vfmax.vv > +;; - vfmin.vf/vfmax.vf > +;; - fmax/fmaxf in math.h > +;; > - > +(define_insn_and_split "3" > + [(set (match_operand:VLSF 0 "register_operand") > +(any_float_binop_nofrm:VLSF > + (match_operand:VLSF 1 "") > + (match_operand:VLSF 2 "")))] > + "TARGET_VECTOR && can_create_pseudo_p ()" > + "#" > + "&& 1" > + [(const_int 0)] > +{ > + riscv_vector::emit_vlmax_insn (code_for_pred (, mode), > +
[PATCH v1] RISC-V: Support FP MAX/MIN autovec for VLS mode
From: Pan Li This patch would like to allow the VLS mode autovec for the floating-point binary operation MAX/MIN. Given below code example: test (float *out, float *in1, float *in2) { for (int i = 0; i < 128; i++) out[i] = in1[i] > in2[i] ? in1[i] : in2[i]; // Or out[i] = fmax (in1[i], in2[i]); } Before this patch: test: csrra4,vlenb sllia4,a4,1 li a5,128 bleua5,a4,.L2 mv a5,a4 .L2: vsetvli zero,a5,e32,m8,ta,ma vle32.v v16,0(a1) vle32.v v8,0(a2) vsetvli a3,zero,e32,m8,ta,ma vmfgt.vvv0,v16,v8 vmerge.vvm v8,v8,v16,v0 vsetvli zero,a5,e32,m8,ta,ma vse32.v v8,0(a0) ret After this patch: test: li a5,128 vsetvli zero,a5,e32,m1,ta,ma vle32.v v1,0(a1) vle32.v v2,0(a2) vfmax.vvv1,v1,v2 vse32.v v1,0(a0) ret This MAX/MIN autovec acts on function call like fmaxf/fmax in math.h too. And it depends on the option -ffast-math. Signed-off-by: Pan Li gcc/ChangeLog: * config/riscv/autovec-vls.md (3): New pattern for fmax/fmin * config/riscv/vector.md: Add VLS modes to vfmax/vfmin. gcc/testsuite/ChangeLog: * gcc.target/riscv/rvv/autovec/vls/def.h: New macros. * gcc.target/riscv/rvv/autovec/vls/floating-point-max-1.c: New test. * gcc.target/riscv/rvv/autovec/vls/floating-point-max-2.c: New test. * gcc.target/riscv/rvv/autovec/vls/floating-point-max-3.c: New test. * gcc.target/riscv/rvv/autovec/vls/floating-point-max-4.c: New test. * gcc.target/riscv/rvv/autovec/vls/floating-point-max-5.c: New test. * gcc.target/riscv/rvv/autovec/vls/floating-point-min-1.c: New test. * gcc.target/riscv/rvv/autovec/vls/floating-point-min-2.c: New test. * gcc.target/riscv/rvv/autovec/vls/floating-point-min-3.c: New test. * gcc.target/riscv/rvv/autovec/vls/floating-point-min-4.c: New test. * gcc.target/riscv/rvv/autovec/vls/floating-point-min-5.c: New test. --- gcc/config/riscv/autovec-vls.md | 23 ++ gcc/config/riscv/vector.md| 12 +++--- .../gcc.target/riscv/rvv/autovec/vls/def.h| 16 +++ .../rvv/autovec/vls/floating-point-max-1.c| 43 +++ .../rvv/autovec/vls/floating-point-max-2.c| 43 +++ .../rvv/autovec/vls/floating-point-max-3.c| 43 +++ .../rvv/autovec/vls/floating-point-max-4.c| 43 +++ .../rvv/autovec/vls/floating-point-max-5.c| 31 + .../rvv/autovec/vls/floating-point-min-1.c| 43 +++ .../rvv/autovec/vls/floating-point-min-2.c| 43 +++ .../rvv/autovec/vls/floating-point-min-3.c| 43 +++ .../rvv/autovec/vls/floating-point-min-4.c| 43 +++ .../rvv/autovec/vls/floating-point-min-5.c| 31 + 13 files changed, 451 insertions(+), 6 deletions(-) create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/floating-point-max-1.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/floating-point-max-2.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/floating-point-max-3.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/floating-point-max-4.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/floating-point-max-5.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/floating-point-min-1.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/floating-point-min-2.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/floating-point-min-3.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/floating-point-min-4.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/floating-point-min-5.c diff --git a/gcc/config/riscv/autovec-vls.md b/gcc/config/riscv/autovec-vls.md index 4ca640c11e2..7ef29637e33 100644 --- a/gcc/config/riscv/autovec-vls.md +++ b/gcc/config/riscv/autovec-vls.md @@ -232,6 +232,29 @@ (define_insn_and_split "3" [(set_attr "type" "vector")] ) +;; - +;; Includes: +;; - vfmin.vv/vfmax.vv +;; - vfmin.vf/vfmax.vf +;; - fmax/fmaxf in math.h +;; - +(define_insn_and_split "3" + [(set (match_operand:VLSF 0 "register_operand") +(any_float_binop_nofrm:VLSF + (match_operand:VLSF 1 "") + (match_operand:VLSF 2 "")))] + "TARGET_VECTOR && can_create_pseudo_p ()" + "#" + "&& 1" + [(const_int 0)] +{ + riscv_vector::emit_vlmax_insn (code_for_pred (, mode), +riscv_vector::BINARY_OP, operands); + DONE; +} +[(set_attr "type" "vector")] +) + ;; --- ;; [INT] Unary operations ;; --- diff --git