Re: [PATCH v1 3/7] LoongArch Port: libgcc

2021-11-06 Thread Xi Ruoyao via Gcc-patches 
On Sat, 2021-11-06 at 16:40 +0800, Chenghua Xu wrote:

/* snip */

> diff --git a/libgcc/config/loongarch/crti.S b/libgcc/config/loongarch/crti.S
> new file mode 100644
> index 000..bac029874b5
> --- /dev/null
> +++ b/libgcc/config/loongarch/crti.S
> @@ -0,0 +1,43 @@
> +/* Copyright (C) 2021 Free Software Foundation, Inc.
> +
> +This file is part of GCC.
> +
> +GCC is free software; you can redistribute it and/or modify it under
> +the terms of the GNU General Public License as published by the Free
> +Software Foundation; either version 3, or (at your option) any later
> +version.
> +
> +GCC is distributed in the hope that it will be useful, but WITHOUT ANY
> +WARRANTY; without even the implied warranty of MERCHANTABILITY or
> +FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
> +for more details.
> +
> +Under Section 7 of GPL version 3, you are granted additional
> +permissions described in the GCC Runtime Library Exception, version
> +3.1, as published by the Free Software Foundation.
> +
> +You should have received a copy of the GNU General Public License and
> +a copy of the GCC Runtime Library Exception along with this program;
> +see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
> +.  */
> +
> +/* 4 slots for argument spill area.  1 for cpreturn, 1 for stack.
> +   Return spill offset of 8.  Aligned to 16 bytes for lp64.  */
> +
> +   .section .init,"ax",@progbits
> +   .globl  _init
> +   .type   _init,@function
> +_init:
> +   addi.d   $r3,$r3,-16
> +   st.d  $r1,$r3,8
> +   addi.d   $r3,$r3,16
> +   jirl$r0,$r1,0
> +
> +   .section .fini,"ax",@progbits
> +   .globl  _fini
> +   .type   _fini,@function
> +_fini:
> +   addi.d   $r3,$r3,-16
> +   st.d  $r1,$r3,8
> +   addi.d   $r3,$r3,16
> +   jirl$r0,$r1,0

There is some inconsistency of "tabs" or "spaces" between the
instruction and the operands.  Likewisely, other *.S files.

/* snip */

> diff --git a/libgcc/config/loongarch/linux-unwind.h 
> b/libgcc/config/loongarch/linux-unwind.h
> new file mode 100644
> index 000..8c9dfa56a6d
> --- /dev/null
> +++ b/libgcc/config/loongarch/linux-unwind.h
> @@ -0,0 +1,80 @@
> +/* DWARF2 EH unwinding support for LoongArch Linux.
> +   Copyright (C) 2021 Free Software Foundation, Inc.
> +
> +This file is part of GCC.
> +
> +GCC is free software; you can redistribute it and/or modify
> +it under the terms of the GNU General Public License as published by
> +the Free Software Foundation; either version 3, or (at your option)
> +any later version.
> +
> +GCC is distributed in the hope that it will be useful,
> +but WITHOUT ANY WARRANTY; without even the implied warranty of
> +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
> +GNU General Public License for more details.
> +
> +Under Section 7 of GPL version 3, you are granted additional
> +permissions described in the GCC Runtime Library Exception, version
> +3.1, as published by the Free Software Foundation.
> +
> +You should have received a copy of the GNU General Public License and
> +a copy of the GCC Runtime Library Exception along with this program;
> +see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
> +.  */
> +
> +#ifndef inhibit_libc
> +/* Do code reading to identify a signal frame, and set the frame
> +   state data appropriately.  See unwind-dw2.c for the structs.  */
> +
> +#include 
> +#include 
> +#include 
> +
> +#define MD_FALLBACK_FRAME_STATE_FOR loongarch_fallback_frame_state
> +
> +static _Unwind_Reason_Code
> +loongarch_fallback_frame_state (struct _Unwind_Context *context,
> +   _Unwind_FrameState *fs)
> +{
> +  u_int32_t *pc = (u_int32_t *) context->ra;
> +  struct sigcontext *sc;
> +  _Unwind_Ptr new_cfa;
> +  int i;
> +
> +  /* 03822c0b dli a7, 0x8b (sigreturn)  */
> +  /* 002b syscall 0  */
> +  if (pc[1] != 0x002b)
> +    return _URC_END_OF_STACK;
> +  if (pc[0] == 0x03822c0b)
> +    {
> +  struct rt_sigframe
> +  {
> +   siginfo_t info;
> +   ucontext_t uc;
> +  } *rt_ = context->cfa;
> +  sc = _->uc.uc_mcontext;
> +    }
> +  else
> +    return _URC_END_OF_STACK;
> +
> +  new_cfa = (_Unwind_Ptr) sc;
> +  fs->regs.cfa_how = CFA_REG_OFFSET;
> +  fs->regs.cfa_reg = __LIBGCC_STACK_POINTER_REGNUM__;
> +  fs->regs.cfa_offset = new_cfa - (_Unwind_Ptr) context->cfa;
> +
> +  for (i = 0; i < 32; i++)
> +    {
> +  fs->regs.reg[i].how = REG_SAVED_OFFSET;
> +  fs->regs.reg[i].loc.offset = (_Unwind_Ptr) & (sc->sc_regs[i]) - 
> new_cfa;

There shouldn't be a space between the unary & and its operand.  And the
braces around sc->sc_regs[i] seems unnecessary.

In this particular case, the space makes it really looking similar to a
bitwise and expression...

[PATCH v1 3/7] LoongArch Port: libgcc

2021-11-06 Thread Chenghua Xu 
From: chenglulu 

libgcc/

* config/loongarch/crtfastmath.c: New file.
* config/loongarch/crti.S: Like wise.
* config/loongarch/crtn.S: Like wise.
* config/loongarch/lib2funcs.c: Like wise.
* config/loongarch/linux-unwind.h: Like wise.
* config/loongarch/sfp-machine.h: Like wise.
* config/loongarch/t-crtstuff: Like wise.
* config/loongarch/t-elf: Like wise.
* config/loongarch/t-loongarch: Like wise.
* config/loongarch/t-loongarch64: Like wise.
* config/loongarch/t-softfp-tf: Like wise.
* config.host: Add LoongArch tuples.
* configure.ac: Add LoongArch support.
---
 libgcc/config.host |  26 +
 libgcc/config/loongarch/crtfastmath.c  |  52 +
 libgcc/config/loongarch/crti.S |  43 +++
 libgcc/config/loongarch/crtn.S |  39 +++
 libgcc/config/loongarch/lib2funcs.c|   0
 libgcc/config/loongarch/linux-unwind.h |  80 +
 libgcc/config/loongarch/sfp-machine.h  | 152 +
 libgcc/config/loongarch/t-crtstuff |   2 +
 libgcc/config/loongarch/t-elf  |   3 +
 libgcc/config/loongarch/t-loongarch|   9 ++
 libgcc/config/loongarch/t-loongarch64  |   1 +
 libgcc/config/loongarch/t-softfp-tf|   3 +
 libgcc/configure.ac|   2 +-
 13 files changed, 411 insertions(+), 1 deletion(-)
 create mode 100644 libgcc/config/loongarch/crtfastmath.c
 create mode 100644 libgcc/config/loongarch/crti.S
 create mode 100644 libgcc/config/loongarch/crtn.S
 create mode 100644 libgcc/config/loongarch/lib2funcs.c
 create mode 100644 libgcc/config/loongarch/linux-unwind.h
 create mode 100644 libgcc/config/loongarch/sfp-machine.h
 create mode 100644 libgcc/config/loongarch/t-crtstuff
 create mode 100644 libgcc/config/loongarch/t-elf
 create mode 100644 libgcc/config/loongarch/t-loongarch
 create mode 100644 libgcc/config/loongarch/t-loongarch64
 create mode 100644 libgcc/config/loongarch/t-softfp-tf

diff --git a/libgcc/config.host b/libgcc/config.host
index 168535b1780..11b0af6f409 100644
--- a/libgcc/config.host
+++ b/libgcc/config.host
@@ -138,6 +138,22 @@ hppa*-*-*)
 lm32*-*-*)
cpu_type=lm32
;;
+loongarch*-*-*)
+   cpu_type=loongarch
+   tmake_file="loongarch/t-loongarch"
+   if test "${libgcc_cv_loongarch_hard_float}" = yes; then
+   tmake_file="${tmake_file} t-hardfp-sfdf t-hardfp"
+   else
+   tmake_file="${tmake_file} t-softfp-sfdf"
+   fi
+   if test "${ac_cv_sizeof_long_double}" = 16; then
+   tmake_file="${tmake_file} loongarch/t-softfp-tf"
+   fi
+   if test "${host_address}" = 64; then
+   tmake_file="${tmake_file} loongarch/t-loongarch64"
+   fi
+   tmake_file="${tmake_file} t-softfp"
+   ;;
 m32r*-*-*)
 cpu_type=m32r
 ;;
@@ -922,6 +938,16 @@ lm32-*-uclinux*)
 extra_parts="$extra_parts crtbegin.o crtendS.o crtbeginT.o"
 tmake_file="lm32/t-lm32 lm32/t-uclinux t-libgcc-pic t-softfp-sfdf 
t-softfp"
;;  
+loongarch*-*-linux*)
+   extra_parts="$extra_parts crtfastmath.o"
+   tmake_file="${tmake_file} t-crtfm"
+   case ${host} in
+ *)
+   tmake_file="${tmake_file} t-slibgcc-libgcc"
+   ;;
+   esac
+   md_unwind_header=loongarch/linux-unwind.h
+   ;;
 m32r-*-elf*)
tmake_file="$tmake_file m32r/t-m32r t-fdpbit"
extra_parts="$extra_parts crtinit.o crtfini.o"
diff --git a/libgcc/config/loongarch/crtfastmath.c 
b/libgcc/config/loongarch/crtfastmath.c
new file mode 100644
index 000..8f3ec599cbc
--- /dev/null
+++ b/libgcc/config/loongarch/crtfastmath.c
@@ -0,0 +1,52 @@
+/* Copyright (C) 2021 Free Software Foundation, Inc.
+   Contributed by Loongson Ltd.
+   Based on MIPS target for GNU compiler.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it
+under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 3, or (at your option)
+any later version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT
+ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+License for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License
+and a copy of the GCC Runtime Library Exception along with this
+program; see the files COPYING3 and COPYING.RUNTIME respectively.
+If not, see .  */
+
+#ifdef __loongarch_hard_float
+
+/* Rounding control.  */
+#define _FPU_RC_NEAREST 0x000 /* RECOMMENDED.  */
+#define _FPU_RC_ZERO0x100
+#define _FPU_RC_UP  0x200
+#define _FPU_RC_DOWN0x300