Re: [PATCH v2 1/9] aarch64: Accept 0 as first argument to compares

2020-03-31 Thread Richard Henderson via Gcc-patches
On 3/31/20 9:55 AM, Richard Sandiford wrote:
>>  (define_insn "cmp"
>>[(set (reg:CC CC_REGNUM)
>> -(compare:CC (match_operand:GPI 0 "register_operand" "rk,rk,rk")
>> -(match_operand:GPI 1 "aarch64_plus_operand" "r,I,J")))]
>> +(compare:CC (match_operand:GPI 0 "aarch64_reg_or_zero" "rk,rk,rkZ")
>> +(match_operand:GPI 1 "aarch64_plus_operand" "I,J,rZ")))]
>>""
>>"@
>> -   cmp\\t%0, %1
>> cmp\\t%0, %1
>> -   cmn\\t%0, #%n1"
>> -  [(set_attr "type" "alus_sreg,alus_imm,alus_imm")]
>> +   cmn\\t%0, #%n1
>> +   cmp\\t%0, %1"
>> +  [(set_attr "type" "alus_imm,alus_imm,alus_sreg")]
>>  )
>>  
>>  (define_insn "fcmp"
> 
> ...does adding 'Z' to operand 1 enable any new combinations?

Not useful ones, on reflection, but given it's a valid combination, it's easier
to include it than not.

I can certainly remove that.

r~



Re: [PATCH v2 1/9] aarch64: Accept 0 as first argument to compares

2020-03-31 Thread Richard Sandiford
Richard Henderson  writes:
> While cmp (extended register) and cmp (immediate) uses ,
> cmp (shifted register) uses .  So we can perform cmp xzr, x0.
>
> For ccmp, we only have  as an input.
>
>   * config/aarch64/aarch64.md (cmp): For operand 0, use
>   aarch64_reg_or_zero.  Shuffle reg/reg to last alternative
>   and accept Z.
>   (@ccmpcc): For operand 0, use aarch64_reg_or_zero and Z.
>   (@ccmpcc_rev): Likewise.

Looks good, but...

> ---
>  gcc/config/aarch64/aarch64.md | 14 +++---
>  1 file changed, 7 insertions(+), 7 deletions(-)
>
> diff --git a/gcc/config/aarch64/aarch64.md b/gcc/config/aarch64/aarch64.md
> index c7c4d1dd519..b9ae51e48dd 100644
> --- a/gcc/config/aarch64/aarch64.md
> +++ b/gcc/config/aarch64/aarch64.md
> @@ -502,7 +502,7 @@
>  [(match_operand 0 "cc_register" "")
>   (const_int 0)])
> (compare:CC_ONLY
> - (match_operand:GPI 2 "register_operand" "r,r,r")
> + (match_operand:GPI 2 "aarch64_reg_or_zero" "rZ,rZ,rZ")
>   (match_operand:GPI 3 "aarch64_ccmp_operand" "r,Uss,Usn"))
> (unspec:CC_ONLY
>   [(match_operand 5 "immediate_operand")]
> @@ -542,7 +542,7 @@
>   [(match_operand 5 "immediate_operand")]
>   UNSPEC_NZCV)
> (compare:CC_ONLY
> - (match_operand:GPI 2 "register_operand" "r,r,r")
> + (match_operand:GPI 2 "aarch64_reg_or_zero" "rZ,rZ,rZ")
>   (match_operand:GPI 3 "aarch64_ccmp_operand" "r,Uss,Usn"]
>""
>"@
> @@ -3961,14 +3961,14 @@
>  
>  (define_insn "cmp"
>[(set (reg:CC CC_REGNUM)
> - (compare:CC (match_operand:GPI 0 "register_operand" "rk,rk,rk")
> - (match_operand:GPI 1 "aarch64_plus_operand" "r,I,J")))]
> + (compare:CC (match_operand:GPI 0 "aarch64_reg_or_zero" "rk,rk,rkZ")
> + (match_operand:GPI 1 "aarch64_plus_operand" "I,J,rZ")))]
>""
>"@
> -   cmp\\t%0, %1
> cmp\\t%0, %1
> -   cmn\\t%0, #%n1"
> -  [(set_attr "type" "alus_sreg,alus_imm,alus_imm")]
> +   cmn\\t%0, #%n1
> +   cmp\\t%0, %1"
> +  [(set_attr "type" "alus_imm,alus_imm,alus_sreg")]
>  )
>  
>  (define_insn "fcmp"

...does adding 'Z' to operand 1 enable any new combinations?
I guess it allows (compare:CC (const_int 0) (const_int 0)),
but it's borderline whether that should be valid rtl.

Richard


[PATCH v2 1/9] aarch64: Accept 0 as first argument to compares

2020-03-20 Thread Richard Henderson via Gcc-patches
While cmp (extended register) and cmp (immediate) uses ,
cmp (shifted register) uses .  So we can perform cmp xzr, x0.

For ccmp, we only have  as an input.

* config/aarch64/aarch64.md (cmp): For operand 0, use
aarch64_reg_or_zero.  Shuffle reg/reg to last alternative
and accept Z.
(@ccmpcc): For operand 0, use aarch64_reg_or_zero and Z.
(@ccmpcc_rev): Likewise.
---
 gcc/config/aarch64/aarch64.md | 14 +++---
 1 file changed, 7 insertions(+), 7 deletions(-)

diff --git a/gcc/config/aarch64/aarch64.md b/gcc/config/aarch64/aarch64.md
index c7c4d1dd519..b9ae51e48dd 100644
--- a/gcc/config/aarch64/aarch64.md
+++ b/gcc/config/aarch64/aarch64.md
@@ -502,7 +502,7 @@
   [(match_operand 0 "cc_register" "")
(const_int 0)])
  (compare:CC_ONLY
-   (match_operand:GPI 2 "register_operand" "r,r,r")
+   (match_operand:GPI 2 "aarch64_reg_or_zero" "rZ,rZ,rZ")
(match_operand:GPI 3 "aarch64_ccmp_operand" "r,Uss,Usn"))
  (unspec:CC_ONLY
[(match_operand 5 "immediate_operand")]
@@ -542,7 +542,7 @@
[(match_operand 5 "immediate_operand")]
UNSPEC_NZCV)
  (compare:CC_ONLY
-   (match_operand:GPI 2 "register_operand" "r,r,r")
+   (match_operand:GPI 2 "aarch64_reg_or_zero" "rZ,rZ,rZ")
(match_operand:GPI 3 "aarch64_ccmp_operand" "r,Uss,Usn"]
   ""
   "@
@@ -3961,14 +3961,14 @@
 
 (define_insn "cmp"
   [(set (reg:CC CC_REGNUM)
-   (compare:CC (match_operand:GPI 0 "register_operand" "rk,rk,rk")
-   (match_operand:GPI 1 "aarch64_plus_operand" "r,I,J")))]
+   (compare:CC (match_operand:GPI 0 "aarch64_reg_or_zero" "rk,rk,rkZ")
+   (match_operand:GPI 1 "aarch64_plus_operand" "I,J,rZ")))]
   ""
   "@
-   cmp\\t%0, %1
cmp\\t%0, %1
-   cmn\\t%0, #%n1"
-  [(set_attr "type" "alus_sreg,alus_imm,alus_imm")]
+   cmn\\t%0, #%n1
+   cmp\\t%0, %1"
+  [(set_attr "type" "alus_imm,alus_imm,alus_sreg")]
 )
 
 (define_insn "fcmp"
-- 
2.20.1