Re: [PATCH v4 0/4] When cmodel=extreme, add macro support and only support macros.
在 2024/1/27 下午10:03, chenglulu 写道:
在 2024/1/27 下午7:11, Xi Ruoyao 写道:
On Sat, 2024-01-27 at 18:02 +0800, Xi Ruoyao wrote:
On Sat, 2024-01-27 at 11:15 +0800, chenglulu wrote:
在 2024/1/26 下午6:57, Xi Ruoyao 写道:
On Fri, 2024-01-26 at 16:59 +0800, chenglulu wrote:
在 2024/1/26 下午4:49, Xi Ruoyao 写道:
On Fri, 2024-01-26 at 15:37 +0800, Lulu Cheng wrote:
v3 -> v4:
1. Add macro support for TLS symbols
2. Added support for loading __get_tls_addr symbol address
using call36.
3. Merge template got_load_tls_{ld/gd/le/ie}.
4. Enable explicit reloc for extreme TLS GD/LD with
-mexplicit-relocs=auto.
I've rebased and attached the patch to fix the bad split in
-mexplicit-
relocs={always,auto} -mcmodel=extreme on top of this series.
I've not
tested it seriously though (only tested the added and modified test
cases).
OK, I'll test the spec for correctness.
I suppose this still won't work yet because Binutils is not fully
fixed.
GAS has been changed not to emit R_LARCH_RELAX for "la.tls.ie a0, t0,
foo", but ld is still not checking if an R_LARCH_RELAX is after
R_LARCH_TLS_IE_PC_{HI20,LO12} properly. Thus an invalid "partial"
TLS
transition can still happen.
The following situations are not handled in the patch:
diff --git a/gcc/config/loongarch/loongarch.cc
b/gcc/config/loongarch/loongarch.cc
index 3fab4b64453..6336a9f696f 100644
--- a/gcc/config/loongarch/loongarch.cc
+++ b/gcc/config/loongarch/loongarch.cc
@@ -7472,7 +7472,13 @@ loongarch_output_mi_thunk (FILE *file, tree
thunk_fndecl ATTRIBUTE_UNUSED,
{
if (TARGET_CMODEL_EXTREME)
{
- emit_insn (gen_movdi_symbolic_off64 (temp1, fnaddr, temp2));
+ if (la_opt_explicit_relocs != EXPLICIT_RELOCS_NONE)
+ {
+ emit_insn (gen_la_pcrel64_two_parts (temp1, temp2,
fnaddr));
+ emit_move_insn (temp1, gen_rtx_PLUS (Pmode, temp1,
temp2));
+ }
+ else
+ emit_insn (gen_movdi_symbolic_off64 (temp1, fnaddr,
temp2));
It looks like this part is unreachable: with -mcmodel=extreme
use_sibcall_p will never be true.
So cleaned up this part and fixed an ERROR in the added test:
diff --git a/gcc/config/loongarch/loongarch.cc
b/gcc/config/loongarch/loongarch.cc
index 3a97ba61362..7b8c85a1606 100644
--- a/gcc/config/loongarch/loongarch.cc
+++ b/gcc/config/loongarch/loongarch.cc
@@ -7481,21 +7481,24 @@ loongarch_output_mi_thunk (FILE *file, tree
thunk_fndecl ATTRIBUTE_UNUSED,
allowed, otherwise load the address into a register first. */
if (use_sibcall_p)
{
- if (TARGET_CMODEL_EXTREME)
- {
- emit_insn (gen_movdi_symbolic_off64 (temp1, fnaddr, temp2));
- insn = emit_call_insn (gen_sibcall_internal (temp1, const0_rtx));
- }
- else
- insn = emit_call_insn (gen_sibcall_internal (fnaddr, const0_rtx));
+ /* If TARGET_CMODEL_EXTREME, we cannot do a direct jump at all
+ and const_call_insn_operand should have returned false. */
+ gcc_assert (!TARGET_CMODEL_EXTREME);
+
+ insn = emit_call_insn (gen_sibcall_internal (fnaddr,
const0_rtx));
SIBLING_CALL_P (insn) = 1;
}
else
{
- if (TARGET_CMODEL_EXTREME)
+ if (!TARGET_CMODEL_EXTREME)
+ loongarch_emit_move (temp1, fnaddr);
+ else if (la_opt_explicit_relocs == EXPLICIT_RELOCS_NONE)
emit_insn (gen_movdi_symbolic_off64 (temp1, fnaddr, temp2));
else
- loongarch_emit_move (temp1, fnaddr);
+ {
+ emit_insn (gen_la_pcrel64_two_parts (temp1, temp2, fnaddr));
+ emit_move_insn (temp1, gen_rtx_PLUS (Pmode, temp1, temp2));
+ }
emit_jump_insn (gen_indirect_jump (temp1));
}
diff --git
a/gcc/testsuite/gcc.target/loongarch/explicit-relocs-extreme-auto-tls-ld-gd.c
b/gcc/testsuite/gcc.target/loongarch/explicit-relocs-extreme-auto-tls-ld-gd.c
index 27baf4886d6..35bd4570a9e 100644
---
a/gcc/testsuite/gcc.target/loongarch/explicit-relocs-extreme-auto-tls-ld-gd.c
+++
b/gcc/testsuite/gcc.target/loongarch/explicit-relocs-extreme-auto-tls-ld-gd.c
@@ -1,5 +1,5 @@
/* { dg-do compile } */
/* { dg-options "-O2 -fPIC -mexplicit-relocs=auto -mcmodel=extreme
-fno-plt" } */
-/* { dg-final { scan-assembler-not "la.tls.[lg]d" { target
tls_native } } } */
+/* { dg-final { scan-assembler-not "la.tls.\[lg\]d" { target
tls_native } } } */
#include "./explicit-relocs-auto-tls-ld-gd.c"
And added 3 tests for output_mi_thunk. The updated patch attached, now
running regression test.
@@ -2870,20 +2872,30 @@ loongarch_call_tls_get_addr (rtx sym, enum
loongarch_symbol_type type, rtx v0)
{
if (loongarch_explicit_relocs_p (SYMBOL_GOT_DISP))
{
- rtx tmp1 = gen_reg_rtx (Pmode);
- rtx high = gen_reg_rtx (Pmode);
+ gcc_assert (la_opt_explicit_relocs !=
+ EXPLICIT_RELOCS_NONE);
This operator is written at the end of the line, and I think there is
no problem with anything else.
But I need t
Re: [PATCH v4 0/4] When cmodel=extreme, add macro support and only support macros.
在 2024/1/27 下午7:11, Xi Ruoyao 写道:
On Sat, 2024-01-27 at 18:02 +0800, Xi Ruoyao wrote:
On Sat, 2024-01-27 at 11:15 +0800, chenglulu wrote:
在 2024/1/26 下午6:57, Xi Ruoyao 写道:
On Fri, 2024-01-26 at 16:59 +0800, chenglulu wrote:
在 2024/1/26 下午4:49, Xi Ruoyao 写道:
On Fri, 2024-01-26 at 15:37 +0800, Lulu Cheng wrote:
v3 -> v4:
1. Add macro support for TLS symbols
2. Added support for loading __get_tls_addr symbol address using call36.
3. Merge template got_load_tls_{ld/gd/le/ie}.
4. Enable explicit reloc for extreme TLS GD/LD with -mexplicit-relocs=auto.
I've rebased and attached the patch to fix the bad split in -mexplicit-
relocs={always,auto} -mcmodel=extreme on top of this series. I've not
tested it seriously though (only tested the added and modified test
cases).
OK, I'll test the spec for correctness.
I suppose this still won't work yet because Binutils is not fully fixed.
GAS has been changed not to emit R_LARCH_RELAX for "la.tls.ie a0, t0,
foo", but ld is still not checking if an R_LARCH_RELAX is after
R_LARCH_TLS_IE_PC_{HI20,LO12} properly. Thus an invalid "partial" TLS
transition can still happen.
The following situations are not handled in the patch:
diff --git a/gcc/config/loongarch/loongarch.cc
b/gcc/config/loongarch/loongarch.cc
index 3fab4b64453..6336a9f696f 100644
--- a/gcc/config/loongarch/loongarch.cc
+++ b/gcc/config/loongarch/loongarch.cc
@@ -7472,7 +7472,13 @@ loongarch_output_mi_thunk (FILE *file, tree
thunk_fndecl ATTRIBUTE_UNUSED,
{
if (TARGET_CMODEL_EXTREME)
{
- emit_insn (gen_movdi_symbolic_off64 (temp1, fnaddr, temp2));
+ if (la_opt_explicit_relocs != EXPLICIT_RELOCS_NONE)
+ {
+ emit_insn (gen_la_pcrel64_two_parts (temp1, temp2, fnaddr));
+ emit_move_insn (temp1, gen_rtx_PLUS (Pmode, temp1, temp2));
+ }
+ else
+ emit_insn (gen_movdi_symbolic_off64 (temp1, fnaddr, temp2));
It looks like this part is unreachable: with -mcmodel=extreme
use_sibcall_p will never be true.
So cleaned up this part and fixed an ERROR in the added test:
diff --git a/gcc/config/loongarch/loongarch.cc
b/gcc/config/loongarch/loongarch.cc
index 3a97ba61362..7b8c85a1606 100644
--- a/gcc/config/loongarch/loongarch.cc
+++ b/gcc/config/loongarch/loongarch.cc
@@ -7481,21 +7481,24 @@ loongarch_output_mi_thunk (FILE *file, tree
thunk_fndecl ATTRIBUTE_UNUSED,
allowed, otherwise load the address into a register first. */
if (use_sibcall_p)
{
- if (TARGET_CMODEL_EXTREME)
- {
- emit_insn (gen_movdi_symbolic_off64 (temp1, fnaddr, temp2));
- insn = emit_call_insn (gen_sibcall_internal (temp1, const0_rtx));
- }
- else
- insn = emit_call_insn (gen_sibcall_internal (fnaddr, const0_rtx));
+ /* If TARGET_CMODEL_EXTREME, we cannot do a direct jump at all
+and const_call_insn_operand should have returned false. */
+ gcc_assert (!TARGET_CMODEL_EXTREME);
+
+ insn = emit_call_insn (gen_sibcall_internal (fnaddr, const0_rtx));
SIBLING_CALL_P (insn) = 1;
}
else
{
- if (TARGET_CMODEL_EXTREME)
+ if (!TARGET_CMODEL_EXTREME)
+ loongarch_emit_move (temp1, fnaddr);
+ else if (la_opt_explicit_relocs == EXPLICIT_RELOCS_NONE)
emit_insn (gen_movdi_symbolic_off64 (temp1, fnaddr, temp2));
else
- loongarch_emit_move (temp1, fnaddr);
+ {
+ emit_insn (gen_la_pcrel64_two_parts (temp1, temp2, fnaddr));
+ emit_move_insn (temp1, gen_rtx_PLUS (Pmode, temp1, temp2));
+ }
emit_jump_insn (gen_indirect_jump (temp1));
}
diff --git
a/gcc/testsuite/gcc.target/loongarch/explicit-relocs-extreme-auto-tls-ld-gd.c
b/gcc/testsuite/gcc.target/loongarch/explicit-relocs-extreme-auto-tls-ld-gd.c
index 27baf4886d6..35bd4570a9e 100644
---
a/gcc/testsuite/gcc.target/loongarch/explicit-relocs-extreme-auto-tls-ld-gd.c
+++
b/gcc/testsuite/gcc.target/loongarch/explicit-relocs-extreme-auto-tls-ld-gd.c
@@ -1,5 +1,5 @@
/* { dg-do compile } */
/* { dg-options "-O2 -fPIC -mexplicit-relocs=auto -mcmodel=extreme -fno-plt"
} */
-/* { dg-final { scan-assembler-not "la.tls.[lg]d" { target tls_native } } } */
+/* { dg-final { scan-assembler-not "la.tls.\[lg\]d" { target tls_native } } }
*/
#include "./explicit-relocs-auto-tls-ld-gd.c"
And added 3 tests for output_mi_thunk. The updated patch attached, now
running regression test.
@@ -2870,20 +2872,30 @@ loongarch_call_tls_get_addr (rtx sym, enum
loongarch_symbol_type type, rtx v0)
{
if (loongarch_explicit_relocs_p (SYMBOL_GOT_DISP))
{
- rtx tmp1 = gen_reg_rtx (Pmode);
- rtx high = gen_reg_rtx (Pmode);
+ gcc_assert (la_opt_explicit_relocs !=
+ EXPLICIT_RELOCS_NONE);
This operator is written at the end of the line, and I think there is no
problem with anything else.
But I need to see the result
Re: [PATCH v4 0/4] When cmodel=extreme, add macro support and only support macros.
On Sat, 2024-01-27 at 18:02 +0800, Xi Ruoyao wrote:
> On Sat, 2024-01-27 at 11:15 +0800, chenglulu wrote:
> >
> > 在 2024/1/26 下午6:57, Xi Ruoyao 写道:
> > > On Fri, 2024-01-26 at 16:59 +0800, chenglulu wrote:
> > > > 在 2024/1/26 下午4:49, Xi Ruoyao 写道:
> > > > > On Fri, 2024-01-26 at 15:37 +0800, Lulu Cheng wrote:
> > > > > > v3 -> v4:
> > > > > > 1. Add macro support for TLS symbols
> > > > > > 2. Added support for loading __get_tls_addr symbol address
> > > > > > using call36.
> > > > > > 3. Merge template got_load_tls_{ld/gd/le/ie}.
> > > > > > 4. Enable explicit reloc for extreme TLS GD/LD with
> > > > > > -mexplicit-relocs=auto.
> > > > > I've rebased and attached the patch to fix the bad split in
> > > > > -mexplicit-
> > > > > relocs={always,auto} -mcmodel=extreme on top of this series. I've not
> > > > > tested it seriously though (only tested the added and modified test
> > > > > cases).
> > > > >
> > > > OK, I'll test the spec for correctness.
> > > I suppose this still won't work yet because Binutils is not fully fixed.
> > > GAS has been changed not to emit R_LARCH_RELAX for "la.tls.ie a0, t0,
> > > foo", but ld is still not checking if an R_LARCH_RELAX is after
> > > R_LARCH_TLS_IE_PC_{HI20,LO12} properly. Thus an invalid "partial" TLS
> > > transition can still happen.
> > >
> >
> > The following situations are not handled in the patch:
> >
> > diff --git a/gcc/config/loongarch/loongarch.cc
> > b/gcc/config/loongarch/loongarch.cc
> >
> > index 3fab4b64453..6336a9f696f 100644
> > --- a/gcc/config/loongarch/loongarch.cc
> > +++ b/gcc/config/loongarch/loongarch.cc
> > @@ -7472,7 +7472,13 @@ loongarch_output_mi_thunk (FILE *file, tree
> > thunk_fndecl ATTRIBUTE_UNUSED,
> > {
> > if (TARGET_CMODEL_EXTREME)
> > {
> > - emit_insn (gen_movdi_symbolic_off64 (temp1, fnaddr, temp2));
> > + if (la_opt_explicit_relocs != EXPLICIT_RELOCS_NONE)
> > + {
> > + emit_insn (gen_la_pcrel64_two_parts (temp1, temp2, fnaddr));
> > + emit_move_insn (temp1, gen_rtx_PLUS (Pmode, temp1, temp2));
> > + }
> > + else
> > + emit_insn (gen_movdi_symbolic_off64 (temp1, fnaddr, temp2));
It looks like this part is unreachable: with -mcmodel=extreme
use_sibcall_p will never be true.
So cleaned up this part and fixed an ERROR in the added test:
diff --git a/gcc/config/loongarch/loongarch.cc
b/gcc/config/loongarch/loongarch.cc
index 3a97ba61362..7b8c85a1606 100644
--- a/gcc/config/loongarch/loongarch.cc
+++ b/gcc/config/loongarch/loongarch.cc
@@ -7481,21 +7481,24 @@ loongarch_output_mi_thunk (FILE *file, tree
thunk_fndecl ATTRIBUTE_UNUSED,
allowed, otherwise load the address into a register first. */
if (use_sibcall_p)
{
- if (TARGET_CMODEL_EXTREME)
- {
- emit_insn (gen_movdi_symbolic_off64 (temp1, fnaddr, temp2));
- insn = emit_call_insn (gen_sibcall_internal (temp1, const0_rtx));
- }
- else
- insn = emit_call_insn (gen_sibcall_internal (fnaddr, const0_rtx));
+ /* If TARGET_CMODEL_EXTREME, we cannot do a direct jump at all
+and const_call_insn_operand should have returned false. */
+ gcc_assert (!TARGET_CMODEL_EXTREME);
+
+ insn = emit_call_insn (gen_sibcall_internal (fnaddr, const0_rtx));
SIBLING_CALL_P (insn) = 1;
}
else
{
- if (TARGET_CMODEL_EXTREME)
+ if (!TARGET_CMODEL_EXTREME)
+ loongarch_emit_move (temp1, fnaddr);
+ else if (la_opt_explicit_relocs == EXPLICIT_RELOCS_NONE)
emit_insn (gen_movdi_symbolic_off64 (temp1, fnaddr, temp2));
else
- loongarch_emit_move (temp1, fnaddr);
+ {
+ emit_insn (gen_la_pcrel64_two_parts (temp1, temp2, fnaddr));
+ emit_move_insn (temp1, gen_rtx_PLUS (Pmode, temp1, temp2));
+ }
emit_jump_insn (gen_indirect_jump (temp1));
}
diff --git
a/gcc/testsuite/gcc.target/loongarch/explicit-relocs-extreme-auto-tls-ld-gd.c
b/gcc/testsuite/gcc.target/loongarch/explicit-relocs-extreme-auto-tls-ld-gd.c
index 27baf4886d6..35bd4570a9e 100644
---
a/gcc/testsuite/gcc.target/loongarch/explicit-relocs-extreme-auto-tls-ld-gd.c
+++
b/gcc/testsuite/gcc.target/loongarch/explicit-relocs-extreme-auto-tls-ld-gd.c
@@ -1,5 +1,5 @@
/* { dg-do compile } */
/* { dg-options "-O2 -fPIC -mexplicit-relocs=auto -mcmodel=extreme -fno-plt" }
*/
-/* { dg-final { scan-assembler-not "la.tls.[lg]d" { target tls_native } } } */
+/* { dg-final { scan-assembler-not "la.tls.\[lg\]d" { target tls_native } } }
*/
#include "./explicit-relocs-auto-tls-ld-gd.c"
And added 3 tests for output_mi_thunk. The updated patch attached, now
running regression test.
--
Xi Ruoyao
School of Aerospace Science and Technology, Xidian University
From ecbadf341234fcec2e0c16e6b2435d117bf80446 Mon Sep 17 00:00:00 2001
From: Xi Ruoyao
Date: Fri, 5 Jan 2024 18:40:06 +0800
Subject: [PATCH 5/4] LoongArch: Don't split the instructions containing
Re: [PATCH v4 0/4] When cmodel=extreme, add macro support and only support macros.
On Sat, 2024-01-27 at 11:15 +0800, chenglulu wrote:
>
> 在 2024/1/26 下午6:57, Xi Ruoyao 写道:
> > On Fri, 2024-01-26 at 16:59 +0800, chenglulu wrote:
> > > 在 2024/1/26 下午4:49, Xi Ruoyao 写道:
> > > > On Fri, 2024-01-26 at 15:37 +0800, Lulu Cheng wrote:
> > > > > v3 -> v4:
> > > > > 1. Add macro support for TLS symbols
> > > > > 2. Added support for loading __get_tls_addr symbol address using
> > > > > call36.
> > > > > 3. Merge template got_load_tls_{ld/gd/le/ie}.
> > > > > 4. Enable explicit reloc for extreme TLS GD/LD with
> > > > > -mexplicit-relocs=auto.
> > > > I've rebased and attached the patch to fix the bad split in -mexplicit-
> > > > relocs={always,auto} -mcmodel=extreme on top of this series. I've not
> > > > tested it seriously though (only tested the added and modified test
> > > > cases).
> > > >
> > > OK, I'll test the spec for correctness.
> > I suppose this still won't work yet because Binutils is not fully fixed.
> > GAS has been changed not to emit R_LARCH_RELAX for "la.tls.ie a0, t0,
> > foo", but ld is still not checking if an R_LARCH_RELAX is after
> > R_LARCH_TLS_IE_PC_{HI20,LO12} properly. Thus an invalid "partial" TLS
> > transition can still happen.
> >
>
> The following situations are not handled in the patch:
>
> diff --git a/gcc/config/loongarch/loongarch.cc
> b/gcc/config/loongarch/loongarch.cc
>
> index 3fab4b64453..6336a9f696f 100644
> --- a/gcc/config/loongarch/loongarch.cc
> +++ b/gcc/config/loongarch/loongarch.cc
> @@ -7472,7 +7472,13 @@ loongarch_output_mi_thunk (FILE *file, tree
> thunk_fndecl ATTRIBUTE_UNUSED,
> {
> if (TARGET_CMODEL_EXTREME)
> {
> - emit_insn (gen_movdi_symbolic_off64 (temp1, fnaddr, temp2));
> + if (la_opt_explicit_relocs != EXPLICIT_RELOCS_NONE)
> + {
> + emit_insn (gen_la_pcrel64_two_parts (temp1, temp2, fnaddr));
> + emit_move_insn (temp1, gen_rtx_PLUS (Pmode, temp1, temp2));
> + }
> + else
> + emit_insn (gen_movdi_symbolic_off64 (temp1, fnaddr, temp2));
> insn = emit_call_insn (gen_sibcall_internal (temp1, const0_rtx));
> }
> else
> @@ -7482,7 +7488,15 @@ loongarch_output_mi_thunk (FILE *file, tree
> thunk_fndecl ATTRIBUTE_UNUSED,
> else
> {
> if (TARGET_CMODEL_EXTREME)
> - emit_insn (gen_movdi_symbolic_off64 (temp1, fnaddr, temp2));
> + {
> + if (la_opt_explicit_relocs != EXPLICIT_RELOCS_NONE)
> + {
> + emit_insn (gen_la_pcrel64_two_parts (temp1, temp2, fnaddr));
> + emit_move_insn (temp1, gen_rtx_PLUS (Pmode, temp1, temp2));
> + }
> + else
> + emit_insn (gen_movdi_symbolic_off64 (temp1, fnaddr, temp2));
> + }
> else
> loongarch_emit_move (temp1, fnaddr);
In deed. Considering the similarity of these two hunks I'll separate
the logic into a static function though. And I'll also add some test
case for them...
--
Xi Ruoyao
School of Aerospace Science and Technology, Xidian University
Re: [PATCH v4 0/4] When cmodel=extreme, add macro support and only support macros.
在 2024/1/26 下午6:57, Xi Ruoyao 写道:
On Fri, 2024-01-26 at 16:59 +0800, chenglulu wrote:
在 2024/1/26 下午4:49, Xi Ruoyao 写道:
On Fri, 2024-01-26 at 15:37 +0800, Lulu Cheng wrote:
v3 -> v4:
1. Add macro support for TLS symbols
2. Added support for loading __get_tls_addr symbol address using call36.
3. Merge template got_load_tls_{ld/gd/le/ie}.
4. Enable explicit reloc for extreme TLS GD/LD with -mexplicit-relocs=auto.
I've rebased and attached the patch to fix the bad split in -mexplicit-
relocs={always,auto} -mcmodel=extreme on top of this series. I've not
tested it seriously though (only tested the added and modified test
cases).
OK, I'll test the spec for correctness.
I suppose this still won't work yet because Binutils is not fully fixed.
GAS has been changed not to emit R_LARCH_RELAX for "la.tls.ie a0, t0,
foo", but ld is still not checking if an R_LARCH_RELAX is after
R_LARCH_TLS_IE_PC_{HI20,LO12} properly. Thus an invalid "partial" TLS
transition can still happen.
The following situations are not handled in the patch:
diff --git a/gcc/config/loongarch/loongarch.cc
b/gcc/config/loongarch/loongarch.cc
index 3fab4b64453..6336a9f696f 100644
--- a/gcc/config/loongarch/loongarch.cc
+++ b/gcc/config/loongarch/loongarch.cc
@@ -7472,7 +7472,13 @@ loongarch_output_mi_thunk (FILE *file, tree
thunk_fndecl ATTRIBUTE_UNUSED,
{
if (TARGET_CMODEL_EXTREME)
{
- emit_insn (gen_movdi_symbolic_off64 (temp1, fnaddr, temp2));
+ if (la_opt_explicit_relocs != EXPLICIT_RELOCS_NONE)
+ {
+ emit_insn (gen_la_pcrel64_two_parts (temp1, temp2, fnaddr));
+ emit_move_insn (temp1, gen_rtx_PLUS (Pmode, temp1, temp2));
+ }
+ else
+ emit_insn (gen_movdi_symbolic_off64 (temp1, fnaddr, temp2));
insn = emit_call_insn (gen_sibcall_internal (temp1, const0_rtx));
}
else
@@ -7482,7 +7488,15 @@ loongarch_output_mi_thunk (FILE *file, tree
thunk_fndecl ATTRIBUTE_UNUSED,
else
{
if (TARGET_CMODEL_EXTREME)
- emit_insn (gen_movdi_symbolic_off64 (temp1, fnaddr, temp2));
+ {
+ if (la_opt_explicit_relocs != EXPLICIT_RELOCS_NONE)
+ {
+ emit_insn (gen_la_pcrel64_two_parts (temp1, temp2, fnaddr));
+ emit_move_insn (temp1, gen_rtx_PLUS (Pmode, temp1, temp2));
+ }
+ else
+ emit_insn (gen_movdi_symbolic_off64 (temp1, fnaddr, temp2));
+ }
else
loongarch_emit_move (temp1, fnaddr);
Re: [PATCH v4 0/4] When cmodel=extreme, add macro support and only support macros.
在 2024/1/26 下午6:57, Xi Ruoyao 写道:
On Fri, 2024-01-26 at 16:59 +0800, chenglulu wrote:
在 2024/1/26 下午4:49, Xi Ruoyao 写道:
On Fri, 2024-01-26 at 15:37 +0800, Lulu Cheng wrote:
v3 -> v4:
1. Add macro support for TLS symbols
2. Added support for loading __get_tls_addr symbol address using call36.
3. Merge template got_load_tls_{ld/gd/le/ie}.
4. Enable explicit reloc for extreme TLS GD/LD with -mexplicit-relocs=auto.
I've rebased and attached the patch to fix the bad split in -mexplicit-
relocs={always,auto} -mcmodel=extreme on top of this series. I've not
tested it seriously though (only tested the added and modified test
cases).
OK, I'll test the spec for correctness.
I suppose this still won't work yet because Binutils is not fully fixed.
GAS has been changed not to emit R_LARCH_RELAX for "la.tls.ie a0, t0,
foo", but ld is still not checking if an R_LARCH_RELAX is after
R_LARCH_TLS_IE_PC_{HI20,LO12} properly. Thus an invalid "partial" TLS
transition can still happen.
I temporarily changed my binutils to turn off this function.;-)
Re: [PATCH v4 0/4] When cmodel=extreme, add macro support and only support macros.
On Fri, 2024-01-26 at 16:59 +0800, chenglulu wrote:
>
> 在 2024/1/26 下午4:49, Xi Ruoyao 写道:
> > On Fri, 2024-01-26 at 15:37 +0800, Lulu Cheng wrote:
> > > v3 -> v4:
> > > 1. Add macro support for TLS symbols
> > > 2. Added support for loading __get_tls_addr symbol address using
> > > call36.
> > > 3. Merge template got_load_tls_{ld/gd/le/ie}.
> > > 4. Enable explicit reloc for extreme TLS GD/LD with
> > > -mexplicit-relocs=auto.
> > I've rebased and attached the patch to fix the bad split in -mexplicit-
> > relocs={always,auto} -mcmodel=extreme on top of this series. I've not
> > tested it seriously though (only tested the added and modified test
> > cases).
> >
> OK, I'll test the spec for correctness.
I suppose this still won't work yet because Binutils is not fully fixed.
GAS has been changed not to emit R_LARCH_RELAX for "la.tls.ie a0, t0,
foo", but ld is still not checking if an R_LARCH_RELAX is after
R_LARCH_TLS_IE_PC_{HI20,LO12} properly. Thus an invalid "partial" TLS
transition can still happen.
--
Xi Ruoyao
School of Aerospace Science and Technology, Xidian University
Re: [PATCH v4 0/4] When cmodel=extreme, add macro support and only support macros.
在 2024/1/26 下午4:49, Xi Ruoyao 写道:
On Fri, 2024-01-26 at 15:37 +0800, Lulu Cheng wrote:
v3 -> v4:
1. Add macro support for TLS symbols
2. Added support for loading __get_tls_addr symbol address using call36.
3. Merge template got_load_tls_{ld/gd/le/ie}.
4. Enable explicit reloc for extreme TLS GD/LD with -mexplicit-relocs=auto.
I've rebased and attached the patch to fix the bad split in -mexplicit-
relocs={always,auto} -mcmodel=extreme on top of this series. I've not
tested it seriously though (only tested the added and modified test
cases).
OK, I'll test the spec for correctness.
Re: [PATCH v4 0/4] When cmodel=extreme, add macro support and only support macros.
On Fri, 2024-01-26 at 15:37 +0800, Lulu Cheng wrote:
> v3 -> v4:
> 1. Add macro support for TLS symbols
> 2. Added support for loading __get_tls_addr symbol address using call36.
> 3. Merge template got_load_tls_{ld/gd/le/ie}.
> 4. Enable explicit reloc for extreme TLS GD/LD with -mexplicit-relocs=auto.
I've rebased and attached the patch to fix the bad split in -mexplicit-
relocs={always,auto} -mcmodel=extreme on top of this series. I've not
tested it seriously though (only tested the added and modified test
cases).
--
Xi Ruoyao
School of Aerospace Science and Technology, Xidian University
From 87c9eafd88ae4a4339e094af08c77e7dfc9ea700 Mon Sep 17 00:00:00 2001
From: Xi Ruoyao
Date: Fri, 5 Jan 2024 18:40:06 +0800
Subject: [PATCH] LoongArch: Don't split the instructions containing relocs for
extreme code model
The ABI mandates the pcalau12i/addi.d/lu32i.d/lu52i.d instructions for
addressing a symbol to be adjacent. So model them as "one large
instruction", i.e. define_insn, with two output registers. The real
address is the sum of these two registers.
The advantage of this approach is the RTL passes can still use ldx/stx
instructions to skip an addi.d instruction.
gcc/ChangeLog:
* config/loongarch/loongarch.md (unspec): Add
UNSPEC_LA_PCREL_64_PART1 and UNSPEC_LA_PCREL_64_PART2.
(la_pcrel64_two_parts): New define_insn.
* config/loongarch/loongarch.cc (loongarch_tls_symbol): Fix a
typo in the comment.
(loongarch_call_tls_get_addr): If -mcmodel=extreme
-mexplicit-relocs={always,auto}, use la_pcrel64_two_parts for
addressing the TLS symbol and __tls_get_addr. Emit an REG_EQUAL
note to allow CSE addressing __tls_get_addr.
(loongarch_legitimize_tls_address): If -mcmodel=extreme
-mexplicit-relocs={always,auto}, address TLS IE symbols with
la_pcrel64_two_parts.
(loongarch_split_symbol): If -mcmodel=extreme
-mexplicit-relocs={always,auto}, address symbols with
la_pcrel64_two_parts.
gcc/testsuite/ChangeLog:
* gcc.target/loongarch/func-call-extreme-1.c (dg-options):
Use -O2 instead of -O0 to ensure the pcalau12i/addi/lu32i/lu52i
instruction sequences are not reordered by the compiler.
(NOIPA): Disallow interprocedural optimizations.
* gcc.target/loongarch/func-call-extreme-2.c: Remove the content
duplicated from func-call-extreme-1.c, include it instead.
(dg-options): Likewise.
* gcc.target/loongarch/func-call-extreme-3.c (dg-options):
Likewise.
* gcc.target/loongarch/func-call-extreme-4.c (dg-options):
Likewise.
* gcc.target/loongarch/cmodel-extreme-1.c: New test.
* gcc.target/loongarch/cmodel-extreme-2.c: New test.
---
gcc/config/loongarch/loongarch.cc | 112 ++
gcc/config/loongarch/loongarch.md | 20
.../gcc.target/loongarch/cmodel-extreme-1.c | 18 +++
.../gcc.target/loongarch/cmodel-extreme-2.c | 7 ++
.../loongarch/func-call-extreme-1.c | 14 ++-
.../loongarch/func-call-extreme-2.c | 29 +
.../loongarch/func-call-extreme-3.c | 2 +-
.../loongarch/func-call-extreme-4.c | 2 +-
8 files changed, 122 insertions(+), 82 deletions(-)
create mode 100644 gcc/testsuite/gcc.target/loongarch/cmodel-extreme-1.c
create mode 100644 gcc/testsuite/gcc.target/loongarch/cmodel-extreme-2.c
diff --git a/gcc/config/loongarch/loongarch.cc b/gcc/config/loongarch/loongarch.cc
index 481903147b8..e70ce80c7b3 100644
--- a/gcc/config/loongarch/loongarch.cc
+++ b/gcc/config/loongarch/loongarch.cc
@@ -2737,7 +2737,7 @@ loongarch_add_offset (rtx temp, rtx reg, HOST_WIDE_INT offset)
return plus_constant (Pmode, reg, offset);
}
-/* The __tls_get_attr symbol. */
+/* The __tls_get_addr symbol. */
static GTY (()) rtx loongarch_tls_symbol;
/* Load an entry for a TLS access. */
@@ -2777,20 +2777,22 @@ loongarch_call_tls_get_addr (rtx sym, enum loongarch_symbol_type type, rtx v0)
if (loongarch_explicit_relocs_p (type))
{
- /* Split tls symbol to high and low. */
- rtx high = gen_rtx_HIGH (Pmode, copy_rtx (loc));
- high = loongarch_force_temporary (tmp, high);
-
if (TARGET_CMODEL_EXTREME)
{
- rtx tmp1 = gen_reg_rtx (Pmode);
- emit_insn (gen_tls_low (Pmode, tmp1, gen_rtx_REG (Pmode, 0), loc));
- emit_insn (gen_lui_h_lo20 (tmp1, tmp1, loc));
- emit_insn (gen_lui_h_hi12 (tmp1, tmp1, loc));
- emit_move_insn (a0, gen_rtx_PLUS (Pmode, high, tmp1));
+ rtx part1 = gen_reg_rtx (Pmode);
+ rtx part2 = gen_reg_rtx (Pmode);
+
+ emit_insn (gen_la_pcrel64_two_parts (part1, part2, loc));
+ emit_move_insn (a0, gen_rtx_PLUS (Pmode, part1, part2));
}
else
- emit_insn (gen_tls_low (Pmode, a0, high, loc));
+ {
+ /* Split tls symbol to high and low. */
+ rtx high = gen_rtx_HIGH (Pmode, copy_rtx (loc));
+
+ high = loongarch_force_temporary (tmp, high);
+ emit_insn (gen_tls_low (Pmode, a0, high, loc));
+ }
}
else
emit_insn (loongarch_load_tls (a0, loc, type));
@@ -2870,20 +2872,30 @@ loongarch_call_tls_get_addr (rtx sym, enum
[PATCH v4 0/4] When cmodel=extreme, add macro support and only support macros.
v3 -> v4:
1. Add macro support for TLS symbols
2. Added support for loading __get_tls_addr symbol address using call36.
3. Merge template got_load_tls_{ld/gd/le/ie}.
4. Enable explicit reloc for extreme TLS GD/LD with -mexplicit-relocs=auto.
v2 -> v3:
1. Modify the detection rules of a test case.
v1 -> v2:
1. Use the temporarily allocated registers as intermediate registers to
implement the extreme macro.
2. Fixed bugs in v1 test cases.
Lulu Cheng (4):
LoongArch: Merge template got_load_tls_{ld/gd/le/ie}.
LoongArch: Add the macro implementation of mcmodel=extreme.
LoongArch: Enable explicit reloc for extreme TLS GD/LD with
-mexplicit-relocs=auto.
LoongArch: Added support for loading __get_tls_addr symbol address
using call36.
gcc/config/loongarch/loongarch-protos.h | 1 +
gcc/config/loongarch/loongarch.cc | 182 +-
gcc/config/loongarch/loongarch.md | 101 ++
gcc/config/loongarch/predicates.md| 12 ++
.../gcc.target/loongarch/attr-model-5.c | 8 +
.../explicit-relocs-extreme-auto-tls-ld-gd.c | 5 +
.../explicit-relocs-medium-auto-tls-ld-gd.c | 5 +
...icit-relocs-medium-call36-auto-tls-ld-gd.c | 5 +
.../loongarch/func-call-extreme-5.c | 7 +
.../loongarch/func-call-extreme-6.c | 7 +
.../gcc.target/loongarch/tls-extreme-macro.c | 35
11 files changed, 239 insertions(+), 129 deletions(-)
create mode 100644 gcc/testsuite/gcc.target/loongarch/attr-model-5.c
create mode 100644
gcc/testsuite/gcc.target/loongarch/explicit-relocs-extreme-auto-tls-ld-gd.c
create mode 100644
gcc/testsuite/gcc.target/loongarch/explicit-relocs-medium-auto-tls-ld-gd.c
create mode 100644
gcc/testsuite/gcc.target/loongarch/explicit-relocs-medium-call36-auto-tls-ld-gd.c
create mode 100644 gcc/testsuite/gcc.target/loongarch/func-call-extreme-5.c
create mode 100644 gcc/testsuite/gcc.target/loongarch/func-call-extreme-6.c
create mode 100644 gcc/testsuite/gcc.target/loongarch/tls-extreme-macro.c
--
2.39.3
