Re: [RFC, ARM][PATCH 5/5] Swap passes peephole2 and if_after_reload

2012-01-02 Thread Richard Guenther
On Fri, Dec 30, 2011 at 5:58 PM, Dmitry Melnik  wrote:
> After Thumb-2's peephole2 adds flag clobbering on suitable insns in order to
> generate 16-bit encoding for them, if-conversion can't transform these insns
> into cond_execs.  In theory, if the instruction were converted to
> conditional form, it would also use 16-bit encoding, so the flag clobbering
> doesn't have to be added to force 16-bit encoding.
> Swapping order of these passes has actually increased the number of
> if-conversions (it results in 2% more it-blocks on SPEC2K INT and
> 4% more "long" it-blocks that contain two or more instructions). However,
> this actually caused 2038 code size regression on SPEC2K INT. At first, we
> blamed this growth on the effects described in patches 1-4, but with these
> fixes the regression has only reduced by 474 bytes.  I.e. the more there are
> conditional insns, the better is the code size reduction from patches 1-4,
> but altered pass order still loses 1564 bytes to the original one.
> What do you think about the order of these passes on Thumb-2?
>
> (The patch is obvious, and is not attached).

I suppose switching them makes sense because if-conversion can create new
peephole opportunities.  Not sure if the reverse is also true?

Richard.


[RFC, ARM][PATCH 5/5] Swap passes peephole2 and if_after_reload

2011-12-30 Thread Dmitry Melnik
After Thumb-2's peephole2 adds flag clobbering on suitable insns in 
order to generate 16-bit encoding for them, if-conversion can't 
transform these insns into cond_execs.  In theory, if the instruction 
were converted to conditional form, it would also use 16-bit encoding, 
so the flag clobbering doesn't have to be added to force 16-bit encoding.
Swapping order of these passes has actually increased the number of 
if-conversions (it results in 2% more it-blocks on SPEC2K INT and
4% more "long" it-blocks that contain two or more instructions). 
However, this actually caused 2038 code size regression on SPEC2K INT. 
At first, we blamed this growth on the effects described in patches 1-4, 
but with these fixes the regression has only reduced by 474 bytes.  I.e. 
the more there are conditional insns, the better is the code size 
reduction from patches 1-4, but altered pass order still loses 1564 
bytes to the original one.

What do you think about the order of these passes on Thumb-2?

(The patch is obvious, and is not attached).