Re: [SH] PR 49880 - Fix some more -mdiv option issues

2013-03-25 Thread Oleg Endo 
On Wed, 2013-03-13 at 12:05 +0900, Kaz Kojima wrote:
> Oleg Endo  wrote:
> > The attached patch should make the -mdiv= option work as it is described
> > in the documentation (which I updated recently as part of PR 56529).
> > 
> > Tested with 'make all' and
> > 
> > make -k check-gcc RUNTESTFLAGS="sh.exp=pr49880* --target_board=sh-sim
> > \{-m2,-m2a,-m2a-nofpu,-m2a-single,-m2a-single-only,-m3,-m3e,-m4,-m4-single,
> > -m4-single-only,-m4a,-m4a-single,-m4a-single-only}"
> > 
> > OK for 4.8 and 4.7?
>  
> OK.

I've committed the attached patch including the sh-linux build fixes to
the 4.7 branch as revision 197071.

Cheers,
Oleg
Index: libgcc/config/sh/lib1funcs.S
===
--- libgcc/config/sh/lib1funcs.S	(revision 196758)
+++ libgcc/config/sh/lib1funcs.S	(working copy)
@@ -973,7 +973,7 @@
 #ifdef L_sdivsi3_i4
 	.title "SH DIVIDE"
 !! 4 byte integer Divide code for the Renesas SH
-#ifdef __SH4__
+#if defined (__SH4__) || defined (__SH2A__)
 !! args in r4 and r5, result in fpul, clobber dr0, dr2
 
 	.global	GLOBAL(sdivsi3_i4)
@@ -988,7 +988,7 @@
 	ftrc dr0,fpul
 
 	ENDFUNC(GLOBAL(sdivsi3_i4))
-#elif defined(__SH4_SINGLE__) || defined(__SH4_SINGLE_ONLY__) || (defined (__SH5__) && ! defined __SH4_NOFPU__)
+#elif defined (__SH2A_SINGLE__) || defined (__SH2A_SINGLE_ONLY__) || defined(__SH4_SINGLE__) || defined(__SH4_SINGLE_ONLY__) || (defined (__SH5__) && ! defined __SH4_NOFPU__)
 !! args in r4 and r5, result in fpul, clobber r2, dr0, dr2
 
 #if ! __SH5__ || __SH5__ == 32
@@ -1013,13 +1013,12 @@
 
 	ENDFUNC(GLOBAL(sdivsi3_i4))
 #endif /* ! __SH5__ || __SH5__ == 32 */
-#endif /* ! __SH4__ */
+#endif /* ! __SH4__ || __SH2A__  */
 #endif
 
 #ifdef L_sdivsi3
 /* __SH4_SINGLE_ONLY__ keeps this part for link compatibility with
sh2e/sh3e code.  */
-#if (! defined(__SH4__) && ! defined (__SH4_SINGLE__)) || defined (__linux__)
 !!
 !! Steve Chamberlain
 !! s...@cygnus.com
@@ -1336,13 +1335,12 @@
 
 	ENDFUNC(GLOBAL(sdivsi3))
 #endif /* ! __SHMEDIA__ */
-#endif /* ! __SH4__ */
 #endif
 #ifdef L_udivsi3_i4
 
 	.title "SH DIVIDE"
 !! 4 byte integer Divide code for the Renesas SH
-#ifdef __SH4__
+#if defined (__SH4__) || defined (__SH2A__)
 !! args in r4 and r5, result in fpul, clobber r0, r1, r4, r5, dr0, dr2, dr4,
 !! and t bit
 
@@ -1384,7 +1382,7 @@
 	.double 2147483648
 
 	ENDFUNC(GLOBAL(udivsi3_i4))
-#elif defined (__SH5__) && ! defined (__SH4_NOFPU__)
+#elif defined (__SH5__) && ! defined (__SH4_NOFPU__) && ! defined (__SH2A_NOFPU__)
 #if ! __SH5__ || __SH5__ == 32
 !! args in r4 and r5, result in fpul, clobber r20, r21, dr0, fr33
 	.mode	SHmedia
@@ -1405,7 +1403,7 @@
 
 	ENDFUNC(GLOBAL(udivsi3_i4))
 #endif /* ! __SH5__ || __SH5__ == 32 */
-#elif defined(__SH4_SINGLE__) || defined(__SH4_SINGLE_ONLY__)
+#elif defined (__SH2A_SINGLE__) || defined (__SH2A_SINGLE_ONLY__) || defined(__SH4_SINGLE__) || defined(__SH4_SINGLE_ONLY__)
 !! args in r4 and r5, result in fpul, clobber r0, r1, r4, r5, dr0, dr2, dr4
 
 	.global	GLOBAL(udivsi3_i4)
@@ -1460,7 +1458,6 @@
 #ifdef L_udivsi3
 /* __SH4_SINGLE_ONLY__ keeps this part for link compatibility with
sh2e/sh3e code.  */
-#if (! defined(__SH4__) && ! defined (__SH4_SINGLE__)) || defined (__linux__)
 
 !! args in r4 and r5, result in r0, clobbers r4, pr, and t bit
 	.global	GLOBAL(udivsi3)
@@ -1655,7 +1652,6 @@
 
 	ENDFUNC(GLOBAL(udivsi3))
 #endif /* ! __SHMEDIA__ */
-#endif /* __SH4__ */
 #endif /* L_udivsi3 */
 
 #ifdef L_udivdi3
Index: gcc/testsuite/gcc.target/sh/pr49880-1.c
===
--- gcc/testsuite/gcc.target/sh/pr49880-1.c	(revision 0)
+++ gcc/testsuite/gcc.target/sh/pr49880-1.c	(revision 0)
@@ -0,0 +1,22 @@
+/* Check that the option -mdiv=call-div1 works.  */
+/* { dg-do link { target "sh*-*-*" } } */
+/* { dg-options "-mdiv=call-div1" }  */
+/* { dg-skip-if "" { "sh*-*-*" } { "-m5*"} { "" } }  */
+
+int
+test00 (int a, int b)
+{
+  return a / b;
+}
+
+unsigned int
+test01 (unsigned int a, unsigned b)
+{
+  return a / b;
+}
+
+int
+main (int argc, char** argv)
+{
+  return test00 (argc, 123) + test01 (argc, 123);
+}
Index: gcc/testsuite/gcc.target/sh/pr49880-2.c
===
--- gcc/testsuite/gcc.target/sh/pr49880-2.c	(revision 0)
+++ gcc/testsuite/gcc.target/sh/pr49880-2.c	(revision 0)
@@ -0,0 +1,22 @@
+/* Check that the option -mdiv=call-fp works.  */
+/* { dg-do link { target "sh*-*-*" } } */
+/* { dg-options "-mdiv=call-fp" }  */
+/* { dg-skip-if "" { "sh*-*-*" } { "-m5*"} { "" } }  */
+
+int
+test00 (int a, int b)
+{
+  return a / b;
+}
+
+unsigned int
+test01 (unsigned int a, unsigned b)
+{
+  return a / b;
+}
+
+int
+main (int argc, char** argv)
+{
+  return test00 (argc, 123) + test01 (argc, 123);
+}
Index: gcc/testsuite/gcc.target/sh/pr49880-3.c
===
--- gcc/testsuite/gcc.target/sh/pr49880-3.c	(revision 0)
+++ gcc/testsuite/gcc.t

Re: [SH] PR 49880 - Fix some more -mdiv option issues

2013-03-12 Thread Kaz Kojima 
Oleg Endo  wrote:
> The attached patch should make the -mdiv= option work as it is described
> in the documentation (which I updated recently as part of PR 56529).
> 
> Tested with 'make all' and
> 
> make -k check-gcc RUNTESTFLAGS="sh.exp=pr49880* --target_board=sh-sim
> \{-m2,-m2a,-m2a-nofpu,-m2a-single,-m2a-single-only,-m3,-m3e,-m4,-m4-single,
> -m4-single-only,-m4a,-m4a-single,-m4a-single-only}"
> 
> OK for 4.8 and 4.7?
 
OK.

Regards,
kaz

[SH] PR 49880 - Fix some more -mdiv option issues

2013-03-12 Thread Oleg Endo 
Hi,

Initially I just wanted to simplify two lines as mentioned in the PR.
However, when I started writing the test cases a small can of worms
popped up.
'-m4 -mdiv=call-div1' would not link on bare metal configs because of
missing functions in libgcc, '-m2a -mdiv=call-fp' would ICE and/or not
link and '*-nofpu -mdiv=call-fp' would invoke library functions that use
the FPU.

I've also run across some confusions regarding TARGET_FPU_SINGLE and
friends, but I'm leaving a better cleanup for 4.9.  Basically it's not
possible to distinguish between -m4-nofpu and -m4-single-only, because
there are no corresponding bits.  Thus the two new mask bits in sh.opt,
which required converting some of the existing mask bit into a var, as
we already ran out of bits once in the past.

The attached patch should make the -mdiv= option work as it is described
in the documentation (which I updated recently as part of PR 56529).

Tested with 'make all' and

make -k check-gcc RUNTESTFLAGS="sh.exp=pr49880* --target_board=sh-sim
\{-m2,-m2a,-m2a-nofpu,-m2a-single,-m2a-single-only,-m3,-m3e,-m4,-m4-single,
-m4-single-only,-m4a,-m4a-single,-m4a-single-only}"

OK for 4.8 and 4.7?

Cheers,
Oleg

gcc/ChangeLog:

PR target/49880
* config/sh/sh.opt (FPU_SINGLE_ONLY): New mask.
(musermode): Convert to Var(TARGET_USERMODE).
* config/sh/sh.h (SELECT_SH2A_SINGLE_ONLY, 
SELECT_SH4_SINGLE_ONLY, MASK_ARCH): Add MASK_FPU_SINGLE_ONLY.
* config/sh/sh.c (sh_option_override): Use
TARGET_FPU_DOUBLE || TARGET_FPU_SINGLE_ONLY for call-fp case.
* config/sh/sh.md (udivsi3_i1, divsi3_i1): Remove ! TARGET_SH4 
condition.
(udivsi3_i4, divsi3_i4): Use TARGET_FPU_DOUBLE condition instead
of TARGET_SH4.
(udivsi3_i4_single, divsi3_i4_single): Use 
TARGET_FPU_SINGLE_ONLY || TARGET_FPU_DOUBLE instead of 
TARGET_HARD_SH4.

libgcc/ChangeLog:

PR target/49880
* config/sh/lib1funcs.S (sdivsi3_i4, udivsi3_i4): Enable for 
SH2A.
(sdivsi3, udivsi3): Remove SH4 check and always compile these 
functions.

testsuite/ChangeLog:

PR target/49880
* testsuite/gcc.target/sh/pr49880-1.c: New.
* testsuite/gcc.target/sh/pr49880-2.c: New.
* testsuite/gcc.target/sh/pr49880-3.c: New.
* testsuite/gcc.target/sh/pr49880-4.c: New.
* testsuite/gcc.target/sh/pr49880-5.c: New.
Index: gcc/config/sh/sh.md
===
--- gcc/config/sh/sh.md	(revision 196589)
+++ gcc/config/sh/sh.md	(working copy)
@@ -2154,7 +2154,7 @@
(clobber (reg:SI PR_REG))
(clobber (reg:SI R4_REG))
(use (match_operand:SI 1 "arith_reg_operand" "r"))]
-  "TARGET_SH1 && (! TARGET_SH4 || TARGET_DIVIDE_CALL_DIV1)"
+  "TARGET_SH1 && TARGET_DIVIDE_CALL_DIV1"
   "jsr	@%1%#"
   [(set_attr "type" "sfunc")
(set_attr "needs_delay_slot" "yes")])
@@ -2217,7 +2217,7 @@
(clobber (reg:SI R5_REG))
(use (reg:PSI FPSCR_REG))
(use (match_operand:SI 1 "arith_reg_operand" "r"))]
-  "TARGET_SH4 && ! TARGET_FPU_SINGLE"
+  "TARGET_FPU_DOUBLE && ! TARGET_FPU_SINGLE"
   "jsr	@%1%#"
   [(set_attr "type" "sfunc")
(set_attr "fp_mode" "double")
@@ -2236,7 +2236,8 @@
(clobber (reg:SI R4_REG))
(clobber (reg:SI R5_REG))
(use (match_operand:SI 1 "arith_reg_operand" "r"))]
-  "(TARGET_HARD_SH4 || TARGET_SHCOMPACT) && TARGET_FPU_SINGLE"
+  "(TARGET_FPU_SINGLE_ONLY || TARGET_FPU_DOUBLE || TARGET_SHCOMPACT)
+   && TARGET_FPU_SINGLE"
   "jsr	@%1%#"
   [(set_attr "type" "sfunc")
(set_attr "needs_delay_slot" "yes")])
@@ -2358,7 +2359,7 @@
(clobber (reg:SI R2_REG))
(clobber (reg:SI R3_REG))
(use (match_operand:SI 1 "arith_reg_operand" "r"))]
-  "TARGET_SH1 && (! TARGET_SH4 || TARGET_DIVIDE_CALL_DIV1)"
+  "TARGET_SH1 && TARGET_DIVIDE_CALL_DIV1"
   "jsr	@%1%#"
   [(set_attr "type" "sfunc")
(set_attr "needs_delay_slot" "yes")])
@@ -2487,7 +2488,7 @@
(clobber (reg:DF DR2_REG))
(use (reg:PSI FPSCR_REG))
(use (match_operand:SI 1 "arith_reg_operand" "r"))]
-  "TARGET_SH4 && ! TARGET_FPU_SINGLE"
+  "TARGET_FPU_DOUBLE && ! TARGET_FPU_SINGLE"
   "jsr	@%1%#"
   [(set_attr "type" "sfunc")
(set_attr "fp_mode" "double")
@@ -2501,7 +2502,8 @@
(clobber (reg:DF DR2_REG))
(clobber (reg:SI R2_REG))
(use (match_operand:SI 1 "arith_reg_operand" "r"))]
-  "(TARGET_HARD_SH4 || TARGET_SHCOMPACT) && TARGET_FPU_SINGLE"
+  "(TARGET_FPU_SINGLE_ONLY || TARGET_FPU_DOUBLE || TARGET_SHCOMPACT)
+   && TARGET_FPU_SINGLE"
   "jsr	@%1%#"
   [(set_attr "type" "sfunc")
(set_attr "needs_delay_slot" "yes")])
Index: gcc/config/sh/sh.opt
===
--- gcc/config/sh/sh.opt	(revision 196589)
+++ gcc/config/sh/sh.opt	(working copy)
@@ -24,6 +24,10 @@
 ;; Set if the default precision of th FPU is single.
 Mask(FPU_SINGLE)
 
+;; Set if the a double-precision FPU is present but is restricted to
+;; single precisi