optimize_function_for_size_p predicate is not stable during optab selection, because it also depends on node->count/node->frequency of the current function, which are updated during IPA, so they may change between early opts and late opts. Use optimize_size instead - optimize_size implies optimize_function_for_size_p (cfun), so if a named pattern uses "&& optimize_size" and the insn it splits into uses optimize_function_for_size_p (cfun), it shouldn't fail.
PR target/114232 gcc/ChangeLog: * config/i386/mmx.md (negv2qi2): Enable for optimize_size instead of optimize_function_for_size_p. Explicitly enable for TARGET_SSE2. (negv2qi SSE reg splitter): Enable for TARGET_SSE2 only. (<plusminus:insn>v2qi3): Enable for optimize_size instead of optimize_function_for_size_p. Explicitly enable for TARGET_SSE2. (<plusminus:insn>v2qi SSE reg splitter): Enable for TARGET_SSE2 only. (<any_shift:insn>v2qi3): Enable for optimize_size instead of optimize_function_for_size_p. Bootstrapped and regression tested on x86_64-linux-gnu {,-m32}. Uros.
diff --git a/gcc/config/i386/mmx.md b/gcc/config/i386/mmx.md index 2856ae6ffef..9a8d6030d8b 100644 --- a/gcc/config/i386/mmx.md +++ b/gcc/config/i386/mmx.md @@ -2874,11 +2874,18 @@ (define_insn "negv2qi2" (neg:V2QI (match_operand:V2QI 1 "register_operand" "0,Yw"))) (clobber (reg:CC FLAGS_REG))] - "!TARGET_PARTIAL_REG_STALL || optimize_function_for_size_p (cfun)" + "!TARGET_PARTIAL_REG_STALL || optimize_size || TARGET_SSE2" "#" [(set_attr "isa" "*,sse2") (set_attr "type" "multi") - (set_attr "mode" "QI,TI")]) + (set_attr "mode" "QI,TI") + (set (attr "enabled") + (cond [(and (eq_attr "alternative" "0") + (and (match_test "TARGET_PARTIAL_REG_STALL") + (not (match_test "optimize_function_for_size_p (cfun)")))) + (symbol_ref "false") + ] + (const_string "*")))]) (define_split [(set (match_operand:V2QI 0 "general_reg_operand") @@ -2912,8 +2919,7 @@ (define_split (neg:V2QI (match_operand:V2QI 1 "sse_reg_operand"))) (clobber (reg:CC FLAGS_REG))] - "(!TARGET_PARTIAL_REG_STALL || optimize_function_for_size_p (cfun)) - && TARGET_SSE2 && reload_completed" + "TARGET_SSE2 && reload_completed" [(set (match_dup 0) (match_dup 2)) (set (match_dup 0) (minus:V16QI (match_dup 0) (match_dup 1)))] @@ -2975,11 +2981,18 @@ (define_insn "<insn>v2qi3" (match_operand:V2QI 1 "register_operand" "<comm>0,0,Yw") (match_operand:V2QI 2 "register_operand" "Q,x,Yw"))) (clobber (reg:CC FLAGS_REG))] - "!TARGET_PARTIAL_REG_STALL || optimize_function_for_size_p (cfun)" + "!TARGET_PARTIAL_REG_STALL || optimize_size || TARGET_SSE2" "#" [(set_attr "isa" "*,sse2_noavx,avx") (set_attr "type" "multi,sseadd,sseadd") - (set_attr "mode" "QI,TI,TI")]) + (set_attr "mode" "QI,TI,TI") + (set (attr "enabled") + (cond [(and (eq_attr "alternative" "0") + (and (match_test "TARGET_PARTIAL_REG_STALL") + (not (match_test "optimize_function_for_size_p (cfun)")))) + (symbol_ref "false") + ] + (const_string "*")))]) (define_split [(set (match_operand:V2QI 0 "general_reg_operand") @@ -3021,8 +3034,7 @@ (define_split (match_operand:V2QI 1 "sse_reg_operand") (match_operand:V2QI 2 "sse_reg_operand"))) (clobber (reg:CC FLAGS_REG))] - "(!TARGET_PARTIAL_REG_STALL || optimize_function_for_size_p (cfun)) - && TARGET_SSE2 && reload_completed" + "TARGET_SSE2 && reload_completed" [(set (match_dup 0) (plusminus:V16QI (match_dup 1) (match_dup 2)))] { @@ -3684,9 +3696,10 @@ (define_insn_and_split "<insn>v2qi3" (match_operand:V2QI 1 "register_operand" "0") (match_operand:QI 2 "nonmemory_operand" "cI"))) (clobber (reg:CC FLAGS_REG))] - "!TARGET_PARTIAL_REG_STALL || optimize_function_for_size_p (cfun)" + "!TARGET_PARTIAL_REG_STALL || optimize_size" "#" - "&& reload_completed" + "(!TARGET_PARTIAL_REG_STALL || optimize_function_for_size_p (cfun)) + && reload_completed" [(parallel [(set (zero_extract:HI (match_dup 3) (const_int 8) (const_int 8)) (subreg:HI