Re: [wwwdocs][PATCH] gcc-14/changes: Update APX inline asm behavior for x86_64

2024-01-15 Thread Hongyu Wang
I'm going to check-in this if no objection

Hongyu Wang  于2024年1月9日周二 15:14写道:
>
> Hi,
>
> This patch adds missing description for inline asm behavior and related
> compiler switch for APX.
>
> Ok for gcc-wwwdocs?
>
> ---
>  htdocs/gcc-14/changes.html | 6 ++
>  1 file changed, 6 insertions(+)
>
> diff --git a/htdocs/gcc-14/changes.html b/htdocs/gcc-14/changes.html
> index e3a68998..73a90d30 100644
> --- a/htdocs/gcc-14/changes.html
> +++ b/htdocs/gcc-14/changes.html
> @@ -342,6 +342,12 @@ a work-in-progress.
>NDD, PPX and PUSH2POP2. APX support is available via the
>-mapxf compiler switch.
>
> +  For inline asm support with APX, by default the EGPR feature was
> +  disabled to prevent potential illegal instruction with EGPR occurs.
> +  To invoke egpr usage in inline asm, use new compiler option
> +  -mapx-inline-asm-use-gpr32 and user should ensure the instruction
> +  supports EGPR.
> +  
>New ISA extension support for Intel AVX10.1 was added.
>AVX10.1 intrinsics are available via the -mavx10.1 or
>-mavx10.1-256 compiler switch with 256-bit vector size
> --
> 2.31.1
>


[wwwdocs][PATCH] gcc-14/changes: Update APX inline asm behavior for x86_64

2024-01-08 Thread Hongyu Wang
Hi,

This patch adds missing description for inline asm behavior and related
compiler switch for APX.

Ok for gcc-wwwdocs?

---
 htdocs/gcc-14/changes.html | 6 ++
 1 file changed, 6 insertions(+)

diff --git a/htdocs/gcc-14/changes.html b/htdocs/gcc-14/changes.html
index e3a68998..73a90d30 100644
--- a/htdocs/gcc-14/changes.html
+++ b/htdocs/gcc-14/changes.html
@@ -342,6 +342,12 @@ a work-in-progress.
   NDD, PPX and PUSH2POP2. APX support is available via the
   -mapxf compiler switch.
   
+  For inline asm support with APX, by default the EGPR feature was
+  disabled to prevent potential illegal instruction with EGPR occurs.
+  To invoke egpr usage in inline asm, use new compiler option
+  -mapx-inline-asm-use-gpr32 and user should ensure the instruction
+  supports EGPR.
+  
   New ISA extension support for Intel AVX10.1 was added.
   AVX10.1 intrinsics are available via the -mavx10.1 or
   -mavx10.1-256 compiler switch with 256-bit vector size
-- 
2.31.1