Re: [PATCH v3] S/390: Add splitter for "and" with complement.
> gcc/ChangeLog > > * config/s390/s390.md ("*andc_split"): New splitter for and with > complement. > gcc/testsuite/ChangeLog > > * gcc.target/s390/md/andc-splitter-1.c: New test case. > * gcc.target/s390/md/andc-splitter-2.c: Likewise. Applied. Thanks! -Andreas-
Re: [PATCH v3] S/390: Add splitter for "and" with complement.
Version 5 of the patch with the splitter for -O0/-O1 removed, as discussed internally. Regression tested on s390x biarch and s390. Ciao Dominik ^_^ ^_^ -- Dominik Vogt IBM Germany gcc/ChangeLog * config/s390/s390.md ("*andc_split"): New splitter for and with complement. gcc/testsuite/ChangeLog * gcc.target/s390/md/andc-splitter-1.c: New test case. * gcc.target/s390/md/andc-splitter-2.c: Likewise. >From 480a4599ccc170c01da1c012090407d9581a6915 Mon Sep 17 00:00:00 2001 From: Dominik Vogt Date: Mon, 14 Mar 2016 17:48:17 +0100 Subject: [PATCH] S/390: Add splitter for "and" with complement. Force splitting of logical operator expressions ... with three operands, a register destination and a memory operand because there are no instructions for that and combine results in inefficient code. --- gcc/config/s390/s390.md| 27 ++ gcc/testsuite/gcc.target/s390/md/andc-splitter-1.c | 61 ++ gcc/testsuite/gcc.target/s390/md/andc-splitter-2.c | 61 ++ 3 files changed, 149 insertions(+) create mode 100644 gcc/testsuite/gcc.target/s390/md/andc-splitter-1.c create mode 100644 gcc/testsuite/gcc.target/s390/md/andc-splitter-2.c diff --git a/gcc/config/s390/s390.md b/gcc/config/s390/s390.md index f8c61a8..295e3f7 100644 --- a/gcc/config/s390/s390.md +++ b/gcc/config/s390/s390.md @@ -7262,6 +7262,33 @@ (set_attr "z10prop" "z10_super_E1,z10_super,*")]) ; +; And with complement +; +; c = ~b & a = (b & a) ^ a + +(define_insn_and_split "*andc_split_" + [(set (match_operand:GPR 0 "nonimmediate_operand" "") + (and:GPR (not:GPR (match_operand:GPR 1 "nonimmediate_operand" "")) +(match_operand:GPR 2 "general_operand" ""))) + (clobber (reg:CC CC_REGNUM))] + "! reload_completed && s390_logical_operator_ok_p (operands)" + "#" + "&& 1" + [ + (parallel + [(set (match_dup 3) (and:GPR (match_dup 1) (match_dup 2))) + (clobber (reg:CC CC_REGNUM))]) + (parallel + [(set (match_dup 0) (xor:GPR (match_dup 3) (match_dup 2))) + (clobber (reg:CC CC_REGNUM))])] +{ + if (reg_overlap_mentioned_p (operands[0], operands[2])) +operands[3] = gen_reg_rtx (mode); + else +operands[3] = operands[0]; +}) + +; ; Block and (NC) patterns. ; diff --git a/gcc/testsuite/gcc.target/s390/md/andc-splitter-1.c b/gcc/testsuite/gcc.target/s390/md/andc-splitter-1.c new file mode 100644 index 000..ed78921 --- /dev/null +++ b/gcc/testsuite/gcc.target/s390/md/andc-splitter-1.c @@ -0,0 +1,61 @@ +/* Machine description pattern tests. */ + +/* { dg-do run { target { lp64 } } } */ +/* { dg-options "-mzarch -save-temps -dP" } */ +/* Skip test if -O0 is present on the command line: + +{ dg-skip-if "" { *-*-* } { "-O0" } { "" } } + + Skip test if the -O option is missing from the command line +{ dg-skip-if "" { *-*-* } { "*" } { "-O*" } } +*/ + +__attribute__ ((noinline)) +unsigned long andc_vv(unsigned long a, unsigned long b) +{ return ~b & a; } +/* { dg-final { scan-assembler ":15 .\* \{\\*anddi3\}" } } */ +/* { dg-final { scan-assembler ":15 .\* \{\\*xordi3\}" } } */ + +__attribute__ ((noinline)) +unsigned long andc_pv(unsigned long *a, unsigned long b) +{ return ~b & *a; } +/* { dg-final { scan-assembler ":21 .\* \{\\*anddi3\}" } } */ +/* { dg-final { scan-assembler ":21 .\* \{\\*xordi3\}" } } */ + +__attribute__ ((noinline)) +unsigned long andc_vp(unsigned long a, unsigned long *b) +{ return ~*b & a; } +/* { dg-final { scan-assembler ":27 .\* \{\\*anddi3\}" } } */ +/* { dg-final { scan-assembler ":27 .\* \{\\*xordi3\}" } } */ + +__attribute__ ((noinline)) +unsigned long andc_pp(unsigned long *a, unsigned long *b) +{ return ~*b & *a; } +/* { dg-final { scan-assembler ":33 .\* \{\\*anddi3\}" } } */ +/* { dg-final { scan-assembler ":33 .\* \{\\*xordi3\}" } } */ + +/* { dg-final { scan-assembler-times "\tngr\?k\?\t" 4 } } */ +/* { dg-final { scan-assembler-times "\txgr\?\t" 4 } } */ + +int +main (void) +{ + unsigned long a = 0xc00cllu; + unsigned long b = 0x500allu; + unsigned long e = 0x8004llu; + unsigned long c; + + c = andc_vv (a, b); + if (c != e) +__builtin_abort (); + c = andc_pv (&a, b); + if (c != e) +__builtin_abort (); + c = andc_vp (a, &b); + if (c != e) +__builtin_abort (); + c = andc_pp (&a, &b); + if (c != e) +__builtin_abort (); + return 0; +} diff --git a/gcc/testsuite/gcc.target/s390/md/andc-splitter-2.c b/gcc/testsuite/gcc.target/s390/md/andc-splitter-2.c new file mode 100644 index 000..d88da4d --- /dev/null +++ b/gcc/testsuite/gcc.target/s390/md/andc-splitter-2.c @@ -0,0 +1,61 @@ +/* Machine description pattern tests. */ + +/* { dg-do run } */ +/* { dg-options "-save-temps -dP" } */ +/* Skip test if -O0 is present on the command line: + +{ dg-skip-if "" { *-*-* } { "-O0" } { "" } } + + Skip test if the -O option is missing from the command line +{ dg-skip-if "" { *-*-* } { "*" } { "-O*" } }
Re: [PATCH v3] S/390: Add splitter for "and" with complement.
Version 4 of the patch. Activated the patterns als for -mesa, as discussed internally. Bootstrapped and regression testes on s390 and s390x biarch. Ciao Dominik ^_^ ^_^ -- Dominik Vogt IBM Germany gcc/ChangeLog * config/s390/s390.md ("*andc_split", "*andc_split2"): New splitters for and with complement. gcc/testsuite/ChangeLog * gcc.target/s390/md/andc-splitter-1.c: New test case. * gcc.target/s390/md/andc-splitter-2.c: Likewise. >From c45f7038546dd1a701a17072cb5ff65c6b9f0476 Mon Sep 17 00:00:00 2001 From: Dominik Vogt Date: Mon, 14 Mar 2016 17:48:17 +0100 Subject: [PATCH] S/390: Add splitter for "and" with complement. Force splitting of logical operator expressions ... with three operands, a register destination and a memory operand because there are no instructions for that and combine results in inefficient code. --- gcc/config/s390/s390.md| 43 +++ gcc/testsuite/gcc.target/s390/md/andc-splitter-1.c | 61 ++ gcc/testsuite/gcc.target/s390/md/andc-splitter-2.c | 61 ++ 3 files changed, 165 insertions(+) create mode 100644 gcc/testsuite/gcc.target/s390/md/andc-splitter-1.c create mode 100644 gcc/testsuite/gcc.target/s390/md/andc-splitter-2.c diff --git a/gcc/config/s390/s390.md b/gcc/config/s390/s390.md index f8c61a8..66bb922 100644 --- a/gcc/config/s390/s390.md +++ b/gcc/config/s390/s390.md @@ -7262,6 +7262,49 @@ (set_attr "z10prop" "z10_super_E1,z10_super,*")]) ; +; And with complement +; +; c = ~b & a = (b & a) ^ a + +(define_insn_and_split "*andc_split_" + [(set (match_operand:GPR 0 "nonimmediate_operand" "") + (and:GPR (not:GPR (match_operand:GPR 1 "nonimmediate_operand" "")) +(match_operand:GPR 2 "general_operand" ""))) + (clobber (reg:CC CC_REGNUM))] + "! reload_completed && s390_logical_operator_ok_p (operands)" + "#" + "&& 1" + [ + (parallel + [(set (match_dup 3) (and:GPR (match_dup 1) (match_dup 2))) + (clobber (reg:CC CC_REGNUM))]) + (parallel + [(set (match_dup 0) (xor:GPR (match_dup 3) (match_dup 2))) + (clobber (reg:CC CC_REGNUM))])] +{ + if (reg_overlap_mentioned_p (operands[0], operands[2])) +operands[3] = gen_reg_rtx (mode); + else +operands[3] = operands[0]; +}) + +; Convert "(xor (operand) (-1))" to "(not (operand))" for low optimization +; levels so that "*andc_split" matches. +(define_insn_and_split "*andc_split2_" + [(set (match_operand:GPR 0 "nonimmediate_operand" "") +(and:GPR (xor:GPR (match_operand:GPR 1 "nonimmediate_operand" "") + (const_int -1)) +(match_operand:GPR 2 "general_operand" ""))) +(clobber (reg:CC CC_REGNUM))] + "s390_logical_operator_ok_p (operands)" + "#" + "&& 1" + [(parallel +[(set (match_dup 0) (and:GPR (not:GPR (match_dup 1)) (match_dup 2))) +(clobber (reg:CC CC_REGNUM))])] +) + +; ; Block and (NC) patterns. ; diff --git a/gcc/testsuite/gcc.target/s390/md/andc-splitter-1.c b/gcc/testsuite/gcc.target/s390/md/andc-splitter-1.c new file mode 100644 index 000..ed78921 --- /dev/null +++ b/gcc/testsuite/gcc.target/s390/md/andc-splitter-1.c @@ -0,0 +1,61 @@ +/* Machine description pattern tests. */ + +/* { dg-do run { target { lp64 } } } */ +/* { dg-options "-mzarch -save-temps -dP" } */ +/* Skip test if -O0 is present on the command line: + +{ dg-skip-if "" { *-*-* } { "-O0" } { "" } } + + Skip test if the -O option is missing from the command line +{ dg-skip-if "" { *-*-* } { "*" } { "-O*" } } +*/ + +__attribute__ ((noinline)) +unsigned long andc_vv(unsigned long a, unsigned long b) +{ return ~b & a; } +/* { dg-final { scan-assembler ":15 .\* \{\\*anddi3\}" } } */ +/* { dg-final { scan-assembler ":15 .\* \{\\*xordi3\}" } } */ + +__attribute__ ((noinline)) +unsigned long andc_pv(unsigned long *a, unsigned long b) +{ return ~b & *a; } +/* { dg-final { scan-assembler ":21 .\* \{\\*anddi3\}" } } */ +/* { dg-final { scan-assembler ":21 .\* \{\\*xordi3\}" } } */ + +__attribute__ ((noinline)) +unsigned long andc_vp(unsigned long a, unsigned long *b) +{ return ~*b & a; } +/* { dg-final { scan-assembler ":27 .\* \{\\*anddi3\}" } } */ +/* { dg-final { scan-assembler ":27 .\* \{\\*xordi3\}" } } */ + +__attribute__ ((noinline)) +unsigned long andc_pp(unsigned long *a, unsigned long *b) +{ return ~*b & *a; } +/* { dg-final { scan-assembler ":33 .\* \{\\*anddi3\}" } } */ +/* { dg-final { scan-assembler ":33 .\* \{\\*xordi3\}" } } */ + +/* { dg-final { scan-assembler-times "\tngr\?k\?\t" 4 } } */ +/* { dg-final { scan-assembler-times "\txgr\?\t" 4 } } */ + +int +main (void) +{ + unsigned long a = 0xc00cllu; + unsigned long b = 0x500allu; + unsigned long e = 0x8004llu; + unsigned long c; + + c = andc_vv (a, b); + if (c != e) +__builtin_abort (); + c = andc_pv (&a, b); + if (c != e) +__builtin_abort (); + c = andc_vp (a, &b); + if (c != e) +__builtin_abort ();
Re: [PATCH v3] S/390: Add splitter for "and" with complement.
Version 3 of the patch. See below for changes. Regression tested on s390x and s390. On Tue, Jul 19, 2016 at 01:05:52PM +0200, Andreas Krebbel wrote: > On 07/19/2016 11:37 AM, Dominik Vogt wrote: > > +(define_insn_and_split "*andc_split" > > Please append here to make the insn name unique. Done. > > + if (reg_overlap_mentioned_p (operands[0], operands[2])) > > +{ > > + gcc_assert (can_create_pseudo_p ()); > > Is it really safe to assume we will never get here after reload? I don't see > where this is > prevented. Btw. the very same assertion is in gen_reg_rtx anyway so no need > to duplicate it. Added "! reload_completed" to the pattern condition as discussed internally. > > +(define_insn_and_split "*andc_split2" > > missing Done. > Looks like these testcase could be merged by putting the lp64 conditions at > the scan-assembler > directives. As discussed internally, leave them in separate files but also run the second one. Ciao Dominik ^_^ ^_^ -- Dominik Vogt IBM Germany gcc/ChangeLog * config/s390/s390.md ("*andc_split", "*andc_split2"): New splitters for and with complement. gcc/testsuite/ChangeLog * gcc.target/s390/md/andc-splitter-1.c: New test case. * gcc.target/s390/md/andc-splitter-2.c: Likewise. >From e6e6f187aaac1c9368c1c2168b74ee642168a095 Mon Sep 17 00:00:00 2001 From: Dominik Vogt Date: Mon, 14 Mar 2016 17:48:17 +0100 Subject: [PATCH] S/390: Add splitter for "and" with complement. Force splitting of logical operator expressions ... with three operands, a register destination and a memory operand because there are no instructions for that and combine results in inefficient code. --- gcc/config/s390/s390.md| 43 +++ gcc/testsuite/gcc.target/s390/md/andc-splitter-1.c | 61 ++ gcc/testsuite/gcc.target/s390/md/andc-splitter-2.c | 61 ++ 3 files changed, 165 insertions(+) create mode 100644 gcc/testsuite/gcc.target/s390/md/andc-splitter-1.c create mode 100644 gcc/testsuite/gcc.target/s390/md/andc-splitter-2.c diff --git a/gcc/config/s390/s390.md b/gcc/config/s390/s390.md index f8c61a8..8f43dfa 100644 --- a/gcc/config/s390/s390.md +++ b/gcc/config/s390/s390.md @@ -7262,6 +7262,49 @@ (set_attr "z10prop" "z10_super_E1,z10_super,*")]) ; +; And with complement +; +; c = ~b & a = (b & a) ^ a + +(define_insn_and_split "*andc_split_" + [(set (match_operand:GPR 0 "nonimmediate_operand" "") + (and:GPR (not:GPR (match_operand:GPR 1 "nonimmediate_operand" "")) +(match_operand:GPR 2 "general_operand" ""))) + (clobber (reg:CC CC_REGNUM))] + "TARGET_ZARCH && ! reload_completed && s390_logical_operator_ok_p (operands)" + "#" + "&& 1" + [ + (parallel + [(set (match_dup 3) (and:GPR (match_dup 1) (match_dup 2))) + (clobber (reg:CC CC_REGNUM))]) + (parallel + [(set (match_dup 0) (xor:GPR (match_dup 3) (match_dup 2))) + (clobber (reg:CC CC_REGNUM))])] +{ + if (reg_overlap_mentioned_p (operands[0], operands[2])) +operands[3] = gen_reg_rtx (mode); + else +operands[3] = operands[0]; +}) + +; Convert "(xor (operand) (-1))" to "(not (operand))" for low optimization +; levels so that "*andc_split" matches. +(define_insn_and_split "*andc_split2_" + [(set (match_operand:GPR 0 "nonimmediate_operand" "") +(and:GPR (xor:GPR (match_operand:GPR 1 "nonimmediate_operand" "") + (const_int -1)) +(match_operand:GPR 2 "general_operand" ""))) +(clobber (reg:CC CC_REGNUM))] + "TARGET_ZARCH && s390_logical_operator_ok_p (operands)" + "#" + "&& 1" + [(parallel +[(set (match_dup 0) (and:GPR (not:GPR (match_dup 1)) (match_dup 2))) +(clobber (reg:CC CC_REGNUM))])] +) + +; ; Block and (NC) patterns. ; diff --git a/gcc/testsuite/gcc.target/s390/md/andc-splitter-1.c b/gcc/testsuite/gcc.target/s390/md/andc-splitter-1.c new file mode 100644 index 000..ed78921 --- /dev/null +++ b/gcc/testsuite/gcc.target/s390/md/andc-splitter-1.c @@ -0,0 +1,61 @@ +/* Machine description pattern tests. */ + +/* { dg-do run { target { lp64 } } } */ +/* { dg-options "-mzarch -save-temps -dP" } */ +/* Skip test if -O0 is present on the command line: + +{ dg-skip-if "" { *-*-* } { "-O0" } { "" } } + + Skip test if the -O option is missing from the command line +{ dg-skip-if "" { *-*-* } { "*" } { "-O*" } } +*/ + +__attribute__ ((noinline)) +unsigned long andc_vv(unsigned long a, unsigned long b) +{ return ~b & a; } +/* { dg-final { scan-assembler ":15 .\* \{\\*anddi3\}" } } */ +/* { dg-final { scan-assembler ":15 .\* \{\\*xordi3\}" } } */ + +__attribute__ ((noinline)) +unsigned long andc_pv(unsigned long *a, unsigned long b) +{ return ~b & *a; } +/* { dg-final { scan-assembler ":21 .\* \{\\*anddi3\}" } } */ +/* { dg-final { scan-assembler ":21 .\* \{\\*xordi3\}" } } */ + +__attribute__ ((noinline)) +unsigned long andc_vp(unsigned long a, unsigned long *b) +{ return ~*b & a; } +/* { dg