These xttheadvector speical intrinsics are different from rvv1.0
in determining function name from base name. We cannot directly
reuse the existing shapes.
In order not to invade existing shapes, we add new shapes for new
functions. Also, we create new thead-vector-builtins.cc for xtheadvector
function_base implementation.
--
发件人：juzhe.zh...@rivai.ai
发送时间：2024年1月10日(星期三) 15:01
收件人："cooper.joshua";
"gcc-patches"
抄 送：Jim Wilson; palmer;
andrew; "philipp.tomsich";
jeffreyalaw;
"christoph.muellner";
jinma; "cooper.qu"
主 题：Re: Re：[PATCH v5] RISC-V: Handle differences between XTheadvector and Vector
Why do you add theadvector shapes ? I think you can reuse the current existing
shapes.
+thead-vector-builtins.o: \+ $(srcdir)/config/riscv/thead-vector-builtins.cc
\+ $(CONFIG_H) $(SYSTEM_H) coretypes.h $(TM_H) $(TREE_H) $(RTL_H) \+
$(TM_P_H) memmodel.h insn-codes.h $(OPTABS_H) $(RECOG_H) \+ $(EXPR_H)
$(BASIC_BLOCK_H) $(FUNCTION_H) fold-const.h $(GIMPLE_H) \+ gimple-iterator.h
gimplify.h explow.h $(EMIT_RTL_H) tree-vector-builder.h \+
rtx-vector-builder.h \+ $(srcdir)/config/riscv/riscv-vector-builtins-shapes.h
\+ $(srcdir)/config/riscv/riscv-vector-builtins-bases.h \+
$(srcdir)/config/riscv/thead-vector-builtins.h \+ $(RISCV_BUILTINS_H)+
$(COMPILER) -c $(ALL_COMPILERFLAGS) $(ALL_CPPFLAGS) $(INCLUDES) \+
$(srcdir)/config/riscv/thead-vector-builtins.cc+
Why do you rebuild another new object ?
+ Copyright (C) 2022-2023 Free Software Foundation, Inc.
Incorrect copyright
juzhe.zh...@rivai.ai
发件人： joshua
发送时间： 2024-01-10 10:57
收件人： juzhe.zh...@rivai.ai; gcc-patches
抄送： Jim Wilson; palmer; andrew; philipp.tomsich; jeffreyalaw;
christoph.muellner; jinma; cooper.qu
主题： Re：[PATCH v5] RISC-V: Handle differences between XTheadvector and Vector
Hi Juzhe,
Thank you for so many useful comments for this patch!
There are some more patches to support xtheadvector
special instrinsics as well as handle register overlap issue and
rewrite assembly output.
https://gcc.gnu.org/pipermail/gcc-patches/2024-January/641774.html
https://gcc.gnu.org/pipermail/gcc-patches/2024-January/641732.html
https://gcc.gnu.org/pipermail/gcc-patches/2024-January/641733.html
Also, there is a precedent patch to refactor riscv-vector-builtins-bases.cc
https://gcc.gnu.org/pipermail/gcc-patches/2023-December/641530.html
Jeff has reviewed it, but didn't have LGTM yet.
Joshua
--
发件人：juzhe.zh...@rivai.ai
发送时间：2024年1月10日(星期三) 10:34
收件人："cooper.joshua";
"gcc-patches"
抄 送：Jim Wilson; palmer;
andrew; "philipp.tomsich";
jeffreyalaw;
"christoph.muellner";
"cooper.joshua";
jinma; "cooper.qu"
主 题：Re: [PATCH v5] RISC-V: Handle differences between XTheadvector and Vector
Thanks for your patience.
LGTM from myside.
I think it's pretty clean now. I can image in the future when some day the
theadvector is no longer used, we can remove it very easily.
And also, the theadvector won't affect our RVV1.0 maintain since it's isolated
cleanly.
But I'd like to wait for a few more days some body want to chime in.
And you should do more things before commit it:
1. Remember you should run the full coverage RVV1.0 API test, the
test-generator is downloaded from official intrinsic doc:
https://github.com/riscv-non-isa/rvv-intrinsic-doc
2. Also the regression of RV32 an RV64 of GCC testsuite.
Do you have more patches of theadvector that I didn't review ? plz point them
to me again.
Thanks.
juzhe.zh...@rivai.ai
From: Jun Sha (Joshua)
Date: 2024-01-10 10:22
To: gcc-patches
CC: jim.wilson.gcc; palmer; andrew; philipp.tomsich; jeffreyalaw;
christoph.muellner; juzhe.zhong; Jun Sha (Joshua); Jin Ma; Xianmiao Qu
Subject: [PATCH v5] RISC-V: Handle differences between XTheadvector and Vector
This patch is to handle the differences in instruction generation
between Vector and XTheadVector. In this version, we only support
partial xtheadvector instructions that leverage directly from current
RVV1.0 with simple adding "th." prefix. For different name xtheadvector
instructions but share same patterns as RVV1.0 instructions, we will
use ASM targethook to rewrite the whole string of the instructions in
the following patches.
For some vector patterns that cannot be avoided, we use
"!TARGET_XTHEADVECTOR" to disable them in vector.md in order
not to generate instructions that xtheadvector does not support,
like vmv1r and vsext.vf2.
gcc/ChangeLog:
* config.gcc: Add files for XTheadVector intrinsics.
* config/riscv/autovec.md: Guard XTheadVector.
* config/riscv/riscv-c.cc: Add pragma for XTheadVector.
* config/riscv/riscv-string.cc (expand_block_move):
Guard XTheadVector.
* config/riscv/riscv-string.cc (vls_mode_valid_p):
Avoid autovec.
*
